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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_rcc.c@630:825f75ca301e, 2015-09-28 (annotated)

Committer:
mbed_official
Date:
Mon Sep 28 10:45:10 2015 +0100
Revision:
630:825f75ca301e
Parent:
441:d2c15dda23c1 
Synchronized with git revision 54fbe4144faf309c37205a5d39fa665daa919f10



Full URL: https://github.com/mbedmicro/mbed/commit/54fbe4144faf309c37205a5d39fa665daa919f10/



NUCLEO_F031K6 : Add new target

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 340:28d1f895c6fe 1 /**
mbed_official 340:28d1f895c6fe 2 ******************************************************************************
mbed_official 340:28d1f895c6fe 3 * @file stm32f0xx_hal_rcc.c
mbed_official 340:28d1f895c6fe 4 * @author MCD Application Team
mbed_official 630:825f75ca301e 5 * @version V1.3.0
mbed_official 630:825f75ca301e 6 * @date 26-June-2015
mbed_official 340:28d1f895c6fe 7 * @brief RCC HAL module driver.
mbed_official 630:825f75ca301e 8 * This file provides firmware functions to manage the following
mbed_official 340:28d1f895c6fe 9 * functionalities of the Reset and Clock Control (RCC) peripheral:
mbed_official 441:d2c15dda23c1 10 * + Initialization and de-initialization functions
mbed_official 441:d2c15dda23c1 11 * + Peripheral Control functions
mbed_official 630:825f75ca301e 12 *
mbed_official 630:825f75ca301e 13 @verbatim
mbed_official 340:28d1f895c6fe 14 ==============================================================================
mbed_official 340:28d1f895c6fe 15 ##### RCC specific features #####
mbed_official 340:28d1f895c6fe 16 ==============================================================================
mbed_official 630:825f75ca301e 17 [..]
mbed_official 340:28d1f895c6fe 18 After reset the device is running from Internal High Speed oscillator
mbed_official 630:825f75ca301e 19 (HSI 8MHz) with Flash 0 wait state, Flash prefetch buffer is enabled,
mbed_official 340:28d1f895c6fe 20 and all peripherals are off except internal SRAM, Flash and JTAG.
mbed_official 340:28d1f895c6fe 21 (+) There is no prescaler on High speed (AHB) and Low speed (APB) busses;
mbed_official 340:28d1f895c6fe 22 all peripherals mapped on these busses are running at HSI speed.
mbed_official 340:28d1f895c6fe 23 (+) The clock for all peripherals is switched off, except the SRAM and FLASH.
mbed_official 340:28d1f895c6fe 24 (+) All GPIOs are in input floating state, except the JTAG pins which
mbed_official 340:28d1f895c6fe 25 are assigned to be used for debug purpose.
mbed_official 441:d2c15dda23c1 26 [..] Once the device started from reset, the user application has to:
mbed_official 340:28d1f895c6fe 27 (+) Configure the clock source to be used to drive the System clock
mbed_official 340:28d1f895c6fe 28 (if the application needs higher frequency/performance)
mbed_official 630:825f75ca301e 29 (+) Configure the System clock frequency and Flash settings
mbed_official 340:28d1f895c6fe 30 (+) Configure the AHB and APB busses prescalers
mbed_official 340:28d1f895c6fe 31 (+) Enable the clock for the peripheral(s) to be used
mbed_official 630:825f75ca301e 32 (+) Configure the clock source(s) for peripherals whose clocks are not
mbed_official 340:28d1f895c6fe 33 derived from the System clock (RTC, ADC, I2C, USART, TIM, USB FS, etc..)
mbed_official 441:d2c15dda23c1 34
mbed_official 441:d2c15dda23c1 35 ##### RCC Limitations #####
mbed_official 441:d2c15dda23c1 36 ==============================================================================
mbed_official 441:d2c15dda23c1 37 [..]
mbed_official 441:d2c15dda23c1 38 A delay between an RCC peripheral clock enable and the effective peripheral
mbed_official 441:d2c15dda23c1 39 enabling should be taken into account in order to manage the peripheral read/write
mbed_official 630:825f75ca301e 40 from/to registers.
mbed_official 441:d2c15dda23c1 41 (+) This delay depends on the peripheral mapping.
mbed_official 630:825f75ca301e 42 (++) AHB & APB peripherals, 1 dummy read is necessary
mbed_official 441:d2c15dda23c1 43
mbed_official 441:d2c15dda23c1 44 [..]
mbed_official 630:825f75ca301e 45 Workarounds:
mbed_official 630:825f75ca301e 46 (#) For AHB & APB peripherals, a dummy read to the peripheral register has been
mbed_official 630:825f75ca301e 47 inserted in each __HAL_RCC_PPP_CLK_ENABLE() macro.
mbed_official 630:825f75ca301e 48
mbed_official 630:825f75ca301e 49 @endverbatim
mbed_official 340:28d1f895c6fe 50 ******************************************************************************
mbed_official 340:28d1f895c6fe 51 * @attention
mbed_official 340:28d1f895c6fe 52 *
mbed_official 630:825f75ca301e 53 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 340:28d1f895c6fe 54 *
mbed_official 340:28d1f895c6fe 55 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 340:28d1f895c6fe 56 * are permitted provided that the following conditions are met:
mbed_official 340:28d1f895c6fe 57 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 340:28d1f895c6fe 58 * this list of conditions and the following disclaimer.
mbed_official 340:28d1f895c6fe 59 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 340:28d1f895c6fe 60 * this list of conditions and the following disclaimer in the documentation
mbed_official 340:28d1f895c6fe 61 * and/or other materials provided with the distribution.
mbed_official 340:28d1f895c6fe 62 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 340:28d1f895c6fe 63 * may be used to endorse or promote products derived from this software
mbed_official 340:28d1f895c6fe 64 * without specific prior written permission.
mbed_official 340:28d1f895c6fe 65 *
mbed_official 340:28d1f895c6fe 66 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 340:28d1f895c6fe 67 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 340:28d1f895c6fe 68 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 340:28d1f895c6fe 69 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 340:28d1f895c6fe 70 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 340:28d1f895c6fe 71 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 340:28d1f895c6fe 72 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 340:28d1f895c6fe 73 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 340:28d1f895c6fe 74 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 340:28d1f895c6fe 75 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 340:28d1f895c6fe 76 *
mbed_official 630:825f75ca301e 77 ******************************************************************************
mbed_official 630:825f75ca301e 78 */
mbed_official 340:28d1f895c6fe 79
mbed_official 340:28d1f895c6fe 80 /* Includes ------------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 81 #include "stm32f0xx_hal.h"
mbed_official 340:28d1f895c6fe 82
mbed_official 340:28d1f895c6fe 83 /** @addtogroup STM32F0xx_HAL_Driver
mbed_official 340:28d1f895c6fe 84 * @{
mbed_official 340:28d1f895c6fe 85 */
mbed_official 340:28d1f895c6fe 86
mbed_official 630:825f75ca301e 87 /** @defgroup RCC RCC
mbed_official 630:825f75ca301e 88 * @brief RCC HAL module driver
mbed_official 340:28d1f895c6fe 89 * @{
mbed_official 340:28d1f895c6fe 90 */
mbed_official 340:28d1f895c6fe 91
mbed_official 340:28d1f895c6fe 92 #ifdef HAL_RCC_MODULE_ENABLED
mbed_official 340:28d1f895c6fe 93
mbed_official 340:28d1f895c6fe 94 /* Private typedef -----------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 95 /* Private define ------------------------------------------------------------*/
mbed_official 630:825f75ca301e 96 /** @defgroup RCC_Private_Constants RCC Private Constants
mbed_official 630:825f75ca301e 97 * @{
mbed_official 630:825f75ca301e 98 */
mbed_official 340:28d1f895c6fe 99 /**
mbed_official 340:28d1f895c6fe 100 * @}
mbed_official 340:28d1f895c6fe 101 */
mbed_official 340:28d1f895c6fe 102 /* Private macro -------------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 103 /** @defgroup RCC_Private_Macros RCC Private Macros
mbed_official 340:28d1f895c6fe 104 * @{
mbed_official 340:28d1f895c6fe 105 */
mbed_official 630:825f75ca301e 106
mbed_official 630:825f75ca301e 107 #define MCO1_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
mbed_official 630:825f75ca301e 108 #define MCO1_GPIO_PORT GPIOA
mbed_official 630:825f75ca301e 109 #define MCO1_PIN GPIO_PIN_8
mbed_official 630:825f75ca301e 110
mbed_official 340:28d1f895c6fe 111 /**
mbed_official 340:28d1f895c6fe 112 * @}
mbed_official 340:28d1f895c6fe 113 */
mbed_official 340:28d1f895c6fe 114
mbed_official 340:28d1f895c6fe 115 /* Private variables ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 116 /** @defgroup RCC_Private_Variables RCC Private Variables
mbed_official 340:28d1f895c6fe 117 * @{
mbed_official 340:28d1f895c6fe 118 */
mbed_official 630:825f75ca301e 119 const uint8_t aAPBAHBPrescTable[16] = {0, 0, 0, 0, 1, 2, 3, 4, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 340:28d1f895c6fe 120 /**
mbed_official 340:28d1f895c6fe 121 * @}
mbed_official 340:28d1f895c6fe 122 */
mbed_official 340:28d1f895c6fe 123
mbed_official 340:28d1f895c6fe 124 /* Private function prototypes -----------------------------------------------*/
mbed_official 630:825f75ca301e 125 /* Private functions ---------------------------------------------------------*/
mbed_official 340:28d1f895c6fe 126
mbed_official 340:28d1f895c6fe 127 /** @defgroup RCC_Exported_Functions RCC Exported Functions
mbed_official 340:28d1f895c6fe 128 * @{
mbed_official 340:28d1f895c6fe 129 */
mbed_official 340:28d1f895c6fe 130
mbed_official 630:825f75ca301e 131 /** @defgroup RCC_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 630:825f75ca301e 132 * @brief Initialization and Configuration functions
mbed_official 630:825f75ca301e 133 *
mbed_official 630:825f75ca301e 134 @verbatim
mbed_official 630:825f75ca301e 135 ===============================================================================
mbed_official 340:28d1f895c6fe 136 ##### Initialization and de-initialization function #####
mbed_official 630:825f75ca301e 137 ===============================================================================
mbed_official 340:28d1f895c6fe 138 [..]
mbed_official 630:825f75ca301e 139 This section provides functions allowing to configure the internal/external oscillators
mbed_official 340:28d1f895c6fe 140 (HSE, HSI, HSI14, HSI48, LSE, LSI, PLL, CSS and MCO) and the System busses clocks (SYSCLK,
mbed_official 340:28d1f895c6fe 141 AHB and APB1).
mbed_official 340:28d1f895c6fe 142
mbed_official 340:28d1f895c6fe 143 [..] Internal/external clock and PLL configuration
mbed_official 630:825f75ca301e 144 (#) HSI (high-speed internal), 8 MHz factory-trimmed RC used directly or through
mbed_official 630:825f75ca301e 145 the PLL as System clock source.
mbed_official 340:28d1f895c6fe 146 The HSI clock can be used also to clock the USART and I2C peripherals.
mbed_official 340:28d1f895c6fe 147
mbed_official 630:825f75ca301e 148 (#) HSI14 (high-speed internal), 14 MHz factory-trimmed RC used directly to clock
mbed_official 340:28d1f895c6fe 149 the ADC peripheral.
mbed_official 340:28d1f895c6fe 150
mbed_official 630:825f75ca301e 151 (#) LSI (low-speed internal), ~40 KHz low consumption RC used as IWDG and/or RTC
mbed_official 630:825f75ca301e 152 clock source.
mbed_official 340:28d1f895c6fe 153
mbed_official 630:825f75ca301e 154 (#) HSE (high-speed external), 4 to 32 MHz crystal oscillator used directly or
mbed_official 630:825f75ca301e 155 through the PLL as System clock source. Can be used also as RTC clock source.
mbed_official 340:28d1f895c6fe 156
mbed_official 630:825f75ca301e 157 (#) LSE (low-speed external), 32 KHz oscillator used as RTC clock source.
mbed_official 340:28d1f895c6fe 158
mbed_official 630:825f75ca301e 159 (#) PLL (clocked by HSI, HSI48 or HSE), featuring different output clocks:
mbed_official 630:825f75ca301e 160 (++) The first output is used to generate the high speed system clock (up to 48 MHz)
mbed_official 630:825f75ca301e 161 (++) The second output is used to generate the clock for the USB FS (48 MHz)
mbed_official 630:825f75ca301e 162 (++) The third output may be used to generate the clock for the TIM, I2C and USART
mbed_official 630:825f75ca301e 163 peripherals (up to 48 MHz)
mbed_official 340:28d1f895c6fe 164
mbed_official 630:825f75ca301e 165 (#) CSS (Clock security system), once enable using the macro __HAL_RCC_CSS_ENABLE()
mbed_official 630:825f75ca301e 166 and if a HSE clock failure occurs(HSE used directly or through PLL as System
mbed_official 630:825f75ca301e 167 clock source), the System clockis automatically switched to HSI and an interrupt
mbed_official 630:825f75ca301e 168 is generated if enabled. The interrupt is linked to the Cortex-M0 NMI
mbed_official 630:825f75ca301e 169 (Non-Maskable Interrupt) exception vector.
mbed_official 340:28d1f895c6fe 170
mbed_official 630:825f75ca301e 171 (#) MCO (microcontroller clock output), used to output SYSCLK, HSI, HSE, LSI, LSE or PLL
mbed_official 630:825f75ca301e 172 clock (divided by 2) output on pin (such as PA8 pin).
mbed_official 340:28d1f895c6fe 173
mbed_official 630:825f75ca301e 174 [..] System, AHB and APB busses clocks configuration
mbed_official 630:825f75ca301e 175 (#) Several clock sources can be used to drive the System clock (SYSCLK): HSI,
mbed_official 630:825f75ca301e 176 HSE and PLL.
mbed_official 630:825f75ca301e 177 The AHB clock (HCLK) is derived from System clock through configurable
mbed_official 630:825f75ca301e 178 prescaler and used to clock the CPU, memory and peripherals mapped
mbed_official 630:825f75ca301e 179 on AHB bus (DMA, GPIO...). APB1 (PCLK1) clock is derived
mbed_official 630:825f75ca301e 180 from AHB clock through configurable prescalers and used to clock
mbed_official 630:825f75ca301e 181 the peripherals mapped on these busses. You can use
mbed_official 630:825f75ca301e 182 "HAL_RCC_GetSysClockFreq()" function to retrieve the frequencies of these clocks.
mbed_official 340:28d1f895c6fe 183
mbed_official 630:825f75ca301e 184 (#) All the peripheral clocks are derived from the System clock (SYSCLK) except:
mbed_official 630:825f75ca301e 185 (++) The FLASH program/erase clock which is always HSI 8MHz clock.
mbed_official 630:825f75ca301e 186 (++) The USB 48 MHz clock which is derived from the PLL VCO clock.
mbed_official 630:825f75ca301e 187 (++) The USART clock which can be derived as well from HSI 8MHz, LSI or LSE.
mbed_official 630:825f75ca301e 188 (++) The I2C clock which can be derived as well from HSI 8MHz clock.
mbed_official 630:825f75ca301e 189 (++) The ADC clock which is derived from PLL output.
mbed_official 630:825f75ca301e 190 (++) The RTC clock which is derived from the LSE, LSI or 1 MHz HSE_RTC
mbed_official 630:825f75ca301e 191 (HSE divided by a programmable prescaler). The System clock (SYSCLK)
mbed_official 630:825f75ca301e 192 frequency must be higher or equal to the RTC clock frequency.
mbed_official 630:825f75ca301e 193 (++) IWDG clock which is always the LSI clock.
mbed_official 340:28d1f895c6fe 194
mbed_official 630:825f75ca301e 195 (#) For the STM32F0xx devices, the maximum frequency of the SYSCLK, HCLK and PCLK1 is 48 MHz,
mbed_official 630:825f75ca301e 196 Depending on the SYSCLK frequency, the flash latency should be adapted accordingly:
mbed_official 630:825f75ca301e 197 +-----------------------------------------------+
mbed_official 630:825f75ca301e 198 | Latency | SYSCLK clock frequency (MHz) |
mbed_official 630:825f75ca301e 199 |---------------|-------------------------------|
mbed_official 630:825f75ca301e 200 |0WS(1CPU cycle)| 0 < SYSCLK <= 24 |
mbed_official 630:825f75ca301e 201 |---------------|-------------------------------|
mbed_official 630:825f75ca301e 202 |1WS(2CPU cycle)| 24 < SYSCLK <= 48 |
mbed_official 630:825f75ca301e 203 +-----------------------------------------------+
mbed_official 340:28d1f895c6fe 204
mbed_official 630:825f75ca301e 205 (#) After reset, the System clock source is the HSI (8 MHz) with 0 WS and
mbed_official 630:825f75ca301e 206 prefetch is disabled.
mbed_official 630:825f75ca301e 207 @endverbatim
mbed_official 340:28d1f895c6fe 208 * @{
mbed_official 340:28d1f895c6fe 209 */
mbed_official 340:28d1f895c6fe 210
mbed_official 340:28d1f895c6fe 211 /**
mbed_official 340:28d1f895c6fe 212 * @brief Resets the RCC clock configuration to the default reset state.
mbed_official 340:28d1f895c6fe 213 * @note The default reset state of the clock configuration is given below:
mbed_official 340:28d1f895c6fe 214 * - HSI ON and used as system clock source
mbed_official 340:28d1f895c6fe 215 * - HSE and PLL OFF
mbed_official 340:28d1f895c6fe 216 * - AHB, APB1 prescaler set to 1.
mbed_official 630:825f75ca301e 217 * - CSS and MCO1 OFF
mbed_official 340:28d1f895c6fe 218 * - All interrupts disabled
mbed_official 340:28d1f895c6fe 219 * @note This function doesn't modify the configuration of the
mbed_official 630:825f75ca301e 220 * - Peripheral clocks
mbed_official 630:825f75ca301e 221 * - LSI, LSE and RTC clocks
mbed_official 340:28d1f895c6fe 222 * @retval None
mbed_official 340:28d1f895c6fe 223 */
mbed_official 340:28d1f895c6fe 224 void HAL_RCC_DeInit(void)
mbed_official 340:28d1f895c6fe 225 {
mbed_official 340:28d1f895c6fe 226 /* Set HSION bit, HSITRIM[4:0] bits to the reset value*/
mbed_official 340:28d1f895c6fe 227 SET_BIT(RCC->CR, RCC_CR_HSION | RCC_CR_HSITRIM_4);
mbed_official 340:28d1f895c6fe 228
mbed_official 340:28d1f895c6fe 229 /* Reset SW[1:0], HPRE[3:0], PPRE[2:0] and MCOSEL[2:0] bits */
mbed_official 340:28d1f895c6fe 230 CLEAR_BIT(RCC->CFGR, RCC_CFGR_SW | RCC_CFGR_HPRE | RCC_CFGR_PPRE | RCC_CFGR_MCO);
mbed_official 340:28d1f895c6fe 231
mbed_official 340:28d1f895c6fe 232 /* Reset HSEON, CSSON, PLLON bits */
mbed_official 340:28d1f895c6fe 233 CLEAR_BIT(RCC->CR, RCC_CR_PLLON | RCC_CR_CSSON | RCC_CR_HSEON);
mbed_official 340:28d1f895c6fe 234
mbed_official 340:28d1f895c6fe 235 /* Reset HSEBYP bit */
mbed_official 340:28d1f895c6fe 236 CLEAR_BIT(RCC->CR, RCC_CR_HSEBYP);
mbed_official 340:28d1f895c6fe 237
mbed_official 340:28d1f895c6fe 238 /* Reset CFGR register */
mbed_official 340:28d1f895c6fe 239 CLEAR_REG(RCC->CFGR);
mbed_official 340:28d1f895c6fe 240
mbed_official 340:28d1f895c6fe 241 /* Reset CFGR2 register */
mbed_official 340:28d1f895c6fe 242 CLEAR_REG(RCC->CFGR2);
mbed_official 340:28d1f895c6fe 243
mbed_official 340:28d1f895c6fe 244 /* Reset CFGR3 register */
mbed_official 340:28d1f895c6fe 245 CLEAR_REG(RCC->CFGR3);
mbed_official 340:28d1f895c6fe 246
mbed_official 340:28d1f895c6fe 247 /* Disable all interrupts */
mbed_official 630:825f75ca301e 248 CLEAR_REG(RCC->CIR);
mbed_official 340:28d1f895c6fe 249 }
mbed_official 340:28d1f895c6fe 250
mbed_official 340:28d1f895c6fe 251 /**
mbed_official 340:28d1f895c6fe 252 * @brief Initializes the RCC Oscillators according to the specified parameters in the
mbed_official 340:28d1f895c6fe 253 * RCC_OscInitTypeDef.
mbed_official 340:28d1f895c6fe 254 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 340:28d1f895c6fe 255 * contains the configuration information for the RCC Oscillators.
mbed_official 340:28d1f895c6fe 256 * @note The PLL is not disabled when used as system clock.
mbed_official 340:28d1f895c6fe 257 * @retval HAL status
mbed_official 340:28d1f895c6fe 258 */
mbed_official 630:825f75ca301e 259 HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 340:28d1f895c6fe 260 {
mbed_official 630:825f75ca301e 261 uint32_t tickstart = 0;
mbed_official 630:825f75ca301e 262
mbed_official 630:825f75ca301e 263 /* Check the parameters */
mbed_official 630:825f75ca301e 264 assert_param(RCC_OscInitStruct != NULL);
mbed_official 630:825f75ca301e 265 assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
mbed_official 340:28d1f895c6fe 266
mbed_official 630:825f75ca301e 267 /*------------------------------- HSE Configuration ------------------------*/
mbed_official 630:825f75ca301e 268 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
mbed_official 630:825f75ca301e 269 {
mbed_official 630:825f75ca301e 270 /* Check the parameters */
mbed_official 630:825f75ca301e 271 assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
mbed_official 630:825f75ca301e 272
mbed_official 630:825f75ca301e 273 /* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
mbed_official 630:825f75ca301e 274 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 630:825f75ca301e 275 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
mbed_official 630:825f75ca301e 276 {
mbed_official 630:825f75ca301e 277 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
mbed_official 630:825f75ca301e 278 {
mbed_official 630:825f75ca301e 279 return HAL_ERROR;
mbed_official 630:825f75ca301e 280 }
mbed_official 630:825f75ca301e 281 }
mbed_official 630:825f75ca301e 282 else
mbed_official 630:825f75ca301e 283 {
mbed_official 630:825f75ca301e 284 /* Reset HSEON and HSEBYP bits before configuring the HSE --------------*/
mbed_official 630:825f75ca301e 285 __HAL_RCC_HSE_CONFIG(RCC_HSE_OFF);
mbed_official 630:825f75ca301e 286
mbed_official 630:825f75ca301e 287 /* Get Start Tick*/
mbed_official 630:825f75ca301e 288 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 289
mbed_official 630:825f75ca301e 290 /* Wait till HSE is disabled */
mbed_official 630:825f75ca301e 291 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 630:825f75ca301e 292 {
mbed_official 630:825f75ca301e 293 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 294 {
mbed_official 630:825f75ca301e 295 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 296 }
mbed_official 630:825f75ca301e 297 }
mbed_official 630:825f75ca301e 298
mbed_official 630:825f75ca301e 299 /* Set the new HSE configuration ---------------------------------------*/
mbed_official 630:825f75ca301e 300 __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
mbed_official 630:825f75ca301e 301
mbed_official 630:825f75ca301e 302 /* Check the HSE State */
mbed_official 630:825f75ca301e 303 if(RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
mbed_official 630:825f75ca301e 304 {
mbed_official 630:825f75ca301e 305 /* Get Start Tick*/
mbed_official 630:825f75ca301e 306 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 307
mbed_official 630:825f75ca301e 308 /* Wait till HSE is ready */
mbed_official 630:825f75ca301e 309 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 630:825f75ca301e 310 {
mbed_official 630:825f75ca301e 311 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 312 {
mbed_official 630:825f75ca301e 313 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 314 }
mbed_official 630:825f75ca301e 315 }
mbed_official 630:825f75ca301e 316 }
mbed_official 630:825f75ca301e 317 else
mbed_official 630:825f75ca301e 318 {
mbed_official 630:825f75ca301e 319 /* Get Start Tick*/
mbed_official 630:825f75ca301e 320 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 321
mbed_official 630:825f75ca301e 322 /* Wait till HSE is bypassed or disabled */
mbed_official 630:825f75ca301e 323 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
mbed_official 630:825f75ca301e 324 {
mbed_official 630:825f75ca301e 325 if((HAL_GetTick() - tickstart ) > HSE_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 326 {
mbed_official 630:825f75ca301e 327 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 328 }
mbed_official 630:825f75ca301e 329 }
mbed_official 630:825f75ca301e 330 }
mbed_official 630:825f75ca301e 331 }
mbed_official 630:825f75ca301e 332 }
mbed_official 630:825f75ca301e 333 /*----------------------------- HSI Configuration --------------------------*/
mbed_official 630:825f75ca301e 334 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
mbed_official 630:825f75ca301e 335 {
mbed_official 630:825f75ca301e 336 /* Check the parameters */
mbed_official 630:825f75ca301e 337 assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
mbed_official 630:825f75ca301e 338 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
mbed_official 630:825f75ca301e 339
mbed_official 630:825f75ca301e 340 /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
mbed_official 630:825f75ca301e 341 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 630:825f75ca301e 342 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI)))
mbed_official 630:825f75ca301e 343 {
mbed_official 630:825f75ca301e 344 /* When HSI is used as system clock it will not disabled */
mbed_official 630:825f75ca301e 345 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
mbed_official 630:825f75ca301e 346 {
mbed_official 630:825f75ca301e 347 return HAL_ERROR;
mbed_official 630:825f75ca301e 348 }
mbed_official 630:825f75ca301e 349 /* Otherwise, just the calibration is allowed */
mbed_official 630:825f75ca301e 350 else
mbed_official 630:825f75ca301e 351 {
mbed_official 630:825f75ca301e 352 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 630:825f75ca301e 353 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 630:825f75ca301e 354 }
mbed_official 630:825f75ca301e 355 }
mbed_official 630:825f75ca301e 356 else
mbed_official 630:825f75ca301e 357 {
mbed_official 630:825f75ca301e 358 /* Check the HSI State */
mbed_official 630:825f75ca301e 359 if(RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
mbed_official 630:825f75ca301e 360 {
mbed_official 630:825f75ca301e 361 /* Enable the Internal High Speed oscillator (HSI). */
mbed_official 630:825f75ca301e 362 __HAL_RCC_HSI_ENABLE();
mbed_official 630:825f75ca301e 363
mbed_official 630:825f75ca301e 364 /* Get Start Tick*/
mbed_official 630:825f75ca301e 365 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 366
mbed_official 630:825f75ca301e 367 /* Wait till HSI is ready */
mbed_official 630:825f75ca301e 368 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 630:825f75ca301e 369 {
mbed_official 630:825f75ca301e 370 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 371 {
mbed_official 630:825f75ca301e 372 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 373 }
mbed_official 630:825f75ca301e 374 }
mbed_official 630:825f75ca301e 375
mbed_official 630:825f75ca301e 376 /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
mbed_official 630:825f75ca301e 377 __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
mbed_official 630:825f75ca301e 378 }
mbed_official 630:825f75ca301e 379 else
mbed_official 630:825f75ca301e 380 {
mbed_official 630:825f75ca301e 381 /* Disable the Internal High Speed oscillator (HSI). */
mbed_official 630:825f75ca301e 382 __HAL_RCC_HSI_DISABLE();
mbed_official 630:825f75ca301e 383
mbed_official 630:825f75ca301e 384 /* Get Start Tick*/
mbed_official 630:825f75ca301e 385 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 386
mbed_official 630:825f75ca301e 387 /* Wait till HSI is disabled */
mbed_official 630:825f75ca301e 388 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
mbed_official 630:825f75ca301e 389 {
mbed_official 630:825f75ca301e 390 if((HAL_GetTick() - tickstart ) > HSI_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 391 {
mbed_official 630:825f75ca301e 392 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 393 }
mbed_official 630:825f75ca301e 394 }
mbed_official 630:825f75ca301e 395 }
mbed_official 630:825f75ca301e 396 }
mbed_official 630:825f75ca301e 397 }
mbed_official 630:825f75ca301e 398 /*------------------------------ LSI Configuration -------------------------*/
mbed_official 630:825f75ca301e 399 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
mbed_official 630:825f75ca301e 400 {
mbed_official 630:825f75ca301e 401 /* Check the parameters */
mbed_official 630:825f75ca301e 402 assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
mbed_official 630:825f75ca301e 403
mbed_official 630:825f75ca301e 404 /* Check the LSI State */
mbed_official 630:825f75ca301e 405 if(RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
mbed_official 630:825f75ca301e 406 {
mbed_official 630:825f75ca301e 407 /* Enable the Internal Low Speed oscillator (LSI). */
mbed_official 630:825f75ca301e 408 __HAL_RCC_LSI_ENABLE();
mbed_official 630:825f75ca301e 409
mbed_official 630:825f75ca301e 410 /* Get Start Tick*/
mbed_official 630:825f75ca301e 411 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 412
mbed_official 630:825f75ca301e 413 /* Wait till LSI is ready */
mbed_official 630:825f75ca301e 414 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
mbed_official 630:825f75ca301e 415 {
mbed_official 630:825f75ca301e 416 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 417 {
mbed_official 630:825f75ca301e 418 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 419 }
mbed_official 630:825f75ca301e 420 }
mbed_official 630:825f75ca301e 421 }
mbed_official 630:825f75ca301e 422 else
mbed_official 630:825f75ca301e 423 {
mbed_official 630:825f75ca301e 424 /* Disable the Internal Low Speed oscillator (LSI). */
mbed_official 630:825f75ca301e 425 __HAL_RCC_LSI_DISABLE();
mbed_official 630:825f75ca301e 426
mbed_official 630:825f75ca301e 427 /* Get Start Tick*/
mbed_official 630:825f75ca301e 428 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 429
mbed_official 630:825f75ca301e 430 /* Wait till LSI is disabled */
mbed_official 630:825f75ca301e 431 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
mbed_official 630:825f75ca301e 432 {
mbed_official 630:825f75ca301e 433 if((HAL_GetTick() - tickstart ) > LSI_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 434 {
mbed_official 630:825f75ca301e 435 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 436 }
mbed_official 630:825f75ca301e 437 }
mbed_official 630:825f75ca301e 438 }
mbed_official 630:825f75ca301e 439 }
mbed_official 630:825f75ca301e 440 /*------------------------------ LSE Configuration -------------------------*/
mbed_official 630:825f75ca301e 441 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
mbed_official 630:825f75ca301e 442 {
mbed_official 630:825f75ca301e 443 /* Check the parameters */
mbed_official 630:825f75ca301e 444 assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
mbed_official 630:825f75ca301e 445
mbed_official 630:825f75ca301e 446 /* Enable Power Clock*/
mbed_official 630:825f75ca301e 447 __HAL_RCC_PWR_CLK_ENABLE();
mbed_official 630:825f75ca301e 448
mbed_official 630:825f75ca301e 449 /* Enable write access to Backup domain */
mbed_official 630:825f75ca301e 450 SET_BIT(PWR->CR, PWR_CR_DBP);
mbed_official 630:825f75ca301e 451
mbed_official 630:825f75ca301e 452 /* Wait for Backup domain Write protection disable */
mbed_official 630:825f75ca301e 453 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 454
mbed_official 630:825f75ca301e 455 while((PWR->CR & PWR_CR_DBP) == RESET)
mbed_official 630:825f75ca301e 456 {
mbed_official 630:825f75ca301e 457 if((HAL_GetTick() - tickstart ) > RCC_DBP_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 458 {
mbed_official 630:825f75ca301e 459 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 460 }
mbed_official 630:825f75ca301e 461 }
mbed_official 630:825f75ca301e 462
mbed_official 630:825f75ca301e 463 /* Reset LSEON and LSEBYP bits before configuring the LSE ----------------*/
mbed_official 630:825f75ca301e 464 __HAL_RCC_LSE_CONFIG(RCC_LSE_OFF);
mbed_official 630:825f75ca301e 465
mbed_official 630:825f75ca301e 466 /* Get Start Tick*/
mbed_official 630:825f75ca301e 467 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 468
mbed_official 630:825f75ca301e 469 /* Wait till LSE is disabled */
mbed_official 630:825f75ca301e 470 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 630:825f75ca301e 471 {
mbed_official 630:825f75ca301e 472 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 473 {
mbed_official 630:825f75ca301e 474 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 475 }
mbed_official 630:825f75ca301e 476 }
mbed_official 630:825f75ca301e 477
mbed_official 630:825f75ca301e 478 /* Set the new LSE configuration -----------------------------------------*/
mbed_official 630:825f75ca301e 479 __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
mbed_official 630:825f75ca301e 480 /* Check the LSE State */
mbed_official 630:825f75ca301e 481 if(RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
mbed_official 630:825f75ca301e 482 {
mbed_official 630:825f75ca301e 483 /* Get Start Tick*/
mbed_official 630:825f75ca301e 484 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 485
mbed_official 630:825f75ca301e 486 /* Wait till LSE is ready */
mbed_official 630:825f75ca301e 487 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
mbed_official 630:825f75ca301e 488 {
mbed_official 630:825f75ca301e 489 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 490 {
mbed_official 630:825f75ca301e 491 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 492 }
mbed_official 630:825f75ca301e 493 }
mbed_official 630:825f75ca301e 494 }
mbed_official 630:825f75ca301e 495 else
mbed_official 630:825f75ca301e 496 {
mbed_official 630:825f75ca301e 497 /* Get Start Tick*/
mbed_official 630:825f75ca301e 498 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 499
mbed_official 630:825f75ca301e 500 /* Wait till LSE is disabled */
mbed_official 630:825f75ca301e 501 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
mbed_official 630:825f75ca301e 502 {
mbed_official 630:825f75ca301e 503 if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 504 {
mbed_official 630:825f75ca301e 505 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 506 }
mbed_official 630:825f75ca301e 507 }
mbed_official 630:825f75ca301e 508 }
mbed_official 630:825f75ca301e 509 }
mbed_official 630:825f75ca301e 510
mbed_official 630:825f75ca301e 511 /*----------------------------- HSI14 Configuration --------------------------*/
mbed_official 630:825f75ca301e 512 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI14) == RCC_OSCILLATORTYPE_HSI14)
mbed_official 630:825f75ca301e 513 {
mbed_official 630:825f75ca301e 514 /* Check the parameters */
mbed_official 630:825f75ca301e 515 assert_param(IS_RCC_HSI14(RCC_OscInitStruct->HSI14State));
mbed_official 630:825f75ca301e 516 assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSI14CalibrationValue));
mbed_official 630:825f75ca301e 517
mbed_official 630:825f75ca301e 518 /* Check the HSI14 State */
mbed_official 630:825f75ca301e 519 if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ON)
mbed_official 630:825f75ca301e 520 {
mbed_official 630:825f75ca301e 521 /* Disable ADC control of the Internal High Speed oscillator HSI14 */
mbed_official 630:825f75ca301e 522 __HAL_RCC_HSI14ADC_DISABLE();
mbed_official 630:825f75ca301e 523
mbed_official 630:825f75ca301e 524 /* Enable the Internal High Speed oscillator (HSI). */
mbed_official 630:825f75ca301e 525 __HAL_RCC_HSI14_ENABLE();
mbed_official 630:825f75ca301e 526
mbed_official 630:825f75ca301e 527 /* Get timeout */
mbed_official 630:825f75ca301e 528 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 529
mbed_official 630:825f75ca301e 530 /* Wait till HSI is ready */
mbed_official 630:825f75ca301e 531 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) == RESET)
mbed_official 630:825f75ca301e 532 {
mbed_official 630:825f75ca301e 533 if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 534 {
mbed_official 630:825f75ca301e 535 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 536 }
mbed_official 630:825f75ca301e 537 }
mbed_official 630:825f75ca301e 538
mbed_official 630:825f75ca301e 539 /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
mbed_official 630:825f75ca301e 540 __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
mbed_official 630:825f75ca301e 541 }
mbed_official 630:825f75ca301e 542 else if(RCC_OscInitStruct->HSI14State == RCC_HSI14_ADC_CONTROL)
mbed_official 630:825f75ca301e 543 {
mbed_official 630:825f75ca301e 544 /* Enable ADC control of the Internal High Speed oscillator HSI14 */
mbed_official 630:825f75ca301e 545 __HAL_RCC_HSI14ADC_ENABLE();
mbed_official 630:825f75ca301e 546
mbed_official 630:825f75ca301e 547 /* Adjusts the Internal High Speed oscillator 14Mhz (HSI14) calibration value. */
mbed_official 630:825f75ca301e 548 __HAL_RCC_HSI14_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSI14CalibrationValue);
mbed_official 630:825f75ca301e 549 }
mbed_official 630:825f75ca301e 550 else
mbed_official 630:825f75ca301e 551 {
mbed_official 630:825f75ca301e 552 /* Disable ADC control of the Internal High Speed oscillator HSI14 */
mbed_official 630:825f75ca301e 553 __HAL_RCC_HSI14ADC_DISABLE();
mbed_official 630:825f75ca301e 554
mbed_official 630:825f75ca301e 555 /* Disable the Internal High Speed oscillator (HSI). */
mbed_official 630:825f75ca301e 556 __HAL_RCC_HSI14_DISABLE();
mbed_official 630:825f75ca301e 557
mbed_official 630:825f75ca301e 558 /* Get timeout */
mbed_official 630:825f75ca301e 559 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 560
mbed_official 630:825f75ca301e 561 /* Wait till HSI is ready */
mbed_official 630:825f75ca301e 562 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI14RDY) != RESET)
mbed_official 630:825f75ca301e 563 {
mbed_official 630:825f75ca301e 564 if((HAL_GetTick() - tickstart) > HSI14_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 565 {
mbed_official 630:825f75ca301e 566 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 567 }
mbed_official 630:825f75ca301e 568 }
mbed_official 630:825f75ca301e 569 }
mbed_official 630:825f75ca301e 570 }
mbed_official 630:825f75ca301e 571
mbed_official 630:825f75ca301e 572 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 573 /*----------------------------- HSI48 Configuration --------------------------*/
mbed_official 630:825f75ca301e 574 if(((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI48) == RCC_OSCILLATORTYPE_HSI48)
mbed_official 630:825f75ca301e 575 {
mbed_official 630:825f75ca301e 576 /* Check the parameters */
mbed_official 630:825f75ca301e 577 assert_param(IS_RCC_HSI48(RCC_OscInitStruct->HSI48State));
mbed_official 630:825f75ca301e 578
mbed_official 630:825f75ca301e 579 /* When the HSI48 is used as system clock it is not allowed to be disabled */
mbed_official 630:825f75ca301e 580 if((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI48) ||
mbed_official 630:825f75ca301e 581 ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI48)))
mbed_official 630:825f75ca301e 582 {
mbed_official 630:825f75ca301e 583 if((__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET) && (RCC_OscInitStruct->HSI48State != RCC_HSI48_ON))
mbed_official 630:825f75ca301e 584 {
mbed_official 630:825f75ca301e 585 return HAL_ERROR;
mbed_official 630:825f75ca301e 586 }
mbed_official 630:825f75ca301e 587 }
mbed_official 630:825f75ca301e 588 else
mbed_official 630:825f75ca301e 589 {
mbed_official 630:825f75ca301e 590 /* Check the HSI State */
mbed_official 630:825f75ca301e 591 if(RCC_OscInitStruct->HSI48State != RCC_HSI48_OFF)
mbed_official 630:825f75ca301e 592 {
mbed_official 630:825f75ca301e 593 /* Enable the Internal High Speed oscillator (HSI48). */
mbed_official 630:825f75ca301e 594 __HAL_RCC_HSI48_ENABLE();
mbed_official 630:825f75ca301e 595
mbed_official 630:825f75ca301e 596 /* Get timeout */
mbed_official 630:825f75ca301e 597 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 598
mbed_official 630:825f75ca301e 599 /* Wait till HSI is ready */
mbed_official 630:825f75ca301e 600 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official 630:825f75ca301e 601 {
mbed_official 630:825f75ca301e 602 if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 603 {
mbed_official 630:825f75ca301e 604 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 605 }
mbed_official 630:825f75ca301e 606 }
mbed_official 630:825f75ca301e 607 }
mbed_official 630:825f75ca301e 608 else
mbed_official 630:825f75ca301e 609 {
mbed_official 630:825f75ca301e 610 /* Disable the Internal High Speed oscillator (HSI48). */
mbed_official 630:825f75ca301e 611 __HAL_RCC_HSI48_DISABLE();
mbed_official 630:825f75ca301e 612
mbed_official 630:825f75ca301e 613 /* Get timeout */
mbed_official 630:825f75ca301e 614 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 615
mbed_official 630:825f75ca301e 616 /* Wait till HSI is ready */
mbed_official 630:825f75ca301e 617 while(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) != RESET)
mbed_official 630:825f75ca301e 618 {
mbed_official 630:825f75ca301e 619 if((HAL_GetTick() - tickstart) > HSI48_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 620 {
mbed_official 630:825f75ca301e 621 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 622 }
mbed_official 630:825f75ca301e 623 }
mbed_official 630:825f75ca301e 624 }
mbed_official 630:825f75ca301e 625 }
mbed_official 630:825f75ca301e 626 }
mbed_official 630:825f75ca301e 627 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 628
mbed_official 630:825f75ca301e 629 /*-------------------------------- PLL Configuration -----------------------*/
mbed_official 630:825f75ca301e 630 /* Check the parameters */
mbed_official 630:825f75ca301e 631 assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
mbed_official 630:825f75ca301e 632 if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
mbed_official 630:825f75ca301e 633 {
mbed_official 630:825f75ca301e 634 /* Check if the PLL is used as system clock or not */
mbed_official 630:825f75ca301e 635 if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 630:825f75ca301e 636 {
mbed_official 630:825f75ca301e 637 if((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
mbed_official 630:825f75ca301e 638 {
mbed_official 630:825f75ca301e 639 /* Check the parameters */
mbed_official 630:825f75ca301e 640 assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
mbed_official 630:825f75ca301e 641 assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
mbed_official 630:825f75ca301e 642 assert_param(IS_RCC_PREDIV(RCC_OscInitStruct->PLL.PREDIV));
mbed_official 630:825f75ca301e 643
mbed_official 630:825f75ca301e 644 /* Disable the main PLL. */
mbed_official 630:825f75ca301e 645 __HAL_RCC_PLL_DISABLE();
mbed_official 630:825f75ca301e 646
mbed_official 630:825f75ca301e 647 /* Get Start Tick*/
mbed_official 630:825f75ca301e 648 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 649
mbed_official 630:825f75ca301e 650 /* Wait till PLL is disabled */
mbed_official 630:825f75ca301e 651 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 630:825f75ca301e 652 {
mbed_official 630:825f75ca301e 653 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 654 {
mbed_official 630:825f75ca301e 655 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 656 }
mbed_official 630:825f75ca301e 657 }
mbed_official 630:825f75ca301e 658
mbed_official 630:825f75ca301e 659 /* Configure the main PLL clock source, predivider and multiplication factor. */
mbed_official 630:825f75ca301e 660 __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
mbed_official 630:825f75ca301e 661 RCC_OscInitStruct->PLL.PREDIV,
mbed_official 630:825f75ca301e 662 RCC_OscInitStruct->PLL.PLLMUL);
mbed_official 630:825f75ca301e 663 /* Enable the main PLL. */
mbed_official 630:825f75ca301e 664 __HAL_RCC_PLL_ENABLE();
mbed_official 630:825f75ca301e 665
mbed_official 630:825f75ca301e 666 /* Get Start Tick*/
mbed_official 630:825f75ca301e 667 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 668
mbed_official 630:825f75ca301e 669 /* Wait till PLL is ready */
mbed_official 630:825f75ca301e 670 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 630:825f75ca301e 671 {
mbed_official 630:825f75ca301e 672 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 673 {
mbed_official 630:825f75ca301e 674 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 675 }
mbed_official 630:825f75ca301e 676 }
mbed_official 630:825f75ca301e 677 }
mbed_official 630:825f75ca301e 678 else
mbed_official 630:825f75ca301e 679 {
mbed_official 630:825f75ca301e 680 /* Disable the main PLL. */
mbed_official 630:825f75ca301e 681 __HAL_RCC_PLL_DISABLE();
mbed_official 630:825f75ca301e 682
mbed_official 630:825f75ca301e 683 /* Get Start Tick*/
mbed_official 630:825f75ca301e 684 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 685
mbed_official 630:825f75ca301e 686 /* Wait till PLL is disabled */
mbed_official 630:825f75ca301e 687 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
mbed_official 630:825f75ca301e 688 {
mbed_official 630:825f75ca301e 689 if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 690 {
mbed_official 630:825f75ca301e 691 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 692 }
mbed_official 630:825f75ca301e 693 }
mbed_official 630:825f75ca301e 694 }
mbed_official 630:825f75ca301e 695 }
mbed_official 630:825f75ca301e 696 else
mbed_official 630:825f75ca301e 697 {
mbed_official 630:825f75ca301e 698 return HAL_ERROR;
mbed_official 630:825f75ca301e 699 }
mbed_official 630:825f75ca301e 700 }
mbed_official 630:825f75ca301e 701
mbed_official 630:825f75ca301e 702 return HAL_OK;
mbed_official 340:28d1f895c6fe 703 }
mbed_official 340:28d1f895c6fe 704
mbed_official 340:28d1f895c6fe 705 /**
mbed_official 630:825f75ca301e 706 * @brief Initializes the CPU, AHB and APB busses clocks according to the specified
mbed_official 340:28d1f895c6fe 707 * parameters in the RCC_ClkInitStruct.
mbed_official 340:28d1f895c6fe 708 * @param RCC_ClkInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 340:28d1f895c6fe 709 * contains the configuration information for the RCC peripheral.
mbed_official 630:825f75ca301e 710 * @param FLatency: FLASH Latency
mbed_official 340:28d1f895c6fe 711 * This parameter can be one of the following values:
mbed_official 340:28d1f895c6fe 712 * @arg FLASH_LATENCY_0: FLASH 0 Latency cycle
mbed_official 340:28d1f895c6fe 713 * @arg FLASH_LATENCY_1: FLASH 1 Latency cycle
mbed_official 340:28d1f895c6fe 714 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 340:28d1f895c6fe 715 * and updated by HAL_RCC_GetHCLKFreq() function called within this function
mbed_official 340:28d1f895c6fe 716 *
mbed_official 340:28d1f895c6fe 717 * @note The HSI is used (enabled by hardware) as system clock source after
mbed_official 340:28d1f895c6fe 718 * startup from Reset, wake-up from STOP and STANDBY mode, or in case
mbed_official 340:28d1f895c6fe 719 * of failure of the HSE used directly or indirectly as system clock
mbed_official 340:28d1f895c6fe 720 * (if the Clock Security System CSS is enabled).
mbed_official 630:825f75ca301e 721 *
mbed_official 340:28d1f895c6fe 722 * @note A switch from one clock source to another occurs only if the target
mbed_official 630:825f75ca301e 723 * clock source is ready (clock stable after startup delay or PLL locked).
mbed_official 340:28d1f895c6fe 724 * If a clock source which is not yet ready is selected, the switch will
mbed_official 630:825f75ca301e 725 * occur when the clock source will be ready.
mbed_official 630:825f75ca301e 726 * You can use HAL_RCC_GetClockConfig() function to know which clock is
mbed_official 630:825f75ca301e 727 * currently used as system clock source.
mbed_official 340:28d1f895c6fe 728 * @retval HAL status
mbed_official 340:28d1f895c6fe 729 */
mbed_official 630:825f75ca301e 730 HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
mbed_official 340:28d1f895c6fe 731 {
mbed_official 630:825f75ca301e 732 uint32_t tickstart = 0;
mbed_official 630:825f75ca301e 733
mbed_official 630:825f75ca301e 734 /* Check the parameters */
mbed_official 630:825f75ca301e 735 assert_param(RCC_ClkInitStruct != NULL);
mbed_official 630:825f75ca301e 736 assert_param(IS_RCC_CLOCKTYPE(RCC_ClkInitStruct->ClockType));
mbed_official 630:825f75ca301e 737 assert_param(IS_FLASH_LATENCY(FLatency));
mbed_official 630:825f75ca301e 738
mbed_official 630:825f75ca301e 739 /* To correctly read data from FLASH memory, the number of wait states (LATENCY)
mbed_official 630:825f75ca301e 740 must be correctly programmed according to the frequency of the CPU clock
mbed_official 630:825f75ca301e 741 (HCLK) of the device. */
mbed_official 340:28d1f895c6fe 742
mbed_official 630:825f75ca301e 743 /* Increasing the CPU frequency */
mbed_official 630:825f75ca301e 744 if(FLatency > (FLASH->ACR & FLASH_ACR_LATENCY))
mbed_official 630:825f75ca301e 745 {
mbed_official 630:825f75ca301e 746 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 630:825f75ca301e 747 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 630:825f75ca301e 748
mbed_official 630:825f75ca301e 749 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 630:825f75ca301e 750 memory by reading the FLASH_ACR register */
mbed_official 630:825f75ca301e 751 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 630:825f75ca301e 752 {
mbed_official 630:825f75ca301e 753 return HAL_ERROR;
mbed_official 630:825f75ca301e 754 }
mbed_official 630:825f75ca301e 755
mbed_official 630:825f75ca301e 756 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 630:825f75ca301e 757 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 630:825f75ca301e 758 {
mbed_official 630:825f75ca301e 759 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 630:825f75ca301e 760 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 630:825f75ca301e 761 }
mbed_official 630:825f75ca301e 762
mbed_official 630:825f75ca301e 763 /*------------------------- SYSCLK Configuration ---------------------------*/
mbed_official 630:825f75ca301e 764 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 630:825f75ca301e 765 {
mbed_official 630:825f75ca301e 766 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 630:825f75ca301e 767
mbed_official 630:825f75ca301e 768 /* HSE is selected as System Clock Source */
mbed_official 630:825f75ca301e 769 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 630:825f75ca301e 770 {
mbed_official 630:825f75ca301e 771 /* Check the HSE ready flag */
mbed_official 630:825f75ca301e 772 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 630:825f75ca301e 773 {
mbed_official 630:825f75ca301e 774 return HAL_ERROR;
mbed_official 630:825f75ca301e 775 }
mbed_official 630:825f75ca301e 776 }
mbed_official 630:825f75ca301e 777 /* PLL is selected as System Clock Source */
mbed_official 630:825f75ca301e 778 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 630:825f75ca301e 779 {
mbed_official 630:825f75ca301e 780 /* Check the PLL ready flag */
mbed_official 630:825f75ca301e 781 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 630:825f75ca301e 782 {
mbed_official 630:825f75ca301e 783 return HAL_ERROR;
mbed_official 630:825f75ca301e 784 }
mbed_official 630:825f75ca301e 785 }
mbed_official 630:825f75ca301e 786 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 787 /* HSI48 is selected as System Clock Source */
mbed_official 630:825f75ca301e 788 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official 630:825f75ca301e 789 {
mbed_official 630:825f75ca301e 790 /* Check the HSI48 ready flag */
mbed_official 630:825f75ca301e 791 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official 630:825f75ca301e 792 {
mbed_official 630:825f75ca301e 793 return HAL_ERROR;
mbed_official 630:825f75ca301e 794 }
mbed_official 630:825f75ca301e 795 }
mbed_official 630:825f75ca301e 796 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 797 /* HSI is selected as System Clock Source */
mbed_official 630:825f75ca301e 798 else
mbed_official 630:825f75ca301e 799 {
mbed_official 630:825f75ca301e 800 /* Check the HSI ready flag */
mbed_official 630:825f75ca301e 801 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 630:825f75ca301e 802 {
mbed_official 630:825f75ca301e 803 return HAL_ERROR;
mbed_official 630:825f75ca301e 804 }
mbed_official 630:825f75ca301e 805 }
mbed_official 630:825f75ca301e 806 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 630:825f75ca301e 807
mbed_official 630:825f75ca301e 808 /* Get Start Tick*/
mbed_official 630:825f75ca301e 809 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 810
mbed_official 630:825f75ca301e 811 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 630:825f75ca301e 812 {
mbed_official 630:825f75ca301e 813 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 630:825f75ca301e 814 {
mbed_official 630:825f75ca301e 815 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 816 {
mbed_official 630:825f75ca301e 817 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 818 }
mbed_official 630:825f75ca301e 819 }
mbed_official 630:825f75ca301e 820 }
mbed_official 630:825f75ca301e 821 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 630:825f75ca301e 822 {
mbed_official 630:825f75ca301e 823 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 630:825f75ca301e 824 {
mbed_official 630:825f75ca301e 825 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 826 {
mbed_official 630:825f75ca301e 827 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 828 }
mbed_official 630:825f75ca301e 829 }
mbed_official 630:825f75ca301e 830 }
mbed_official 630:825f75ca301e 831 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 832 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official 630:825f75ca301e 833 {
mbed_official 630:825f75ca301e 834 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI48)
mbed_official 630:825f75ca301e 835 {
mbed_official 630:825f75ca301e 836 if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 837 {
mbed_official 630:825f75ca301e 838 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 839 }
mbed_official 630:825f75ca301e 840 }
mbed_official 630:825f75ca301e 841 }
mbed_official 630:825f75ca301e 842 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 843 else
mbed_official 630:825f75ca301e 844 {
mbed_official 630:825f75ca301e 845 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 630:825f75ca301e 846 {
mbed_official 630:825f75ca301e 847 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 848 {
mbed_official 630:825f75ca301e 849 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 850 }
mbed_official 630:825f75ca301e 851 }
mbed_official 630:825f75ca301e 852 }
mbed_official 630:825f75ca301e 853 }
mbed_official 630:825f75ca301e 854 }
mbed_official 630:825f75ca301e 855 /* Decreasing the CPU frequency */
mbed_official 630:825f75ca301e 856 else
mbed_official 630:825f75ca301e 857 {
mbed_official 630:825f75ca301e 858 /*-------------------------- HCLK Configuration --------------------------*/
mbed_official 630:825f75ca301e 859 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
mbed_official 630:825f75ca301e 860 {
mbed_official 630:825f75ca301e 861 assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
mbed_official 630:825f75ca301e 862 MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
mbed_official 630:825f75ca301e 863 }
mbed_official 630:825f75ca301e 864
mbed_official 630:825f75ca301e 865 /*------------------------- SYSCLK Configuration -------------------------*/
mbed_official 630:825f75ca301e 866 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
mbed_official 630:825f75ca301e 867 {
mbed_official 630:825f75ca301e 868 assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
mbed_official 630:825f75ca301e 869
mbed_official 630:825f75ca301e 870 /* HSE is selected as System Clock Source */
mbed_official 630:825f75ca301e 871 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 630:825f75ca301e 872 {
mbed_official 630:825f75ca301e 873 /* Check the HSE ready flag */
mbed_official 630:825f75ca301e 874 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
mbed_official 630:825f75ca301e 875 {
mbed_official 630:825f75ca301e 876 return HAL_ERROR;
mbed_official 630:825f75ca301e 877 }
mbed_official 630:825f75ca301e 878 }
mbed_official 630:825f75ca301e 879 /* PLL is selected as System Clock Source */
mbed_official 630:825f75ca301e 880 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 630:825f75ca301e 881 {
mbed_official 630:825f75ca301e 882 /* Check the PLL ready flag */
mbed_official 630:825f75ca301e 883 if(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
mbed_official 630:825f75ca301e 884 {
mbed_official 630:825f75ca301e 885 return HAL_ERROR;
mbed_official 630:825f75ca301e 886 }
mbed_official 630:825f75ca301e 887 }
mbed_official 630:825f75ca301e 888 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 889 /* HSI48 is selected as System Clock Source */
mbed_official 630:825f75ca301e 890 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official 630:825f75ca301e 891 {
mbed_official 630:825f75ca301e 892 /* Check the HSI48 ready flag */
mbed_official 630:825f75ca301e 893 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSI48RDY) == RESET)
mbed_official 630:825f75ca301e 894 {
mbed_official 630:825f75ca301e 895 return HAL_ERROR;
mbed_official 630:825f75ca301e 896 }
mbed_official 630:825f75ca301e 897 }
mbed_official 630:825f75ca301e 898 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 899 /* HSI is selected as System Clock Source */
mbed_official 630:825f75ca301e 900 else
mbed_official 630:825f75ca301e 901 {
mbed_official 630:825f75ca301e 902 /* Check the HSI ready flag */
mbed_official 630:825f75ca301e 903 if(__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
mbed_official 630:825f75ca301e 904 {
mbed_official 630:825f75ca301e 905 return HAL_ERROR;
mbed_official 630:825f75ca301e 906 }
mbed_official 630:825f75ca301e 907 }
mbed_official 630:825f75ca301e 908 MODIFY_REG(RCC->CFGR, RCC_CFGR_SW, RCC_ClkInitStruct->SYSCLKSource);
mbed_official 630:825f75ca301e 909
mbed_official 630:825f75ca301e 910 /* Get Start Tick*/
mbed_official 630:825f75ca301e 911 tickstart = HAL_GetTick();
mbed_official 630:825f75ca301e 912
mbed_official 630:825f75ca301e 913 if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
mbed_official 630:825f75ca301e 914 {
mbed_official 630:825f75ca301e 915 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSE)
mbed_official 630:825f75ca301e 916 {
mbed_official 630:825f75ca301e 917 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 918 {
mbed_official 630:825f75ca301e 919 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 920 }
mbed_official 630:825f75ca301e 921 }
mbed_official 630:825f75ca301e 922 }
mbed_official 630:825f75ca301e 923 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
mbed_official 630:825f75ca301e 924 {
mbed_official 630:825f75ca301e 925 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
mbed_official 630:825f75ca301e 926 {
mbed_official 630:825f75ca301e 927 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 928 {
mbed_official 630:825f75ca301e 929 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 930 }
mbed_official 630:825f75ca301e 931 }
mbed_official 630:825f75ca301e 932 }
mbed_official 630:825f75ca301e 933 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 934 else if(RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSI48)
mbed_official 630:825f75ca301e 935 {
mbed_official 630:825f75ca301e 936 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI48)
mbed_official 630:825f75ca301e 937 {
mbed_official 630:825f75ca301e 938 if((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 939 {
mbed_official 630:825f75ca301e 940 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 941 }
mbed_official 630:825f75ca301e 942 }
mbed_official 630:825f75ca301e 943 }
mbed_official 630:825f75ca301e 944 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 945 else
mbed_official 630:825f75ca301e 946 {
mbed_official 630:825f75ca301e 947 while (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_HSI)
mbed_official 630:825f75ca301e 948 {
mbed_official 630:825f75ca301e 949 if((HAL_GetTick() - tickstart ) > CLOCKSWITCH_TIMEOUT_VALUE)
mbed_official 630:825f75ca301e 950 {
mbed_official 630:825f75ca301e 951 return HAL_TIMEOUT;
mbed_official 630:825f75ca301e 952 }
mbed_official 630:825f75ca301e 953 }
mbed_official 630:825f75ca301e 954 }
mbed_official 630:825f75ca301e 955 }
mbed_official 630:825f75ca301e 956
mbed_official 630:825f75ca301e 957 /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
mbed_official 630:825f75ca301e 958 __HAL_FLASH_SET_LATENCY(FLatency);
mbed_official 630:825f75ca301e 959
mbed_official 630:825f75ca301e 960 /* Check that the new number of wait states is taken into account to access the Flash
mbed_official 630:825f75ca301e 961 memory by reading the FLASH_ACR register */
mbed_official 630:825f75ca301e 962 if((FLASH->ACR & FLASH_ACR_LATENCY) != FLatency)
mbed_official 630:825f75ca301e 963 {
mbed_official 630:825f75ca301e 964 return HAL_ERROR;
mbed_official 630:825f75ca301e 965 }
mbed_official 630:825f75ca301e 966 }
mbed_official 630:825f75ca301e 967
mbed_official 630:825f75ca301e 968 /*-------------------------- PCLK1 Configuration ---------------------------*/
mbed_official 630:825f75ca301e 969 if(((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
mbed_official 630:825f75ca301e 970 {
mbed_official 630:825f75ca301e 971 assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
mbed_official 630:825f75ca301e 972 MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE, RCC_ClkInitStruct->APB1CLKDivider);
mbed_official 630:825f75ca301e 973 }
mbed_official 630:825f75ca301e 974
mbed_official 630:825f75ca301e 975 /* Configure the source of time base considering new system clocks settings*/
mbed_official 630:825f75ca301e 976 HAL_InitTick (TICK_INT_PRIORITY);
mbed_official 630:825f75ca301e 977
mbed_official 630:825f75ca301e 978 return HAL_OK;
mbed_official 340:28d1f895c6fe 979 }
mbed_official 340:28d1f895c6fe 980
mbed_official 340:28d1f895c6fe 981 /**
mbed_official 340:28d1f895c6fe 982 * @}
mbed_official 340:28d1f895c6fe 983 */
mbed_official 340:28d1f895c6fe 984
mbed_official 630:825f75ca301e 985 /** @defgroup RCC_Exported_Functions_Group2 Peripheral Control functions
mbed_official 630:825f75ca301e 986 * @brief RCC clocks control functions
mbed_official 630:825f75ca301e 987 *
mbed_official 630:825f75ca301e 988 @verbatim
mbed_official 630:825f75ca301e 989 ===============================================================================
mbed_official 630:825f75ca301e 990 ##### Peripheral Control functions #####
mbed_official 630:825f75ca301e 991 ===============================================================================
mbed_official 340:28d1f895c6fe 992 [..]
mbed_official 630:825f75ca301e 993 This subsection provides a set of functions allowing to control the RCC Clocks
mbed_official 340:28d1f895c6fe 994 frequencies.
mbed_official 340:28d1f895c6fe 995
mbed_official 630:825f75ca301e 996 @endverbatim
mbed_official 340:28d1f895c6fe 997 * @{
mbed_official 340:28d1f895c6fe 998 */
mbed_official 340:28d1f895c6fe 999
mbed_official 340:28d1f895c6fe 1000 /**
mbed_official 630:825f75ca301e 1001 * @brief Selects the clock source to output on MCO pin.
mbed_official 630:825f75ca301e 1002 * @note MCO pin should be configured in alternate function mode.
mbed_official 340:28d1f895c6fe 1003 * @param RCC_MCOx: specifies the output direction for the clock source.
mbed_official 340:28d1f895c6fe 1004 * This parameter can be one of the following values:
mbed_official 630:825f75ca301e 1005 * @arg RCC_MCO: Clock source to output on MCO1 pin(PA8).
mbed_official 340:28d1f895c6fe 1006 * @param RCC_MCOSource: specifies the clock source to output.
mbed_official 340:28d1f895c6fe 1007 * This parameter can be one of the following values:
mbed_official 630:825f75ca301e 1008 * @arg RCC_MCOSOURCE_HSI: HSI selected as MCO clock
mbed_official 630:825f75ca301e 1009 * @arg RCC_MCOSOURCE_HSE: HSE selected as MCO clock
mbed_official 630:825f75ca301e 1010 * @arg RCC_MCOSOURCE_LSI: LSI selected as MCO clock
mbed_official 630:825f75ca301e 1011 * @arg RCC_MCOSOURCE_LSE: LSE selected as MCO clock
mbed_official 630:825f75ca301e 1012 * @arg RCC_MCOSOURCE_PLLCLK_NODIV: PLLCLK selected as MCO clock (not applicable to STM32F05x devices)
mbed_official 630:825f75ca301e 1013 * @arg RCC_MCOSOURCE_PLLCLK_DIV2: PLLCLK Divided by 2 selected as MCO clock
mbed_official 630:825f75ca301e 1014 * @arg RCC_MCOSOURCE_SYSCLK: System Clock selected as MCO clock
mbed_official 630:825f75ca301e 1015 * @arg RCC_MCOSOURCE_HSI14: HSI14 selected as MCO clock
mbed_official 630:825f75ca301e 1016 * @arg RCC_MCOSOURCE_HSI48: HSI48 selected as MCO clock
mbed_official 630:825f75ca301e 1017 * @param RCC_MCODiv: specifies the MCO DIV.
mbed_official 340:28d1f895c6fe 1018 * This parameter can be one of the following values:
mbed_official 630:825f75ca301e 1019 * @arg RCC_MCODIV_1: no division applied to MCO clock
mbed_official 340:28d1f895c6fe 1020 * @retval None
mbed_official 340:28d1f895c6fe 1021 */
mbed_official 340:28d1f895c6fe 1022 void HAL_RCC_MCOConfig(uint32_t RCC_MCOx, uint32_t RCC_MCOSource, uint32_t RCC_MCODiv)
mbed_official 340:28d1f895c6fe 1023 {
mbed_official 340:28d1f895c6fe 1024 GPIO_InitTypeDef gpio;
mbed_official 630:825f75ca301e 1025
mbed_official 340:28d1f895c6fe 1026 /* Check the parameters */
mbed_official 340:28d1f895c6fe 1027 assert_param(IS_RCC_MCO(RCC_MCOx));
mbed_official 340:28d1f895c6fe 1028 assert_param(IS_RCC_MCODIV(RCC_MCODiv));
mbed_official 630:825f75ca301e 1029 assert_param(IS_RCC_MCO1SOURCE(RCC_MCOSource));
mbed_official 630:825f75ca301e 1030
mbed_official 340:28d1f895c6fe 1031 /* MCO Clock Enable */
mbed_official 630:825f75ca301e 1032 MCO1_CLK_ENABLE();
mbed_official 630:825f75ca301e 1033
mbed_official 630:825f75ca301e 1034 /* Configure the MCO1 pin in alternate function mode */
mbed_official 630:825f75ca301e 1035 gpio.Pin = MCO1_PIN;
mbed_official 340:28d1f895c6fe 1036 gpio.Mode = GPIO_MODE_AF_PP;
mbed_official 340:28d1f895c6fe 1037 gpio.Speed = GPIO_SPEED_HIGH;
mbed_official 340:28d1f895c6fe 1038 gpio.Pull = GPIO_NOPULL;
mbed_official 340:28d1f895c6fe 1039 gpio.Alternate = GPIO_AF0_MCO;
mbed_official 630:825f75ca301e 1040 HAL_GPIO_Init(MCO1_GPIO_PORT, &gpio);
mbed_official 630:825f75ca301e 1041
mbed_official 340:28d1f895c6fe 1042 /* Configure the MCO clock source */
mbed_official 340:28d1f895c6fe 1043 __HAL_RCC_MCO_CONFIG(RCC_MCOSource, RCC_MCODiv);
mbed_official 340:28d1f895c6fe 1044 }
mbed_official 340:28d1f895c6fe 1045
mbed_official 340:28d1f895c6fe 1046 /**
mbed_official 340:28d1f895c6fe 1047 * @brief Enables the Clock Security System.
mbed_official 340:28d1f895c6fe 1048 * @note If a failure is detected on the HSE oscillator clock, this oscillator
mbed_official 340:28d1f895c6fe 1049 * is automatically disabled and an interrupt is generated to inform the
mbed_official 340:28d1f895c6fe 1050 * software about the failure (Clock Security System Interrupt, CSSI),
mbed_official 630:825f75ca301e 1051 * allowing the MCU to perform rescue operations. The CSSI is linked to
mbed_official 630:825f75ca301e 1052 * the Cortex-M0 NMI (Non-Maskable Interrupt) exception vector.
mbed_official 340:28d1f895c6fe 1053 * @retval None
mbed_official 340:28d1f895c6fe 1054 */
mbed_official 340:28d1f895c6fe 1055 void HAL_RCC_EnableCSS(void)
mbed_official 340:28d1f895c6fe 1056 {
mbed_official 630:825f75ca301e 1057 SET_BIT(RCC->CR, RCC_CR_CSSON) ;
mbed_official 340:28d1f895c6fe 1058 }
mbed_official 340:28d1f895c6fe 1059
mbed_official 340:28d1f895c6fe 1060 /**
mbed_official 340:28d1f895c6fe 1061 * @brief Disables the Clock Security System.
mbed_official 340:28d1f895c6fe 1062 * @retval None
mbed_official 340:28d1f895c6fe 1063 */
mbed_official 340:28d1f895c6fe 1064 void HAL_RCC_DisableCSS(void)
mbed_official 340:28d1f895c6fe 1065 {
mbed_official 630:825f75ca301e 1066 CLEAR_BIT(RCC->CR, RCC_CR_CSSON) ;
mbed_official 340:28d1f895c6fe 1067 }
mbed_official 340:28d1f895c6fe 1068
mbed_official 340:28d1f895c6fe 1069 /**
mbed_official 630:825f75ca301e 1070 * @brief Returns the SYSCLK frequency
mbed_official 630:825f75ca301e 1071 *
mbed_official 630:825f75ca301e 1072 * @note The system frequency computed by this function is not the real
mbed_official 630:825f75ca301e 1073 * frequency in the chip. It is calculated based on the predefined
mbed_official 340:28d1f895c6fe 1074 * constant and the selected clock source:
mbed_official 630:825f75ca301e 1075 * @note If SYSCLK source is HSI, function returns values based on HSI_VALUE(*)
mbed_official 340:28d1f895c6fe 1076 * @note If SYSCLK source is HSE, function returns a value based on HSE_VALUE
mbed_official 340:28d1f895c6fe 1077 * divided by PREDIV factor(**)
mbed_official 340:28d1f895c6fe 1078 * @note If SYSCLK source is PLL, function returns a value based on HSE_VALUE
mbed_official 340:28d1f895c6fe 1079 * divided by PREDIV factor(**) or depending on STM32F0xx devices either a value based
mbed_official 340:28d1f895c6fe 1080 * on HSI_VALUE divided by 2 or HSI_VALUE divided by PREDIV factor(*) multiplied by the
mbed_official 340:28d1f895c6fe 1081 * PLL factor .
mbed_official 630:825f75ca301e 1082 * @note (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
mbed_official 630:825f75ca301e 1083 * 8 MHz) but the real value may vary depending on the variations
mbed_official 630:825f75ca301e 1084 * in voltage and temperature.
mbed_official 340:28d1f895c6fe 1085 * @note (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
mbed_official 340:28d1f895c6fe 1086 * 8 MHz), user has to ensure that HSE_VALUE is same as the real
mbed_official 340:28d1f895c6fe 1087 * frequency of the crystal used. Otherwise, this function may
mbed_official 340:28d1f895c6fe 1088 * have wrong result.
mbed_official 630:825f75ca301e 1089 *
mbed_official 340:28d1f895c6fe 1090 * @note The result of this function could be not correct when using fractional
mbed_official 340:28d1f895c6fe 1091 * value for HSE crystal.
mbed_official 630:825f75ca301e 1092 *
mbed_official 630:825f75ca301e 1093 * @note This function can be used by the user application to compute the
mbed_official 340:28d1f895c6fe 1094 * baudrate for the communication peripherals or configure other parameters.
mbed_official 630:825f75ca301e 1095 *
mbed_official 340:28d1f895c6fe 1096 * @note Each time SYSCLK changes, this function must be called to update the
mbed_official 340:28d1f895c6fe 1097 * right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 630:825f75ca301e 1098 *
mbed_official 630:825f75ca301e 1099 *
mbed_official 340:28d1f895c6fe 1100 * @retval SYSCLK frequency
mbed_official 340:28d1f895c6fe 1101 */
mbed_official 630:825f75ca301e 1102 uint32_t HAL_RCC_GetSysClockFreq(void)
mbed_official 340:28d1f895c6fe 1103 {
mbed_official 630:825f75ca301e 1104 const uint8_t aPLLMULFactorTable[16] = { 2, 3, 4, 5, 6, 7, 8, 9,
mbed_official 630:825f75ca301e 1105 10, 11, 12, 13, 14, 15, 16, 16};
mbed_official 630:825f75ca301e 1106 const uint8_t aPredivFactorTable[16] = { 1, 2, 3, 4, 5, 6, 7, 8,
mbed_official 630:825f75ca301e 1107 9,10, 11, 12, 13, 14, 15, 16};
mbed_official 630:825f75ca301e 1108
mbed_official 630:825f75ca301e 1109 uint32_t tmpreg = 0, prediv = 0, pllclk = 0, pllmul = 0;
mbed_official 630:825f75ca301e 1110 uint32_t sysclockfreq = 0;
mbed_official 630:825f75ca301e 1111
mbed_official 630:825f75ca301e 1112 tmpreg = RCC->CFGR;
mbed_official 340:28d1f895c6fe 1113
mbed_official 630:825f75ca301e 1114 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 630:825f75ca301e 1115 switch (tmpreg & RCC_CFGR_SWS)
mbed_official 630:825f75ca301e 1116 {
mbed_official 630:825f75ca301e 1117 case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
mbed_official 630:825f75ca301e 1118 {
mbed_official 630:825f75ca301e 1119 sysclockfreq = HSE_VALUE;
mbed_official 630:825f75ca301e 1120 break;
mbed_official 630:825f75ca301e 1121 }
mbed_official 630:825f75ca301e 1122 case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
mbed_official 630:825f75ca301e 1123 {
mbed_official 630:825f75ca301e 1124 pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_BITNUMBER];
mbed_official 630:825f75ca301e 1125 prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV) >> RCC_CFGR2_PREDIV_BITNUMBER];
mbed_official 630:825f75ca301e 1126 if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSE)
mbed_official 630:825f75ca301e 1127 {
mbed_official 630:825f75ca301e 1128 /* HSE used as PLL clock source : PLLCLK = HSE/PREDIV * PLLMUL */
mbed_official 630:825f75ca301e 1129 pllclk = (HSE_VALUE/prediv) * pllmul;
mbed_official 630:825f75ca301e 1130 }
mbed_official 630:825f75ca301e 1131 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 1132 else if ((tmpreg & RCC_CFGR_PLLSRC) == RCC_PLLSOURCE_HSI48)
mbed_official 630:825f75ca301e 1133 {
mbed_official 630:825f75ca301e 1134 /* HSI48 used as PLL clock source : PLLCLK = HSI48/PREDIV * PLLMUL */
mbed_official 630:825f75ca301e 1135 pllclk = (HSI48_VALUE/prediv) * pllmul;
mbed_official 630:825f75ca301e 1136 }
mbed_official 630:825f75ca301e 1137 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 1138 else
mbed_official 630:825f75ca301e 1139 {
mbed_official 630:825f75ca301e 1140 #if (defined(STM32F042x6) || defined(STM32F048xx) || defined(STM32F070x6) || defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || defined(STM32F070xB) || defined(STM32F091xC) || defined(STM32F098xx) || defined(STM32F030xC))
mbed_official 630:825f75ca301e 1141 /* HSI used as PLL clock source : PLLCLK = HSI/PREDIV * PLLMUL */
mbed_official 630:825f75ca301e 1142 pllclk = (HSI_VALUE/prediv) * pllmul;
mbed_official 630:825f75ca301e 1143 #else
mbed_official 630:825f75ca301e 1144 /* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
mbed_official 630:825f75ca301e 1145 pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
mbed_official 630:825f75ca301e 1146 #endif
mbed_official 630:825f75ca301e 1147 }
mbed_official 630:825f75ca301e 1148 sysclockfreq = pllclk;
mbed_official 630:825f75ca301e 1149 break;
mbed_official 630:825f75ca301e 1150 }
mbed_official 630:825f75ca301e 1151 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 1152 case RCC_SYSCLKSOURCE_STATUS_HSI48: /* HSI48 used as system clock source */
mbed_official 630:825f75ca301e 1153 {
mbed_official 630:825f75ca301e 1154 sysclockfreq = HSI48_VALUE;
mbed_official 630:825f75ca301e 1155 break;
mbed_official 630:825f75ca301e 1156 }
mbed_official 630:825f75ca301e 1157 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 1158 case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
mbed_official 630:825f75ca301e 1159 default: /* HSI used as system clock */
mbed_official 630:825f75ca301e 1160 {
mbed_official 630:825f75ca301e 1161 sysclockfreq = HSI_VALUE;
mbed_official 630:825f75ca301e 1162 break;
mbed_official 630:825f75ca301e 1163 }
mbed_official 630:825f75ca301e 1164 }
mbed_official 630:825f75ca301e 1165 return sysclockfreq;
mbed_official 340:28d1f895c6fe 1166 }
mbed_official 340:28d1f895c6fe 1167
mbed_official 340:28d1f895c6fe 1168 /**
mbed_official 630:825f75ca301e 1169 * @brief Returns the HCLK frequency
mbed_official 340:28d1f895c6fe 1170 * @note Each time HCLK changes, this function must be called to update the
mbed_official 340:28d1f895c6fe 1171 * right HCLK value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 340:28d1f895c6fe 1172 *
mbed_official 340:28d1f895c6fe 1173 * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
mbed_official 340:28d1f895c6fe 1174 * and updated within this function
mbed_official 340:28d1f895c6fe 1175 * @retval HCLK frequency
mbed_official 340:28d1f895c6fe 1176 */
mbed_official 340:28d1f895c6fe 1177 uint32_t HAL_RCC_GetHCLKFreq(void)
mbed_official 340:28d1f895c6fe 1178 {
mbed_official 630:825f75ca301e 1179 SystemCoreClock = HAL_RCC_GetSysClockFreq() >> aAPBAHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE)>> RCC_CFGR_HPRE_BITNUMBER];
mbed_official 340:28d1f895c6fe 1180 return SystemCoreClock;
mbed_official 340:28d1f895c6fe 1181 }
mbed_official 340:28d1f895c6fe 1182
mbed_official 340:28d1f895c6fe 1183 /**
mbed_official 630:825f75ca301e 1184 * @brief Returns the PCLK1 frequency
mbed_official 340:28d1f895c6fe 1185 * @note Each time PCLK1 changes, this function must be called to update the
mbed_official 340:28d1f895c6fe 1186 * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
mbed_official 340:28d1f895c6fe 1187 * @retval PCLK1 frequency
mbed_official 340:28d1f895c6fe 1188 */
mbed_official 340:28d1f895c6fe 1189 uint32_t HAL_RCC_GetPCLK1Freq(void)
mbed_official 340:28d1f895c6fe 1190 {
mbed_official 340:28d1f895c6fe 1191 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
mbed_official 630:825f75ca301e 1192 return (HAL_RCC_GetHCLKFreq() >> aAPBAHBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE)>> RCC_CFGR_PPRE_BITNUMBER]);
mbed_official 630:825f75ca301e 1193 }
mbed_official 340:28d1f895c6fe 1194
mbed_official 340:28d1f895c6fe 1195 /**
mbed_official 630:825f75ca301e 1196 * @brief Configures the RCC_OscInitStruct according to the internal
mbed_official 340:28d1f895c6fe 1197 * RCC configuration registers.
mbed_official 630:825f75ca301e 1198 * @param RCC_OscInitStruct: pointer to an RCC_OscInitTypeDef structure that
mbed_official 340:28d1f895c6fe 1199 * will be configured.
mbed_official 340:28d1f895c6fe 1200 * @retval None
mbed_official 340:28d1f895c6fe 1201 */
mbed_official 340:28d1f895c6fe 1202 void HAL_RCC_GetOscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
mbed_official 340:28d1f895c6fe 1203 {
mbed_official 630:825f75ca301e 1204 /* Check the parameters */
mbed_official 630:825f75ca301e 1205 assert_param(RCC_OscInitStruct != NULL);
mbed_official 340:28d1f895c6fe 1206
mbed_official 630:825f75ca301e 1207 /* Set all possible values for the Oscillator type parameter ---------------*/
mbed_official 630:825f75ca301e 1208 RCC_OscInitStruct->OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI \
mbed_official 630:825f75ca301e 1209 | RCC_OSCILLATORTYPE_LSE | RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_HSI14;
mbed_official 630:825f75ca301e 1210 #if defined(RCC_CR2_HSI48ON)
mbed_official 630:825f75ca301e 1211 RCC_OscInitStruct->OscillatorType |= RCC_OSCILLATORTYPE_HSI48;
mbed_official 630:825f75ca301e 1212 #endif /* RCC_CR2_HSI48ON */
mbed_official 630:825f75ca301e 1213
mbed_official 340:28d1f895c6fe 1214 /* Get the HSE configuration -----------------------------------------------*/
mbed_official 630:825f75ca301e 1215 if((RCC->CR &RCC_CR_HSEBYP) == RCC_CR_HSEBYP)
mbed_official 340:28d1f895c6fe 1216 {
mbed_official 340:28d1f895c6fe 1217 RCC_OscInitStruct->HSEState = RCC_HSE_BYPASS;
mbed_official 340:28d1f895c6fe 1218 }
mbed_official 630:825f75ca301e 1219 else if((RCC->CR &RCC_CR_HSEON) == RCC_CR_HSEON)
mbed_official 340:28d1f895c6fe 1220 {
mbed_official 340:28d1f895c6fe 1221 RCC_OscInitStruct->HSEState = RCC_HSE_ON;
mbed_official 340:28d1f895c6fe 1222 }
mbed_official 340:28d1f895c6fe 1223 else
mbed_official 340:28d1f895c6fe 1224 {
mbed_official 340:28d1f895c6fe 1225 RCC_OscInitStruct->HSEState = RCC_HSE_OFF;
mbed_official 340:28d1f895c6fe 1226 }
mbed_official 630:825f75ca301e 1227
mbed_official 340:28d1f895c6fe 1228 /* Get the HSI configuration -----------------------------------------------*/
mbed_official 630:825f75ca301e 1229 if((RCC->CR &RCC_CR_HSION) == RCC_CR_HSION)
mbed_official 340:28d1f895c6fe 1230 {
mbed_official 340:28d1f895c6fe 1231 RCC_OscInitStruct->HSIState = RCC_HSI_ON;
mbed_official 340:28d1f895c6fe 1232 }
mbed_official 340:28d1f895c6fe 1233 else
mbed_official 340:28d1f895c6fe 1234 {
mbed_official 340:28d1f895c6fe 1235 RCC_OscInitStruct->HSIState = RCC_HSI_OFF;
mbed_official 340:28d1f895c6fe 1236 }
mbed_official 630:825f75ca301e 1237
mbed_official 340:28d1f895c6fe 1238 RCC_OscInitStruct->HSICalibrationValue = (uint32_t)((RCC->CR &RCC_CR_HSITRIM) >> RCC_CR_HSITRIM_BitNumber);
mbed_official 630:825f75ca301e 1239
mbed_official 340:28d1f895c6fe 1240 /* Get the LSE configuration -----------------------------------------------*/
mbed_official 630:825f75ca301e 1241 if((RCC->BDCR &RCC_BDCR_LSEBYP) == RCC_BDCR_LSEBYP)
mbed_official 340:28d1f895c6fe 1242 {
mbed_official 340:28d1f895c6fe 1243 RCC_OscInitStruct->LSEState = RCC_LSE_BYPASS;
mbed_official 340:28d1f895c6fe 1244 }
mbed_official 630:825f75ca301e 1245 else if((RCC->BDCR &RCC_BDCR_LSEON) == RCC_BDCR_LSEON)
mbed_official 340:28d1f895c6fe 1246 {
mbed_official 340:28d1f895c6fe 1247 RCC_OscInitStruct->LSEState = RCC_LSE_ON;
mbed_official 340:28d1f895c6fe 1248 }
mbed_official 340:28d1f895c6fe 1249 else
mbed_official 340:28d1f895c6fe 1250 {
mbed_official 340:28d1f895c6fe 1251 RCC_OscInitStruct->LSEState = RCC_LSE_OFF;
mbed_official 340:28d1f895c6fe 1252 }
mbed_official 630:825f75ca301e 1253
mbed_official 340:28d1f895c6fe 1254 /* Get the LSI configuration -----------------------------------------------*/
mbed_official 630:825f75ca301e 1255 if((RCC->CSR &RCC_CSR_LSION) == RCC_CSR_LSION)
mbed_official 340:28d1f895c6fe 1256 {
mbed_official 340:28d1f895c6fe 1257 RCC_OscInitStruct->LSIState = RCC_LSI_ON;
mbed_official 340:28d1f895c6fe 1258 }
mbed_official 340:28d1f895c6fe 1259 else
mbed_official 340:28d1f895c6fe 1260 {
mbed_official 340:28d1f895c6fe 1261 RCC_OscInitStruct->LSIState = RCC_LSI_OFF;
mbed_official 340:28d1f895c6fe 1262 }
mbed_official 630:825f75ca301e 1263
mbed_official 340:28d1f895c6fe 1264 /* Get the PLL configuration -----------------------------------------------*/
mbed_official 630:825f75ca301e 1265 if((RCC->CR &RCC_CR_PLLON) == RCC_CR_PLLON)
mbed_official 340:28d1f895c6fe 1266 {
mbed_official 340:28d1f895c6fe 1267 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_ON;
mbed_official 340:28d1f895c6fe 1268 }
mbed_official 340:28d1f895c6fe 1269 else
mbed_official 340:28d1f895c6fe 1270 {
mbed_official 340:28d1f895c6fe 1271 RCC_OscInitStruct->PLL.PLLState = RCC_PLL_OFF;
mbed_official 340:28d1f895c6fe 1272 }
mbed_official 340:28d1f895c6fe 1273 RCC_OscInitStruct->PLL.PLLSource = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLSRC);
mbed_official 340:28d1f895c6fe 1274 RCC_OscInitStruct->PLL.PLLMUL = (uint32_t)(RCC->CFGR & RCC_CFGR_PLLMUL);
mbed_official 340:28d1f895c6fe 1275 RCC_OscInitStruct->PLL.PREDIV = (uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV);
mbed_official 630:825f75ca301e 1276
mbed_official 340:28d1f895c6fe 1277 /* Get the HSI14 configuration -----------------------------------------------*/
mbed_official 340:28d1f895c6fe 1278 if((RCC->CR2 & RCC_CR2_HSI14ON) == RCC_CR2_HSI14ON)
mbed_official 340:28d1f895c6fe 1279 {
mbed_official 340:28d1f895c6fe 1280 RCC_OscInitStruct->HSI14State = RCC_HSI_ON;
mbed_official 340:28d1f895c6fe 1281 }
mbed_official 340:28d1f895c6fe 1282 else
mbed_official 340:28d1f895c6fe 1283 {
mbed_official 340:28d1f895c6fe 1284 RCC_OscInitStruct->HSI14State = RCC_HSI_OFF;
mbed_official 340:28d1f895c6fe 1285 }
mbed_official 340:28d1f895c6fe 1286
mbed_official 340:28d1f895c6fe 1287 RCC_OscInitStruct->HSI14CalibrationValue = (uint32_t)((RCC->CR2 & RCC_CR2_HSI14TRIM) >> RCC_CR2_HSI14TRIM_BitNumber);
mbed_official 630:825f75ca301e 1288
mbed_official 630:825f75ca301e 1289 #if defined(RCC_CR2_HSI48ON)
mbed_official 340:28d1f895c6fe 1290 /* Get the HSI48 configuration if any-----------------------------------------*/
mbed_official 340:28d1f895c6fe 1291 RCC_OscInitStruct->HSI48State = __HAL_RCC_GET_HSI48_STATE();
mbed_official 630:825f75ca301e 1292 #endif /* RCC_CR2_HSI48ON */
mbed_official 340:28d1f895c6fe 1293 }
mbed_official 340:28d1f895c6fe 1294
mbed_official 340:28d1f895c6fe 1295 /**
mbed_official 630:825f75ca301e 1296 * @brief Get the RCC_ClkInitStruct according to the internal
mbed_official 340:28d1f895c6fe 1297 * RCC configuration registers.
mbed_official 630:825f75ca301e 1298 * @param RCC_ClkInitStruct: pointer to an RCC_ClkInitTypeDef structure that
mbed_official 340:28d1f895c6fe 1299 * contains the current clock configuration.
mbed_official 340:28d1f895c6fe 1300 * @param pFLatency: Pointer on the Flash Latency.
mbed_official 340:28d1f895c6fe 1301 * @retval None
mbed_official 340:28d1f895c6fe 1302 */
mbed_official 340:28d1f895c6fe 1303 void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency)
mbed_official 340:28d1f895c6fe 1304 {
mbed_official 630:825f75ca301e 1305 /* Check the parameters */
mbed_official 630:825f75ca301e 1306 assert_param(RCC_ClkInitStruct != NULL);
mbed_official 630:825f75ca301e 1307 assert_param(pFLatency != NULL);
mbed_official 630:825f75ca301e 1308
mbed_official 340:28d1f895c6fe 1309 /* Set all possible values for the Clock type parameter --------------------*/
mbed_official 340:28d1f895c6fe 1310 RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1;
mbed_official 630:825f75ca301e 1311
mbed_official 630:825f75ca301e 1312 /* Get the SYSCLK configuration --------------------------------------------*/
mbed_official 340:28d1f895c6fe 1313 RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW);
mbed_official 630:825f75ca301e 1314
mbed_official 630:825f75ca301e 1315 /* Get the HCLK configuration ----------------------------------------------*/
mbed_official 630:825f75ca301e 1316 RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE);
mbed_official 630:825f75ca301e 1317
mbed_official 630:825f75ca301e 1318 /* Get the APB1 configuration ----------------------------------------------*/
mbed_official 630:825f75ca301e 1319 RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE);
mbed_official 630:825f75ca301e 1320 /* Get the Flash Wait State (Latency) configuration ------------------------*/
mbed_official 630:825f75ca301e 1321 *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY);
mbed_official 340:28d1f895c6fe 1322 }
mbed_official 340:28d1f895c6fe 1323
mbed_official 340:28d1f895c6fe 1324 /**
mbed_official 340:28d1f895c6fe 1325 * @brief This function handles the RCC CSS interrupt request.
mbed_official 340:28d1f895c6fe 1326 * @note This API should be called under the NMI_Handler().
mbed_official 340:28d1f895c6fe 1327 * @retval None
mbed_official 340:28d1f895c6fe 1328 */
mbed_official 340:28d1f895c6fe 1329 void HAL_RCC_NMI_IRQHandler(void)
mbed_official 340:28d1f895c6fe 1330 {
mbed_official 340:28d1f895c6fe 1331 /* Check RCC CSSF flag */
mbed_official 340:28d1f895c6fe 1332 if(__HAL_RCC_GET_IT(RCC_IT_CSS))
mbed_official 340:28d1f895c6fe 1333 {
mbed_official 340:28d1f895c6fe 1334 /* RCC Clock Security System interrupt user callback */
mbed_official 630:825f75ca301e 1335 HAL_RCC_CSSCallback();
mbed_official 630:825f75ca301e 1336
mbed_official 340:28d1f895c6fe 1337 /* Clear RCC CSS pending bit */
mbed_official 340:28d1f895c6fe 1338 __HAL_RCC_CLEAR_IT(RCC_IT_CSS);
mbed_official 340:28d1f895c6fe 1339 }
mbed_official 340:28d1f895c6fe 1340 }
mbed_official 340:28d1f895c6fe 1341
mbed_official 340:28d1f895c6fe 1342 /**
mbed_official 340:28d1f895c6fe 1343 * @brief RCC Clock Security System interrupt callback
mbed_official 340:28d1f895c6fe 1344 * @retval none
mbed_official 340:28d1f895c6fe 1345 */
mbed_official 630:825f75ca301e 1346 __weak void HAL_RCC_CSSCallback(void)
mbed_official 340:28d1f895c6fe 1347 {
mbed_official 340:28d1f895c6fe 1348 /* NOTE : This function Should not be modified, when the callback is needed,
mbed_official 630:825f75ca301e 1349 the HAL_RCC_CSSCallback could be implemented in the user file
mbed_official 630:825f75ca301e 1350 */
mbed_official 340:28d1f895c6fe 1351 }
mbed_official 340:28d1f895c6fe 1352
mbed_official 340:28d1f895c6fe 1353 /**
mbed_official 340:28d1f895c6fe 1354 * @}
mbed_official 340:28d1f895c6fe 1355 */
mbed_official 340:28d1f895c6fe 1356
mbed_official 340:28d1f895c6fe 1357 /**
mbed_official 340:28d1f895c6fe 1358 * @}
mbed_official 340:28d1f895c6fe 1359 */
mbed_official 340:28d1f895c6fe 1360
mbed_official 340:28d1f895c6fe 1361 #endif /* HAL_RCC_MODULE_ENABLED */
mbed_official 340:28d1f895c6fe 1362 /**
mbed_official 340:28d1f895c6fe 1363 * @}
mbed_official 340:28d1f895c6fe 1364 */
mbed_official 340:28d1f895c6fe 1365
mbed_official 340:28d1f895c6fe 1366 /**
mbed_official 340:28d1f895c6fe 1367 * @}
mbed_official 340:28d1f895c6fe 1368 */
mbed_official 340:28d1f895c6fe 1369
mbed_official 340:28d1f895c6fe 1370 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/