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Last commit 20 Feb 2019 by 
mbed official
targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/instance/ins_tcc0.h@579:53297373a894, 2015-07-01 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Jul 01 09:45:11 2015 +0100
- Revision:
- 579:53297373a894
- Child:
- 592:a274ee790e56
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081
Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/
Initial version of drivers for SAMR21
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 579:53297373a894 | 1 | /** |
| mbed_official | 579:53297373a894 | 2 | * \file |
| mbed_official | 579:53297373a894 | 3 | * |
| mbed_official | 579:53297373a894 | 4 | * \brief Instance description for TCC0 |
| mbed_official | 579:53297373a894 | 5 | * |
| mbed_official | 579:53297373a894 | 6 | * Copyright (c) 2014 Atmel Corporation. All rights reserved. |
| mbed_official | 579:53297373a894 | 7 | * |
| mbed_official | 579:53297373a894 | 8 | * \asf_license_start |
| mbed_official | 579:53297373a894 | 9 | * |
| mbed_official | 579:53297373a894 | 10 | * \page License |
| mbed_official | 579:53297373a894 | 11 | * |
| mbed_official | 579:53297373a894 | 12 | * Redistribution and use in source and binary forms, with or without |
| mbed_official | 579:53297373a894 | 13 | * modification, are permitted provided that the following conditions are met: |
| mbed_official | 579:53297373a894 | 14 | * |
| mbed_official | 579:53297373a894 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 579:53297373a894 | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 579:53297373a894 | 17 | * |
| mbed_official | 579:53297373a894 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 579:53297373a894 | 19 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 579:53297373a894 | 20 | * and/or other materials provided with the distribution. |
| mbed_official | 579:53297373a894 | 21 | * |
| mbed_official | 579:53297373a894 | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
| mbed_official | 579:53297373a894 | 23 | * from this software without specific prior written permission. |
| mbed_official | 579:53297373a894 | 24 | * |
| mbed_official | 579:53297373a894 | 25 | * 4. This software may only be redistributed and used in connection with an |
| mbed_official | 579:53297373a894 | 26 | * Atmel microcontroller product. |
| mbed_official | 579:53297373a894 | 27 | * |
| mbed_official | 579:53297373a894 | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
| mbed_official | 579:53297373a894 | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| mbed_official | 579:53297373a894 | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
| mbed_official | 579:53297373a894 | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
| mbed_official | 579:53297373a894 | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 579:53297373a894 | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| mbed_official | 579:53297373a894 | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| mbed_official | 579:53297373a894 | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| mbed_official | 579:53297373a894 | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| mbed_official | 579:53297373a894 | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| mbed_official | 579:53297373a894 | 38 | * POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 579:53297373a894 | 39 | * |
| mbed_official | 579:53297373a894 | 40 | * \asf_license_stop |
| mbed_official | 579:53297373a894 | 41 | * |
| mbed_official | 579:53297373a894 | 42 | */ |
| mbed_official | 579:53297373a894 | 43 | /** |
| mbed_official | 579:53297373a894 | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
| mbed_official | 579:53297373a894 | 45 | */ |
| mbed_official | 579:53297373a894 | 46 | |
| mbed_official | 579:53297373a894 | 47 | #ifndef _SAMD21_TCC0_INSTANCE_ |
| mbed_official | 579:53297373a894 | 48 | #define _SAMD21_TCC0_INSTANCE_ |
| mbed_official | 579:53297373a894 | 49 | |
| mbed_official | 579:53297373a894 | 50 | /* ========== Register definition for TCC0 peripheral ========== */ |
| mbed_official | 579:53297373a894 | 51 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 579:53297373a894 | 52 | #define REG_TCC0_CTRLA (0x42002000U) /**< \brief (TCC0) Control A */ |
| mbed_official | 579:53297373a894 | 53 | #define REG_TCC0_CTRLBCLR (0x42002004U) /**< \brief (TCC0) Control B Clear */ |
| mbed_official | 579:53297373a894 | 54 | #define REG_TCC0_CTRLBSET (0x42002005U) /**< \brief (TCC0) Control B Set */ |
| mbed_official | 579:53297373a894 | 55 | #define REG_TCC0_SYNCBUSY (0x42002008U) /**< \brief (TCC0) Synchronization Busy */ |
| mbed_official | 579:53297373a894 | 56 | #define REG_TCC0_FCTRLA (0x4200200CU) /**< \brief (TCC0) Recoverable Fault A Configuration */ |
| mbed_official | 579:53297373a894 | 57 | #define REG_TCC0_FCTRLB (0x42002010U) /**< \brief (TCC0) Recoverable Fault B Configuration */ |
| mbed_official | 579:53297373a894 | 58 | #define REG_TCC0_WEXCTRL (0x42002014U) /**< \brief (TCC0) Waveform Extension Configuration */ |
| mbed_official | 579:53297373a894 | 59 | #define REG_TCC0_DRVCTRL (0x42002018U) /**< \brief (TCC0) Driver Control */ |
| mbed_official | 579:53297373a894 | 60 | #define REG_TCC0_DBGCTRL (0x4200201EU) /**< \brief (TCC0) Debug Control */ |
| mbed_official | 579:53297373a894 | 61 | #define REG_TCC0_EVCTRL (0x42002020U) /**< \brief (TCC0) Event Control */ |
| mbed_official | 579:53297373a894 | 62 | #define REG_TCC0_INTENCLR (0x42002024U) /**< \brief (TCC0) Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 63 | #define REG_TCC0_INTENSET (0x42002028U) /**< \brief (TCC0) Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 64 | #define REG_TCC0_INTFLAG (0x4200202CU) /**< \brief (TCC0) Interrupt Flag Status and Clear */ |
| mbed_official | 579:53297373a894 | 65 | #define REG_TCC0_STATUS (0x42002030U) /**< \brief (TCC0) Status */ |
| mbed_official | 579:53297373a894 | 66 | #define REG_TCC0_COUNT (0x42002034U) /**< \brief (TCC0) Count */ |
| mbed_official | 579:53297373a894 | 67 | #define REG_TCC0_PATT (0x42002038U) /**< \brief (TCC0) Pattern */ |
| mbed_official | 579:53297373a894 | 68 | #define REG_TCC0_WAVE (0x4200203CU) /**< \brief (TCC0) Waveform Control */ |
| mbed_official | 579:53297373a894 | 69 | #define REG_TCC0_PER (0x42002040U) /**< \brief (TCC0) Period */ |
| mbed_official | 579:53297373a894 | 70 | #define REG_TCC0_CC0 (0x42002044U) /**< \brief (TCC0) Compare and Capture 0 */ |
| mbed_official | 579:53297373a894 | 71 | #define REG_TCC0_CC1 (0x42002048U) /**< \brief (TCC0) Compare and Capture 1 */ |
| mbed_official | 579:53297373a894 | 72 | #define REG_TCC0_CC2 (0x4200204CU) /**< \brief (TCC0) Compare and Capture 2 */ |
| mbed_official | 579:53297373a894 | 73 | #define REG_TCC0_CC3 (0x42002050U) /**< \brief (TCC0) Compare and Capture 3 */ |
| mbed_official | 579:53297373a894 | 74 | #define REG_TCC0_PATTB (0x42002064U) /**< \brief (TCC0) Pattern Buffer */ |
| mbed_official | 579:53297373a894 | 75 | #define REG_TCC0_WAVEB (0x42002068U) /**< \brief (TCC0) Waveform Control Buffer */ |
| mbed_official | 579:53297373a894 | 76 | #define REG_TCC0_PERB (0x4200206CU) /**< \brief (TCC0) Period Buffer */ |
| mbed_official | 579:53297373a894 | 77 | #define REG_TCC0_CCB0 (0x42002070U) /**< \brief (TCC0) Compare and Capture Buffer 0 */ |
| mbed_official | 579:53297373a894 | 78 | #define REG_TCC0_CCB1 (0x42002074U) /**< \brief (TCC0) Compare and Capture Buffer 1 */ |
| mbed_official | 579:53297373a894 | 79 | #define REG_TCC0_CCB2 (0x42002078U) /**< \brief (TCC0) Compare and Capture Buffer 2 */ |
| mbed_official | 579:53297373a894 | 80 | #define REG_TCC0_CCB3 (0x4200207CU) /**< \brief (TCC0) Compare and Capture Buffer 3 */ |
| mbed_official | 579:53297373a894 | 81 | #else |
| mbed_official | 579:53297373a894 | 82 | #define REG_TCC0_CTRLA (*(RwReg *)0x42002000U) /**< \brief (TCC0) Control A */ |
| mbed_official | 579:53297373a894 | 83 | #define REG_TCC0_CTRLBCLR (*(RwReg8 *)0x42002004U) /**< \brief (TCC0) Control B Clear */ |
| mbed_official | 579:53297373a894 | 84 | #define REG_TCC0_CTRLBSET (*(RwReg8 *)0x42002005U) /**< \brief (TCC0) Control B Set */ |
| mbed_official | 579:53297373a894 | 85 | #define REG_TCC0_SYNCBUSY (*(RoReg *)0x42002008U) /**< \brief (TCC0) Synchronization Busy */ |
| mbed_official | 579:53297373a894 | 86 | #define REG_TCC0_FCTRLA (*(RwReg *)0x4200200CU) /**< \brief (TCC0) Recoverable Fault A Configuration */ |
| mbed_official | 579:53297373a894 | 87 | #define REG_TCC0_FCTRLB (*(RwReg *)0x42002010U) /**< \brief (TCC0) Recoverable Fault B Configuration */ |
| mbed_official | 579:53297373a894 | 88 | #define REG_TCC0_WEXCTRL (*(RwReg *)0x42002014U) /**< \brief (TCC0) Waveform Extension Configuration */ |
| mbed_official | 579:53297373a894 | 89 | #define REG_TCC0_DRVCTRL (*(RwReg *)0x42002018U) /**< \brief (TCC0) Driver Control */ |
| mbed_official | 579:53297373a894 | 90 | #define REG_TCC0_DBGCTRL (*(RwReg8 *)0x4200201EU) /**< \brief (TCC0) Debug Control */ |
| mbed_official | 579:53297373a894 | 91 | #define REG_TCC0_EVCTRL (*(RwReg *)0x42002020U) /**< \brief (TCC0) Event Control */ |
| mbed_official | 579:53297373a894 | 92 | #define REG_TCC0_INTENCLR (*(RwReg *)0x42002024U) /**< \brief (TCC0) Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 93 | #define REG_TCC0_INTENSET (*(RwReg *)0x42002028U) /**< \brief (TCC0) Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 94 | #define REG_TCC0_INTFLAG (*(RwReg *)0x4200202CU) /**< \brief (TCC0) Interrupt Flag Status and Clear */ |
| mbed_official | 579:53297373a894 | 95 | #define REG_TCC0_STATUS (*(RwReg *)0x42002030U) /**< \brief (TCC0) Status */ |
| mbed_official | 579:53297373a894 | 96 | #define REG_TCC0_COUNT (*(RwReg *)0x42002034U) /**< \brief (TCC0) Count */ |
| mbed_official | 579:53297373a894 | 97 | #define REG_TCC0_PATT (*(RwReg16*)0x42002038U) /**< \brief (TCC0) Pattern */ |
| mbed_official | 579:53297373a894 | 98 | #define REG_TCC0_WAVE (*(RwReg *)0x4200203CU) /**< \brief (TCC0) Waveform Control */ |
| mbed_official | 579:53297373a894 | 99 | #define REG_TCC0_PER (*(RwReg *)0x42002040U) /**< \brief (TCC0) Period */ |
| mbed_official | 579:53297373a894 | 100 | #define REG_TCC0_CC0 (*(RwReg *)0x42002044U) /**< \brief (TCC0) Compare and Capture 0 */ |
| mbed_official | 579:53297373a894 | 101 | #define REG_TCC0_CC1 (*(RwReg *)0x42002048U) /**< \brief (TCC0) Compare and Capture 1 */ |
| mbed_official | 579:53297373a894 | 102 | #define REG_TCC0_CC2 (*(RwReg *)0x4200204CU) /**< \brief (TCC0) Compare and Capture 2 */ |
| mbed_official | 579:53297373a894 | 103 | #define REG_TCC0_CC3 (*(RwReg *)0x42002050U) /**< \brief (TCC0) Compare and Capture 3 */ |
| mbed_official | 579:53297373a894 | 104 | #define REG_TCC0_PATTB (*(RwReg16*)0x42002064U) /**< \brief (TCC0) Pattern Buffer */ |
| mbed_official | 579:53297373a894 | 105 | #define REG_TCC0_WAVEB (*(RwReg *)0x42002068U) /**< \brief (TCC0) Waveform Control Buffer */ |
| mbed_official | 579:53297373a894 | 106 | #define REG_TCC0_PERB (*(RwReg *)0x4200206CU) /**< \brief (TCC0) Period Buffer */ |
| mbed_official | 579:53297373a894 | 107 | #define REG_TCC0_CCB0 (*(RwReg *)0x42002070U) /**< \brief (TCC0) Compare and Capture Buffer 0 */ |
| mbed_official | 579:53297373a894 | 108 | #define REG_TCC0_CCB1 (*(RwReg *)0x42002074U) /**< \brief (TCC0) Compare and Capture Buffer 1 */ |
| mbed_official | 579:53297373a894 | 109 | #define REG_TCC0_CCB2 (*(RwReg *)0x42002078U) /**< \brief (TCC0) Compare and Capture Buffer 2 */ |
| mbed_official | 579:53297373a894 | 110 | #define REG_TCC0_CCB3 (*(RwReg *)0x4200207CU) /**< \brief (TCC0) Compare and Capture Buffer 3 */ |
| mbed_official | 579:53297373a894 | 111 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 579:53297373a894 | 112 | |
| mbed_official | 579:53297373a894 | 113 | /* ========== Instance parameters for TCC0 peripheral ========== */ |
| mbed_official | 579:53297373a894 | 114 | #define TCC0_CC_NUM 4 // Number of Compare/Capture units |
| mbed_official | 579:53297373a894 | 115 | #define TCC0_DITHERING 1 // Dithering feature implemented |
| mbed_official | 579:53297373a894 | 116 | #define TCC0_DMAC_ID_MC_0 14 |
| mbed_official | 579:53297373a894 | 117 | #define TCC0_DMAC_ID_MC_1 15 |
| mbed_official | 579:53297373a894 | 118 | #define TCC0_DMAC_ID_MC_2 16 |
| mbed_official | 579:53297373a894 | 119 | #define TCC0_DMAC_ID_MC_3 17 |
| mbed_official | 579:53297373a894 | 120 | #define TCC0_DMAC_ID_MC_LSB 14 |
| mbed_official | 579:53297373a894 | 121 | #define TCC0_DMAC_ID_MC_MSB 17 |
| mbed_official | 579:53297373a894 | 122 | #define TCC0_DMAC_ID_MC_SIZE 4 |
| mbed_official | 579:53297373a894 | 123 | #define TCC0_DMAC_ID_OVF 13 // DMA overflow/underflow/retrigger trigger |
| mbed_official | 579:53297373a894 | 124 | #define TCC0_DTI 1 // Dead-Time-Insertion feature implemented |
| mbed_official | 579:53297373a894 | 125 | #define TCC0_EXT 31 // (@_DITHERING*16+@_PG*8+@_SWAP*4+@_DTI*2+@_OTMX*1) |
| mbed_official | 579:53297373a894 | 126 | #define TCC0_GCLK_ID 26 // Index of Generic Clock |
| mbed_official | 579:53297373a894 | 127 | #define TCC0_OTMX 1 // Output Matrix feature implemented |
| mbed_official | 579:53297373a894 | 128 | #define TCC0_OW_NUM 8 // Number of Output Waveforms |
| mbed_official | 579:53297373a894 | 129 | #define TCC0_PG 1 // Pattern Generation feature implemented |
| mbed_official | 579:53297373a894 | 130 | #define TCC0_SIZE 24 |
| mbed_official | 579:53297373a894 | 131 | #define TCC0_SWAP 1 // DTI outputs swap feature implemented |
| mbed_official | 579:53297373a894 | 132 | #define TCC0_TYPE 0 // TCC type 0 : NA, 1 : Master, 2 : Slave |
| mbed_official | 579:53297373a894 | 133 | |
| mbed_official | 579:53297373a894 | 134 | #endif /* _SAMD21_TCC0_INSTANCE_ */ |
