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This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

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If you are looking for a stable and tested release, please import one of the official mbed library releases:

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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/dspi/fsl_dspi_hal.c@149:1fb5f62b92bd, 2014-04-03 (annotated)

Committer:
mbed_official
Date:
Thu Apr 03 11:45:06 2014 +0100
Revision:
149:1fb5f62b92bd
Parent:
targets/hal/TARGET_Freescale/TARGET_KSDK_MCUS/TARGET_KSDK_CODE/hal/dspi/fsl_dspi_hal.c@146:f64d43ff0c18
Child:
324:406fd2029f23
Synchronized with git revision 220c0bb39ceee40016e1e86350c058963d01ed42



Full URL: https://github.com/mbedmicro/mbed/commit/220c0bb39ceee40016e1e86350c058963d01ed42/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 146:f64d43ff0c18 1 /*
mbed_official 146:f64d43ff0c18 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
mbed_official 146:f64d43ff0c18 3 * All rights reserved.
mbed_official 146:f64d43ff0c18 4 *
mbed_official 146:f64d43ff0c18 5 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 146:f64d43ff0c18 6 * are permitted provided that the following conditions are met:
mbed_official 146:f64d43ff0c18 7 *
mbed_official 146:f64d43ff0c18 8 * o Redistributions of source code must retain the above copyright notice, this list
mbed_official 146:f64d43ff0c18 9 * of conditions and the following disclaimer.
mbed_official 146:f64d43ff0c18 10 *
mbed_official 146:f64d43ff0c18 11 * o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 146:f64d43ff0c18 12 * list of conditions and the following disclaimer in the documentation and/or
mbed_official 146:f64d43ff0c18 13 * other materials provided with the distribution.
mbed_official 146:f64d43ff0c18 14 *
mbed_official 146:f64d43ff0c18 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 146:f64d43ff0c18 16 * contributors may be used to endorse or promote products derived from this
mbed_official 146:f64d43ff0c18 17 * software without specific prior written permission.
mbed_official 146:f64d43ff0c18 18 *
mbed_official 146:f64d43ff0c18 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 146:f64d43ff0c18 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 146:f64d43ff0c18 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 146:f64d43ff0c18 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 146:f64d43ff0c18 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 146:f64d43ff0c18 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 146:f64d43ff0c18 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 146:f64d43ff0c18 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 146:f64d43ff0c18 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 146:f64d43ff0c18 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 146:f64d43ff0c18 29 */
mbed_official 146:f64d43ff0c18 30
mbed_official 146:f64d43ff0c18 31 #include "fsl_dspi_hal.h"
mbed_official 146:f64d43ff0c18 32
mbed_official 146:f64d43ff0c18 33 /*******************************************************************************
mbed_official 146:f64d43ff0c18 34 * Definitions
mbed_official 146:f64d43ff0c18 35 ******************************************************************************/
mbed_official 146:f64d43ff0c18 36
mbed_official 146:f64d43ff0c18 37 /*******************************************************************************
mbed_official 146:f64d43ff0c18 38 * Code
mbed_official 146:f64d43ff0c18 39 ******************************************************************************/
mbed_official 146:f64d43ff0c18 40
mbed_official 146:f64d43ff0c18 41 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 42 *
mbed_official 146:f64d43ff0c18 43 * Function Name : dspi_hal_master_init
mbed_official 146:f64d43ff0c18 44 * Description : Configure the DSPI peripheral in master mode.
mbed_official 146:f64d43ff0c18 45 * This function will initialize the module to user defined settings and default settings in master
mbed_official 146:f64d43ff0c18 46 * mode. Here is an example demonstrating how to define the dspi_master_config_t structure and call
mbed_official 146:f64d43ff0c18 47 * the dspi_hal_master_init function:
mbed_official 146:f64d43ff0c18 48 * dspi_master_config_t dspiConfig;
mbed_official 146:f64d43ff0c18 49 * dspiConfig.isEnabled = false;
mbed_official 146:f64d43ff0c18 50 * dspiConfig.whichCtar = kDspiCtar0;
mbed_official 146:f64d43ff0c18 51 * dspiConfig.bitsPerSec = 0;
mbed_official 146:f64d43ff0c18 52 * dspiConfig.sourceClockInHz = dspiSourceClock;
mbed_official 146:f64d43ff0c18 53 * dspiConfig.isSckContinuous = false;
mbed_official 146:f64d43ff0c18 54 * dspiConfig.whichPcs = kDspiPcs0;
mbed_official 146:f64d43ff0c18 55 * dspiConfig.pcsPolarity = kDspiPcs_ActiveLow;
mbed_official 146:f64d43ff0c18 56 * dspiConfig.masterInSample = kDspiSckToSin_0Clock;
mbed_official 146:f64d43ff0c18 57 * dspiConfig.isModifiedTimingFormatEnabled = false;
mbed_official 146:f64d43ff0c18 58 * dspiConfig.isTxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 59 * dspiConfig.isRxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 60 * dspiConfig.dataConfig.bitsPerFrame = 16;
mbed_official 146:f64d43ff0c18 61 * dspiConfig.dataConfig.clkPolarity = kDspiClockPolarity_ActiveHigh;
mbed_official 146:f64d43ff0c18 62 * dspiConfig.dataConfig.clkPhase = kDspiClockPhase_FirstEdge;
mbed_official 146:f64d43ff0c18 63 * dspiConfig.dataConfig.direction = kDspiMsbFirst;
mbed_official 146:f64d43ff0c18 64 * dspi_hal_master_init(instance, &dspiConfig, calculatedBaudRate);
mbed_official 146:f64d43ff0c18 65 *
mbed_official 146:f64d43ff0c18 66 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 67 dspi_status_t dspi_hal_master_init(uint32_t instance, const dspi_master_config_t * config,
mbed_official 146:f64d43ff0c18 68 uint32_t * calculatedBaudRate)
mbed_official 146:f64d43ff0c18 69 {
mbed_official 146:f64d43ff0c18 70 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 71
mbed_official 146:f64d43ff0c18 72 /* Enable or disable the module. */
mbed_official 146:f64d43ff0c18 73 /* Note, to enable the module, MDIS must be cleared. However, the member isEnabled*/
mbed_official 146:f64d43ff0c18 74 /* must be true (1) to enable module, hence we negate the value of isEnabled to properly*/
mbed_official 146:f64d43ff0c18 75 /* configure the MDIS bit*/
mbed_official 146:f64d43ff0c18 76 BW_SPI_MCR_MDIS(instance, ~(config->isEnabled == true));
mbed_official 146:f64d43ff0c18 77
mbed_official 146:f64d43ff0c18 78 /* Configure baud rate if a value is provided.*/
mbed_official 146:f64d43ff0c18 79 if (config->bitsPerSec != 0U)
mbed_official 146:f64d43ff0c18 80 {
mbed_official 146:f64d43ff0c18 81 *calculatedBaudRate = dspi_hal_set_baud(instance, config->whichCtar, config->bitsPerSec,
mbed_official 146:f64d43ff0c18 82 config->sourceClockInHz);
mbed_official 146:f64d43ff0c18 83 }
mbed_official 146:f64d43ff0c18 84 else
mbed_official 146:f64d43ff0c18 85 {
mbed_official 146:f64d43ff0c18 86 *calculatedBaudRate = 0;
mbed_official 146:f64d43ff0c18 87 }
mbed_official 146:f64d43ff0c18 88
mbed_official 146:f64d43ff0c18 89 /* Set master or slave mode.*/
mbed_official 146:f64d43ff0c18 90 dspi_hal_set_master_slave(instance, kDspiMaster);
mbed_official 146:f64d43ff0c18 91
mbed_official 146:f64d43ff0c18 92 /* Configure data format.*/
mbed_official 146:f64d43ff0c18 93 if (dspi_hal_configure_data_format(instance, config->whichCtar, &config->dataConfig)
mbed_official 146:f64d43ff0c18 94 != kStatus_DSPI_Success)
mbed_official 146:f64d43ff0c18 95 {
mbed_official 146:f64d43ff0c18 96 return kStatus_DSPI_InvalidBitCount;
mbed_official 146:f64d43ff0c18 97 }
mbed_official 146:f64d43ff0c18 98
mbed_official 146:f64d43ff0c18 99 /* Configure for continuous SCK operation*/
mbed_official 146:f64d43ff0c18 100 dspi_hal_configure_continuous_sck(instance, config->isSckContinuous);
mbed_official 146:f64d43ff0c18 101
mbed_official 146:f64d43ff0c18 102 /* Configure for peripheral chip select polarity*/
mbed_official 146:f64d43ff0c18 103 dspi_hal_configure_pcs_polarity(instance, config->whichPcs,config->pcsPolarity);
mbed_official 146:f64d43ff0c18 104
mbed_official 146:f64d43ff0c18 105 /* Configure sample point for data in, master mode*/
mbed_official 146:f64d43ff0c18 106 dspi_hal_set_datain_samplepoint(instance, config->masterInSample);
mbed_official 146:f64d43ff0c18 107
mbed_official 146:f64d43ff0c18 108 /* Configure for modified timing format*/
mbed_official 146:f64d43ff0c18 109 dspi_hal_configure_modified_timing_format(instance, config->isModifiedTimingFormatEnabled);
mbed_official 146:f64d43ff0c18 110
mbed_official 146:f64d43ff0c18 111 /* Configure for fifo operation*/
mbed_official 146:f64d43ff0c18 112 dspi_hal_configure_fifos(instance, config->isTxFifoDisabled, config->isRxFifoDisabled);
mbed_official 146:f64d43ff0c18 113
mbed_official 146:f64d43ff0c18 114 /* finally, clear the DSPI CONFIGURATION (DCONF), even though this is cleared in some IPs*/
mbed_official 146:f64d43ff0c18 115 /* by default and other bit settings are reserved*/
mbed_official 146:f64d43ff0c18 116 HW_SPI_MCR_CLR(instance, BM_SPI_MCR_DCONF);
mbed_official 146:f64d43ff0c18 117
mbed_official 146:f64d43ff0c18 118 return kStatus_DSPI_Success;
mbed_official 146:f64d43ff0c18 119 }
mbed_official 146:f64d43ff0c18 120
mbed_official 146:f64d43ff0c18 121 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 122 *
mbed_official 146:f64d43ff0c18 123 * Function Name : dspi_hal_slave_init
mbed_official 146:f64d43ff0c18 124 * Description : Configure the DSPI peripheral in slave mode.
mbed_official 146:f64d43ff0c18 125 * This function initializes the DSPI module for slave mode. Here is an example demonstrating how
mbed_official 146:f64d43ff0c18 126 * to define the dspi_slave_config_t structure and call the dspi_hal_slave_init function:
mbed_official 146:f64d43ff0c18 127 * dspi_slave_config_t dspiConfig;
mbed_official 146:f64d43ff0c18 128 * dspiConfig.isEnabled = false;
mbed_official 146:f64d43ff0c18 129 * dspiConfig.isTxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 130 * dspiConfig.isRxFifoDisabled = false;
mbed_official 146:f64d43ff0c18 131 * dspiConfig.dataConfig.bitsPerFrame = 16;
mbed_official 146:f64d43ff0c18 132 * dspiConfig.dataConfig.clkPolarity = kDspiClockPolarity_ActiveHigh;
mbed_official 146:f64d43ff0c18 133 * dspiConfig.dataConfig.clkPhase = kDspiClockPhase_FirstEdge;
mbed_official 146:f64d43ff0c18 134 * dspi_hal_slave_init(instance, &dspiConfig);
mbed_official 146:f64d43ff0c18 135 *
mbed_official 146:f64d43ff0c18 136 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 137 dspi_status_t dspi_hal_slave_init(uint32_t instance, const dspi_slave_config_t * config)
mbed_official 146:f64d43ff0c18 138 {
mbed_official 146:f64d43ff0c18 139 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 140
mbed_official 146:f64d43ff0c18 141 /* Enable or disable the module.
mbed_official 146:f64d43ff0c18 142 * Note, to enable the module, MDIS must be cleared. However, the member isEnabled
mbed_official 146:f64d43ff0c18 143 * must be true (1) to enable module, hence we negate the value of isEnabled to properly
mbed_official 146:f64d43ff0c18 144 * configure the MDIS bit
mbed_official 146:f64d43ff0c18 145 */
mbed_official 146:f64d43ff0c18 146 BW_SPI_MCR_MDIS(instance, ~(config->isEnabled == true));
mbed_official 146:f64d43ff0c18 147
mbed_official 146:f64d43ff0c18 148 /* Set master or slave moe. */
mbed_official 146:f64d43ff0c18 149 dspi_hal_set_master_slave(instance, kDspiSlave);
mbed_official 146:f64d43ff0c18 150
mbed_official 146:f64d43ff0c18 151 /* Configure data format. For slave mode, only CTAR0 is available for use */
mbed_official 146:f64d43ff0c18 152 if (dspi_hal_configure_data_format(instance, kDspiCtar0, &config->dataConfig)
mbed_official 146:f64d43ff0c18 153 != kStatus_DSPI_Success)
mbed_official 146:f64d43ff0c18 154 {
mbed_official 146:f64d43ff0c18 155 return kStatus_DSPI_InvalidBitCount;
mbed_official 146:f64d43ff0c18 156 }
mbed_official 146:f64d43ff0c18 157
mbed_official 146:f64d43ff0c18 158 /* Configure for fifo operation */
mbed_official 146:f64d43ff0c18 159 dspi_hal_configure_fifos(instance, config->isTxFifoDisabled, config->isRxFifoDisabled);
mbed_official 146:f64d43ff0c18 160
mbed_official 146:f64d43ff0c18 161 /* finally, clear the DSPI CONFIGURATION (DCONF), even though this is cleared in some IPs
mbed_official 146:f64d43ff0c18 162 * by default and other bit settings are reserved
mbed_official 146:f64d43ff0c18 163 */
mbed_official 146:f64d43ff0c18 164 HW_SPI_MCR_CLR(instance, BM_SPI_MCR_DCONF);
mbed_official 146:f64d43ff0c18 165
mbed_official 146:f64d43ff0c18 166 return kStatus_DSPI_Success;
mbed_official 146:f64d43ff0c18 167 }
mbed_official 146:f64d43ff0c18 168
mbed_official 146:f64d43ff0c18 169 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 170 *
mbed_official 146:f64d43ff0c18 171 * Function Name : dspi_hal_reset
mbed_official 146:f64d43ff0c18 172 * Description : Restore DSPI to reset configuration.
mbed_official 146:f64d43ff0c18 173 * This function basically resets all of the DSPI registers to their default setting including
mbed_official 146:f64d43ff0c18 174 * disabling the module.
mbed_official 146:f64d43ff0c18 175 *
mbed_official 146:f64d43ff0c18 176 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 177 void dspi_hal_reset(uint32_t instance)
mbed_official 146:f64d43ff0c18 178 {
mbed_official 146:f64d43ff0c18 179 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 180
mbed_official 146:f64d43ff0c18 181 /* first, make sure the module is enabled to allow writes to certain registers*/
mbed_official 146:f64d43ff0c18 182 dspi_hal_enable(instance);
mbed_official 146:f64d43ff0c18 183
mbed_official 146:f64d43ff0c18 184 /* Halt all transfers*/
mbed_official 146:f64d43ff0c18 185 HW_SPI_MCR_WR(instance, BM_SPI_MCR_HALT);
mbed_official 146:f64d43ff0c18 186
mbed_official 146:f64d43ff0c18 187 /* flush the fifos*/
mbed_official 146:f64d43ff0c18 188 dspi_hal_flush_fifos(instance, true, true);
mbed_official 146:f64d43ff0c18 189
mbed_official 146:f64d43ff0c18 190 /* set the registers to their default states*/
mbed_official 146:f64d43ff0c18 191 /* clear the status bits (write-1-to-clear)*/
mbed_official 146:f64d43ff0c18 192 HW_SPI_SR_WR(instance, BM_SPI_SR_TCF | BM_SPI_SR_EOQF | BM_SPI_SR_TFUF | BM_SPI_SR_TFFF |
mbed_official 146:f64d43ff0c18 193 BM_SPI_SR_RFOF | BM_SPI_SR_RFDF);
mbed_official 146:f64d43ff0c18 194 HW_SPI_TCR_WR(instance, 0);
mbed_official 146:f64d43ff0c18 195 HW_SPI_CTARn_WR(instance, 0, 0); /* CTAR0*/
mbed_official 146:f64d43ff0c18 196 HW_SPI_CTARn_WR(instance, 1, 0); /* CTAR1*/
mbed_official 146:f64d43ff0c18 197 HW_SPI_RSER_WR(instance, 0);
mbed_official 146:f64d43ff0c18 198 /* disable the module*/
mbed_official 146:f64d43ff0c18 199 HW_SPI_MCR_WR(instance, BM_SPI_MCR_MDIS | BM_SPI_MCR_HALT);
mbed_official 146:f64d43ff0c18 200 }
mbed_official 146:f64d43ff0c18 201
mbed_official 146:f64d43ff0c18 202 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 203 *
mbed_official 146:f64d43ff0c18 204 * Function Name : dspi_hal_set_baud
mbed_official 146:f64d43ff0c18 205 * Description : Set the DSPI baud rate in bits per second.
mbed_official 146:f64d43ff0c18 206 * This function will take in the desired bitsPerSec (baud rate) and will calculate the nearest
mbed_official 146:f64d43ff0c18 207 * possible baud rate without exceeding the desired baud rate, and will return the calculated
mbed_official 146:f64d43ff0c18 208 * baud rate in bits-per-second. It requires that the caller also provide the frequency of the
mbed_official 146:f64d43ff0c18 209 * module source clock (in Hz).
mbed_official 146:f64d43ff0c18 210 *
mbed_official 146:f64d43ff0c18 211 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 212 uint32_t dspi_hal_set_baud(uint32_t instance, dspi_ctar_selection_t whichCtar, uint32_t bitsPerSec,
mbed_official 146:f64d43ff0c18 213 uint32_t sourceClockInHz)
mbed_official 146:f64d43ff0c18 214 {
mbed_official 146:f64d43ff0c18 215 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 216
mbed_official 146:f64d43ff0c18 217 /* for master mode configuration, if slave mode detected, return 0*/
mbed_official 146:f64d43ff0c18 218 if (HW_SPI_MCR(instance).B.MSTR != 1)
mbed_official 146:f64d43ff0c18 219 {
mbed_official 146:f64d43ff0c18 220 return 0;
mbed_official 146:f64d43ff0c18 221 }
mbed_official 146:f64d43ff0c18 222
mbed_official 146:f64d43ff0c18 223 uint32_t prescaler, bestPrescaler;
mbed_official 146:f64d43ff0c18 224 uint32_t scaler, bestScaler;
mbed_official 146:f64d43ff0c18 225 uint32_t dbr, bestDbr;
mbed_official 146:f64d43ff0c18 226 uint32_t realBaudrate, bestBaudrate;
mbed_official 146:f64d43ff0c18 227 uint32_t diff, min_diff;
mbed_official 146:f64d43ff0c18 228 uint32_t baudrate = bitsPerSec;
mbed_official 146:f64d43ff0c18 229
mbed_official 146:f64d43ff0c18 230 /* find combination of prescaler and scaler resulting in baudrate closest to the */
mbed_official 146:f64d43ff0c18 231 /* requested value */
mbed_official 146:f64d43ff0c18 232 min_diff = 0xFFFFFFFFU;
mbed_official 146:f64d43ff0c18 233 bestPrescaler = 0;
mbed_official 146:f64d43ff0c18 234 bestScaler = 0;
mbed_official 146:f64d43ff0c18 235 bestDbr = 1;
mbed_official 146:f64d43ff0c18 236 bestBaudrate = 0; /* required to avoid compilation warning */
mbed_official 146:f64d43ff0c18 237
mbed_official 146:f64d43ff0c18 238 /* In all for loops, if min_diff = 0, the exit for loop*/
mbed_official 146:f64d43ff0c18 239 for (prescaler = 0; (prescaler < 4) && min_diff; prescaler++)
mbed_official 146:f64d43ff0c18 240 {
mbed_official 146:f64d43ff0c18 241 for (scaler = 0; (scaler < 16) && min_diff; scaler++)
mbed_official 146:f64d43ff0c18 242 {
mbed_official 146:f64d43ff0c18 243 for (dbr = 1; (dbr < 3) && min_diff; dbr++)
mbed_official 146:f64d43ff0c18 244 {
mbed_official 146:f64d43ff0c18 245 realBaudrate = ((sourceClockInHz * dbr) /
mbed_official 146:f64d43ff0c18 246 (s_baudratePrescaler[prescaler] * (s_baudrateScaler[scaler])));
mbed_official 146:f64d43ff0c18 247
mbed_official 146:f64d43ff0c18 248 /* calculate the baud rate difference based on the conditional statement*/
mbed_official 146:f64d43ff0c18 249 /* that states that the calculated baud rate must not exceed the desired baud rate*/
mbed_official 146:f64d43ff0c18 250 if (baudrate >= realBaudrate)
mbed_official 146:f64d43ff0c18 251 {
mbed_official 146:f64d43ff0c18 252 diff = baudrate-realBaudrate;
mbed_official 146:f64d43ff0c18 253 if (min_diff > diff)
mbed_official 146:f64d43ff0c18 254 {
mbed_official 146:f64d43ff0c18 255 /* a better match found */
mbed_official 146:f64d43ff0c18 256 min_diff = diff;
mbed_official 146:f64d43ff0c18 257 bestPrescaler = prescaler;
mbed_official 146:f64d43ff0c18 258 bestScaler = scaler;
mbed_official 146:f64d43ff0c18 259 bestBaudrate = realBaudrate;
mbed_official 146:f64d43ff0c18 260 bestDbr = dbr;
mbed_official 146:f64d43ff0c18 261 }
mbed_official 146:f64d43ff0c18 262 }
mbed_official 146:f64d43ff0c18 263 }
mbed_official 146:f64d43ff0c18 264 }
mbed_official 146:f64d43ff0c18 265 }
mbed_official 146:f64d43ff0c18 266
mbed_official 146:f64d43ff0c18 267 uint32_t temp;
mbed_official 146:f64d43ff0c18 268 /* write the best dbr, prescalar, and baud rate scalar to the CTAR*/
mbed_official 146:f64d43ff0c18 269 temp = HW_SPI_CTARn_RD(instance, whichCtar); /* save register contents*/
mbed_official 146:f64d43ff0c18 270 temp &= ~(BM_SPI_CTARn_DBR| BM_SPI_CTARn_PBR | BM_SPI_CTARn_BR);
mbed_official 146:f64d43ff0c18 271 temp |= BF_SPI_CTARn_DBR(bestDbr - 1) |
mbed_official 146:f64d43ff0c18 272 BF_SPI_CTARn_PBR(bestPrescaler) |
mbed_official 146:f64d43ff0c18 273 BF_SPI_CTARn_BR(bestScaler);
mbed_official 146:f64d43ff0c18 274 HW_SPI_CTARn_WR(instance, whichCtar, temp);
mbed_official 146:f64d43ff0c18 275
mbed_official 146:f64d43ff0c18 276 /* return the actual calculated baud rate*/
mbed_official 146:f64d43ff0c18 277 return bestBaudrate;
mbed_official 146:f64d43ff0c18 278 }
mbed_official 146:f64d43ff0c18 279
mbed_official 146:f64d43ff0c18 280 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 281 *
mbed_official 146:f64d43ff0c18 282 * Function Name : dspi_hal_set_baud_divisors
mbed_official 146:f64d43ff0c18 283 * Description : Configure the baud rate divisors manually.
mbed_official 146:f64d43ff0c18 284 * This function allows the caller to manually set the baud rate divisors in the event that
mbed_official 146:f64d43ff0c18 285 * these dividers are known and the caller does not wish to call the dspi_hal_set_baud function.
mbed_official 146:f64d43ff0c18 286 *
mbed_official 146:f64d43ff0c18 287 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 288 void dspi_hal_set_baud_divisors(uint32_t instance,
mbed_official 146:f64d43ff0c18 289 dspi_ctar_selection_t whichCtar,
mbed_official 146:f64d43ff0c18 290 const dspi_baud_rate_divisors_t * divisors)
mbed_official 146:f64d43ff0c18 291 {
mbed_official 146:f64d43ff0c18 292 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 293
mbed_official 146:f64d43ff0c18 294 uint32_t temp;
mbed_official 146:f64d43ff0c18 295
mbed_official 146:f64d43ff0c18 296 /* these settings are only relevant in master mode*/
mbed_official 146:f64d43ff0c18 297 if (HW_SPI_MCR(instance).B.MSTR == 1)
mbed_official 146:f64d43ff0c18 298 {
mbed_official 146:f64d43ff0c18 299 temp = HW_SPI_CTARn_RD(instance, whichCtar); /* save register contents*/
mbed_official 146:f64d43ff0c18 300 temp &= ~(BM_SPI_CTARn_DBR | BM_SPI_CTARn_PBR | BM_SPI_CTARn_BR); /* clear dividers*/
mbed_official 146:f64d43ff0c18 301 temp |= BF_SPI_CTARn_DBR(divisors->doubleBaudRate) |
mbed_official 146:f64d43ff0c18 302 BF_SPI_CTARn_PBR(divisors->prescaleDivisor) |
mbed_official 146:f64d43ff0c18 303 BF_SPI_CTARn_BR(divisors->baudRateDivisor);
mbed_official 146:f64d43ff0c18 304 HW_SPI_CTARn_WR(instance, whichCtar, temp);
mbed_official 146:f64d43ff0c18 305 }
mbed_official 146:f64d43ff0c18 306 }
mbed_official 146:f64d43ff0c18 307
mbed_official 146:f64d43ff0c18 308 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 309 *
mbed_official 146:f64d43ff0c18 310 * Function Name : dspi_hal_configure_pcs_polarity
mbed_official 146:f64d43ff0c18 311 * Description : Configure DSPI peripheral chip select polarity.
mbed_official 146:f64d43ff0c18 312 * This function will take in the desired peripheral chip select (PCS) and it's
mbed_official 146:f64d43ff0c18 313 * corresponding desired polarity and will configure the PCS signal to operate with the
mbed_official 146:f64d43ff0c18 314 * desired characteristic.
mbed_official 146:f64d43ff0c18 315 *
mbed_official 146:f64d43ff0c18 316 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 317 void dspi_hal_configure_pcs_polarity(uint32_t instance, dspi_which_pcs_config_t pcs,
mbed_official 146:f64d43ff0c18 318 dspi_pcs_polarity_config_t activeLowOrHigh)
mbed_official 146:f64d43ff0c18 319 {
mbed_official 146:f64d43ff0c18 320 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 321
mbed_official 146:f64d43ff0c18 322 uint32_t temp;
mbed_official 146:f64d43ff0c18 323
mbed_official 146:f64d43ff0c18 324 temp = BR_SPI_MCR_PCSIS(instance);
mbed_official 146:f64d43ff0c18 325
mbed_official 146:f64d43ff0c18 326 if (activeLowOrHigh == kDspiPcs_ActiveLow)
mbed_official 146:f64d43ff0c18 327 {
mbed_official 146:f64d43ff0c18 328 temp |= pcs;
mbed_official 146:f64d43ff0c18 329 }
mbed_official 146:f64d43ff0c18 330 else /* kDspiPcsPolarity_ActiveHigh*/
mbed_official 146:f64d43ff0c18 331 {
mbed_official 146:f64d43ff0c18 332 temp &= ~(unsigned)pcs;
mbed_official 146:f64d43ff0c18 333 }
mbed_official 146:f64d43ff0c18 334
mbed_official 146:f64d43ff0c18 335 BW_SPI_MCR_PCSIS(instance, temp);
mbed_official 146:f64d43ff0c18 336 }
mbed_official 146:f64d43ff0c18 337
mbed_official 146:f64d43ff0c18 338
mbed_official 146:f64d43ff0c18 339 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 340 *
mbed_official 146:f64d43ff0c18 341 * Function Name : dspi_hal_configure_fifos
mbed_official 146:f64d43ff0c18 342 * Description : Configure DSPI fifos.
mbed_official 146:f64d43ff0c18 343 * This function with allow the caller to disable/enable the TX and RX FIFOs (independently).
mbed_official 146:f64d43ff0c18 344 * Note that to disable, the caller must pass in a logic 1 (true) for the particular FIFO
mbed_official 146:f64d43ff0c18 345 * configuration. To enable, the caller must pass in a logic 0 (false). For example, to enable
mbed_official 146:f64d43ff0c18 346 * both the TX and RX FIFOs, the caller will make this function call (where instance is the
mbed_official 146:f64d43ff0c18 347 *
mbed_official 146:f64d43ff0c18 348 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 349 void dspi_hal_configure_fifos(uint32_t instance, bool disableTxFifo, bool disableRxFifo)
mbed_official 146:f64d43ff0c18 350 {
mbed_official 146:f64d43ff0c18 351 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 352
mbed_official 146:f64d43ff0c18 353 /* first see if MDIS is set or cleared */
mbed_official 146:f64d43ff0c18 354 uint32_t isMdisSet = HW_SPI_MCR(instance).B.MDIS;
mbed_official 146:f64d43ff0c18 355
mbed_official 146:f64d43ff0c18 356 if (isMdisSet)
mbed_official 146:f64d43ff0c18 357 {
mbed_official 146:f64d43ff0c18 358 /* clear the MDIS bit to allow us to write to the fifo disables */
mbed_official 146:f64d43ff0c18 359 HW_SPI_MCR_CLR(instance, BM_SPI_MCR_MDIS);
mbed_official 146:f64d43ff0c18 360 }
mbed_official 146:f64d43ff0c18 361
mbed_official 146:f64d43ff0c18 362 BW_SPI_MCR_DIS_TXF(instance, (disableTxFifo == true));
mbed_official 146:f64d43ff0c18 363 BW_SPI_MCR_DIS_RXF(instance, (disableRxFifo == true));
mbed_official 146:f64d43ff0c18 364
mbed_official 146:f64d43ff0c18 365 /* set MDIS if it was set to begin with */
mbed_official 146:f64d43ff0c18 366 if (isMdisSet)
mbed_official 146:f64d43ff0c18 367 {
mbed_official 146:f64d43ff0c18 368 HW_SPI_MCR_SET(instance, BM_SPI_MCR_MDIS);
mbed_official 146:f64d43ff0c18 369 }
mbed_official 146:f64d43ff0c18 370 }
mbed_official 146:f64d43ff0c18 371
mbed_official 146:f64d43ff0c18 372 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 373 *
mbed_official 146:f64d43ff0c18 374 * Function Name : dspi_hal_flush_fifos
mbed_official 146:f64d43ff0c18 375 * Description : Flush DSPI fifos.
mbed_official 146:f64d43ff0c18 376 *
mbed_official 146:f64d43ff0c18 377 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 378 void dspi_hal_flush_fifos(uint32_t instance, bool enableFlushTxFifo, bool enableFlushRxFifo)
mbed_official 146:f64d43ff0c18 379 {
mbed_official 146:f64d43ff0c18 380 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 381
mbed_official 146:f64d43ff0c18 382 BW_SPI_MCR_CLR_TXF(instance, (enableFlushTxFifo == true));
mbed_official 146:f64d43ff0c18 383 BW_SPI_MCR_CLR_RXF(instance, (enableFlushRxFifo == true));
mbed_official 146:f64d43ff0c18 384 }
mbed_official 146:f64d43ff0c18 385
mbed_official 146:f64d43ff0c18 386 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 387 *
mbed_official 146:f64d43ff0c18 388 * Function Name : dspi_hal_configure_data_format
mbed_official 146:f64d43ff0c18 389 * Description : Configure the data format for a particular CTAR.
mbed_official 146:f64d43ff0c18 390 * This function configures the bits-per-frame, polarity, phase, and shift direction for a
mbed_official 146:f64d43ff0c18 391 * particular CTAR. An example use case is as follows:
mbed_official 146:f64d43ff0c18 392 * dspi_data_format_config_t dataFormat;
mbed_official 146:f64d43ff0c18 393 * dataFormat.bitsPerFrame = 16;
mbed_official 146:f64d43ff0c18 394 * dataFormat.clkPolarity = kDspiClockPolarity_ActiveLow;
mbed_official 146:f64d43ff0c18 395 * dataFormat.clkPhase = kDspiClockPhase_FirstEdge;
mbed_official 146:f64d43ff0c18 396 * dataFormat.direction = kDspiMsbFirst;
mbed_official 146:f64d43ff0c18 397 * dspi_hal_configure_data_format(instance, kDspiCtar0, &dataFormat);
mbed_official 146:f64d43ff0c18 398 *
mbed_official 146:f64d43ff0c18 399 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 400 dspi_status_t dspi_hal_configure_data_format(uint32_t instance,
mbed_official 146:f64d43ff0c18 401 dspi_ctar_selection_t whichCtar,
mbed_official 146:f64d43ff0c18 402 const dspi_data_format_config_t * config)
mbed_official 146:f64d43ff0c18 403 {
mbed_official 146:f64d43ff0c18 404 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 405
mbed_official 146:f64d43ff0c18 406 /* check bits-per-frame value to make sure it it within the proper range*/
mbed_official 146:f64d43ff0c18 407 /* in either master or slave mode*/
mbed_official 146:f64d43ff0c18 408 if ((config->bitsPerFrame < 4) ||
mbed_official 146:f64d43ff0c18 409 ((config->bitsPerFrame > 16) && (HW_SPI_MCR(instance).B.MSTR == 1)) ||
mbed_official 146:f64d43ff0c18 410 ((config->bitsPerFrame > 32) && (HW_SPI_MCR(instance).B.MSTR == 0)))
mbed_official 146:f64d43ff0c18 411 {
mbed_official 146:f64d43ff0c18 412 return kStatus_DSPI_InvalidBitCount;
mbed_official 146:f64d43ff0c18 413 }
mbed_official 146:f64d43ff0c18 414
mbed_official 146:f64d43ff0c18 415 uint32_t temp;
mbed_official 146:f64d43ff0c18 416
mbed_official 146:f64d43ff0c18 417 /* for master mode configuration*/
mbed_official 146:f64d43ff0c18 418 if (HW_SPI_MCR(instance).B.MSTR == 1)
mbed_official 146:f64d43ff0c18 419 {
mbed_official 146:f64d43ff0c18 420 temp = HW_SPI_CTARn_RD(instance, whichCtar); /* save register contents*/
mbed_official 146:f64d43ff0c18 421 temp &= ~(BM_SPI_CTARn_FMSZ| BM_SPI_CTARn_CPOL | BM_SPI_CTARn_CPHA | BM_SPI_CTARn_LSBFE);
mbed_official 146:f64d43ff0c18 422 temp |= BF_SPI_CTARn_FMSZ(config->bitsPerFrame - 1) |
mbed_official 146:f64d43ff0c18 423 BF_SPI_CTARn_CPOL(config->clkPolarity) |
mbed_official 146:f64d43ff0c18 424 BF_SPI_CTARn_CPHA(config->clkPhase) |
mbed_official 146:f64d43ff0c18 425 BF_SPI_CTARn_LSBFE(config->direction);
mbed_official 146:f64d43ff0c18 426 HW_SPI_CTARn_WR(instance, whichCtar, temp);
mbed_official 146:f64d43ff0c18 427 }
mbed_official 146:f64d43ff0c18 428 else /* for slave mode configuration*/
mbed_official 146:f64d43ff0c18 429 {
mbed_official 146:f64d43ff0c18 430 temp = HW_SPI_CTARn_SLAVE_RD(instance, whichCtar); /* save register contents*/
mbed_official 146:f64d43ff0c18 431 temp &= ~(BM_SPI_CTARn_SLAVE_FMSZ| BM_SPI_CTARn_SLAVE_CPOL | BM_SPI_CTARn_SLAVE_CPHA);
mbed_official 146:f64d43ff0c18 432 temp |= BF_SPI_CTARn_SLAVE_FMSZ(config->bitsPerFrame - 1) |
mbed_official 146:f64d43ff0c18 433 BF_SPI_CTARn_SLAVE_CPOL(config->clkPolarity) |
mbed_official 146:f64d43ff0c18 434 BF_SPI_CTARn_SLAVE_CPHA(config->clkPhase);
mbed_official 146:f64d43ff0c18 435 HW_SPI_CTARn_SLAVE_WR(instance, whichCtar, temp);
mbed_official 146:f64d43ff0c18 436 }
mbed_official 146:f64d43ff0c18 437 return kStatus_DSPI_Success;
mbed_official 146:f64d43ff0c18 438 }
mbed_official 146:f64d43ff0c18 439
mbed_official 146:f64d43ff0c18 440 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 441 *
mbed_official 146:f64d43ff0c18 442 * Function Name : dspi_hal_configure_delays
mbed_official 146:f64d43ff0c18 443 * Description : Configure the delays for a particular CTAR, master mode only.
mbed_official 146:f64d43ff0c18 444 * This function configures the PCS to SCK delay prescalar (PCSSCK),
mbed_official 146:f64d43ff0c18 445 * the PCS to SCK Delay scalar (CSSCK),
mbed_official 146:f64d43ff0c18 446 * the After SCK delay prescalar (PASC),
mbed_official 146:f64d43ff0c18 447 * the After SCK delay scalar (ASC),
mbed_official 146:f64d43ff0c18 448 * the Delay after transfer prescalar (PDT),
mbed_official 146:f64d43ff0c18 449 * and the Delay after transfer scalar (DT).
mbed_official 146:f64d43ff0c18 450 * The following is an example use case of this function:
mbed_official 146:f64d43ff0c18 451 * dspi_delay_settings_config_t delayConfig;
mbed_official 146:f64d43ff0c18 452 * delayConfig.pcsToSckPre = 0x3;
mbed_official 146:f64d43ff0c18 453 * delayConfig.pcsToSck = 0xF;
mbed_official 146:f64d43ff0c18 454 * delayConfig.afterSckPre = 0x2;
mbed_official 146:f64d43ff0c18 455 * delayConfig.afterSck = 0xA;
mbed_official 146:f64d43ff0c18 456 * delayConfig.afterTransferPre = 0x1;
mbed_official 146:f64d43ff0c18 457 * delayConfig.afterTransfer = 0x5;
mbed_official 146:f64d43ff0c18 458 * dspi_hal_configure_delays(instance, kDspiCtar0, &delayConfig);
mbed_official 146:f64d43ff0c18 459 *
mbed_official 146:f64d43ff0c18 460 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 461 void dspi_hal_configure_delays(uint32_t instance,
mbed_official 146:f64d43ff0c18 462 dspi_ctar_selection_t whichCtar,
mbed_official 146:f64d43ff0c18 463 const dspi_delay_settings_config_t * config)
mbed_official 146:f64d43ff0c18 464 {
mbed_official 146:f64d43ff0c18 465 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 466
mbed_official 146:f64d43ff0c18 467 uint32_t temp;
mbed_official 146:f64d43ff0c18 468
mbed_official 146:f64d43ff0c18 469 /* these settings are only relevant in master mode*/
mbed_official 146:f64d43ff0c18 470 if (HW_SPI_MCR(instance).B.MSTR == 1)
mbed_official 146:f64d43ff0c18 471 {
mbed_official 146:f64d43ff0c18 472 temp = HW_SPI_CTARn_RD(instance, whichCtar); /* save register contents*/
mbed_official 146:f64d43ff0c18 473 temp &= ~(BM_SPI_CTARn_PCSSCK | BM_SPI_CTARn_PASC | BM_SPI_CTARn_PDT |
mbed_official 146:f64d43ff0c18 474 BM_SPI_CTARn_CSSCK| BM_SPI_CTARn_ASC | BM_SPI_CTARn_DT);
mbed_official 146:f64d43ff0c18 475 temp |= BF_SPI_CTARn_PCSSCK(config->pcsToSckPre) |
mbed_official 146:f64d43ff0c18 476 BF_SPI_CTARn_PASC(config->afterSckPre) |
mbed_official 146:f64d43ff0c18 477 BF_SPI_CTARn_PDT(config->afterTransferPre) |
mbed_official 146:f64d43ff0c18 478 BF_SPI_CTARn_CSSCK(config->pcsToSck) |
mbed_official 146:f64d43ff0c18 479 BF_SPI_CTARn_ASC(config->afterSck) |
mbed_official 146:f64d43ff0c18 480 BF_SPI_CTARn_DT(config->afterTransfer);
mbed_official 146:f64d43ff0c18 481 HW_SPI_CTARn_WR(instance, whichCtar, temp);
mbed_official 146:f64d43ff0c18 482 }
mbed_official 146:f64d43ff0c18 483 }
mbed_official 146:f64d43ff0c18 484
mbed_official 146:f64d43ff0c18 485 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 486 *
mbed_official 146:f64d43ff0c18 487 * Function Name : dspi_hal_configure_dma
mbed_official 146:f64d43ff0c18 488 * Description : Configure transmit and receive DMA requests.
mbed_official 146:f64d43ff0c18 489 * This function configures the FIFOs to generate a DMA or interrupt request. Note that the
mbed_official 146:f64d43ff0c18 490 * corresponding request enable must also be set. For the Transmit FIFO Fill, in order
mbed_official 146:f64d43ff0c18 491 * to generate a DMA request, the Transmit FIFO Fill Request Enable (TFFF_RE) must also be set.
mbed_official 146:f64d43ff0c18 492 * Similarly for the Receive FIFO Drain Request, to generate a DMA request, the Receive FIFO Drain
mbed_official 146:f64d43ff0c18 493 * Request Enable (RFDF_RE) must also be set. These request enables can be configured via
mbed_official 146:f64d43ff0c18 494 * the function dspi_hal_configure_interrupt(). So basically to enable DMA operation, first enable
mbed_official 146:f64d43ff0c18 495 * the desired request enable using the dspi_hal_configure_interrupt() function and then use
mbed_official 146:f64d43ff0c18 496 * the dspi_hal_configure_dma() to configure the request to generate a DMA reuqest.
mbed_official 146:f64d43ff0c18 497 *
mbed_official 146:f64d43ff0c18 498 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 499 void dspi_hal_configure_dma(uint32_t instance, bool enableTransmit, bool enableReceive)
mbed_official 146:f64d43ff0c18 500 {
mbed_official 146:f64d43ff0c18 501 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 502
mbed_official 146:f64d43ff0c18 503 BW_SPI_RSER_TFFF_DIRS(instance, enableTransmit);
mbed_official 146:f64d43ff0c18 504 BW_SPI_RSER_RFDF_DIRS(instance, enableReceive);
mbed_official 146:f64d43ff0c18 505 }
mbed_official 146:f64d43ff0c18 506
mbed_official 146:f64d43ff0c18 507 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 508 *
mbed_official 146:f64d43ff0c18 509 * Function Name : dspi_hal_configure_interrupt
mbed_official 146:f64d43ff0c18 510 * Description : Configure DSPI interrupts.
mbed_official 146:f64d43ff0c18 511 * This function will configure the various interrupt sources of the DSPI. The parameters to pass
mbed_official 146:f64d43ff0c18 512 * in are instance, interrupt source, and enable/disable setting.
mbed_official 146:f64d43ff0c18 513 * The interrupt source will be of a typedef enum whose value will be the bit position of the
mbed_official 146:f64d43ff0c18 514 * interrupt source setting within the RSER register. In the DSPI, all of the interrupt
mbed_official 146:f64d43ff0c18 515 * configuration settings reside within the one register. The typedef enum will equate each
mbed_official 146:f64d43ff0c18 516 * interrupt source to the bit position defined in the device header file.
mbed_official 146:f64d43ff0c18 517 * The function will use these bit positions in its algorithm to enable/disable the
mbed_official 146:f64d43ff0c18 518 * interrupt source, where interrupt source is of type dspi_status_and_interrupt_request_t.
mbed_official 146:f64d43ff0c18 519 * temp = (HW_SPI_RSER_RD(instance) & ~interruptSrc) | (enable << interruptSrc);
mbed_official 146:f64d43ff0c18 520 * HW_SPI_RSER_WR(instance, temp);
mbed_official 146:f64d43ff0c18 521 *
mbed_official 146:f64d43ff0c18 522 * dspi_hal_configure_interrupt(instance, kDspiTxComplete, true); <- example use-case
mbed_official 146:f64d43ff0c18 523 *
mbed_official 146:f64d43ff0c18 524 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 525 void dspi_hal_configure_interrupt(uint32_t instance,
mbed_official 146:f64d43ff0c18 526 dspi_status_and_interrupt_request_t interruptSrc,
mbed_official 146:f64d43ff0c18 527 bool enable)
mbed_official 146:f64d43ff0c18 528 {
mbed_official 146:f64d43ff0c18 529 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 530
mbed_official 146:f64d43ff0c18 531 uint32_t temp;
mbed_official 146:f64d43ff0c18 532
mbed_official 146:f64d43ff0c18 533 temp = (HW_SPI_RSER_RD(instance) & ~(0x1U << interruptSrc)) | ((uint32_t)enable << interruptSrc);
mbed_official 146:f64d43ff0c18 534 HW_SPI_RSER_WR(instance, temp);
mbed_official 146:f64d43ff0c18 535 }
mbed_official 146:f64d43ff0c18 536
mbed_official 146:f64d43ff0c18 537 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 538 *
mbed_official 146:f64d43ff0c18 539 * Function Name : dspi_hal_get_fifo_data
mbed_official 146:f64d43ff0c18 540 * Description : Read fifo registers for debug purposes.
mbed_official 146:f64d43ff0c18 541 *
mbed_official 146:f64d43ff0c18 542 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 543 uint32_t dspi_hal_get_fifo_data(uint32_t instance, dspi_fifo_t whichFifo, uint32_t whichFifoEntry)
mbed_official 146:f64d43ff0c18 544 {
mbed_official 146:f64d43ff0c18 545 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 546
mbed_official 146:f64d43ff0c18 547 if (whichFifo == kDspiTxFifo)
mbed_official 146:f64d43ff0c18 548 {
mbed_official 146:f64d43ff0c18 549 return HW_SPI_TXFRn_RD(instance, whichFifoEntry);
mbed_official 146:f64d43ff0c18 550 }
mbed_official 146:f64d43ff0c18 551 else
mbed_official 146:f64d43ff0c18 552 {
mbed_official 146:f64d43ff0c18 553 return HW_SPI_RXFRn_RD(instance, whichFifoEntry);
mbed_official 146:f64d43ff0c18 554 }
mbed_official 146:f64d43ff0c18 555 }
mbed_official 146:f64d43ff0c18 556
mbed_official 146:f64d43ff0c18 557 /*FUNCTION**********************************************************************
mbed_official 146:f64d43ff0c18 558 *
mbed_official 146:f64d43ff0c18 559 * Function Name : dspi_hal_write_data_master_mode
mbed_official 146:f64d43ff0c18 560 * Description : Write data into the data buffer, master mode.
mbed_official 146:f64d43ff0c18 561 * In master mode, the 16-bit data is appended with the 16-bit command info. The command portion
mbed_official 146:f64d43ff0c18 562 * provides characteristics of the data being sent such as: optional continuous chip select
mbed_official 146:f64d43ff0c18 563 * operation between transfers, the desired Clock and Transfer Attributes register to use for the
mbed_official 146:f64d43ff0c18 564 * associated SPI frame, the desired PCS signal to use for the data transfer, whether the current
mbed_official 146:f64d43ff0c18 565 * transfer is the last in the queue, and whether to clear the transfer count (normally needed when
mbed_official 146:f64d43ff0c18 566 * sending the first frame of a data packet). An example use case is as follows:
mbed_official 146:f64d43ff0c18 567 * dspi_command_config_t commandConfig;
mbed_official 146:f64d43ff0c18 568 * commandConfig.isChipSelectContinuous = true;
mbed_official 146:f64d43ff0c18 569 * commandConfig.whichCtar = kDspiCtar0;
mbed_official 146:f64d43ff0c18 570 * commandConfig.whichPcs = kDspiPcs1;
mbed_official 146:f64d43ff0c18 571 * commandConfig.clearTransferCount = false;
mbed_official 146:f64d43ff0c18 572 * commandConfig.isEndOfQueue = false;
mbed_official 146:f64d43ff0c18 573 * dspi_hal_write_data_master_mode(instance, &commandConfig, dataWord);
mbed_official 146:f64d43ff0c18 574 *
mbed_official 146:f64d43ff0c18 575 *END**************************************************************************/
mbed_official 146:f64d43ff0c18 576 void dspi_hal_write_data_master_mode(uint32_t instance,
mbed_official 146:f64d43ff0c18 577 dspi_command_config_t * command,
mbed_official 146:f64d43ff0c18 578 uint16_t data)
mbed_official 146:f64d43ff0c18 579 {
mbed_official 146:f64d43ff0c18 580 assert(instance < HW_SPI_INSTANCE_COUNT);
mbed_official 146:f64d43ff0c18 581
mbed_official 146:f64d43ff0c18 582 uint32_t temp;
mbed_official 146:f64d43ff0c18 583
mbed_official 146:f64d43ff0c18 584 temp = BF_SPI_PUSHR_CONT(command->isChipSelectContinuous) |
mbed_official 146:f64d43ff0c18 585 BF_SPI_PUSHR_CTAS(command->whichCtar) |
mbed_official 146:f64d43ff0c18 586 BF_SPI_PUSHR_PCS(command->whichPcs) |
mbed_official 146:f64d43ff0c18 587 BF_SPI_PUSHR_EOQ(command->isEndOfQueue) |
mbed_official 146:f64d43ff0c18 588 BF_SPI_PUSHR_CTCNT(command->clearTransferCount) |
mbed_official 146:f64d43ff0c18 589 BF_SPI_PUSHR_TXDATA(data);
mbed_official 146:f64d43ff0c18 590
mbed_official 146:f64d43ff0c18 591 HW_SPI_PUSHR_WR(instance, temp);
mbed_official 146:f64d43ff0c18 592 }
mbed_official 146:f64d43ff0c18 593
mbed_official 146:f64d43ff0c18 594 /*******************************************************************************
mbed_official 146:f64d43ff0c18 595 * EOF
mbed_official 146:f64d43ff0c18 596 ******************************************************************************/
mbed_official 146:f64d43ff0c18 597