mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Mon Oct 02 15:33:19 2017 +0100
Revision:
174:b96e65c34a4d
This updates the lib to the mbed lib v 152

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 174:b96e65c34a4d 1 /**************************************************************************//**
AnnaBridge 174:b96e65c34a4d 2 * @file dac.c
AnnaBridge 174:b96e65c34a4d 3 * @version V1.00
AnnaBridge 174:b96e65c34a4d 4 * $Revision: 4 $
AnnaBridge 174:b96e65c34a4d 5 * $Date: 14/09/08 12:31p $
AnnaBridge 174:b96e65c34a4d 6 * @brief NANO100 series DAC driver source file
AnnaBridge 174:b96e65c34a4d 7 *
AnnaBridge 174:b96e65c34a4d 8 * @note
AnnaBridge 174:b96e65c34a4d 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 174:b96e65c34a4d 10 *****************************************************************************/
AnnaBridge 174:b96e65c34a4d 11 #include "Nano100Series.h"
AnnaBridge 174:b96e65c34a4d 12
AnnaBridge 174:b96e65c34a4d 13 /** @addtogroup NANO100_Device_Driver NANO100 Device Driver
AnnaBridge 174:b96e65c34a4d 14 @{
AnnaBridge 174:b96e65c34a4d 15 */
AnnaBridge 174:b96e65c34a4d 16
AnnaBridge 174:b96e65c34a4d 17 /** @addtogroup NANO100_DAC_Driver DAC Driver
AnnaBridge 174:b96e65c34a4d 18 @{
AnnaBridge 174:b96e65c34a4d 19 */
AnnaBridge 174:b96e65c34a4d 20
AnnaBridge 174:b96e65c34a4d 21 /** @addtogroup NANO100_DAC_EXPORTED_FUNCTIONS DAC Exported Functions
AnnaBridge 174:b96e65c34a4d 22 @{
AnnaBridge 174:b96e65c34a4d 23 */
AnnaBridge 174:b96e65c34a4d 24
AnnaBridge 174:b96e65c34a4d 25 /**
AnnaBridge 174:b96e65c34a4d 26 * @brief This function make a DAC channel ready to convert.
AnnaBridge 174:b96e65c34a4d 27 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 28 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 29 * @param[in] u32TrgSrc Decides the trigger source of specified DAC channel. Valid options are:
AnnaBridge 174:b96e65c34a4d 30 * - \ref DAC_WRITE_DAT_TRIGGER
AnnaBridge 174:b96e65c34a4d 31 * - \ref DAC_PDMA_TRIGGER
AnnaBridge 174:b96e65c34a4d 32 * - \ref DAC_TIMER0_TRIGGER
AnnaBridge 174:b96e65c34a4d 33 * - \ref DAC_TIMER1_TRIGGER
AnnaBridge 174:b96e65c34a4d 34 * - \ref DAC_TIMER2_TRIGGER
AnnaBridge 174:b96e65c34a4d 35 * - \ref DAC_TIMER3_TRIGGER
AnnaBridge 174:b96e65c34a4d 36 * @return None
AnnaBridge 174:b96e65c34a4d 37 * @note This API also set DAC stable time to 2uc according to current PCLK
AnnaBridge 174:b96e65c34a4d 38 */
AnnaBridge 174:b96e65c34a4d 39 void DAC_Open(DAC_T *dac, uint32_t u32Ch, uint32_t u32TrgSrc)
AnnaBridge 174:b96e65c34a4d 40 {
AnnaBridge 174:b96e65c34a4d 41 uint32_t u32Delay;
AnnaBridge 174:b96e65c34a4d 42
AnnaBridge 174:b96e65c34a4d 43 // DAC needs 6 us to stable after power on
AnnaBridge 174:b96e65c34a4d 44 u32Delay = CLK_GetHCLKFreq() * 6 / 1000000;
AnnaBridge 174:b96e65c34a4d 45 if(u32Delay == 0)
AnnaBridge 174:b96e65c34a4d 46 u32Delay++;
AnnaBridge 174:b96e65c34a4d 47 if(u32Ch == 0)
AnnaBridge 174:b96e65c34a4d 48 DAC->CTL0 = (u32Delay << DAC_CTL_DACPWONSTBCNT_Pos) | u32TrgSrc | DAC_CTL_DACEN_Msk;
AnnaBridge 174:b96e65c34a4d 49 else
AnnaBridge 174:b96e65c34a4d 50 DAC->CTL1 = (u32Delay << DAC_CTL_DACPWONSTBCNT_Pos) | u32TrgSrc | DAC_CTL_DACEN_Msk;
AnnaBridge 174:b96e65c34a4d 51
AnnaBridge 174:b96e65c34a4d 52 // DAC needs 2 us to stable after convert.
AnnaBridge 174:b96e65c34a4d 53 u32Delay = CLK_GetHCLKFreq() * 2 / 1000000;
AnnaBridge 174:b96e65c34a4d 54 if(u32Delay == 0)
AnnaBridge 174:b96e65c34a4d 55 u32Delay++;
AnnaBridge 174:b96e65c34a4d 56 DAC->COMCTL = (DAC->COMCTL & ~DAC_COMCTL_WAITDACCONV_Msk) | u32Delay;
AnnaBridge 174:b96e65c34a4d 57 }
AnnaBridge 174:b96e65c34a4d 58
AnnaBridge 174:b96e65c34a4d 59 /**
AnnaBridge 174:b96e65c34a4d 60 * @brief Disable DAC analog power.
AnnaBridge 174:b96e65c34a4d 61 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 62 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 63 * @return None
AnnaBridge 174:b96e65c34a4d 64 * @details Disable DAC analog power for saving power consumption.
AnnaBridge 174:b96e65c34a4d 65 */
AnnaBridge 174:b96e65c34a4d 66 void DAC_Close(DAC_T *dac, uint32_t u32Ch)
AnnaBridge 174:b96e65c34a4d 67 {
AnnaBridge 174:b96e65c34a4d 68 if(u32Ch == 0) {
AnnaBridge 174:b96e65c34a4d 69 DAC->CTL0 &= ~DAC_CTL_DACEN_Msk;
AnnaBridge 174:b96e65c34a4d 70 } else {
AnnaBridge 174:b96e65c34a4d 71 DAC->CTL1 &= ~DAC_CTL_DACEN_Msk;
AnnaBridge 174:b96e65c34a4d 72 }
AnnaBridge 174:b96e65c34a4d 73
AnnaBridge 174:b96e65c34a4d 74 }
AnnaBridge 174:b96e65c34a4d 75
AnnaBridge 174:b96e65c34a4d 76
AnnaBridge 174:b96e65c34a4d 77 /**
AnnaBridge 174:b96e65c34a4d 78 * @brief Set delay time for DAC to become stable.
AnnaBridge 174:b96e65c34a4d 79 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 80 * @param[in] u32Delay Decides the DAC conversion settling time, Valid values are between 1~0xFF.
AnnaBridge 174:b96e65c34a4d 81 * @return Success or failed
AnnaBridge 174:b96e65c34a4d 82 * @retval 0 Success
AnnaBridge 174:b96e65c34a4d 83 * @retval -1 Failed, the new setting will cause stable time less than 2us. So new setting is not applied.
AnnaBridge 174:b96e65c34a4d 84 * @details For example, DAC controller clock speed is 12MHz and DAC conversion settling time is 3 us,
AnnaBridge 174:b96e65c34a4d 85 * u32Delay should be given the value 3 * 12 = 36.
AnnaBridge 174:b96e65c34a4d 86 * @note User needs to write appropriate value to meet DAC conversion settling time base on
AnnaBridge 174:b96e65c34a4d 87 * PCLK (APB clock) speed. Minimum delay is 2 us.
AnnaBridge 174:b96e65c34a4d 88 * @note This setting is shared by both DAC channels.
AnnaBridge 174:b96e65c34a4d 89 */
AnnaBridge 174:b96e65c34a4d 90 int DAC_SetDelayTime(DAC_T *dac, uint32_t u32Delay)
AnnaBridge 174:b96e65c34a4d 91 {
AnnaBridge 174:b96e65c34a4d 92 uint32_t u32Dly;
AnnaBridge 174:b96e65c34a4d 93
AnnaBridge 174:b96e65c34a4d 94 // DAC needs 2 us to stable after DAC convert, calculate minimal setting
AnnaBridge 174:b96e65c34a4d 95 u32Dly = CLK_GetHCLKFreq() * 2 / 1000000;
AnnaBridge 174:b96e65c34a4d 96 if(u32Dly == 0)
AnnaBridge 174:b96e65c34a4d 97 u32Dly++;
AnnaBridge 174:b96e65c34a4d 98
AnnaBridge 174:b96e65c34a4d 99 if(u32Delay < u32Dly) // return error id stable time is shorter than 2us
AnnaBridge 174:b96e65c34a4d 100 return -1;
AnnaBridge 174:b96e65c34a4d 101 DAC->COMCTL = (DAC->COMCTL & ~DAC_COMCTL_WAITDACCONV_Msk) | u32Delay;
AnnaBridge 174:b96e65c34a4d 102 return 0;
AnnaBridge 174:b96e65c34a4d 103 }
AnnaBridge 174:b96e65c34a4d 104
AnnaBridge 174:b96e65c34a4d 105
AnnaBridge 174:b96e65c34a4d 106
AnnaBridge 174:b96e65c34a4d 107
AnnaBridge 174:b96e65c34a4d 108 /*@}*/ /* end of group NANO100_DAC_EXPORTED_FUNCTIONS */
AnnaBridge 174:b96e65c34a4d 109
AnnaBridge 174:b96e65c34a4d 110 /*@}*/ /* end of group NANO100_DAC_Driver */
AnnaBridge 174:b96e65c34a4d 111
AnnaBridge 174:b96e65c34a4d 112 /*@}*/ /* end of group NANO100_Device_Driver */
AnnaBridge 174:b96e65c34a4d 113
AnnaBridge 174:b96e65c34a4d 114 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/