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mbed 2

This is the mbed 2 library. If you'd like to learn about Mbed OS please see the mbed-os docs.

Committer:
emilmont
Date:
Fri Feb 14 14:36:43 2014 +0000
Revision:
77:869cf507173a
Child:
81:7d30d6019079
Release 77 of the mbed library

Main changes:
* Add target NUCLEO_F030R8
* Add target NUCLEO_F401RE
* Add target NUCLEO_F103RB
* Add target NUCLEO_L152RE

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 77:869cf507173a 1 /**
emilmont 77:869cf507173a 2 ******************************************************************************
emilmont 77:869cf507173a 3 * @file stm32l1xx_lcd.h
emilmont 77:869cf507173a 4 * @author MCD Application Team
emilmont 77:869cf507173a 5 * @version V1.3.0
emilmont 77:869cf507173a 6 * @date 31-January-2014
emilmont 77:869cf507173a 7 * @brief This file contains all the functions prototypes for the LCD firmware
emilmont 77:869cf507173a 8 * library.
emilmont 77:869cf507173a 9 ******************************************************************************
emilmont 77:869cf507173a 10 * @attention
emilmont 77:869cf507173a 11 *
emilmont 77:869cf507173a 12 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
emilmont 77:869cf507173a 13 *
emilmont 77:869cf507173a 14 * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
emilmont 77:869cf507173a 15 * You may not use this file except in compliance with the License.
emilmont 77:869cf507173a 16 * You may obtain a copy of the License at:
emilmont 77:869cf507173a 17 *
emilmont 77:869cf507173a 18 * http://www.st.com/software_license_agreement_liberty_v2
emilmont 77:869cf507173a 19 *
emilmont 77:869cf507173a 20 * Unless required by applicable law or agreed to in writing, software
emilmont 77:869cf507173a 21 * distributed under the License is distributed on an "AS IS" BASIS,
emilmont 77:869cf507173a 22 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
emilmont 77:869cf507173a 23 * See the License for the specific language governing permissions and
emilmont 77:869cf507173a 24 * limitations under the License.
emilmont 77:869cf507173a 25 *
emilmont 77:869cf507173a 26 ******************************************************************************
emilmont 77:869cf507173a 27 */
emilmont 77:869cf507173a 28
emilmont 77:869cf507173a 29 /* Define to prevent recursive inclusion -------------------------------------*/
emilmont 77:869cf507173a 30 #ifndef __STM32L1xx_LCD_H
emilmont 77:869cf507173a 31 #define __STM32L1xx_LCD_H
emilmont 77:869cf507173a 32
emilmont 77:869cf507173a 33 #ifdef __cplusplus
emilmont 77:869cf507173a 34 extern "C" {
emilmont 77:869cf507173a 35 #endif
emilmont 77:869cf507173a 36
emilmont 77:869cf507173a 37 /* Includes ------------------------------------------------------------------*/
emilmont 77:869cf507173a 38 #include "stm32l1xx.h"
emilmont 77:869cf507173a 39
emilmont 77:869cf507173a 40 /** @addtogroup STM32L1xx_StdPeriph_Driver
emilmont 77:869cf507173a 41 * @{
emilmont 77:869cf507173a 42 */
emilmont 77:869cf507173a 43
emilmont 77:869cf507173a 44 /** @addtogroup LCD
emilmont 77:869cf507173a 45 * @{
emilmont 77:869cf507173a 46 */
emilmont 77:869cf507173a 47
emilmont 77:869cf507173a 48 /* Exported types ------------------------------------------------------------*/
emilmont 77:869cf507173a 49
emilmont 77:869cf507173a 50 /**
emilmont 77:869cf507173a 51 * @brief LCD Init structure definition
emilmont 77:869cf507173a 52 */
emilmont 77:869cf507173a 53
emilmont 77:869cf507173a 54 typedef struct
emilmont 77:869cf507173a 55 {
emilmont 77:869cf507173a 56 uint32_t LCD_Prescaler; /*!< Configures the LCD Prescaler.
emilmont 77:869cf507173a 57 This parameter can be one value of @ref LCD_Prescaler */
emilmont 77:869cf507173a 58 uint32_t LCD_Divider; /*!< Configures the LCD Divider.
emilmont 77:869cf507173a 59 This parameter can be one value of @ref LCD_Divider */
emilmont 77:869cf507173a 60 uint32_t LCD_Duty; /*!< Configures the LCD Duty.
emilmont 77:869cf507173a 61 This parameter can be one value of @ref LCD_Duty */
emilmont 77:869cf507173a 62 uint32_t LCD_Bias; /*!< Configures the LCD Bias.
emilmont 77:869cf507173a 63 This parameter can be one value of @ref LCD_Bias */
emilmont 77:869cf507173a 64 uint32_t LCD_VoltageSource; /*!< Selects the LCD Voltage source.
emilmont 77:869cf507173a 65 This parameter can be one value of @ref LCD_Voltage_Source */
emilmont 77:869cf507173a 66 }LCD_InitTypeDef;
emilmont 77:869cf507173a 67
emilmont 77:869cf507173a 68
emilmont 77:869cf507173a 69 /* Exported constants --------------------------------------------------------*/
emilmont 77:869cf507173a 70
emilmont 77:869cf507173a 71 /** @defgroup LCD_Exported_Constants
emilmont 77:869cf507173a 72 * @{
emilmont 77:869cf507173a 73 */
emilmont 77:869cf507173a 74
emilmont 77:869cf507173a 75 /** @defgroup LCD_Prescaler
emilmont 77:869cf507173a 76 * @{
emilmont 77:869cf507173a 77 */
emilmont 77:869cf507173a 78
emilmont 77:869cf507173a 79 #define LCD_Prescaler_1 ((uint32_t)0x00000000) /*!< CLKPS = LCDCLK */
emilmont 77:869cf507173a 80 #define LCD_Prescaler_2 ((uint32_t)0x00400000) /*!< CLKPS = LCDCLK/2 */
emilmont 77:869cf507173a 81 #define LCD_Prescaler_4 ((uint32_t)0x00800000) /*!< CLKPS = LCDCLK/4 */
emilmont 77:869cf507173a 82 #define LCD_Prescaler_8 ((uint32_t)0x00C00000) /*!< CLKPS = LCDCLK/8 */
emilmont 77:869cf507173a 83 #define LCD_Prescaler_16 ((uint32_t)0x01000000) /*!< CLKPS = LCDCLK/16 */
emilmont 77:869cf507173a 84 #define LCD_Prescaler_32 ((uint32_t)0x01400000) /*!< CLKPS = LCDCLK/32 */
emilmont 77:869cf507173a 85 #define LCD_Prescaler_64 ((uint32_t)0x01800000) /*!< CLKPS = LCDCLK/64 */
emilmont 77:869cf507173a 86 #define LCD_Prescaler_128 ((uint32_t)0x01C00000) /*!< CLKPS = LCDCLK/128 */
emilmont 77:869cf507173a 87 #define LCD_Prescaler_256 ((uint32_t)0x02000000) /*!< CLKPS = LCDCLK/256 */
emilmont 77:869cf507173a 88 #define LCD_Prescaler_512 ((uint32_t)0x02400000) /*!< CLKPS = LCDCLK/512 */
emilmont 77:869cf507173a 89 #define LCD_Prescaler_1024 ((uint32_t)0x02800000) /*!< CLKPS = LCDCLK/1024 */
emilmont 77:869cf507173a 90 #define LCD_Prescaler_2048 ((uint32_t)0x02C00000) /*!< CLKPS = LCDCLK/2048 */
emilmont 77:869cf507173a 91 #define LCD_Prescaler_4096 ((uint32_t)0x03000000) /*!< CLKPS = LCDCLK/4096 */
emilmont 77:869cf507173a 92 #define LCD_Prescaler_8192 ((uint32_t)0x03400000) /*!< CLKPS = LCDCLK/8192 */
emilmont 77:869cf507173a 93 #define LCD_Prescaler_16384 ((uint32_t)0x03800000) /*!< CLKPS = LCDCLK/16384 */
emilmont 77:869cf507173a 94 #define LCD_Prescaler_32768 ((uint32_t)0x03C00000) /*!< CLKPS = LCDCLK/32768 */
emilmont 77:869cf507173a 95
emilmont 77:869cf507173a 96 #define IS_LCD_PRESCALER(PRESCALER) (((PRESCALER) == LCD_Prescaler_1) || \
emilmont 77:869cf507173a 97 ((PRESCALER) == LCD_Prescaler_2) || \
emilmont 77:869cf507173a 98 ((PRESCALER) == LCD_Prescaler_4) || \
emilmont 77:869cf507173a 99 ((PRESCALER) == LCD_Prescaler_8) || \
emilmont 77:869cf507173a 100 ((PRESCALER) == LCD_Prescaler_16) || \
emilmont 77:869cf507173a 101 ((PRESCALER) == LCD_Prescaler_32) || \
emilmont 77:869cf507173a 102 ((PRESCALER) == LCD_Prescaler_64) || \
emilmont 77:869cf507173a 103 ((PRESCALER) == LCD_Prescaler_128) || \
emilmont 77:869cf507173a 104 ((PRESCALER) == LCD_Prescaler_256) || \
emilmont 77:869cf507173a 105 ((PRESCALER) == LCD_Prescaler_512) || \
emilmont 77:869cf507173a 106 ((PRESCALER) == LCD_Prescaler_1024) || \
emilmont 77:869cf507173a 107 ((PRESCALER) == LCD_Prescaler_2048) || \
emilmont 77:869cf507173a 108 ((PRESCALER) == LCD_Prescaler_4096) || \
emilmont 77:869cf507173a 109 ((PRESCALER) == LCD_Prescaler_8192) || \
emilmont 77:869cf507173a 110 ((PRESCALER) == LCD_Prescaler_16384) || \
emilmont 77:869cf507173a 111 ((PRESCALER) == LCD_Prescaler_32768))
emilmont 77:869cf507173a 112
emilmont 77:869cf507173a 113 /**
emilmont 77:869cf507173a 114 * @}
emilmont 77:869cf507173a 115 */
emilmont 77:869cf507173a 116
emilmont 77:869cf507173a 117 /** @defgroup LCD_Divider
emilmont 77:869cf507173a 118 * @{
emilmont 77:869cf507173a 119 */
emilmont 77:869cf507173a 120
emilmont 77:869cf507173a 121 #define LCD_Divider_16 ((uint32_t)0x00000000) /*!< LCD frequency = CLKPS/16 */
emilmont 77:869cf507173a 122 #define LCD_Divider_17 ((uint32_t)0x00040000) /*!< LCD frequency = CLKPS/17 */
emilmont 77:869cf507173a 123 #define LCD_Divider_18 ((uint32_t)0x00080000) /*!< LCD frequency = CLKPS/18 */
emilmont 77:869cf507173a 124 #define LCD_Divider_19 ((uint32_t)0x000C0000) /*!< LCD frequency = CLKPS/19 */
emilmont 77:869cf507173a 125 #define LCD_Divider_20 ((uint32_t)0x00100000) /*!< LCD frequency = CLKPS/20 */
emilmont 77:869cf507173a 126 #define LCD_Divider_21 ((uint32_t)0x00140000) /*!< LCD frequency = CLKPS/21 */
emilmont 77:869cf507173a 127 #define LCD_Divider_22 ((uint32_t)0x00180000) /*!< LCD frequency = CLKPS/22 */
emilmont 77:869cf507173a 128 #define LCD_Divider_23 ((uint32_t)0x001C0000) /*!< LCD frequency = CLKPS/23 */
emilmont 77:869cf507173a 129 #define LCD_Divider_24 ((uint32_t)0x00200000) /*!< LCD frequency = CLKPS/24 */
emilmont 77:869cf507173a 130 #define LCD_Divider_25 ((uint32_t)0x00240000) /*!< LCD frequency = CLKPS/25 */
emilmont 77:869cf507173a 131 #define LCD_Divider_26 ((uint32_t)0x00280000) /*!< LCD frequency = CLKPS/26 */
emilmont 77:869cf507173a 132 #define LCD_Divider_27 ((uint32_t)0x002C0000) /*!< LCD frequency = CLKPS/27 */
emilmont 77:869cf507173a 133 #define LCD_Divider_28 ((uint32_t)0x00300000) /*!< LCD frequency = CLKPS/28 */
emilmont 77:869cf507173a 134 #define LCD_Divider_29 ((uint32_t)0x00340000) /*!< LCD frequency = CLKPS/29 */
emilmont 77:869cf507173a 135 #define LCD_Divider_30 ((uint32_t)0x00380000) /*!< LCD frequency = CLKPS/30 */
emilmont 77:869cf507173a 136 #define LCD_Divider_31 ((uint32_t)0x003C0000) /*!< LCD frequency = CLKPS/31 */
emilmont 77:869cf507173a 137
emilmont 77:869cf507173a 138 #define IS_LCD_DIVIDER(DIVIDER) (((DIVIDER) == LCD_Divider_16) || \
emilmont 77:869cf507173a 139 ((DIVIDER) == LCD_Divider_17) || \
emilmont 77:869cf507173a 140 ((DIVIDER) == LCD_Divider_18) || \
emilmont 77:869cf507173a 141 ((DIVIDER) == LCD_Divider_19) || \
emilmont 77:869cf507173a 142 ((DIVIDER) == LCD_Divider_20) || \
emilmont 77:869cf507173a 143 ((DIVIDER) == LCD_Divider_21) || \
emilmont 77:869cf507173a 144 ((DIVIDER) == LCD_Divider_22) || \
emilmont 77:869cf507173a 145 ((DIVIDER) == LCD_Divider_23) || \
emilmont 77:869cf507173a 146 ((DIVIDER) == LCD_Divider_24) || \
emilmont 77:869cf507173a 147 ((DIVIDER) == LCD_Divider_25) || \
emilmont 77:869cf507173a 148 ((DIVIDER) == LCD_Divider_26) || \
emilmont 77:869cf507173a 149 ((DIVIDER) == LCD_Divider_27) || \
emilmont 77:869cf507173a 150 ((DIVIDER) == LCD_Divider_28) || \
emilmont 77:869cf507173a 151 ((DIVIDER) == LCD_Divider_29) || \
emilmont 77:869cf507173a 152 ((DIVIDER) == LCD_Divider_30) || \
emilmont 77:869cf507173a 153 ((DIVIDER) == LCD_Divider_31))
emilmont 77:869cf507173a 154
emilmont 77:869cf507173a 155 /**
emilmont 77:869cf507173a 156 * @}
emilmont 77:869cf507173a 157 */
emilmont 77:869cf507173a 158
emilmont 77:869cf507173a 159
emilmont 77:869cf507173a 160 /** @defgroup LCD_Duty
emilmont 77:869cf507173a 161 * @{
emilmont 77:869cf507173a 162 */
emilmont 77:869cf507173a 163
emilmont 77:869cf507173a 164 #define LCD_Duty_Static ((uint32_t)0x00000000) /*!< Static duty */
emilmont 77:869cf507173a 165 #define LCD_Duty_1_2 ((uint32_t)0x00000004) /*!< 1/2 duty */
emilmont 77:869cf507173a 166 #define LCD_Duty_1_3 ((uint32_t)0x00000008) /*!< 1/3 duty */
emilmont 77:869cf507173a 167 #define LCD_Duty_1_4 ((uint32_t)0x0000000C) /*!< 1/4 duty */
emilmont 77:869cf507173a 168 #define LCD_Duty_1_8 ((uint32_t)0x00000010) /*!< 1/4 duty */
emilmont 77:869cf507173a 169
emilmont 77:869cf507173a 170 #define IS_LCD_DUTY(DUTY) (((DUTY) == LCD_Duty_Static) || \
emilmont 77:869cf507173a 171 ((DUTY) == LCD_Duty_1_2) || \
emilmont 77:869cf507173a 172 ((DUTY) == LCD_Duty_1_3) || \
emilmont 77:869cf507173a 173 ((DUTY) == LCD_Duty_1_4) || \
emilmont 77:869cf507173a 174 ((DUTY) == LCD_Duty_1_8))
emilmont 77:869cf507173a 175
emilmont 77:869cf507173a 176 /**
emilmont 77:869cf507173a 177 * @}
emilmont 77:869cf507173a 178 */
emilmont 77:869cf507173a 179
emilmont 77:869cf507173a 180
emilmont 77:869cf507173a 181 /** @defgroup LCD_Bias
emilmont 77:869cf507173a 182 * @{
emilmont 77:869cf507173a 183 */
emilmont 77:869cf507173a 184
emilmont 77:869cf507173a 185 #define LCD_Bias_1_4 ((uint32_t)0x00000000) /*!< 1/4 Bias */
emilmont 77:869cf507173a 186 #define LCD_Bias_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
emilmont 77:869cf507173a 187 #define LCD_Bias_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
emilmont 77:869cf507173a 188
emilmont 77:869cf507173a 189 #define IS_LCD_BIAS(BIAS) (((BIAS) == LCD_Bias_1_4) || \
emilmont 77:869cf507173a 190 ((BIAS) == LCD_Bias_1_2) || \
emilmont 77:869cf507173a 191 ((BIAS) == LCD_Bias_1_3))
emilmont 77:869cf507173a 192 /**
emilmont 77:869cf507173a 193 * @}
emilmont 77:869cf507173a 194 */
emilmont 77:869cf507173a 195
emilmont 77:869cf507173a 196 /** @defgroup LCD_Voltage_Source
emilmont 77:869cf507173a 197 * @{
emilmont 77:869cf507173a 198 */
emilmont 77:869cf507173a 199
emilmont 77:869cf507173a 200 #define LCD_VoltageSource_Internal ((uint32_t)0x00000000) /*!< Internal voltage source for the LCD */
emilmont 77:869cf507173a 201 #define LCD_VoltageSource_External LCD_CR_VSEL /*!< External voltage source for the LCD */
emilmont 77:869cf507173a 202
emilmont 77:869cf507173a 203 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VoltageSource_Internal) || \
emilmont 77:869cf507173a 204 ((SOURCE) == LCD_VoltageSource_External))
emilmont 77:869cf507173a 205
emilmont 77:869cf507173a 206 /**
emilmont 77:869cf507173a 207 * @}
emilmont 77:869cf507173a 208 */
emilmont 77:869cf507173a 209
emilmont 77:869cf507173a 210 /** @defgroup LCD_Interrupts
emilmont 77:869cf507173a 211 * @{
emilmont 77:869cf507173a 212 */
emilmont 77:869cf507173a 213 #define LCD_IT_SOF LCD_FCR_SOFIE
emilmont 77:869cf507173a 214 #define LCD_IT_UDD LCD_FCR_UDDIE
emilmont 77:869cf507173a 215
emilmont 77:869cf507173a 216 #define IS_LCD_IT(IT) ((((IT) & (uint32_t)0xFFFFFFF5) == 0x00) && ((IT) != 0x00))
emilmont 77:869cf507173a 217
emilmont 77:869cf507173a 218 #define IS_LCD_GET_IT(IT) (((IT) == LCD_IT_SOF) || ((IT) == LCD_IT_UDD))
emilmont 77:869cf507173a 219
emilmont 77:869cf507173a 220 /**
emilmont 77:869cf507173a 221 * @}
emilmont 77:869cf507173a 222 */
emilmont 77:869cf507173a 223
emilmont 77:869cf507173a 224 /** @defgroup LCD_PulseOnDuration
emilmont 77:869cf507173a 225 * @{
emilmont 77:869cf507173a 226 */
emilmont 77:869cf507173a 227
emilmont 77:869cf507173a 228 #define LCD_PulseOnDuration_0 ((uint32_t)0x00000000) /*!< Pulse ON duration = 0 pulse */
emilmont 77:869cf507173a 229 #define LCD_PulseOnDuration_1 ((uint32_t)0x00000010) /*!< Pulse ON duration = 1/CK_PS */
emilmont 77:869cf507173a 230 #define LCD_PulseOnDuration_2 ((uint32_t)0x00000020) /*!< Pulse ON duration = 2/CK_PS */
emilmont 77:869cf507173a 231 #define LCD_PulseOnDuration_3 ((uint32_t)0x00000030) /*!< Pulse ON duration = 3/CK_PS */
emilmont 77:869cf507173a 232 #define LCD_PulseOnDuration_4 ((uint32_t)0x00000040) /*!< Pulse ON duration = 4/CK_PS */
emilmont 77:869cf507173a 233 #define LCD_PulseOnDuration_5 ((uint32_t)0x00000050) /*!< Pulse ON duration = 5/CK_PS */
emilmont 77:869cf507173a 234 #define LCD_PulseOnDuration_6 ((uint32_t)0x00000060) /*!< Pulse ON duration = 6/CK_PS */
emilmont 77:869cf507173a 235 #define LCD_PulseOnDuration_7 ((uint32_t)0x00000070) /*!< Pulse ON duration = 7/CK_PS */
emilmont 77:869cf507173a 236
emilmont 77:869cf507173a 237 #define IS_LCD_PULSE_ON_DURATION(DURATION) (((DURATION) == LCD_PulseOnDuration_0) || \
emilmont 77:869cf507173a 238 ((DURATION) == LCD_PulseOnDuration_1) || \
emilmont 77:869cf507173a 239 ((DURATION) == LCD_PulseOnDuration_2) || \
emilmont 77:869cf507173a 240 ((DURATION) == LCD_PulseOnDuration_3) || \
emilmont 77:869cf507173a 241 ((DURATION) == LCD_PulseOnDuration_4) || \
emilmont 77:869cf507173a 242 ((DURATION) == LCD_PulseOnDuration_5) || \
emilmont 77:869cf507173a 243 ((DURATION) == LCD_PulseOnDuration_6) || \
emilmont 77:869cf507173a 244 ((DURATION) == LCD_PulseOnDuration_7))
emilmont 77:869cf507173a 245 /**
emilmont 77:869cf507173a 246 * @}
emilmont 77:869cf507173a 247 */
emilmont 77:869cf507173a 248
emilmont 77:869cf507173a 249
emilmont 77:869cf507173a 250 /** @defgroup LCD_DeadTime
emilmont 77:869cf507173a 251 * @{
emilmont 77:869cf507173a 252 */
emilmont 77:869cf507173a 253
emilmont 77:869cf507173a 254 #define LCD_DeadTime_0 ((uint32_t)0x00000000) /*!< No dead Time */
emilmont 77:869cf507173a 255 #define LCD_DeadTime_1 ((uint32_t)0x00000080) /*!< One Phase between different couple of Frame */
emilmont 77:869cf507173a 256 #define LCD_DeadTime_2 ((uint32_t)0x00000100) /*!< Two Phase between different couple of Frame */
emilmont 77:869cf507173a 257 #define LCD_DeadTime_3 ((uint32_t)0x00000180) /*!< Three Phase between different couple of Frame */
emilmont 77:869cf507173a 258 #define LCD_DeadTime_4 ((uint32_t)0x00000200) /*!< Four Phase between different couple of Frame */
emilmont 77:869cf507173a 259 #define LCD_DeadTime_5 ((uint32_t)0x00000280) /*!< Five Phase between different couple of Frame */
emilmont 77:869cf507173a 260 #define LCD_DeadTime_6 ((uint32_t)0x00000300) /*!< Six Phase between different couple of Frame */
emilmont 77:869cf507173a 261 #define LCD_DeadTime_7 ((uint32_t)0x00000380) /*!< Seven Phase between different couple of Frame */
emilmont 77:869cf507173a 262
emilmont 77:869cf507173a 263 #define IS_LCD_DEAD_TIME(TIME) (((TIME) == LCD_DeadTime_0) || \
emilmont 77:869cf507173a 264 ((TIME) == LCD_DeadTime_1) || \
emilmont 77:869cf507173a 265 ((TIME) == LCD_DeadTime_2) || \
emilmont 77:869cf507173a 266 ((TIME) == LCD_DeadTime_3) || \
emilmont 77:869cf507173a 267 ((TIME) == LCD_DeadTime_4) || \
emilmont 77:869cf507173a 268 ((TIME) == LCD_DeadTime_5) || \
emilmont 77:869cf507173a 269 ((TIME) == LCD_DeadTime_6) || \
emilmont 77:869cf507173a 270 ((TIME) == LCD_DeadTime_7))
emilmont 77:869cf507173a 271 /**
emilmont 77:869cf507173a 272 * @}
emilmont 77:869cf507173a 273 */
emilmont 77:869cf507173a 274
emilmont 77:869cf507173a 275 /** @defgroup LCD_BlinkMode
emilmont 77:869cf507173a 276 * @{
emilmont 77:869cf507173a 277 */
emilmont 77:869cf507173a 278
emilmont 77:869cf507173a 279 #define LCD_BlinkMode_Off ((uint32_t)0x00000000) /*!< Blink disabled */
emilmont 77:869cf507173a 280 #define LCD_BlinkMode_SEG0_COM0 ((uint32_t)0x00010000) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
emilmont 77:869cf507173a 281 #define LCD_BlinkMode_SEG0_AllCOM ((uint32_t)0x00020000) /*!< Blink enabled on SEG[0], all COM (up to
emilmont 77:869cf507173a 282 8 pixels according to the programmed duty) */
emilmont 77:869cf507173a 283 #define LCD_BlinkMode_AllSEG_AllCOM ((uint32_t)0x00030000) /*!< Blink enabled on all SEG and all COM (all pixels) */
emilmont 77:869cf507173a 284
emilmont 77:869cf507173a 285 #define IS_LCD_BLINK_MODE(MODE) (((MODE) == LCD_BlinkMode_Off) || \
emilmont 77:869cf507173a 286 ((MODE) == LCD_BlinkMode_SEG0_COM0) || \
emilmont 77:869cf507173a 287 ((MODE) == LCD_BlinkMode_SEG0_AllCOM) || \
emilmont 77:869cf507173a 288 ((MODE) == LCD_BlinkMode_AllSEG_AllCOM))
emilmont 77:869cf507173a 289 /**
emilmont 77:869cf507173a 290 * @}
emilmont 77:869cf507173a 291 */
emilmont 77:869cf507173a 292
emilmont 77:869cf507173a 293 /** @defgroup LCD_BlinkFrequency
emilmont 77:869cf507173a 294 * @{
emilmont 77:869cf507173a 295 */
emilmont 77:869cf507173a 296
emilmont 77:869cf507173a 297 #define LCD_BlinkFrequency_Div8 ((uint32_t)0x00000000) /*!< The Blink frequency = fLCD/8 */
emilmont 77:869cf507173a 298 #define LCD_BlinkFrequency_Div16 ((uint32_t)0x00002000) /*!< The Blink frequency = fLCD/16 */
emilmont 77:869cf507173a 299 #define LCD_BlinkFrequency_Div32 ((uint32_t)0x00004000) /*!< The Blink frequency = fLCD/32 */
emilmont 77:869cf507173a 300 #define LCD_BlinkFrequency_Div64 ((uint32_t)0x00006000) /*!< The Blink frequency = fLCD/64 */
emilmont 77:869cf507173a 301 #define LCD_BlinkFrequency_Div128 ((uint32_t)0x00008000) /*!< The Blink frequency = fLCD/128 */
emilmont 77:869cf507173a 302 #define LCD_BlinkFrequency_Div256 ((uint32_t)0x0000A000) /*!< The Blink frequency = fLCD/256 */
emilmont 77:869cf507173a 303 #define LCD_BlinkFrequency_Div512 ((uint32_t)0x0000C000) /*!< The Blink frequency = fLCD/512 */
emilmont 77:869cf507173a 304 #define LCD_BlinkFrequency_Div1024 ((uint32_t)0x0000E000) /*!< The Blink frequency = fLCD/1024 */
emilmont 77:869cf507173a 305
emilmont 77:869cf507173a 306 #define IS_LCD_BLINK_FREQUENCY(FREQUENCY) (((FREQUENCY) == LCD_BlinkFrequency_Div8) || \
emilmont 77:869cf507173a 307 ((FREQUENCY) == LCD_BlinkFrequency_Div16) || \
emilmont 77:869cf507173a 308 ((FREQUENCY) == LCD_BlinkFrequency_Div32) || \
emilmont 77:869cf507173a 309 ((FREQUENCY) == LCD_BlinkFrequency_Div64) || \
emilmont 77:869cf507173a 310 ((FREQUENCY) == LCD_BlinkFrequency_Div128) || \
emilmont 77:869cf507173a 311 ((FREQUENCY) == LCD_BlinkFrequency_Div256) || \
emilmont 77:869cf507173a 312 ((FREQUENCY) == LCD_BlinkFrequency_Div512) || \
emilmont 77:869cf507173a 313 ((FREQUENCY) == LCD_BlinkFrequency_Div1024))
emilmont 77:869cf507173a 314 /**
emilmont 77:869cf507173a 315 * @}
emilmont 77:869cf507173a 316 */
emilmont 77:869cf507173a 317
emilmont 77:869cf507173a 318 /** @defgroup LCD_Contrast
emilmont 77:869cf507173a 319 * @{
emilmont 77:869cf507173a 320 */
emilmont 77:869cf507173a 321
emilmont 77:869cf507173a 322 #define LCD_Contrast_Level_0 ((uint32_t)0x00000000) /*!< Maximum Voltage = 2.60V */
emilmont 77:869cf507173a 323 #define LCD_Contrast_Level_1 ((uint32_t)0x00000400) /*!< Maximum Voltage = 2.73V */
emilmont 77:869cf507173a 324 #define LCD_Contrast_Level_2 ((uint32_t)0x00000800) /*!< Maximum Voltage = 2.86V */
emilmont 77:869cf507173a 325 #define LCD_Contrast_Level_3 ((uint32_t)0x00000C00) /*!< Maximum Voltage = 2.99V */
emilmont 77:869cf507173a 326 #define LCD_Contrast_Level_4 ((uint32_t)0x00001000) /*!< Maximum Voltage = 3.12V */
emilmont 77:869cf507173a 327 #define LCD_Contrast_Level_5 ((uint32_t)0x00001400) /*!< Maximum Voltage = 3.25V */
emilmont 77:869cf507173a 328 #define LCD_Contrast_Level_6 ((uint32_t)0x00001800) /*!< Maximum Voltage = 3.38V */
emilmont 77:869cf507173a 329 #define LCD_Contrast_Level_7 ((uint32_t)0x00001C00) /*!< Maximum Voltage = 3.51V */
emilmont 77:869cf507173a 330
emilmont 77:869cf507173a 331 #define IS_LCD_CONTRAST(CONTRAST) (((CONTRAST) == LCD_Contrast_Level_0) || \
emilmont 77:869cf507173a 332 ((CONTRAST) == LCD_Contrast_Level_1) || \
emilmont 77:869cf507173a 333 ((CONTRAST) == LCD_Contrast_Level_2) || \
emilmont 77:869cf507173a 334 ((CONTRAST) == LCD_Contrast_Level_3) || \
emilmont 77:869cf507173a 335 ((CONTRAST) == LCD_Contrast_Level_4) || \
emilmont 77:869cf507173a 336 ((CONTRAST) == LCD_Contrast_Level_5) || \
emilmont 77:869cf507173a 337 ((CONTRAST) == LCD_Contrast_Level_6) || \
emilmont 77:869cf507173a 338 ((CONTRAST) == LCD_Contrast_Level_7))
emilmont 77:869cf507173a 339 /**
emilmont 77:869cf507173a 340 * @}
emilmont 77:869cf507173a 341 */
emilmont 77:869cf507173a 342
emilmont 77:869cf507173a 343 /** @defgroup LCD_Flag
emilmont 77:869cf507173a 344 * @{
emilmont 77:869cf507173a 345 */
emilmont 77:869cf507173a 346
emilmont 77:869cf507173a 347 #define LCD_FLAG_ENS LCD_SR_ENS
emilmont 77:869cf507173a 348 #define LCD_FLAG_SOF LCD_SR_SOF
emilmont 77:869cf507173a 349 #define LCD_FLAG_UDR LCD_SR_UDR
emilmont 77:869cf507173a 350 #define LCD_FLAG_UDD LCD_SR_UDD
emilmont 77:869cf507173a 351 #define LCD_FLAG_RDY LCD_SR_RDY
emilmont 77:869cf507173a 352 #define LCD_FLAG_FCRSF LCD_SR_FCRSR
emilmont 77:869cf507173a 353
emilmont 77:869cf507173a 354 #define IS_LCD_GET_FLAG(FLAG) (((FLAG) == LCD_FLAG_ENS) || ((FLAG) == LCD_FLAG_SOF) || \
emilmont 77:869cf507173a 355 ((FLAG) == LCD_FLAG_UDR) || ((FLAG) == LCD_FLAG_UDD) || \
emilmont 77:869cf507173a 356 ((FLAG) == LCD_FLAG_RDY) || ((FLAG) == LCD_FLAG_FCRSF))
emilmont 77:869cf507173a 357
emilmont 77:869cf507173a 358 #define IS_LCD_CLEAR_FLAG(FLAG) ((((FLAG) & (uint32_t)0xFFFFFFF5) == 0x00) && ((FLAG) != 0x00))
emilmont 77:869cf507173a 359 /**
emilmont 77:869cf507173a 360 * @}
emilmont 77:869cf507173a 361 */
emilmont 77:869cf507173a 362
emilmont 77:869cf507173a 363 /** @defgroup LCD_RAMRegister
emilmont 77:869cf507173a 364 * @{
emilmont 77:869cf507173a 365 */
emilmont 77:869cf507173a 366
emilmont 77:869cf507173a 367 #define LCD_RAMRegister_0 ((uint32_t)0x00000000) /*!< LCD RAM Register 0 */
emilmont 77:869cf507173a 368 #define LCD_RAMRegister_1 ((uint32_t)0x00000001) /*!< LCD RAM Register 1 */
emilmont 77:869cf507173a 369 #define LCD_RAMRegister_2 ((uint32_t)0x00000002) /*!< LCD RAM Register 2 */
emilmont 77:869cf507173a 370 #define LCD_RAMRegister_3 ((uint32_t)0x00000003) /*!< LCD RAM Register 3 */
emilmont 77:869cf507173a 371 #define LCD_RAMRegister_4 ((uint32_t)0x00000004) /*!< LCD RAM Register 4 */
emilmont 77:869cf507173a 372 #define LCD_RAMRegister_5 ((uint32_t)0x00000005) /*!< LCD RAM Register 5 */
emilmont 77:869cf507173a 373 #define LCD_RAMRegister_6 ((uint32_t)0x00000006) /*!< LCD RAM Register 6 */
emilmont 77:869cf507173a 374 #define LCD_RAMRegister_7 ((uint32_t)0x00000007) /*!< LCD RAM Register 7 */
emilmont 77:869cf507173a 375 #define LCD_RAMRegister_8 ((uint32_t)0x00000008) /*!< LCD RAM Register 8 */
emilmont 77:869cf507173a 376 #define LCD_RAMRegister_9 ((uint32_t)0x00000009) /*!< LCD RAM Register 9 */
emilmont 77:869cf507173a 377 #define LCD_RAMRegister_10 ((uint32_t)0x0000000A) /*!< LCD RAM Register 10 */
emilmont 77:869cf507173a 378 #define LCD_RAMRegister_11 ((uint32_t)0x0000000B) /*!< LCD RAM Register 11 */
emilmont 77:869cf507173a 379 #define LCD_RAMRegister_12 ((uint32_t)0x0000000C) /*!< LCD RAM Register 12 */
emilmont 77:869cf507173a 380 #define LCD_RAMRegister_13 ((uint32_t)0x0000000D) /*!< LCD RAM Register 13 */
emilmont 77:869cf507173a 381 #define LCD_RAMRegister_14 ((uint32_t)0x0000000E) /*!< LCD RAM Register 14 */
emilmont 77:869cf507173a 382 #define LCD_RAMRegister_15 ((uint32_t)0x0000000F) /*!< LCD RAM Register 15 */
emilmont 77:869cf507173a 383
emilmont 77:869cf507173a 384 #define IS_LCD_RAM_REGISTER(REGISTER) (((REGISTER) == LCD_RAMRegister_0) || \
emilmont 77:869cf507173a 385 ((REGISTER) == LCD_RAMRegister_1) || \
emilmont 77:869cf507173a 386 ((REGISTER) == LCD_RAMRegister_2) || \
emilmont 77:869cf507173a 387 ((REGISTER) == LCD_RAMRegister_3) || \
emilmont 77:869cf507173a 388 ((REGISTER) == LCD_RAMRegister_4) || \
emilmont 77:869cf507173a 389 ((REGISTER) == LCD_RAMRegister_5) || \
emilmont 77:869cf507173a 390 ((REGISTER) == LCD_RAMRegister_6) || \
emilmont 77:869cf507173a 391 ((REGISTER) == LCD_RAMRegister_7) || \
emilmont 77:869cf507173a 392 ((REGISTER) == LCD_RAMRegister_8) || \
emilmont 77:869cf507173a 393 ((REGISTER) == LCD_RAMRegister_9) || \
emilmont 77:869cf507173a 394 ((REGISTER) == LCD_RAMRegister_10) || \
emilmont 77:869cf507173a 395 ((REGISTER) == LCD_RAMRegister_11) || \
emilmont 77:869cf507173a 396 ((REGISTER) == LCD_RAMRegister_12) || \
emilmont 77:869cf507173a 397 ((REGISTER) == LCD_RAMRegister_13) || \
emilmont 77:869cf507173a 398 ((REGISTER) == LCD_RAMRegister_14) || \
emilmont 77:869cf507173a 399 ((REGISTER) == LCD_RAMRegister_15))
emilmont 77:869cf507173a 400
emilmont 77:869cf507173a 401 /**
emilmont 77:869cf507173a 402 * @}
emilmont 77:869cf507173a 403 */
emilmont 77:869cf507173a 404
emilmont 77:869cf507173a 405 /**
emilmont 77:869cf507173a 406 * @}
emilmont 77:869cf507173a 407 */
emilmont 77:869cf507173a 408
emilmont 77:869cf507173a 409 /* Exported macro ------------------------------------------------------------*/
emilmont 77:869cf507173a 410 /* Exported functions ------------------------------------------------------- */
emilmont 77:869cf507173a 411
emilmont 77:869cf507173a 412 /* Function used to set the LCD configuration to the default reset state *****/
emilmont 77:869cf507173a 413 void LCD_DeInit(void);
emilmont 77:869cf507173a 414
emilmont 77:869cf507173a 415 /* Initialization and Configuration functions *********************************/
emilmont 77:869cf507173a 416 void LCD_Init(LCD_InitTypeDef* LCD_InitStruct);
emilmont 77:869cf507173a 417 void LCD_StructInit(LCD_InitTypeDef* LCD_InitStruct);
emilmont 77:869cf507173a 418 void LCD_Cmd(FunctionalState NewState);
emilmont 77:869cf507173a 419 void LCD_WaitForSynchro(void);
emilmont 77:869cf507173a 420 void LCD_HighDriveCmd(FunctionalState NewState);
emilmont 77:869cf507173a 421 void LCD_MuxSegmentCmd(FunctionalState NewState);
emilmont 77:869cf507173a 422 void LCD_PulseOnDurationConfig(uint32_t LCD_PulseOnDuration);
emilmont 77:869cf507173a 423 void LCD_DeadTimeConfig(uint32_t LCD_DeadTime);
emilmont 77:869cf507173a 424 void LCD_BlinkConfig(uint32_t LCD_BlinkMode, uint32_t LCD_BlinkFrequency);
emilmont 77:869cf507173a 425 void LCD_ContrastConfig(uint32_t LCD_Contrast);
emilmont 77:869cf507173a 426
emilmont 77:869cf507173a 427 /* LCD RAM memory write functions *********************************************/
emilmont 77:869cf507173a 428 void LCD_Write(uint32_t LCD_RAMRegister, uint32_t LCD_Data);
emilmont 77:869cf507173a 429 void LCD_UpdateDisplayRequest(void);
emilmont 77:869cf507173a 430
emilmont 77:869cf507173a 431 /* Interrupts and flags management functions **********************************/
emilmont 77:869cf507173a 432 void LCD_ITConfig(uint32_t LCD_IT, FunctionalState NewState);
emilmont 77:869cf507173a 433 FlagStatus LCD_GetFlagStatus(uint32_t LCD_FLAG);
emilmont 77:869cf507173a 434 void LCD_ClearFlag(uint32_t LCD_FLAG);
emilmont 77:869cf507173a 435 ITStatus LCD_GetITStatus(uint32_t LCD_IT);
emilmont 77:869cf507173a 436 void LCD_ClearITPendingBit(uint32_t LCD_IT);
emilmont 77:869cf507173a 437
emilmont 77:869cf507173a 438 #ifdef __cplusplus
emilmont 77:869cf507173a 439 }
emilmont 77:869cf507173a 440 #endif
emilmont 77:869cf507173a 441
emilmont 77:869cf507173a 442 #endif /* __STM32L1xx_LCD_H */
emilmont 77:869cf507173a 443
emilmont 77:869cf507173a 444 /**
emilmont 77:869cf507173a 445 * @}
emilmont 77:869cf507173a 446 */
emilmont 77:869cf507173a 447
emilmont 77:869cf507173a 448 /**
emilmont 77:869cf507173a 449 * @}
emilmont 77:869cf507173a 450 */
emilmont 77:869cf507173a 451
emilmont 77:869cf507173a 452 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/