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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/pwmout_api.c@617:3b0e8f440867, 2015-09-04 (annotated)

Committer:
mbed_official
Date:
Fri Sep 04 08:15:47 2015 +0100
Revision:
617:3b0e8f440867
Parent:
591:474d026f7d79 
Synchronized with git revision a19d9e011d672ac4a34deee2f7e4379592ab1552



Full URL: https://github.com/mbedmicro/mbed/commit/a19d9e011d672ac4a34deee2f7e4379592ab1552/



Modify the register setting method in the pin setting configuration.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 390:35c2c1cf29cd 1 /* mbed Microcontroller Library
mbed_official 390:35c2c1cf29cd 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 390:35c2c1cf29cd 3 *
mbed_official 390:35c2c1cf29cd 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 390:35c2c1cf29cd 5 * you may not use this file except in compliance with the License.
mbed_official 390:35c2c1cf29cd 6 * You may obtain a copy of the License at
mbed_official 390:35c2c1cf29cd 7 *
mbed_official 390:35c2c1cf29cd 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 390:35c2c1cf29cd 9 *
mbed_official 390:35c2c1cf29cd 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 390:35c2c1cf29cd 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 390:35c2c1cf29cd 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 390:35c2c1cf29cd 13 * See the License for the specific language governing permissions and
mbed_official 390:35c2c1cf29cd 14 * limitations under the License.
mbed_official 390:35c2c1cf29cd 15 */
mbed_official 390:35c2c1cf29cd 16 #include "mbed_assert.h"
mbed_official 390:35c2c1cf29cd 17 #include "pwmout_api.h"
mbed_official 390:35c2c1cf29cd 18 #include "cmsis.h"
mbed_official 390:35c2c1cf29cd 19 #include "pinmap.h"
mbed_official 437:0b72c0f86db6 20 #include "RZ_A1_Init.h"
mbed_official 390:35c2c1cf29cd 21 #include "cpg_iodefine.h"
mbed_official 390:35c2c1cf29cd 22 #include "pwm_iodefine.h"
mbed_official 617:3b0e8f440867 23 #include "gpio_addrdefine.h"
mbed_official 390:35c2c1cf29cd 24
mbed_official 591:474d026f7d79 25 #define MTU2_PWM_NUM 22
mbed_official 591:474d026f7d79 26 #define MTU2_PWM_SIGNAL 2
mbed_official 591:474d026f7d79 27 #define MTU2_PWM_OFFSET 0x20
mbed_official 591:474d026f7d79 28
mbed_official 390:35c2c1cf29cd 29 // PORT ID, PWM ID, Pin function
mbed_official 390:35c2c1cf29cd 30 static const PinMap PinMap_PWM[] = {
mbed_official 591:474d026f7d79 31 {P2_1 , MTU2_PWM0_PIN , 6},
mbed_official 591:474d026f7d79 32 {P2_11 , MTU2_PWM1_PIN , 5},
mbed_official 591:474d026f7d79 33 {P3_8 , MTU2_PWM2_PIN , 6},
mbed_official 591:474d026f7d79 34 {P3_10 , MTU2_PWM3_PIN , 6},
mbed_official 591:474d026f7d79 35 {P4_0 , MTU2_PWM4_PIN , 2},
mbed_official 591:474d026f7d79 36 {P4_4 , MTU2_PWM5_PIN , 3},
mbed_official 591:474d026f7d79 37 {P4_6 , MTU2_PWM6_PIN , 3},
mbed_official 591:474d026f7d79 38 {P5_0 , MTU2_PWM7_PIN , 6},
mbed_official 591:474d026f7d79 39 {P5_3 , MTU2_PWM8_PIN , 6},
mbed_official 591:474d026f7d79 40 {P5_5 , MTU2_PWM9_PIN , 6},
mbed_official 591:474d026f7d79 41 {P7_2 , MTU2_PWM10_PIN , 7},
mbed_official 591:474d026f7d79 42 {P7_4 , MTU2_PWM11_PIN , 7},
mbed_official 591:474d026f7d79 43 {P7_6 , MTU2_PWM12_PIN , 7},
mbed_official 591:474d026f7d79 44 {P7_10 , MTU2_PWM13_PIN , 7},
mbed_official 591:474d026f7d79 45 {P7_12 , MTU2_PWM14_PIN , 7},
mbed_official 591:474d026f7d79 46 {P7_14 , MTU2_PWM15_PIN , 7},
mbed_official 591:474d026f7d79 47 {P8_8 , MTU2_PWM16_PIN , 5},
mbed_official 591:474d026f7d79 48 {P8_10 , MTU2_PWM17_PIN , 4},
mbed_official 591:474d026f7d79 49 {P8_12 , MTU2_PWM18_PIN , 4},
mbed_official 591:474d026f7d79 50 {P8_14 , MTU2_PWM19_PIN , 4},
mbed_official 591:474d026f7d79 51 {P11_0 , MTU2_PWM20_PIN , 2},
mbed_official 591:474d026f7d79 52 {P11_2 , MTU2_PWM21_PIN , 2},
mbed_official 591:474d026f7d79 53 {P4_4 , PWM0_PIN , 4},
mbed_official 591:474d026f7d79 54 {P3_2 , PWM1_PIN , 7},
mbed_official 591:474d026f7d79 55 {P4_6 , PWM2_PIN , 4},
mbed_official 591:474d026f7d79 56 {P4_7 , PWM3_PIN , 4},
mbed_official 591:474d026f7d79 57 {P8_14 , PWM4_PIN , 6},
mbed_official 591:474d026f7d79 58 {P8_15 , PWM5_PIN , 6},
mbed_official 591:474d026f7d79 59 {P8_13 , PWM6_PIN , 6},
mbed_official 591:474d026f7d79 60 {P8_11 , PWM7_PIN , 6},
mbed_official 591:474d026f7d79 61 {P8_8 , PWM8_PIN , 6},
mbed_official 591:474d026f7d79 62 {P10_0 , PWM9_PIN , 3},
mbed_official 591:474d026f7d79 63 {P8_12 , PWM10_PIN , 6},
mbed_official 591:474d026f7d79 64 {P8_9 , PWM11_PIN , 6},
mbed_official 591:474d026f7d79 65 {P8_10 , PWM12_PIN , 6},
mbed_official 591:474d026f7d79 66 {P4_5 , PWM13_PIN , 4},
mbed_official 591:474d026f7d79 67 {NC , NC , 0}
mbed_official 390:35c2c1cf29cd 68 };
mbed_official 390:35c2c1cf29cd 69
mbed_official 591:474d026f7d79 70 static const PWMType PORT[] = {
mbed_official 437:0b72c0f86db6 71 PWM2E, // PWM0_PIN
mbed_official 437:0b72c0f86db6 72 PWM2C, // PWM1_PIN
mbed_official 437:0b72c0f86db6 73 PWM2G, // PWM2_PIN
mbed_official 437:0b72c0f86db6 74 PWM2H, // PWM3_PIN
mbed_official 437:0b72c0f86db6 75 PWM1G, // PWM4_PIN
mbed_official 437:0b72c0f86db6 76 PWM1H, // PWM5_PIN
mbed_official 437:0b72c0f86db6 77 PWM1F, // PWM6_PIN
mbed_official 437:0b72c0f86db6 78 PWM1D, // PWM7_PIN
mbed_official 437:0b72c0f86db6 79 PWM1A, // PWM8_PIN
mbed_official 437:0b72c0f86db6 80 PWM2A, // PWM9_PIN
mbed_official 437:0b72c0f86db6 81 PWM1E, // PWM10_PIN
mbed_official 437:0b72c0f86db6 82 PWM1B, // PWM11_PIN
mbed_official 437:0b72c0f86db6 83 PWM1C, // PWM12_PIN
mbed_official 500:04797f1feae2 84 PWM2F, // PWM13_PIN
mbed_official 390:35c2c1cf29cd 85 };
mbed_official 390:35c2c1cf29cd 86
mbed_official 591:474d026f7d79 87 static const MTU2_PWMType MTU2_PORT[] = {
mbed_official 591:474d026f7d79 88 TIOC2A, // MTU2_PWM0_PIN
mbed_official 591:474d026f7d79 89 TIOC1A, // MTU2_PWM1_PIN
mbed_official 591:474d026f7d79 90 TIOC4A, // MTU2_PWM2_PIN
mbed_official 591:474d026f7d79 91 TIOC4C, // MTU2_PWM3_PIN
mbed_official 591:474d026f7d79 92 TIOC0A, // MTU2_PWM4_PIN
mbed_official 591:474d026f7d79 93 TIOC4A, // MTU2_PWM5_PIN
mbed_official 591:474d026f7d79 94 TIOC4C, // MTU2_PWM6_PIN
mbed_official 591:474d026f7d79 95 TIOC0A, // MTU2_PWM7_PIN
mbed_official 591:474d026f7d79 96 TIOC3C, // MTU2_PWM8_PIN
mbed_official 591:474d026f7d79 97 TIOC0C, // MTU2_PWM9_PIN
mbed_official 591:474d026f7d79 98 TIOC0C, // MTU2_PWM10_PIN
mbed_official 591:474d026f7d79 99 TIOC1A, // MTU2_PWM11_PIN
mbed_official 591:474d026f7d79 100 TIOC2A, // MTU2_PWM12_PIN
mbed_official 591:474d026f7d79 101 TIOC3C, // MTU2_PWM13_PIN
mbed_official 591:474d026f7d79 102 TIOC4A, // MTU2_PWM14_PIN
mbed_official 591:474d026f7d79 103 TIOC4C, // MTU2_PWM15_PIN
mbed_official 591:474d026f7d79 104 TIOC1A, // MTU2_PWM16_PIN
mbed_official 591:474d026f7d79 105 TIOC3A, // MTU2_PWM17_PIN
mbed_official 591:474d026f7d79 106 TIOC3C, // MTU2_PWM18_PIN
mbed_official 591:474d026f7d79 107 TIOC2A, // MTU2_PWM19_PIN
mbed_official 591:474d026f7d79 108 TIOC4A, // MTU2_PWM20_PIN
mbed_official 591:474d026f7d79 109 TIOC4C, // MTU2_PWM21_PIN
mbed_official 591:474d026f7d79 110 };
mbed_official 591:474d026f7d79 111
mbed_official 437:0b72c0f86db6 112 static __IO uint16_t *PWM_MATCH[] = {
mbed_official 437:0b72c0f86db6 113 &PWMPWBFR_2E, // PWM0_PIN
mbed_official 437:0b72c0f86db6 114 &PWMPWBFR_2C, // PWM1_PIN
mbed_official 437:0b72c0f86db6 115 &PWMPWBFR_2G, // PWM2_PIN
mbed_official 437:0b72c0f86db6 116 &PWMPWBFR_2G, // PWM3_PIN
mbed_official 437:0b72c0f86db6 117 &PWMPWBFR_1G, // PWM4_PIN
mbed_official 437:0b72c0f86db6 118 &PWMPWBFR_1G, // PWM5_PIN
mbed_official 437:0b72c0f86db6 119 &PWMPWBFR_1E, // PWM6_PIN
mbed_official 437:0b72c0f86db6 120 &PWMPWBFR_1C, // PWM7_PIN
mbed_official 437:0b72c0f86db6 121 &PWMPWBFR_1A, // PWM8_PIN
mbed_official 437:0b72c0f86db6 122 &PWMPWBFR_2A, // PWM9_PIN
mbed_official 437:0b72c0f86db6 123 &PWMPWBFR_1E, // PWM10_PIN
mbed_official 437:0b72c0f86db6 124 &PWMPWBFR_1A, // PWM11_PIN
mbed_official 437:0b72c0f86db6 125 &PWMPWBFR_1C, // PWM12_PIN
mbed_official 500:04797f1feae2 126 &PWMPWBFR_2E, // PWM13_PIN
mbed_official 437:0b72c0f86db6 127 };
mbed_official 390:35c2c1cf29cd 128
mbed_official 591:474d026f7d79 129 static __IO uint16_t *MTU2_PWM_MATCH[MTU2_PWM_NUM][MTU2_PWM_SIGNAL] = {
mbed_official 591:474d026f7d79 130 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM0_PIN
mbed_official 591:474d026f7d79 131 { &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM1_PIN
mbed_official 591:474d026f7d79 132 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM2_PIN
mbed_official 591:474d026f7d79 133 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM3_PIN
mbed_official 591:474d026f7d79 134 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM4_PIN
mbed_official 591:474d026f7d79 135 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM5_PIN
mbed_official 591:474d026f7d79 136 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM6_PIN
mbed_official 591:474d026f7d79 137 { &MTU2TGRA_0, &MTU2TGRB_0 }, // MTU2_PWM7_PIN
mbed_official 591:474d026f7d79 138 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM8_PIN
mbed_official 591:474d026f7d79 139 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM9_PIN
mbed_official 591:474d026f7d79 140 { &MTU2TGRC_0, &MTU2TGRD_0 }, // MTU2_PWM10_PIN
mbed_official 591:474d026f7d79 141 { &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM11_PIN
mbed_official 591:474d026f7d79 142 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM12_PIN
mbed_official 591:474d026f7d79 143 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM13_PIN
mbed_official 591:474d026f7d79 144 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM14_PIN
mbed_official 591:474d026f7d79 145 { &MTU2TGRC_4, &MTU2TGRD_4 }, // MTU2_PWM15_PIN
mbed_official 591:474d026f7d79 146 { &MTU2TGRA_1, &MTU2TGRB_1 }, // MTU2_PWM16_PIN
mbed_official 591:474d026f7d79 147 { &MTU2TGRA_3, &MTU2TGRB_3 }, // MTU2_PWM17_PIN
mbed_official 591:474d026f7d79 148 { &MTU2TGRC_3, &MTU2TGRD_3 }, // MTU2_PWM18_PIN
mbed_official 591:474d026f7d79 149 { &MTU2TGRA_2, &MTU2TGRB_2 }, // MTU2_PWM19_PIN
mbed_official 591:474d026f7d79 150 { &MTU2TGRA_4, &MTU2TGRB_4 }, // MTU2_PWM20_PIN
mbed_official 591:474d026f7d79 151 { &MTU2TGRC_4, &MTU2TGRD_4 } // MTU2_PWM21_PIN
mbed_official 591:474d026f7d79 152 };
mbed_official 591:474d026f7d79 153
mbed_official 591:474d026f7d79 154 static __IO uint8_t *TCR_MATCH[] = {
mbed_official 591:474d026f7d79 155 &MTU2TCR_0,
mbed_official 591:474d026f7d79 156 &MTU2TCR_1,
mbed_official 591:474d026f7d79 157 &MTU2TCR_2,
mbed_official 591:474d026f7d79 158 &MTU2TCR_3,
mbed_official 591:474d026f7d79 159 &MTU2TCR_4,
mbed_official 591:474d026f7d79 160 };
mbed_official 591:474d026f7d79 161
mbed_official 591:474d026f7d79 162 static __IO uint8_t *TIORH_MATCH[] = {
mbed_official 591:474d026f7d79 163 &MTU2TIORH_0,
mbed_official 591:474d026f7d79 164 &MTU2TIOR_1,
mbed_official 591:474d026f7d79 165 &MTU2TIOR_2,
mbed_official 591:474d026f7d79 166 &MTU2TIORH_3,
mbed_official 591:474d026f7d79 167 &MTU2TIORH_4,
mbed_official 591:474d026f7d79 168 };
mbed_official 591:474d026f7d79 169
mbed_official 591:474d026f7d79 170 static __IO uint8_t *TIORL_MATCH[] = {
mbed_official 591:474d026f7d79 171 &MTU2TIORL_0,
mbed_official 591:474d026f7d79 172 NULL,
mbed_official 591:474d026f7d79 173 NULL,
mbed_official 591:474d026f7d79 174 &MTU2TIORL_3,
mbed_official 591:474d026f7d79 175 &MTU2TIORL_4,
mbed_official 591:474d026f7d79 176 };
mbed_official 591:474d026f7d79 177
mbed_official 591:474d026f7d79 178 static __IO uint16_t *TGRA_MATCH[] = {
mbed_official 591:474d026f7d79 179 &MTU2TGRA_0,
mbed_official 591:474d026f7d79 180 &MTU2TGRA_1,
mbed_official 591:474d026f7d79 181 &MTU2TGRA_2,
mbed_official 591:474d026f7d79 182 &MTU2TGRA_3,
mbed_official 591:474d026f7d79 183 &MTU2TGRA_4,
mbed_official 591:474d026f7d79 184 };
mbed_official 591:474d026f7d79 185
mbed_official 591:474d026f7d79 186 static __IO uint16_t *TGRC_MATCH[] = {
mbed_official 591:474d026f7d79 187 &MTU2TGRC_0,
mbed_official 591:474d026f7d79 188 NULL,
mbed_official 591:474d026f7d79 189 NULL,
mbed_official 591:474d026f7d79 190 &MTU2TGRC_3,
mbed_official 591:474d026f7d79 191 &MTU2TGRC_4,
mbed_official 591:474d026f7d79 192 };
mbed_official 591:474d026f7d79 193
mbed_official 591:474d026f7d79 194 static __IO uint8_t *TMDR_MATCH[] = {
mbed_official 591:474d026f7d79 195 &MTU2TMDR_0,
mbed_official 591:474d026f7d79 196 &MTU2TMDR_1,
mbed_official 591:474d026f7d79 197 &MTU2TMDR_2,
mbed_official 591:474d026f7d79 198 &MTU2TMDR_3,
mbed_official 591:474d026f7d79 199 &MTU2TMDR_4,
mbed_official 591:474d026f7d79 200 };
mbed_official 591:474d026f7d79 201
mbed_official 591:474d026f7d79 202 static int MAX_PERIOD[] = {
mbed_official 591:474d026f7d79 203 125000,
mbed_official 591:474d026f7d79 204 503000,
mbed_official 591:474d026f7d79 205 2000000,
mbed_official 591:474d026f7d79 206 2000000,
mbed_official 591:474d026f7d79 207 2000000,
mbed_official 591:474d026f7d79 208 };
mbed_official 591:474d026f7d79 209
mbed_official 591:474d026f7d79 210 typedef enum {
mbed_official 591:474d026f7d79 211 MODE_PWM = 0,
mbed_official 591:474d026f7d79 212 MODE_MTU2
mbed_official 591:474d026f7d79 213 } PWMmode;
mbed_official 591:474d026f7d79 214
mbed_official 591:474d026f7d79 215 typedef enum {
mbed_official 591:474d026f7d79 216 MTU2_PULSE = 0,
mbed_official 591:474d026f7d79 217 MTU2_PERIOD
mbed_official 591:474d026f7d79 218 } MTU2Signal;
mbed_official 591:474d026f7d79 219
mbed_official 591:474d026f7d79 220 static int pwm_mode = MODE_PWM;
mbed_official 437:0b72c0f86db6 221 static uint16_t init_period_ch1 = 0;
mbed_official 437:0b72c0f86db6 222 static uint16_t init_period_ch2 = 0;
mbed_official 591:474d026f7d79 223 static uint16_t init_mtu2_period_ch[5] = {0};
mbed_official 441:d2c15dda23c1 224 static int32_t period_ch1 = 1;
mbed_official 441:d2c15dda23c1 225 static int32_t period_ch2 = 1;
mbed_official 591:474d026f7d79 226 static int32_t mtu2_period_ch[5] = {1, 1, 1, 1, 1};
mbed_official 390:35c2c1cf29cd 227
mbed_official 390:35c2c1cf29cd 228 void pwmout_init(pwmout_t* obj, PinName pin) {
mbed_official 390:35c2c1cf29cd 229 // determine the channel
mbed_official 390:35c2c1cf29cd 230 PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM);
mbed_official 390:35c2c1cf29cd 231 MBED_ASSERT(pwm != (PWMName)NC);
mbed_official 390:35c2c1cf29cd 232
mbed_official 591:474d026f7d79 233 if (pwm >= MTU2_PWM_OFFSET) {
mbed_official 591:474d026f7d79 234 /* PWM by MTU2 */
mbed_official 591:474d026f7d79 235 int tmp_pwm;
mbed_official 591:474d026f7d79 236
mbed_official 591:474d026f7d79 237 pwm_mode = MODE_MTU2;
mbed_official 591:474d026f7d79 238 // power on
mbed_official 591:474d026f7d79 239 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP33);
mbed_official 591:474d026f7d79 240
mbed_official 591:474d026f7d79 241 obj->pwm = pwm;
mbed_official 591:474d026f7d79 242 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 591:474d026f7d79 243 if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000040) == 0x00000040) {
mbed_official 591:474d026f7d79 244 obj->ch = 4;
mbed_official 591:474d026f7d79 245 MTU2TOER |= 0x36;
mbed_official 591:474d026f7d79 246 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000030) == 0x00000030) {
mbed_official 591:474d026f7d79 247 obj->ch = 3;
mbed_official 591:474d026f7d79 248 MTU2TOER |= 0x09;
mbed_official 591:474d026f7d79 249 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000020) == 0x00000020) {
mbed_official 591:474d026f7d79 250 obj->ch = 2;
mbed_official 591:474d026f7d79 251 } else if (((uint32_t)MTU2_PORT[tmp_pwm] & 0x00000010) == 0x00000010) {
mbed_official 591:474d026f7d79 252 obj->ch = 1;
mbed_official 591:474d026f7d79 253 } else {
mbed_official 591:474d026f7d79 254 obj->ch = 0;
mbed_official 591:474d026f7d79 255 }
mbed_official 591:474d026f7d79 256 // Wire pinout
mbed_official 591:474d026f7d79 257 pinmap_pinout(pin, PinMap_PWM);
mbed_official 617:3b0e8f440867 258
mbed_official 617:3b0e8f440867 259 int bitmask = 1 << (pin & 0xf);
mbed_official 617:3b0e8f440867 260
mbed_official 617:3b0e8f440867 261 *PMSR(PINGROUP(pin)) = (bitmask << 16) | 0;
mbed_official 617:3b0e8f440867 262
mbed_official 591:474d026f7d79 263 // default duty 0.0f
mbed_official 591:474d026f7d79 264 pwmout_write(obj, 0);
mbed_official 591:474d026f7d79 265 if (init_mtu2_period_ch[obj->ch] == 0) {
mbed_official 591:474d026f7d79 266 // default period 1ms
mbed_official 591:474d026f7d79 267 pwmout_period_us(obj, 1000);
mbed_official 591:474d026f7d79 268 init_mtu2_period_ch[obj->ch] = 1;
mbed_official 591:474d026f7d79 269 }
mbed_official 437:0b72c0f86db6 270 } else {
mbed_official 591:474d026f7d79 271 /* PWM */
mbed_official 591:474d026f7d79 272 pwm_mode = MODE_PWM;
mbed_official 591:474d026f7d79 273 // power on
mbed_official 591:474d026f7d79 274 CPGSTBCR3 &= ~(CPG_STBCR3_BIT_MSTP30);
mbed_official 437:0b72c0f86db6 275
mbed_official 591:474d026f7d79 276 obj->pwm = pwm;
mbed_official 591:474d026f7d79 277 if (((uint32_t)PORT[obj->pwm] & 0x00000010) == 0x00000010) {
mbed_official 591:474d026f7d79 278 obj->ch = 2;
mbed_official 591:474d026f7d79 279 PWMPWPR_2_BYTE_L = 0x00;
mbed_official 591:474d026f7d79 280 } else {
mbed_official 591:474d026f7d79 281 obj->ch = 1;
mbed_official 591:474d026f7d79 282 PWMPWPR_1_BYTE_L = 0x00;
mbed_official 591:474d026f7d79 283 }
mbed_official 437:0b72c0f86db6 284
mbed_official 591:474d026f7d79 285 // Wire pinout
mbed_official 591:474d026f7d79 286 pinmap_pinout(pin, PinMap_PWM);
mbed_official 591:474d026f7d79 287
mbed_official 591:474d026f7d79 288 // default to 491us: standard for servos, and fine for e.g. brightness control
mbed_official 591:474d026f7d79 289 pwmout_write(obj, 0);
mbed_official 591:474d026f7d79 290 if ((obj->ch == 2) && (init_period_ch2 == 0)) {
mbed_official 591:474d026f7d79 291 pwmout_period_us(obj, 491);
mbed_official 591:474d026f7d79 292 init_period_ch2 = 1;
mbed_official 591:474d026f7d79 293 }
mbed_official 591:474d026f7d79 294 if ((obj->ch == 1) && (init_period_ch1 == 0)) {
mbed_official 591:474d026f7d79 295 pwmout_period_us(obj, 491);
mbed_official 591:474d026f7d79 296 init_period_ch1 = 1;
mbed_official 591:474d026f7d79 297 }
mbed_official 437:0b72c0f86db6 298 }
mbed_official 390:35c2c1cf29cd 299 }
mbed_official 390:35c2c1cf29cd 300
mbed_official 390:35c2c1cf29cd 301 void pwmout_free(pwmout_t* obj) {
mbed_official 437:0b72c0f86db6 302 pwmout_write(obj, 0);
mbed_official 390:35c2c1cf29cd 303 }
mbed_official 390:35c2c1cf29cd 304
mbed_official 390:35c2c1cf29cd 305 void pwmout_write(pwmout_t* obj, float value) {
mbed_official 437:0b72c0f86db6 306 uint32_t wk_cycle;
mbed_official 437:0b72c0f86db6 307 uint16_t v;
mbed_official 437:0b72c0f86db6 308
mbed_official 591:474d026f7d79 309 if (pwm_mode == MODE_MTU2) {
mbed_official 591:474d026f7d79 310 /* PWM by MTU2 */
mbed_official 591:474d026f7d79 311 int tmp_pwm;
mbed_official 591:474d026f7d79 312
mbed_official 591:474d026f7d79 313 if (value < 0.0f) {
mbed_official 591:474d026f7d79 314 value = 0.0f;
mbed_official 591:474d026f7d79 315 } else if (value > 1.0f) {
mbed_official 591:474d026f7d79 316 value = 1.0f;
mbed_official 591:474d026f7d79 317 } else {
mbed_official 591:474d026f7d79 318 // Do Nothing
mbed_official 591:474d026f7d79 319 }
mbed_official 591:474d026f7d79 320 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 591:474d026f7d79 321 wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
mbed_official 591:474d026f7d79 322 // set channel match to percentage
mbed_official 591:474d026f7d79 323 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] = (uint16_t)((float)wk_cycle * value);
mbed_official 437:0b72c0f86db6 324 } else {
mbed_official 591:474d026f7d79 325 /* PWM */
mbed_official 591:474d026f7d79 326 if (value < 0.0f) {
mbed_official 591:474d026f7d79 327 value = 0.0f;
mbed_official 591:474d026f7d79 328 } else if (value > 1.0f) {
mbed_official 591:474d026f7d79 329 value = 1.0f;
mbed_official 591:474d026f7d79 330 } else {
mbed_official 591:474d026f7d79 331 // Do Nothing
mbed_official 591:474d026f7d79 332 }
mbed_official 437:0b72c0f86db6 333
mbed_official 591:474d026f7d79 334 if (obj->ch == 2) {
mbed_official 591:474d026f7d79 335 wk_cycle = PWMPWCYR_2 & 0x03ff;
mbed_official 591:474d026f7d79 336 } else {
mbed_official 591:474d026f7d79 337 wk_cycle = PWMPWCYR_1 & 0x03ff;
mbed_official 591:474d026f7d79 338 }
mbed_official 591:474d026f7d79 339
mbed_official 591:474d026f7d79 340 // set channel match to percentage
mbed_official 591:474d026f7d79 341 v = (uint16_t)((float)wk_cycle * value);
mbed_official 591:474d026f7d79 342 *PWM_MATCH[obj->pwm] = (v | ((PORT[obj->pwm] & 1) << 12));
mbed_official 437:0b72c0f86db6 343 }
mbed_official 390:35c2c1cf29cd 344 }
mbed_official 390:35c2c1cf29cd 345
mbed_official 390:35c2c1cf29cd 346 float pwmout_read(pwmout_t* obj) {
mbed_official 437:0b72c0f86db6 347 uint32_t wk_cycle;
mbed_official 437:0b72c0f86db6 348 float value;
mbed_official 437:0b72c0f86db6 349
mbed_official 591:474d026f7d79 350 if (pwm_mode == MODE_MTU2) {
mbed_official 591:474d026f7d79 351 /* PWM by MTU2 */
mbed_official 591:474d026f7d79 352 uint32_t wk_pulse;
mbed_official 591:474d026f7d79 353 int tmp_pwm;
mbed_official 591:474d026f7d79 354
mbed_official 591:474d026f7d79 355 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 591:474d026f7d79 356 wk_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
mbed_official 591:474d026f7d79 357 wk_pulse = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PULSE] & 0xffff;
mbed_official 591:474d026f7d79 358 value = ((float)wk_pulse / (float)wk_cycle);
mbed_official 437:0b72c0f86db6 359 } else {
mbed_official 591:474d026f7d79 360 /* PWM */
mbed_official 591:474d026f7d79 361 if (obj->ch == 2) {
mbed_official 591:474d026f7d79 362 wk_cycle = PWMPWCYR_2 & 0x03ff;
mbed_official 591:474d026f7d79 363 } else {
mbed_official 591:474d026f7d79 364 wk_cycle = PWMPWCYR_1 & 0x03ff;
mbed_official 591:474d026f7d79 365 }
mbed_official 591:474d026f7d79 366 value = ((float)(*PWM_MATCH[obj->pwm] & 0x03ff) / (float)wk_cycle);
mbed_official 437:0b72c0f86db6 367 }
mbed_official 437:0b72c0f86db6 368
mbed_official 437:0b72c0f86db6 369 return (value > 1.0f) ? (1.0f) : (value);
mbed_official 390:35c2c1cf29cd 370 }
mbed_official 390:35c2c1cf29cd 371
mbed_official 390:35c2c1cf29cd 372 void pwmout_period(pwmout_t* obj, float seconds) {
mbed_official 390:35c2c1cf29cd 373 pwmout_period_us(obj, seconds * 1000000.0f);
mbed_official 390:35c2c1cf29cd 374 }
mbed_official 390:35c2c1cf29cd 375
mbed_official 390:35c2c1cf29cd 376 void pwmout_period_ms(pwmout_t* obj, int ms) {
mbed_official 390:35c2c1cf29cd 377 pwmout_period_us(obj, ms * 1000);
mbed_official 390:35c2c1cf29cd 378 }
mbed_official 390:35c2c1cf29cd 379
mbed_official 437:0b72c0f86db6 380 static void set_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
mbed_official 437:0b72c0f86db6 381 uint16_t wk_pwmpbfr;
mbed_official 437:0b72c0f86db6 382 float value;
mbed_official 437:0b72c0f86db6 383 uint16_t v;
mbed_official 437:0b72c0f86db6 384
mbed_official 437:0b72c0f86db6 385 wk_pwmpbfr = *p_pwmpbfr;
mbed_official 437:0b72c0f86db6 386 value = ((float)(wk_pwmpbfr & 0x03ff) / (float)last_cycle);
mbed_official 437:0b72c0f86db6 387 v = (uint16_t)((float)new_cycle * value);
mbed_official 437:0b72c0f86db6 388 *p_pwmpbfr = (v | (wk_pwmpbfr & 0x1000));
mbed_official 437:0b72c0f86db6 389 }
mbed_official 437:0b72c0f86db6 390
mbed_official 591:474d026f7d79 391 static void set_mtu2_duty_again(__IO uint16_t *p_pwmpbfr, uint16_t last_cycle, uint16_t new_cycle){
mbed_official 591:474d026f7d79 392 uint16_t wk_pwmpbfr;
mbed_official 591:474d026f7d79 393 float value;
mbed_official 591:474d026f7d79 394
mbed_official 591:474d026f7d79 395 wk_pwmpbfr = *p_pwmpbfr;
mbed_official 591:474d026f7d79 396 value = ((float)(wk_pwmpbfr & 0xffff) / (float)last_cycle);
mbed_official 591:474d026f7d79 397 *p_pwmpbfr = (uint16_t)((float)new_cycle * value);
mbed_official 591:474d026f7d79 398 }
mbed_official 591:474d026f7d79 399
mbed_official 390:35c2c1cf29cd 400 // Set the PWM period, keeping the duty cycle the same.
mbed_official 390:35c2c1cf29cd 401 void pwmout_period_us(pwmout_t* obj, int us) {
mbed_official 591:474d026f7d79 402 uint64_t wk_cycle_mtu2;
mbed_official 437:0b72c0f86db6 403 uint32_t pclk_base;
mbed_official 437:0b72c0f86db6 404 uint32_t wk_cycle;
mbed_official 591:474d026f7d79 405 uint32_t wk_cks = 0;
mbed_official 437:0b72c0f86db6 406 uint16_t wk_last_cycle;
mbed_official 591:474d026f7d79 407 int max_us = 0;
mbed_official 437:0b72c0f86db6 408
mbed_official 591:474d026f7d79 409 if (pwm_mode == MODE_MTU2) {
mbed_official 591:474d026f7d79 410 /* PWM by MTU2 */
mbed_official 591:474d026f7d79 411 int tmp_pwm;
mbed_official 591:474d026f7d79 412 uint16_t tmp_tgra;
mbed_official 591:474d026f7d79 413 uint16_t tmp_tgrc;
mbed_official 591:474d026f7d79 414 uint8_t tmp_tcr_up;
mbed_official 591:474d026f7d79 415 uint8_t tmp_tstr_sp;
mbed_official 591:474d026f7d79 416 uint8_t tmp_tstr_st;
mbed_official 591:474d026f7d79 417
mbed_official 591:474d026f7d79 418 max_us = MAX_PERIOD[obj->ch];
mbed_official 591:474d026f7d79 419 if (us > max_us) {
mbed_official 591:474d026f7d79 420 us = max_us;
mbed_official 591:474d026f7d79 421 } else if (us < 1) {
mbed_official 591:474d026f7d79 422 us = 1;
mbed_official 591:474d026f7d79 423 } else {
mbed_official 591:474d026f7d79 424 // Do Nothing
mbed_official 591:474d026f7d79 425 }
mbed_official 390:35c2c1cf29cd 426
mbed_official 591:474d026f7d79 427 if (RZ_A1_IsClockMode0() == false) {
mbed_official 591:474d026f7d79 428 pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK;
mbed_official 591:474d026f7d79 429 } else {
mbed_official 591:474d026f7d79 430 pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK;
mbed_official 591:474d026f7d79 431 }
mbed_official 437:0b72c0f86db6 432
mbed_official 591:474d026f7d79 433 wk_cycle_mtu2 = (uint64_t)pclk_base * us;
mbed_official 591:474d026f7d79 434 while (wk_cycle_mtu2 >= 65535000000) {
mbed_official 591:474d026f7d79 435 if ((obj->ch == 1) && (wk_cks == 3)) {
mbed_official 591:474d026f7d79 436 wk_cks+=2;
mbed_official 591:474d026f7d79 437 } else if ((obj->ch == 2) && (wk_cks == 3)) {
mbed_official 591:474d026f7d79 438 wk_cycle_mtu2 >>= 2;
mbed_official 591:474d026f7d79 439 wk_cks+=3;
mbed_official 591:474d026f7d79 440 }
mbed_official 591:474d026f7d79 441 wk_cycle_mtu2 >>= 2;
mbed_official 591:474d026f7d79 442 wk_cks++;
mbed_official 591:474d026f7d79 443 }
mbed_official 591:474d026f7d79 444 wk_cycle = (uint32_t)(wk_cycle_mtu2 / 1000000);
mbed_official 591:474d026f7d79 445
mbed_official 591:474d026f7d79 446 tmp_pwm = (int)(obj->pwm - MTU2_PWM_OFFSET);
mbed_official 591:474d026f7d79 447 if (((uint8_t)MTU2_PORT[tmp_pwm] & 0x02) == 0x02) {
mbed_official 591:474d026f7d79 448 tmp_tcr_up = 0xC0;
mbed_official 591:474d026f7d79 449 } else {
mbed_official 591:474d026f7d79 450 tmp_tcr_up = 0x40;
mbed_official 591:474d026f7d79 451 }
mbed_official 591:474d026f7d79 452 if ((obj->ch == 4) || (obj->ch == 3)) {
mbed_official 591:474d026f7d79 453 tmp_tstr_sp = ~(0x38 | (1 << (obj->ch + 3)));
mbed_official 591:474d026f7d79 454 tmp_tstr_st = (1 << (obj->ch + 3));
mbed_official 591:474d026f7d79 455 } else {
mbed_official 591:474d026f7d79 456 tmp_tstr_sp = ~(0x38 | (1 << obj->ch));
mbed_official 591:474d026f7d79 457 tmp_tstr_st = (1 << obj->ch);
mbed_official 591:474d026f7d79 458 }
mbed_official 591:474d026f7d79 459 // Counter Stop
mbed_official 591:474d026f7d79 460 MTU2TSTR &= tmp_tstr_sp;
mbed_official 591:474d026f7d79 461 wk_last_cycle = *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] & 0xffff;
mbed_official 591:474d026f7d79 462 *TCR_MATCH[obj->ch] = tmp_tcr_up | wk_cks;
mbed_official 591:474d026f7d79 463 *TIORH_MATCH[obj->ch] = 0x21;
mbed_official 591:474d026f7d79 464 if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
mbed_official 591:474d026f7d79 465 *TIORL_MATCH[obj->ch] = 0x21;
mbed_official 591:474d026f7d79 466 }
mbed_official 591:474d026f7d79 467 *MTU2_PWM_MATCH[tmp_pwm][MTU2_PERIOD] = (uint16_t)wk_cycle; // Set period
mbed_official 390:35c2c1cf29cd 468
mbed_official 591:474d026f7d79 469 // Set duty again(TGRA)
mbed_official 591:474d026f7d79 470 tmp_tgra = *TGRA_MATCH[obj->ch];
mbed_official 591:474d026f7d79 471 set_mtu2_duty_again(&tmp_tgra, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 472 if ((obj->ch == 0) || (obj->ch == 3) || (obj->ch == 4)) {
mbed_official 591:474d026f7d79 473 // Set duty again(TGRC)
mbed_official 591:474d026f7d79 474 tmp_tgrc = *TGRC_MATCH[obj->ch];
mbed_official 591:474d026f7d79 475 set_mtu2_duty_again(&tmp_tgrc, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 476 }
mbed_official 591:474d026f7d79 477 *TMDR_MATCH[obj->ch] = 0x02; // PWM mode 1
mbed_official 390:35c2c1cf29cd 478
mbed_official 437:0b72c0f86db6 479 // Counter Start
mbed_official 591:474d026f7d79 480 MTU2TSTR |= tmp_tstr_st;
mbed_official 441:d2c15dda23c1 481 // Save for future use
mbed_official 591:474d026f7d79 482 mtu2_period_ch[obj->ch] = us;
mbed_official 437:0b72c0f86db6 483 } else {
mbed_official 591:474d026f7d79 484 /* PWM */
mbed_official 591:474d026f7d79 485 if (us > 491) {
mbed_official 591:474d026f7d79 486 us = 491;
mbed_official 591:474d026f7d79 487 } else if (us < 1) {
mbed_official 591:474d026f7d79 488 us = 1;
mbed_official 591:474d026f7d79 489 } else {
mbed_official 591:474d026f7d79 490 // Do Nothing
mbed_official 591:474d026f7d79 491 }
mbed_official 591:474d026f7d79 492
mbed_official 591:474d026f7d79 493 if (RZ_A1_IsClockMode0() == false) {
mbed_official 591:474d026f7d79 494 pclk_base = (uint32_t)CM1_RENESAS_RZ_A1_P0_CLK / 10000;
mbed_official 591:474d026f7d79 495 } else {
mbed_official 591:474d026f7d79 496 pclk_base = (uint32_t)CM0_RENESAS_RZ_A1_P0_CLK / 10000;
mbed_official 591:474d026f7d79 497 }
mbed_official 591:474d026f7d79 498
mbed_official 591:474d026f7d79 499 wk_cycle = pclk_base * us;
mbed_official 591:474d026f7d79 500 while (wk_cycle >= 102350) {
mbed_official 591:474d026f7d79 501 wk_cycle >>= 1;
mbed_official 591:474d026f7d79 502 wk_cks++;
mbed_official 591:474d026f7d79 503 }
mbed_official 591:474d026f7d79 504 wk_cycle = (wk_cycle + 50) / 100;
mbed_official 390:35c2c1cf29cd 505
mbed_official 591:474d026f7d79 506 if (obj->ch == 2) {
mbed_official 591:474d026f7d79 507 wk_last_cycle = PWMPWCYR_2 & 0x03ff;
mbed_official 591:474d026f7d79 508 PWMPWCR_2_BYTE_L = 0xc0 | wk_cks;
mbed_official 591:474d026f7d79 509 PWMPWCYR_2 = (uint16_t)wk_cycle;
mbed_official 591:474d026f7d79 510
mbed_official 591:474d026f7d79 511 // Set duty again
mbed_official 591:474d026f7d79 512 set_duty_again(&PWMPWBFR_2A, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 513 set_duty_again(&PWMPWBFR_2C, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 514 set_duty_again(&PWMPWBFR_2E, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 515 set_duty_again(&PWMPWBFR_2G, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 516
mbed_official 591:474d026f7d79 517 // Counter Start
mbed_official 591:474d026f7d79 518 PWMPWCR_2_BYTE_L |= 0x08;
mbed_official 437:0b72c0f86db6 519
mbed_official 591:474d026f7d79 520 // Save for future use
mbed_official 591:474d026f7d79 521 period_ch2 = us;
mbed_official 591:474d026f7d79 522 } else {
mbed_official 591:474d026f7d79 523 wk_last_cycle = PWMPWCYR_1 & 0x03ff;
mbed_official 591:474d026f7d79 524 PWMPWCR_1_BYTE_L = 0xc0 | wk_cks;
mbed_official 591:474d026f7d79 525 PWMPWCYR_1 = (uint16_t)wk_cycle;
mbed_official 441:d2c15dda23c1 526
mbed_official 591:474d026f7d79 527 // Set duty again
mbed_official 591:474d026f7d79 528 set_duty_again(&PWMPWBFR_1A, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 529 set_duty_again(&PWMPWBFR_1C, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 530 set_duty_again(&PWMPWBFR_1E, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 531 set_duty_again(&PWMPWBFR_1G, wk_last_cycle, wk_cycle);
mbed_official 591:474d026f7d79 532
mbed_official 591:474d026f7d79 533 // Counter Start
mbed_official 591:474d026f7d79 534 PWMPWCR_1_BYTE_L |= 0x08;
mbed_official 591:474d026f7d79 535
mbed_official 591:474d026f7d79 536 // Save for future use
mbed_official 591:474d026f7d79 537 period_ch1 = us;
mbed_official 591:474d026f7d79 538 }
mbed_official 437:0b72c0f86db6 539 }
mbed_official 390:35c2c1cf29cd 540 }
mbed_official 390:35c2c1cf29cd 541
mbed_official 390:35c2c1cf29cd 542 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
mbed_official 390:35c2c1cf29cd 543 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
mbed_official 390:35c2c1cf29cd 544 }
mbed_official 390:35c2c1cf29cd 545
mbed_official 390:35c2c1cf29cd 546 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
mbed_official 390:35c2c1cf29cd 547 pwmout_pulsewidth_us(obj, ms * 1000);
mbed_official 390:35c2c1cf29cd 548 }
mbed_official 390:35c2c1cf29cd 549
mbed_official 390:35c2c1cf29cd 550 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
mbed_official 441:d2c15dda23c1 551 float value = 0;
mbed_official 441:d2c15dda23c1 552
mbed_official 591:474d026f7d79 553 if (pwm_mode == MODE_MTU2) {
mbed_official 591:474d026f7d79 554 /* PWM by MTU2 */
mbed_official 591:474d026f7d79 555 if (mtu2_period_ch[obj->ch] != 0) {
mbed_official 591:474d026f7d79 556 value = (float)us / (float)mtu2_period_ch[obj->ch];
mbed_official 441:d2c15dda23c1 557 }
mbed_official 441:d2c15dda23c1 558 } else {
mbed_official 591:474d026f7d79 559 /* PWM */
mbed_official 591:474d026f7d79 560 if (obj->ch == 2) {
mbed_official 591:474d026f7d79 561 if (period_ch2 != 0) {
mbed_official 591:474d026f7d79 562 value = (float)us / (float)period_ch2;
mbed_official 591:474d026f7d79 563 }
mbed_official 591:474d026f7d79 564 } else {
mbed_official 591:474d026f7d79 565 if (period_ch1 != 0) {
mbed_official 591:474d026f7d79 566 value = (float)us / (float)period_ch1;
mbed_official 591:474d026f7d79 567 }
mbed_official 441:d2c15dda23c1 568 }
mbed_official 591:474d026f7d79 569
mbed_official 591:474d026f7d79 570 pwmout_write(obj, value);
mbed_official 441:d2c15dda23c1 571 }
mbed_official 390:35c2c1cf29cd 572 }