Alexan E / Mbed 2 deprecated FlashingLeds

Flashing leds using the four timer interrupts , 100ms, 200ms, 400ms, 800ms

Dependencies:   mbed

main.cpp@1:2de8ee478e07, 2012-05-19 (annotated)

Committer:
alexan_e
Date:
Sat May 19 23:32:26 2012 +0000
Revision:
1:2de8ee478e07
Parent:
0:cfdf9730f216
Child:
2:c4ff35a68acd
made changes for the code to work when compiled in the online compiler

Who changed what in which revision?

UserRevisionLine numberNew contents of line
alexan_e 0:cfdf9730f216 1 /************************************************************************************
alexan_e 0:cfdf9730f216 2 Code created using the ARMwizard, visit http://alexan.edaboard.eu
alexan_e 0:cfdf9730f216 3 ************************************************************************************/
alexan_e 0:cfdf9730f216 4
alexan_e 1:2de8ee478e07 5 /*
alexan_e 0:cfdf9730f216 6 #include <LPC11Uxx.h>
alexan_e 1:2de8ee478e07 7 */
alexan_e 1:2de8ee478e07 8
alexan_e 1:2de8ee478e07 9 #include "mbed.h"
alexan_e 0:cfdf9730f216 10
alexan_e 0:cfdf9730f216 11 #define LED1 1UL<<8
alexan_e 0:cfdf9730f216 12 #define LED2 1UL<<9
alexan_e 0:cfdf9730f216 13 #define LED3 1UL<<10
alexan_e 0:cfdf9730f216 14 #define LED4 1UL<<11
alexan_e 0:cfdf9730f216 15
alexan_e 0:cfdf9730f216 16
alexan_e 0:cfdf9730f216 17 /******************************************************************************
alexan_e 0:cfdf9730f216 18 16-bit Timer0 Interrupt service function
alexan_e 0:cfdf9730f216 19 ******************************************************************************/
alexan_e 1:2de8ee478e07 20 extern "C" void TIMER16_0_IRQHandler(void) {
alexan_e 0:cfdf9730f216 21 /* write code here */
alexan_e 0:cfdf9730f216 22 LPC_GPIO->PIN[1] ^= LED3;
alexan_e 0:cfdf9730f216 23
alexan_e 0:cfdf9730f216 24 /* list of all available flags, select which to use */
alexan_e 0:cfdf9730f216 25 LPC_CT16B0->IR = (1UL<<0); /* Clear MAT2.0 interrupt flag */
alexan_e 0:cfdf9730f216 26 }
alexan_e 0:cfdf9730f216 27
alexan_e 0:cfdf9730f216 28 /******************************************************************************
alexan_e 0:cfdf9730f216 29 16-bit Timer1 Interrupt service function
alexan_e 0:cfdf9730f216 30 ******************************************************************************/
alexan_e 1:2de8ee478e07 31 extern "C" void TIMER16_1_IRQHandler(void) {
alexan_e 0:cfdf9730f216 32 /* write code here */
alexan_e 0:cfdf9730f216 33 LPC_GPIO->PIN[1] ^= LED4;
alexan_e 0:cfdf9730f216 34
alexan_e 0:cfdf9730f216 35 /* list of all available flags, select which to use */
alexan_e 0:cfdf9730f216 36 LPC_CT16B1->IR = (1UL<<0); /* Clear MAT3.0 interrupt flag */
alexan_e 0:cfdf9730f216 37 }
alexan_e 0:cfdf9730f216 38
alexan_e 0:cfdf9730f216 39 /******************************************************************************
alexan_e 0:cfdf9730f216 40 32-bit Timer0 Interrupt service function
alexan_e 0:cfdf9730f216 41 ******************************************************************************/
alexan_e 1:2de8ee478e07 42 extern "C" void TIMER32_0_IRQHandler(void) {
alexan_e 0:cfdf9730f216 43 /* write code here */
alexan_e 0:cfdf9730f216 44 LPC_GPIO->PIN[1] ^= LED1;
alexan_e 0:cfdf9730f216 45
alexan_e 0:cfdf9730f216 46 /* list of all available flags, select which to use */
alexan_e 0:cfdf9730f216 47 LPC_CT32B0->IR = (1UL<<0); /* Clear MAT0.0 interrupt flag */
alexan_e 0:cfdf9730f216 48 }
alexan_e 0:cfdf9730f216 49
alexan_e 0:cfdf9730f216 50 /******************************************************************************
alexan_e 0:cfdf9730f216 51 32-bit Timer1 Interrupt service function
alexan_e 0:cfdf9730f216 52 ******************************************************************************/
alexan_e 1:2de8ee478e07 53 extern "C" void TIMER32_1_IRQHandler(void) {
alexan_e 0:cfdf9730f216 54 /* write code here */
alexan_e 0:cfdf9730f216 55 LPC_GPIO->PIN[1] ^= LED2;
alexan_e 0:cfdf9730f216 56
alexan_e 0:cfdf9730f216 57 /* list of all available flags, select which to use */
alexan_e 0:cfdf9730f216 58 LPC_CT32B1->IR = (1UL<<0); /* Clear MAT1.0 interrupt flag */
alexan_e 0:cfdf9730f216 59 }
alexan_e 0:cfdf9730f216 60
alexan_e 0:cfdf9730f216 61 int main(void)
alexan_e 0:cfdf9730f216 62 {
alexan_e 0:cfdf9730f216 63 /*
alexan_e 0:cfdf9730f216 64 P0.0: RESET (External reset input with 20 ns glitch filter), pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 65 P0.1: PORT0.1 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 66 P0.2: PORT0.2 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 67 P0.3: PORT0.3 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 68 P0.4: PORT0.4 (General purpose I/O) Input, I2CMODE: Standard mode/ Fast-mode I2C
alexan_e 0:cfdf9730f216 69 P0.5: PORT0.5 (General purpose I/O) Input, I2CMODE: Standard mode/ Fast-mode I2C
alexan_e 0:cfdf9730f216 70 P0.6: PORT0.6 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 71 P0.7: PORT0.7 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 72 P0.8: PORT0.8 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 73 P0.9: PORT0.9 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 74 P0.10: SWCLK (Serial wire clock), pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 75 P0.11: TDI (Test Data In for JTAG interface), pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 76 P0.12: TMS (Test Mode Select for JTAG interface), pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 77 P0.13: TDO (Test Data Out for JTAG interface), pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 78 P0.14: TRST (Test Reset for JTAG interface), pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 79 P0.15: SWDIO (Serial wire debug input/output), pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 80 P0.16: PORT0.16 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 81 P0.17: PORT0.17 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 82 P0.18: PORT0.18 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 83 P0.19: PORT0.19 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 84 P0.20: PORT0.20 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 85 P0.21: PORT0.21 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 86 P0.22: PORT0.22 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 87 P0.23: PORT0.23 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Digital mode, Open Drain disabled
alexan_e 0:cfdf9730f216 88 P1.0: PORT1.0 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 89 P1.1: PORT1.1 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 90 P1.2: PORT1.2 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 91 P1.3: PORT1.3 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 92 P1.4: PORT1.4 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 93 P1.5: PORT1.5 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 94 P1.6: PORT1.6 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 95 P1.7: PORT1.7 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 96 P1.8: PORT1.8 (General purpose I/O) Output, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 97 P1.9: PORT1.9 (General purpose I/O) Output, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 98 P1.10: PORT1.10 (General purpose I/O) Output, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 99 P1.11: PORT1.11 (General purpose I/O) Output, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 100 P1.12: PORT1.12 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 101 P1.13: PORT1.13 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 102 P1.14: PORT1.14 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 103 P1.15: PORT1.15 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 104 P1.16: PORT1.16 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 105 P1.17: PORT1.17 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 106 P1.18: PORT1.18 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 107 P1.19: PORT1.19 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 108 P1.20: PORT1.20 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 109 P1.21: PORT1.21 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 110 P1.22: PORT1.22 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 111 P1.23: PORT1.23 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 112 P1.24: PORT1.24 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 113 P1.25: PORT1.25 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 114 P1.26: PORT1.26 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 115 P1.27: PORT1.27 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 116 P1.28: PORT1.28 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 117 P1.29: PORT1.29 (General purpose I/O) Input, pull-up resistor enabled, Hysteresis disabled, Input not inverted, Open Drain disabled
alexan_e 0:cfdf9730f216 118 */
alexan_e 0:cfdf9730f216 119
alexan_e 0:cfdf9730f216 120 LPC_SYSCON->SYSAHBCLKDIV = 0x01; /* set AHB clock divider to 1/1 */
alexan_e 0:cfdf9730f216 121 LPC_SYSCON->SYSAHBCLKCTRL = (LPC_SYSCON->SYSAHBCLKCTRL & 0x098DFFFF) | (1UL<<6); /* enable clock for GPIO (default is disabled)*/
alexan_e 0:cfdf9730f216 122 LPC_SYSCON->SYSAHBCLKCTRL = (LPC_SYSCON->SYSAHBCLKCTRL & 0x098DFFFF) | (1UL<<16); /* enable clock for IOCON (default is disabled)*/
alexan_e 0:cfdf9730f216 123
alexan_e 0:cfdf9730f216 124 LPC_IOCON->RESET_PIO0_0 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 125 LPC_IOCON->PIO0_1 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 126 LPC_IOCON->PIO0_2 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 127 LPC_IOCON->PIO0_3 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 128 LPC_IOCON->PIO0_4 = 0x00000080; /* binary: 00000000_00000000_00000000_10000000 */
alexan_e 0:cfdf9730f216 129 LPC_IOCON->PIO0_5 = 0x00000080; /* binary: 00000000_00000000_00000000_10000000 */
alexan_e 0:cfdf9730f216 130 LPC_IOCON->PIO0_6 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 131 LPC_IOCON->PIO0_7 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 132 LPC_IOCON->PIO0_8 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 133 LPC_IOCON->PIO0_9 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 134 LPC_IOCON->SWCLK_PIO0_10 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 135 LPC_IOCON->TDI_PIO0_11 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 136 LPC_IOCON->TMS_PIO0_12 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 137 LPC_IOCON->TDO_PIO0_13 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 138 LPC_IOCON->TRST_PIO0_14 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 139 LPC_IOCON->SWDIO_PIO0_15 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 140 LPC_IOCON->PIO0_16 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 141 LPC_IOCON->PIO0_17 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 142 LPC_IOCON->PIO0_18 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 143 LPC_IOCON->PIO0_19 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 144 LPC_IOCON->PIO0_20 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 145 LPC_IOCON->PIO0_21 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 146 LPC_IOCON->PIO0_22 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 147 LPC_IOCON->PIO0_23 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 148 LPC_IOCON->PIO1_0 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 149 LPC_IOCON->PIO1_1 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 150 LPC_IOCON->PIO1_2 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 151 LPC_IOCON->PIO1_3 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 152 LPC_IOCON->PIO1_4 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 153 LPC_IOCON->PIO1_5 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 154 LPC_IOCON->PIO1_6 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 155 LPC_IOCON->PIO1_7 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 156 LPC_IOCON->PIO1_8 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 157 LPC_IOCON->PIO1_9 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 158 LPC_IOCON->PIO1_10 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 159 LPC_IOCON->PIO1_11 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 160 LPC_IOCON->PIO1_12 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 161 LPC_IOCON->PIO1_13 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 162 LPC_IOCON->PIO1_14 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 163 LPC_IOCON->PIO1_15 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 164 LPC_IOCON->PIO1_16 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 165 LPC_IOCON->PIO1_17 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 166 LPC_IOCON->PIO1_18 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 167 LPC_IOCON->PIO1_19 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 168 LPC_IOCON->PIO1_20 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 169 LPC_IOCON->PIO1_21 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 170 LPC_IOCON->PIO1_22 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 171 LPC_IOCON->PIO1_23 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 172 LPC_IOCON->PIO1_24 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 173 LPC_IOCON->PIO1_25 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 174 LPC_IOCON->PIO1_26 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 175 LPC_IOCON->PIO1_27 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 176 LPC_IOCON->PIO1_28 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 177 LPC_IOCON->PIO1_29 = 0x00000090; /* binary: 00000000_00000000_00000000_10010000 */
alexan_e 0:cfdf9730f216 178
alexan_e 0:cfdf9730f216 179 LPC_GPIO->DIR[0] = 0x00000000; /* binary: 00000000_00000000_00000000_00000000 */
alexan_e 0:cfdf9730f216 180 LPC_GPIO->DIR[1] = 0x00000F00; /* binary: 00000000_00000000_00001111_00000000 */
alexan_e 0:cfdf9730f216 181
alexan_e 0:cfdf9730f216 182 /******************************************************************************
alexan_e 0:cfdf9730f216 183 Vectored Interrupt initialization
alexan_e 0:cfdf9730f216 184 ******************************************************************************/
alexan_e 0:cfdf9730f216 185
alexan_e 0:cfdf9730f216 186 NVIC_EnableIRQ(TIMER_16_0_IRQn); /* Enable 16-bit Timer0 Interrupt */
alexan_e 0:cfdf9730f216 187 NVIC_SetPriority(TIMER_16_0_IRQn,0); /* Default priority group 0, can be 0(highest) - 31(lowest) */
alexan_e 0:cfdf9730f216 188
alexan_e 0:cfdf9730f216 189 NVIC_EnableIRQ(TIMER_16_1_IRQn); /* Enable 16-bit Timer1 Interrupt */
alexan_e 0:cfdf9730f216 190 NVIC_SetPriority(TIMER_16_1_IRQn,0); /* Default priority group 0, can be 0(highest) - 31(lowest) */
alexan_e 0:cfdf9730f216 191
alexan_e 0:cfdf9730f216 192 NVIC_EnableIRQ(TIMER_32_0_IRQn); /* Enable 32-bit Timer0 Interrupt */
alexan_e 0:cfdf9730f216 193 NVIC_SetPriority(TIMER_32_0_IRQn,0); /* Default priority group 0, can be 0(highest) - 31(lowest) */
alexan_e 0:cfdf9730f216 194
alexan_e 0:cfdf9730f216 195 NVIC_EnableIRQ(TIMER_32_1_IRQn); /* Enable 32-bit Timer1 Interrupt */
alexan_e 0:cfdf9730f216 196 NVIC_SetPriority(TIMER_32_1_IRQn,0); /* Default priority group 0, can be 0(highest) - 31(lowest) */
alexan_e 0:cfdf9730f216 197
alexan_e 0:cfdf9730f216 198 /******************************************************************************
alexan_e 0:cfdf9730f216 199 Timer0(CT32B0) (32bit)
alexan_e 0:cfdf9730f216 200 *******************************************************************************
alexan_e 0:cfdf9730f216 201 Counter Enabled, Counter Reset=0
alexan_e 0:cfdf9730f216 202 Timer mode: count on rising edge of PCLK
alexan_e 0:cfdf9730f216 203 Counter clk: 1 KHz, Counts every: 1000 us (calculated with peripheral clock: 48MHz)
alexan_e 0:cfdf9730f216 204 MCR0.0 : reset, generate interrupt on compare match
alexan_e 0:cfdf9730f216 205 */
alexan_e 0:cfdf9730f216 206
alexan_e 0:cfdf9730f216 207 LPC_SYSCON->SYSAHBCLKCTRL = (LPC_SYSCON->SYSAHBCLKCTRL & 0x098DFFFF) | (1UL<<9); /* Enable clock for CT32B0 (default is disabled) */
alexan_e 0:cfdf9730f216 208
alexan_e 0:cfdf9730f216 209 LPC_CT32B0->CTCR = 0x00; /* binary: 00000000 */
alexan_e 0:cfdf9730f216 210 LPC_CT32B0->TC = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 211 LPC_CT32B0->PR = 0x0000BB7F; /* decimal 47999 */
alexan_e 0:cfdf9730f216 212 LPC_CT32B0->MCR = 0x0003; /* binary: 00000000_00000011 */
alexan_e 0:cfdf9730f216 213 LPC_CT32B0->MR0 = 0x00000064; /* decimal 100 */
alexan_e 0:cfdf9730f216 214 LPC_CT32B0->MR1 = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 215 LPC_CT32B0->MR2 = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 216 LPC_CT32B0->MR3 = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 217 LPC_CT32B0->CCR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 218 LPC_CT32B0->EMR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 219 LPC_CT32B0->TCR = 0x01; /* binary: 00000001 */
alexan_e 0:cfdf9730f216 220
alexan_e 0:cfdf9730f216 221 /******************************************************************************
alexan_e 0:cfdf9730f216 222 Timer1(CT32B1) (32bit)
alexan_e 0:cfdf9730f216 223 *******************************************************************************
alexan_e 0:cfdf9730f216 224 Counter Enabled, Counter Reset=0
alexan_e 0:cfdf9730f216 225 Timer mode: count on rising edge of PCLK
alexan_e 0:cfdf9730f216 226 Counter clk: 1 KHz, Counts every: 1000 us (calculated with peripheral clock: 48MHz)
alexan_e 0:cfdf9730f216 227 MCR1.0 : reset, generate interrupt on compare match
alexan_e 0:cfdf9730f216 228 */
alexan_e 0:cfdf9730f216 229
alexan_e 0:cfdf9730f216 230 LPC_SYSCON->SYSAHBCLKCTRL = (LPC_SYSCON->SYSAHBCLKCTRL & 0x098DFFFF) | (1UL<<10); /* Enable clock for CT32B1 (default is disabled) */
alexan_e 0:cfdf9730f216 231
alexan_e 0:cfdf9730f216 232 LPC_CT32B1->CTCR = 0x00; /* binary: 00000000 */
alexan_e 0:cfdf9730f216 233 LPC_CT32B1->TC = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 234 LPC_CT32B1->PR = 0x0000BB7F; /* decimal 47999 */
alexan_e 0:cfdf9730f216 235 LPC_CT32B1->MCR = 0x0003; /* binary: 00000000_00000011 */
alexan_e 0:cfdf9730f216 236 LPC_CT32B1->MR0 = 0x000000C8; /* decimal 200 */
alexan_e 0:cfdf9730f216 237 LPC_CT32B1->MR1 = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 238 LPC_CT32B1->MR2 = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 239 LPC_CT32B1->MR3 = 0x00000000; /* decimal 0 */
alexan_e 0:cfdf9730f216 240 LPC_CT32B1->CCR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 241 LPC_CT32B1->EMR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 242 LPC_CT32B1->TCR = 0x01; /* binary: 00000001 */
alexan_e 0:cfdf9730f216 243
alexan_e 0:cfdf9730f216 244 /******************************************************************************
alexan_e 0:cfdf9730f216 245 Timer2(CT16B0) (16bit)
alexan_e 0:cfdf9730f216 246 *******************************************************************************
alexan_e 0:cfdf9730f216 247 Counter Enabled, Counter Reset=0
alexan_e 0:cfdf9730f216 248 Timer mode: count on rising edge of PCLK
alexan_e 0:cfdf9730f216 249 Counter clk: 1 KHz, Counts every: 1000 us (calculated with peripheral clock: 48MHz)
alexan_e 0:cfdf9730f216 250 MCR2.0 : reset, generate interrupt on compare match
alexan_e 0:cfdf9730f216 251 */
alexan_e 0:cfdf9730f216 252
alexan_e 0:cfdf9730f216 253 LPC_SYSCON->SYSAHBCLKCTRL = (LPC_SYSCON->SYSAHBCLKCTRL & 0x098DFFFF) | (1UL<<7); /* Enable clock for CT16B0 (default is disabled) */
alexan_e 0:cfdf9730f216 254
alexan_e 0:cfdf9730f216 255 LPC_CT16B0->CTCR = 0x00; /* binary: 00000000 */
alexan_e 0:cfdf9730f216 256 LPC_CT16B0->TC = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 257 LPC_CT16B0->PR = 0xBB7F; /* decimal 47999 */
alexan_e 0:cfdf9730f216 258 LPC_CT16B0->MCR = 0x0003; /* binary: 00000000_00000011 */
alexan_e 0:cfdf9730f216 259 LPC_CT16B0->MR0 = 0x0190; /* decimal 400 */
alexan_e 0:cfdf9730f216 260 LPC_CT16B0->MR1 = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 261 LPC_CT16B0->MR2 = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 262 LPC_CT16B0->MR3 = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 263 LPC_CT16B0->CCR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 264 LPC_CT16B0->EMR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 265 LPC_CT16B0->TCR = 0x01; /* binary: 00000001 */
alexan_e 0:cfdf9730f216 266
alexan_e 0:cfdf9730f216 267 /******************************************************************************
alexan_e 0:cfdf9730f216 268 Timer3(CT16B1) (16bit)
alexan_e 0:cfdf9730f216 269 *******************************************************************************
alexan_e 0:cfdf9730f216 270 Counter Enabled, Counter Reset=0
alexan_e 0:cfdf9730f216 271 Timer mode: count on rising edge of PCLK
alexan_e 0:cfdf9730f216 272 Counter clk: 1 KHz, Counts every: 1000 us (calculated with peripheral clock: 48MHz)
alexan_e 0:cfdf9730f216 273 MCR3.0 : reset, generate interrupt on compare match
alexan_e 0:cfdf9730f216 274 */
alexan_e 0:cfdf9730f216 275
alexan_e 0:cfdf9730f216 276 LPC_SYSCON->SYSAHBCLKCTRL = (LPC_SYSCON->SYSAHBCLKCTRL & 0x098DFFFF) | (1UL<<8); /* Enable clock for CT16B1 (default is disabled) */
alexan_e 0:cfdf9730f216 277
alexan_e 0:cfdf9730f216 278 LPC_CT16B1->CTCR = 0x00; /* binary: 00000000 */
alexan_e 0:cfdf9730f216 279 LPC_CT16B1->TC = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 280 LPC_CT16B1->PR = 0xBB7F; /* decimal 47999 */
alexan_e 0:cfdf9730f216 281 LPC_CT16B1->MCR = 0x0003; /* binary: 00000000_00000011 */
alexan_e 0:cfdf9730f216 282 LPC_CT16B1->MR0 = 0x0320; /* decimal 800 */
alexan_e 0:cfdf9730f216 283 LPC_CT16B1->MR1 = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 284 LPC_CT16B1->MR2 = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 285 LPC_CT16B1->MR3 = 0x0000; /* decimal 0 */
alexan_e 0:cfdf9730f216 286 LPC_CT16B1->CCR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 287 LPC_CT16B1->EMR = 0x0000; /* binary: 00000000_00000000 */
alexan_e 0:cfdf9730f216 288 LPC_CT16B1->TCR = 0x01; /* binary: 00000001 */
alexan_e 0:cfdf9730f216 289
alexan_e 0:cfdf9730f216 290 while(1)
alexan_e 0:cfdf9730f216 291 {
alexan_e 0:cfdf9730f216 292
alexan_e 0:cfdf9730f216 293
alexan_e 0:cfdf9730f216 294 }
alexan_e 0:cfdf9730f216 295
alexan_e 0:cfdf9730f216 296 }