Ken Todotani / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/hal/TARGET_NXP/TARGET_LPC11XX_11CXX/spi_api.c@250:a49055e7a707, 2014-07-08 (annotated)

Committer:
mbed_official
Date:
Tue Jul 08 11:15:08 2014 +0100
Revision:
250:a49055e7a707
Parent:
227:7bd0639b8911
Child:
251:de9a1e4ffd79
Synchronized with git revision 3197042b65f8d28e856e1a7812d45e2fbe80e3f1



Full URL: https://github.com/mbedmicro/mbed/commit/3197042b65f8d28e856e1a7812d45e2fbe80e3f1/



error.h -> mbed_error.h

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 30:91c1d09ada54 1 /* mbed Microcontroller Library
mbed_official 30:91c1d09ada54 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 30:91c1d09ada54 3 *
mbed_official 30:91c1d09ada54 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 30:91c1d09ada54 5 * you may not use this file except in compliance with the License.
mbed_official 30:91c1d09ada54 6 * You may obtain a copy of the License at
mbed_official 30:91c1d09ada54 7 *
mbed_official 30:91c1d09ada54 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 30:91c1d09ada54 9 *
mbed_official 30:91c1d09ada54 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 30:91c1d09ada54 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 30:91c1d09ada54 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 30:91c1d09ada54 13 * See the License for the specific language governing permissions and
mbed_official 30:91c1d09ada54 14 * limitations under the License.
mbed_official 30:91c1d09ada54 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
mbed_official 30:91c1d09ada54 17 #include <math.h>
mbed_official 30:91c1d09ada54 18 #include "spi_api.h"
mbed_official 30:91c1d09ada54 19 #include "cmsis.h"
mbed_official 30:91c1d09ada54 20 #include "pinmap.h"
mbed_official 250:a49055e7a707 21 #include "mbed_error.h"
mbed_official 30:91c1d09ada54 22
mbed_official 32:4742f6c694e8 23 static const PinMap PinMap_SPI_SCLK[] = {
mbed_official 32:4742f6c694e8 24 {P0_6 , SPI_0, 0x02},
mbed_official 32:4742f6c694e8 25 // {P0_10, SPI_0, 0x02}, -- should be mapped to SWCLK only
mbed_official 32:4742f6c694e8 26 {P2_11, SPI_0, 0x01},
mbed_official 32:4742f6c694e8 27 {P2_1 , SPI_1, 0x02},
mbed_official 32:4742f6c694e8 28 {NC , NC , 0}
mbed_official 32:4742f6c694e8 29 };
mbed_official 32:4742f6c694e8 30
mbed_official 32:4742f6c694e8 31 static const PinMap PinMap_SPI_MOSI[] = {
mbed_official 32:4742f6c694e8 32 {P0_9 , SPI_0, 0x01},
mbed_official 32:4742f6c694e8 33 {P2_3 , SPI_1, 0x02},
mbed_official 32:4742f6c694e8 34 {NC , NC , 0}
mbed_official 32:4742f6c694e8 35 };
mbed_official 32:4742f6c694e8 36
mbed_official 32:4742f6c694e8 37 static const PinMap PinMap_SPI_MISO[] = {
mbed_official 32:4742f6c694e8 38 {P0_8 , SPI_0, 0x01},
mbed_official 32:4742f6c694e8 39 {P2_2 , SPI_1, 0x02},
mbed_official 32:4742f6c694e8 40 {NC , NC , 0}
mbed_official 32:4742f6c694e8 41 };
mbed_official 32:4742f6c694e8 42
mbed_official 32:4742f6c694e8 43 static const PinMap PinMap_SPI_SSEL[] = {
mbed_official 32:4742f6c694e8 44 {P0_2 , SPI_0, 0x01},
mbed_official 32:4742f6c694e8 45 {P2_0 , SPI_1, 0x02},
mbed_official 32:4742f6c694e8 46 {NC , NC , 0}
mbed_official 32:4742f6c694e8 47 };
mbed_official 30:91c1d09ada54 48
mbed_official 30:91c1d09ada54 49 static inline int ssp_disable(spi_t *obj);
mbed_official 30:91c1d09ada54 50 static inline int ssp_enable(spi_t *obj);
mbed_official 30:91c1d09ada54 51
mbed_official 30:91c1d09ada54 52 void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel) {
mbed_official 30:91c1d09ada54 53 // determine the SPI to use
mbed_official 30:91c1d09ada54 54 SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
mbed_official 30:91c1d09ada54 55 SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
mbed_official 30:91c1d09ada54 56 SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
mbed_official 30:91c1d09ada54 57 SPIName spi_ssel = (SPIName)pinmap_peripheral(ssel, PinMap_SPI_SSEL);
mbed_official 30:91c1d09ada54 58 SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
mbed_official 30:91c1d09ada54 59 SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
mbed_official 30:91c1d09ada54 60
mbed_official 30:91c1d09ada54 61 obj->spi = (LPC_SSP_TypeDef*)pinmap_merge(spi_data, spi_cntl);
mbed_official 227:7bd0639b8911 62 MBED_ASSERT((int)obj->spi != NC);
mbed_official 30:91c1d09ada54 63
mbed_official 30:91c1d09ada54 64 // enable power and clocking
mbed_official 30:91c1d09ada54 65 switch ((int)obj->spi) {
mbed_official 30:91c1d09ada54 66 case SPI_0:
mbed_official 30:91c1d09ada54 67 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 11;
mbed_official 30:91c1d09ada54 68 LPC_SYSCON->SSP0CLKDIV = 0x01;
mbed_official 30:91c1d09ada54 69 LPC_SYSCON->PRESETCTRL |= 1 << 0;
mbed_official 30:91c1d09ada54 70 break;
mbed_official 30:91c1d09ada54 71 case SPI_1:
mbed_official 30:91c1d09ada54 72 LPC_SYSCON->SYSAHBCLKCTRL |= 1 << 18;
mbed_official 30:91c1d09ada54 73 LPC_SYSCON->SSP1CLKDIV = 0x01;
mbed_official 30:91c1d09ada54 74 LPC_SYSCON->PRESETCTRL |= 1 << 2;
mbed_official 30:91c1d09ada54 75 break;
mbed_official 30:91c1d09ada54 76 }
mbed_official 30:91c1d09ada54 77
mbed_official 30:91c1d09ada54 78 // set default format and frequency
mbed_official 30:91c1d09ada54 79 if (ssel == NC) {
mbed_official 30:91c1d09ada54 80 spi_format(obj, 8, 0, 0); // 8 bits, mode 0, master
mbed_official 30:91c1d09ada54 81 } else {
mbed_official 30:91c1d09ada54 82 spi_format(obj, 8, 0, 1); // 8 bits, mode 0, slave
mbed_official 30:91c1d09ada54 83 }
mbed_official 30:91c1d09ada54 84 spi_frequency(obj, 1000000);
mbed_official 30:91c1d09ada54 85
mbed_official 30:91c1d09ada54 86 // enable the ssp channel
mbed_official 30:91c1d09ada54 87 ssp_enable(obj);
mbed_official 30:91c1d09ada54 88
mbed_official 30:91c1d09ada54 89 // pin out the spi pins
mbed_official 30:91c1d09ada54 90 pinmap_pinout(mosi, PinMap_SPI_MOSI);
mbed_official 30:91c1d09ada54 91 pinmap_pinout(miso, PinMap_SPI_MISO);
mbed_official 30:91c1d09ada54 92 pinmap_pinout(sclk, PinMap_SPI_SCLK);
mbed_official 30:91c1d09ada54 93 if (ssel != NC) {
mbed_official 30:91c1d09ada54 94 pinmap_pinout(ssel, PinMap_SPI_SSEL);
mbed_official 30:91c1d09ada54 95 }
mbed_official 30:91c1d09ada54 96 }
mbed_official 30:91c1d09ada54 97
mbed_official 30:91c1d09ada54 98 void spi_free(spi_t *obj) {}
mbed_official 30:91c1d09ada54 99
mbed_official 30:91c1d09ada54 100 void spi_format(spi_t *obj, int bits, int mode, int slave) {
mbed_official 227:7bd0639b8911 101 MBED_ASSERT((bits >= 4 && bits <= 16) || (mode >= 0 && mode <= 3));
mbed_official 30:91c1d09ada54 102 ssp_disable(obj);
mbed_official 30:91c1d09ada54 103
mbed_official 30:91c1d09ada54 104 int polarity = (mode & 0x2) ? 1 : 0;
mbed_official 30:91c1d09ada54 105 int phase = (mode & 0x1) ? 1 : 0;
mbed_official 30:91c1d09ada54 106
mbed_official 30:91c1d09ada54 107 // set it up
mbed_official 30:91c1d09ada54 108 int DSS = bits - 1; // DSS (data select size)
mbed_official 30:91c1d09ada54 109 int SPO = (polarity) ? 1 : 0; // SPO - clock out polarity
mbed_official 30:91c1d09ada54 110 int SPH = (phase) ? 1 : 0; // SPH - clock out phase
mbed_official 30:91c1d09ada54 111
mbed_official 30:91c1d09ada54 112 int FRF = 0; // FRF (frame format) = SPI
mbed_official 30:91c1d09ada54 113 uint32_t tmp = obj->spi->CR0;
mbed_official 30:91c1d09ada54 114 tmp &= ~(0xFFFF);
mbed_official 30:91c1d09ada54 115 tmp |= DSS << 0
mbed_official 30:91c1d09ada54 116 | FRF << 4
mbed_official 30:91c1d09ada54 117 | SPO << 6
mbed_official 30:91c1d09ada54 118 | SPH << 7;
mbed_official 30:91c1d09ada54 119 obj->spi->CR0 = tmp;
mbed_official 30:91c1d09ada54 120
mbed_official 30:91c1d09ada54 121 tmp = obj->spi->CR1;
mbed_official 30:91c1d09ada54 122 tmp &= ~(0xD);
mbed_official 30:91c1d09ada54 123 tmp |= 0 << 0 // LBM - loop back mode - off
mbed_official 30:91c1d09ada54 124 | ((slave) ? 1 : 0) << 2 // MS - master slave mode, 1 = slave
mbed_official 30:91c1d09ada54 125 | 0 << 3; // SOD - slave output disable - na
mbed_official 30:91c1d09ada54 126 obj->spi->CR1 = tmp;
mbed_official 30:91c1d09ada54 127
mbed_official 30:91c1d09ada54 128 ssp_enable(obj);
mbed_official 30:91c1d09ada54 129 }
mbed_official 30:91c1d09ada54 130
mbed_official 30:91c1d09ada54 131 void spi_frequency(spi_t *obj, int hz) {
mbed_official 30:91c1d09ada54 132 ssp_disable(obj);
mbed_official 30:91c1d09ada54 133
mbed_official 30:91c1d09ada54 134 uint32_t PCLK = SystemCoreClock;
mbed_official 30:91c1d09ada54 135
mbed_official 30:91c1d09ada54 136 int prescaler;
mbed_official 30:91c1d09ada54 137
mbed_official 30:91c1d09ada54 138 for (prescaler = 2; prescaler <= 254; prescaler += 2) {
mbed_official 30:91c1d09ada54 139 int prescale_hz = PCLK / prescaler;
mbed_official 30:91c1d09ada54 140
mbed_official 30:91c1d09ada54 141 // calculate the divider
mbed_official 30:91c1d09ada54 142 int divider = floor(((float)prescale_hz / (float)hz) + 0.5f);
mbed_official 30:91c1d09ada54 143
mbed_official 30:91c1d09ada54 144 // check we can support the divider
mbed_official 30:91c1d09ada54 145 if (divider < 256) {
mbed_official 30:91c1d09ada54 146 // prescaler
mbed_official 30:91c1d09ada54 147 obj->spi->CPSR = prescaler;
mbed_official 30:91c1d09ada54 148
mbed_official 30:91c1d09ada54 149 // divider
mbed_official 30:91c1d09ada54 150 obj->spi->CR0 &= ~(0xFFFF << 8);
mbed_official 30:91c1d09ada54 151 obj->spi->CR0 |= (divider - 1) << 8;
mbed_official 30:91c1d09ada54 152 ssp_enable(obj);
mbed_official 30:91c1d09ada54 153 return;
mbed_official 30:91c1d09ada54 154 }
mbed_official 30:91c1d09ada54 155 }
mbed_official 30:91c1d09ada54 156 error("Couldn't setup requested SPI frequency");
mbed_official 30:91c1d09ada54 157 }
mbed_official 30:91c1d09ada54 158
mbed_official 30:91c1d09ada54 159 static inline int ssp_disable(spi_t *obj) {
mbed_official 30:91c1d09ada54 160 return obj->spi->CR1 &= ~(1 << 1);
mbed_official 30:91c1d09ada54 161 }
mbed_official 30:91c1d09ada54 162
mbed_official 30:91c1d09ada54 163 static inline int ssp_enable(spi_t *obj) {
mbed_official 30:91c1d09ada54 164 return obj->spi->CR1 |= (1 << 1);
mbed_official 30:91c1d09ada54 165 }
mbed_official 30:91c1d09ada54 166
mbed_official 30:91c1d09ada54 167 static inline int ssp_readable(spi_t *obj) {
mbed_official 30:91c1d09ada54 168 return obj->spi->SR & (1 << 2);
mbed_official 30:91c1d09ada54 169 }
mbed_official 30:91c1d09ada54 170
mbed_official 30:91c1d09ada54 171 static inline int ssp_writeable(spi_t *obj) {
mbed_official 30:91c1d09ada54 172 return obj->spi->SR & (1 << 1);
mbed_official 30:91c1d09ada54 173 }
mbed_official 30:91c1d09ada54 174
mbed_official 30:91c1d09ada54 175 static inline void ssp_write(spi_t *obj, int value) {
mbed_official 30:91c1d09ada54 176 while (!ssp_writeable(obj));
mbed_official 30:91c1d09ada54 177 obj->spi->DR = value;
mbed_official 30:91c1d09ada54 178 }
mbed_official 30:91c1d09ada54 179
mbed_official 30:91c1d09ada54 180 static inline int ssp_read(spi_t *obj) {
mbed_official 30:91c1d09ada54 181 while (!ssp_readable(obj));
mbed_official 30:91c1d09ada54 182 return obj->spi->DR;
mbed_official 30:91c1d09ada54 183 }
mbed_official 30:91c1d09ada54 184
mbed_official 30:91c1d09ada54 185 static inline int ssp_busy(spi_t *obj) {
mbed_official 30:91c1d09ada54 186 return (obj->spi->SR & (1 << 4)) ? (1) : (0);
mbed_official 30:91c1d09ada54 187 }
mbed_official 30:91c1d09ada54 188
mbed_official 30:91c1d09ada54 189 int spi_master_write(spi_t *obj, int value) {
mbed_official 30:91c1d09ada54 190 ssp_write(obj, value);
mbed_official 30:91c1d09ada54 191 return ssp_read(obj);
mbed_official 30:91c1d09ada54 192 }
mbed_official 30:91c1d09ada54 193
mbed_official 30:91c1d09ada54 194 int spi_slave_receive(spi_t *obj) {
mbed_official 30:91c1d09ada54 195 return (ssp_readable(obj) && !ssp_busy(obj)) ? (1) : (0);
mbed_official 81:a9456fdf72fa 196 }
mbed_official 30:91c1d09ada54 197
mbed_official 30:91c1d09ada54 198 int spi_slave_read(spi_t *obj) {
mbed_official 30:91c1d09ada54 199 return obj->spi->DR;
mbed_official 30:91c1d09ada54 200 }
mbed_official 30:91c1d09ada54 201
mbed_official 30:91c1d09ada54 202 void spi_slave_write(spi_t *obj, int value) {
mbed_official 30:91c1d09ada54 203 while (ssp_writeable(obj) == 0) ;
mbed_official 30:91c1d09ada54 204 obj->spi->DR = value;
mbed_official 30:91c1d09ada54 205 }
mbed_official 30:91c1d09ada54 206
mbed_official 30:91c1d09ada54 207 int spi_busy(spi_t *obj) {
mbed_official 30:91c1d09ada54 208 return ssp_busy(obj);
mbed_official 30:91c1d09ada54 209 }