mbed w/ spi bug fig
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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_usart.h@242:7074e42da0b2, 2014-06-27 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jun 27 07:30:09 2014 +0100
- Revision:
- 242:7074e42da0b2
- Parent:
- 133:d4dda5c437f0
Synchronized with git revision 124ef5e3add9e74a3221347a3fbeea7c8b3cf353
Full URL: https://github.com/mbedmicro/mbed/commit/124ef5e3add9e74a3221347a3fbeea7c8b3cf353/
[DISCO_F407VG] HAL update.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 133:d4dda5c437f0 | 1 | /** |
mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_usart.h |
mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
mbed_official | 242:7074e42da0b2 | 5 | * @version V1.1.0RC2 |
mbed_official | 242:7074e42da0b2 | 6 | * @date 14-May-2014 |
mbed_official | 133:d4dda5c437f0 | 7 | * @brief Header file of USART HAL module. |
mbed_official | 133:d4dda5c437f0 | 8 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 9 | * @attention |
mbed_official | 133:d4dda5c437f0 | 10 | * |
mbed_official | 133:d4dda5c437f0 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 133:d4dda5c437f0 | 12 | * |
mbed_official | 133:d4dda5c437f0 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 133:d4dda5c437f0 | 14 | * are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 16 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 18 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 19 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 21 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 22 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 23 | * |
mbed_official | 133:d4dda5c437f0 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 34 | * |
mbed_official | 133:d4dda5c437f0 | 35 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 36 | */ |
mbed_official | 133:d4dda5c437f0 | 37 | |
mbed_official | 133:d4dda5c437f0 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 39 | #ifndef __STM32F4xx_HAL_USART_H |
mbed_official | 133:d4dda5c437f0 | 40 | #define __STM32F4xx_HAL_USART_H |
mbed_official | 133:d4dda5c437f0 | 41 | |
mbed_official | 133:d4dda5c437f0 | 42 | #ifdef __cplusplus |
mbed_official | 133:d4dda5c437f0 | 43 | extern "C" { |
mbed_official | 133:d4dda5c437f0 | 44 | #endif |
mbed_official | 133:d4dda5c437f0 | 45 | |
mbed_official | 133:d4dda5c437f0 | 46 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 47 | #include "stm32f4xx_hal_def.h" |
mbed_official | 133:d4dda5c437f0 | 48 | |
mbed_official | 133:d4dda5c437f0 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 133:d4dda5c437f0 | 50 | * @{ |
mbed_official | 133:d4dda5c437f0 | 51 | */ |
mbed_official | 133:d4dda5c437f0 | 52 | |
mbed_official | 133:d4dda5c437f0 | 53 | /** @addtogroup USART |
mbed_official | 133:d4dda5c437f0 | 54 | * @{ |
mbed_official | 133:d4dda5c437f0 | 55 | */ |
mbed_official | 133:d4dda5c437f0 | 56 | |
mbed_official | 133:d4dda5c437f0 | 57 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 58 | /** |
mbed_official | 133:d4dda5c437f0 | 59 | * @brief USART Init Structure definition |
mbed_official | 133:d4dda5c437f0 | 60 | */ |
mbed_official | 133:d4dda5c437f0 | 61 | typedef struct |
mbed_official | 133:d4dda5c437f0 | 62 | { |
mbed_official | 133:d4dda5c437f0 | 63 | uint32_t BaudRate; /*!< This member configures the Usart communication baud rate. |
mbed_official | 133:d4dda5c437f0 | 64 | The baud rate is computed using the following formula: |
mbed_official | 242:7074e42da0b2 | 65 | - IntegerDivider = ((PCLKx) / (8 * (husart->Init.BaudRate))) |
mbed_official | 133:d4dda5c437f0 | 66 | - FractionalDivider = ((IntegerDivider - ((uint32_t) IntegerDivider)) * 8) + 0.5 */ |
mbed_official | 133:d4dda5c437f0 | 67 | |
mbed_official | 133:d4dda5c437f0 | 68 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
mbed_official | 133:d4dda5c437f0 | 69 | This parameter can be a value of @ref USART_Word_Length */ |
mbed_official | 133:d4dda5c437f0 | 70 | |
mbed_official | 133:d4dda5c437f0 | 71 | uint32_t StopBits; /*!< Specifies the number of stop bits transmitted. |
mbed_official | 133:d4dda5c437f0 | 72 | This parameter can be a value of @ref USART_Stop_Bits */ |
mbed_official | 133:d4dda5c437f0 | 73 | |
mbed_official | 133:d4dda5c437f0 | 74 | uint32_t Parity; /*!< Specifies the parity mode. |
mbed_official | 133:d4dda5c437f0 | 75 | This parameter can be a value of @ref USART_Parity |
mbed_official | 133:d4dda5c437f0 | 76 | @note When parity is enabled, the computed parity is inserted |
mbed_official | 133:d4dda5c437f0 | 77 | at the MSB position of the transmitted data (9th bit when |
mbed_official | 133:d4dda5c437f0 | 78 | the word length is set to 9 data bits; 8th bit when the |
mbed_official | 133:d4dda5c437f0 | 79 | word length is set to 8 data bits). */ |
mbed_official | 133:d4dda5c437f0 | 80 | |
mbed_official | 133:d4dda5c437f0 | 81 | uint32_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled. |
mbed_official | 133:d4dda5c437f0 | 82 | This parameter can be a value of @ref USART_Mode */ |
mbed_official | 133:d4dda5c437f0 | 83 | |
mbed_official | 133:d4dda5c437f0 | 84 | uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock. |
mbed_official | 133:d4dda5c437f0 | 85 | This parameter can be a value of @ref USART_Clock_Polarity */ |
mbed_official | 133:d4dda5c437f0 | 86 | |
mbed_official | 133:d4dda5c437f0 | 87 | uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made. |
mbed_official | 133:d4dda5c437f0 | 88 | This parameter can be a value of @ref USART_Clock_Phase */ |
mbed_official | 133:d4dda5c437f0 | 89 | |
mbed_official | 133:d4dda5c437f0 | 90 | uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted |
mbed_official | 133:d4dda5c437f0 | 91 | data bit (MSB) has to be output on the SCLK pin in synchronous mode. |
mbed_official | 133:d4dda5c437f0 | 92 | This parameter can be a value of @ref USART_Last_Bit */ |
mbed_official | 133:d4dda5c437f0 | 93 | }USART_InitTypeDef; |
mbed_official | 133:d4dda5c437f0 | 94 | |
mbed_official | 133:d4dda5c437f0 | 95 | /** |
mbed_official | 133:d4dda5c437f0 | 96 | * @brief HAL State structures definition |
mbed_official | 133:d4dda5c437f0 | 97 | */ |
mbed_official | 133:d4dda5c437f0 | 98 | typedef enum |
mbed_official | 133:d4dda5c437f0 | 99 | { |
mbed_official | 133:d4dda5c437f0 | 100 | HAL_USART_STATE_RESET = 0x00, /*!< Peripheral is not yet Initialized */ |
mbed_official | 133:d4dda5c437f0 | 101 | HAL_USART_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ |
mbed_official | 133:d4dda5c437f0 | 102 | HAL_USART_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ |
mbed_official | 133:d4dda5c437f0 | 103 | HAL_USART_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ |
mbed_official | 133:d4dda5c437f0 | 104 | HAL_USART_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ |
mbed_official | 133:d4dda5c437f0 | 105 | HAL_USART_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission Reception process is ongoing */ |
mbed_official | 133:d4dda5c437f0 | 106 | HAL_USART_STATE_TIMEOUT = 0x03, /*!< Timeout state */ |
mbed_official | 133:d4dda5c437f0 | 107 | HAL_USART_STATE_ERROR = 0x04 /*!< Error */ |
mbed_official | 133:d4dda5c437f0 | 108 | }HAL_USART_StateTypeDef; |
mbed_official | 133:d4dda5c437f0 | 109 | |
mbed_official | 133:d4dda5c437f0 | 110 | /** |
mbed_official | 133:d4dda5c437f0 | 111 | * @brief HAL USART Error Code structure definition |
mbed_official | 133:d4dda5c437f0 | 112 | */ |
mbed_official | 133:d4dda5c437f0 | 113 | typedef enum |
mbed_official | 133:d4dda5c437f0 | 114 | { |
mbed_official | 133:d4dda5c437f0 | 115 | HAL_USART_ERROR_NONE = 0x00, /*!< No error */ |
mbed_official | 133:d4dda5c437f0 | 116 | HAL_USART_ERROR_PE = 0x01, /*!< Parity error */ |
mbed_official | 133:d4dda5c437f0 | 117 | HAL_USART_ERROR_NE = 0x02, /*!< Noise error */ |
mbed_official | 133:d4dda5c437f0 | 118 | HAL_USART_ERROR_FE = 0x04, /*!< frame error */ |
mbed_official | 133:d4dda5c437f0 | 119 | HAL_USART_ERROR_ORE = 0x08, /*!< Overrun error */ |
mbed_official | 133:d4dda5c437f0 | 120 | HAL_USART_ERROR_DMA = 0x10 /*!< DMA transfer error */ |
mbed_official | 133:d4dda5c437f0 | 121 | }HAL_USART_ErrorTypeDef; |
mbed_official | 133:d4dda5c437f0 | 122 | |
mbed_official | 133:d4dda5c437f0 | 123 | /** |
mbed_official | 133:d4dda5c437f0 | 124 | * @brief USART handle Structure definition |
mbed_official | 133:d4dda5c437f0 | 125 | */ |
mbed_official | 133:d4dda5c437f0 | 126 | typedef struct |
mbed_official | 133:d4dda5c437f0 | 127 | { |
mbed_official | 133:d4dda5c437f0 | 128 | USART_TypeDef *Instance; /* USART registers base address */ |
mbed_official | 133:d4dda5c437f0 | 129 | |
mbed_official | 133:d4dda5c437f0 | 130 | USART_InitTypeDef Init; /* Usart communication parameters */ |
mbed_official | 133:d4dda5c437f0 | 131 | |
mbed_official | 133:d4dda5c437f0 | 132 | uint8_t *pTxBuffPtr; /* Pointer to Usart Tx transfer Buffer */ |
mbed_official | 133:d4dda5c437f0 | 133 | |
mbed_official | 133:d4dda5c437f0 | 134 | uint16_t TxXferSize; /* Usart Tx Transfer size */ |
mbed_official | 133:d4dda5c437f0 | 135 | |
mbed_official | 133:d4dda5c437f0 | 136 | __IO uint16_t TxXferCount; /* Usart Tx Transfer Counter */ |
mbed_official | 133:d4dda5c437f0 | 137 | |
mbed_official | 133:d4dda5c437f0 | 138 | uint8_t *pRxBuffPtr; /* Pointer to Usart Rx transfer Buffer */ |
mbed_official | 133:d4dda5c437f0 | 139 | |
mbed_official | 133:d4dda5c437f0 | 140 | uint16_t RxXferSize; /* Usart Rx Transfer size */ |
mbed_official | 133:d4dda5c437f0 | 141 | |
mbed_official | 133:d4dda5c437f0 | 142 | __IO uint16_t RxXferCount; /* Usart Rx Transfer Counter */ |
mbed_official | 133:d4dda5c437f0 | 143 | |
mbed_official | 133:d4dda5c437f0 | 144 | DMA_HandleTypeDef *hdmatx; /* Usart Tx DMA Handle parameters */ |
mbed_official | 133:d4dda5c437f0 | 145 | |
mbed_official | 133:d4dda5c437f0 | 146 | DMA_HandleTypeDef *hdmarx; /* Usart Rx DMA Handle parameters */ |
mbed_official | 133:d4dda5c437f0 | 147 | |
mbed_official | 133:d4dda5c437f0 | 148 | HAL_LockTypeDef Lock; /* Locking object */ |
mbed_official | 133:d4dda5c437f0 | 149 | |
mbed_official | 133:d4dda5c437f0 | 150 | __IO HAL_USART_StateTypeDef State; /* Usart communication state */ |
mbed_official | 133:d4dda5c437f0 | 151 | |
mbed_official | 133:d4dda5c437f0 | 152 | __IO HAL_USART_ErrorTypeDef ErrorCode; /* USART Error code */ |
mbed_official | 133:d4dda5c437f0 | 153 | |
mbed_official | 133:d4dda5c437f0 | 154 | }USART_HandleTypeDef; |
mbed_official | 133:d4dda5c437f0 | 155 | |
mbed_official | 133:d4dda5c437f0 | 156 | |
mbed_official | 133:d4dda5c437f0 | 157 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 158 | /** @defgroup USART_Exported_Constants |
mbed_official | 133:d4dda5c437f0 | 159 | * @{ |
mbed_official | 133:d4dda5c437f0 | 160 | */ |
mbed_official | 133:d4dda5c437f0 | 161 | |
mbed_official | 133:d4dda5c437f0 | 162 | /** @defgroup USART_Word_Length |
mbed_official | 133:d4dda5c437f0 | 163 | * @{ |
mbed_official | 133:d4dda5c437f0 | 164 | */ |
mbed_official | 133:d4dda5c437f0 | 165 | #define USART_WORDLENGTH_8B ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 166 | #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M) |
mbed_official | 133:d4dda5c437f0 | 167 | #define IS_USART_WORD_LENGTH(LENGTH) (((LENGTH) == USART_WORDLENGTH_8B) || \ |
mbed_official | 133:d4dda5c437f0 | 168 | ((LENGTH) == USART_WORDLENGTH_9B)) |
mbed_official | 133:d4dda5c437f0 | 169 | /** |
mbed_official | 133:d4dda5c437f0 | 170 | * @} |
mbed_official | 133:d4dda5c437f0 | 171 | */ |
mbed_official | 133:d4dda5c437f0 | 172 | |
mbed_official | 133:d4dda5c437f0 | 173 | /** @defgroup USART_Stop_Bits |
mbed_official | 133:d4dda5c437f0 | 174 | * @{ |
mbed_official | 133:d4dda5c437f0 | 175 | */ |
mbed_official | 133:d4dda5c437f0 | 176 | #define USART_STOPBITS_1 ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 177 | #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0) |
mbed_official | 133:d4dda5c437f0 | 178 | #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) |
mbed_official | 133:d4dda5c437f0 | 179 | #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) |
mbed_official | 133:d4dda5c437f0 | 180 | #define IS_USART_STOPBITS(STOPBITS) (((STOPBITS) == USART_STOPBITS_1) || \ |
mbed_official | 133:d4dda5c437f0 | 181 | ((STOPBITS) == USART_STOPBITS_0_5) || \ |
mbed_official | 133:d4dda5c437f0 | 182 | ((STOPBITS) == USART_STOPBITS_1_5) || \ |
mbed_official | 133:d4dda5c437f0 | 183 | ((STOPBITS) == USART_STOPBITS_2)) |
mbed_official | 133:d4dda5c437f0 | 184 | /** |
mbed_official | 133:d4dda5c437f0 | 185 | * @} |
mbed_official | 133:d4dda5c437f0 | 186 | */ |
mbed_official | 133:d4dda5c437f0 | 187 | |
mbed_official | 133:d4dda5c437f0 | 188 | /** @defgroup USART_Parity |
mbed_official | 133:d4dda5c437f0 | 189 | * @{ |
mbed_official | 133:d4dda5c437f0 | 190 | */ |
mbed_official | 133:d4dda5c437f0 | 191 | #define USART_PARITY_NONE ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 192 | #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) |
mbed_official | 133:d4dda5c437f0 | 193 | #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) |
mbed_official | 133:d4dda5c437f0 | 194 | #define IS_USART_PARITY(PARITY) (((PARITY) == USART_PARITY_NONE) || \ |
mbed_official | 133:d4dda5c437f0 | 195 | ((PARITY) == USART_PARITY_EVEN) || \ |
mbed_official | 133:d4dda5c437f0 | 196 | ((PARITY) == USART_PARITY_ODD)) |
mbed_official | 133:d4dda5c437f0 | 197 | /** |
mbed_official | 133:d4dda5c437f0 | 198 | * @} |
mbed_official | 133:d4dda5c437f0 | 199 | */ |
mbed_official | 133:d4dda5c437f0 | 200 | |
mbed_official | 133:d4dda5c437f0 | 201 | /** @defgroup USART_Mode |
mbed_official | 133:d4dda5c437f0 | 202 | * @{ |
mbed_official | 133:d4dda5c437f0 | 203 | */ |
mbed_official | 133:d4dda5c437f0 | 204 | #define USART_MODE_RX ((uint32_t)USART_CR1_RE) |
mbed_official | 133:d4dda5c437f0 | 205 | #define USART_MODE_TX ((uint32_t)USART_CR1_TE) |
mbed_official | 133:d4dda5c437f0 | 206 | #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) |
mbed_official | 133:d4dda5c437f0 | 207 | #define IS_USART_MODE(MODE) ((((MODE) & (uint32_t)0xFFF3) == 0x00) && ((MODE) != (uint32_t)0x00)) |
mbed_official | 133:d4dda5c437f0 | 208 | /** |
mbed_official | 133:d4dda5c437f0 | 209 | * @} |
mbed_official | 133:d4dda5c437f0 | 210 | */ |
mbed_official | 133:d4dda5c437f0 | 211 | |
mbed_official | 133:d4dda5c437f0 | 212 | /** @defgroup USART_Clock |
mbed_official | 133:d4dda5c437f0 | 213 | * @{ |
mbed_official | 133:d4dda5c437f0 | 214 | */ |
mbed_official | 133:d4dda5c437f0 | 215 | #define USART_CLOCK_DISABLED ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 216 | #define USART_CLOCK_ENABLED ((uint32_t)USART_CR2_CLKEN) |
mbed_official | 133:d4dda5c437f0 | 217 | #define IS_USART_CLOCK(CLOCK) (((CLOCK) == USART_CLOCK_DISABLED) || \ |
mbed_official | 133:d4dda5c437f0 | 218 | ((CLOCK) == USART_CLOCK_ENABLED)) |
mbed_official | 133:d4dda5c437f0 | 219 | /** |
mbed_official | 133:d4dda5c437f0 | 220 | * @} |
mbed_official | 133:d4dda5c437f0 | 221 | */ |
mbed_official | 133:d4dda5c437f0 | 222 | |
mbed_official | 133:d4dda5c437f0 | 223 | /** @defgroup USART_Clock_Polarity |
mbed_official | 133:d4dda5c437f0 | 224 | * @{ |
mbed_official | 133:d4dda5c437f0 | 225 | */ |
mbed_official | 133:d4dda5c437f0 | 226 | #define USART_POLARITY_LOW ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 227 | #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) |
mbed_official | 133:d4dda5c437f0 | 228 | #define IS_USART_POLARITY(CPOL) (((CPOL) == USART_POLARITY_LOW) || ((CPOL) == USART_POLARITY_HIGH)) |
mbed_official | 133:d4dda5c437f0 | 229 | /** |
mbed_official | 133:d4dda5c437f0 | 230 | * @} |
mbed_official | 133:d4dda5c437f0 | 231 | */ |
mbed_official | 133:d4dda5c437f0 | 232 | |
mbed_official | 133:d4dda5c437f0 | 233 | /** @defgroup USART_Clock_Phase |
mbed_official | 133:d4dda5c437f0 | 234 | * @{ |
mbed_official | 133:d4dda5c437f0 | 235 | */ |
mbed_official | 133:d4dda5c437f0 | 236 | #define USART_PHASE_1EDGE ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 237 | #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) |
mbed_official | 133:d4dda5c437f0 | 238 | #define IS_USART_PHASE(CPHA) (((CPHA) == USART_PHASE_1EDGE) || ((CPHA) == USART_PHASE_2EDGE)) |
mbed_official | 133:d4dda5c437f0 | 239 | /** |
mbed_official | 133:d4dda5c437f0 | 240 | * @} |
mbed_official | 133:d4dda5c437f0 | 241 | */ |
mbed_official | 133:d4dda5c437f0 | 242 | |
mbed_official | 133:d4dda5c437f0 | 243 | /** @defgroup USART_Last_Bit |
mbed_official | 133:d4dda5c437f0 | 244 | * @{ |
mbed_official | 133:d4dda5c437f0 | 245 | */ |
mbed_official | 133:d4dda5c437f0 | 246 | #define USART_LASTBIT_DISABLE ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 247 | #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) |
mbed_official | 133:d4dda5c437f0 | 248 | #define IS_USART_LASTBIT(LASTBIT) (((LASTBIT) == USART_LASTBIT_DISABLE) || \ |
mbed_official | 133:d4dda5c437f0 | 249 | ((LASTBIT) == USART_LASTBIT_ENABLE)) |
mbed_official | 133:d4dda5c437f0 | 250 | /** |
mbed_official | 133:d4dda5c437f0 | 251 | * @} |
mbed_official | 133:d4dda5c437f0 | 252 | */ |
mbed_official | 133:d4dda5c437f0 | 253 | |
mbed_official | 242:7074e42da0b2 | 254 | /** @defgroup USART_NACK_State |
mbed_official | 133:d4dda5c437f0 | 255 | * @{ |
mbed_official | 133:d4dda5c437f0 | 256 | */ |
mbed_official | 133:d4dda5c437f0 | 257 | #define USARTNACK_ENABLED ((uint32_t)USART_CR3_NACK) |
mbed_official | 133:d4dda5c437f0 | 258 | #define USARTNACK_DISABLED ((uint32_t)0x00000000) |
mbed_official | 133:d4dda5c437f0 | 259 | #define IS_USART_NACK_STATE(NACK) (((NACK) == USARTNACK_ENABLED) || \ |
mbed_official | 133:d4dda5c437f0 | 260 | ((NACK) == USARTNACK_DISABLED)) |
mbed_official | 133:d4dda5c437f0 | 261 | /** |
mbed_official | 133:d4dda5c437f0 | 262 | * @} |
mbed_official | 133:d4dda5c437f0 | 263 | */ |
mbed_official | 133:d4dda5c437f0 | 264 | |
mbed_official | 242:7074e42da0b2 | 265 | /** @defgroup USART_Flags |
mbed_official | 133:d4dda5c437f0 | 266 | * Elements values convention: 0xXXXX |
mbed_official | 133:d4dda5c437f0 | 267 | * - 0xXXXX : Flag mask in the SR register |
mbed_official | 133:d4dda5c437f0 | 268 | * @{ |
mbed_official | 133:d4dda5c437f0 | 269 | */ |
mbed_official | 133:d4dda5c437f0 | 270 | |
mbed_official | 133:d4dda5c437f0 | 271 | #define USART_FLAG_TXE ((uint32_t)0x00000080) |
mbed_official | 133:d4dda5c437f0 | 272 | #define USART_FLAG_TC ((uint32_t)0x00000040) |
mbed_official | 133:d4dda5c437f0 | 273 | #define USART_FLAG_RXNE ((uint32_t)0x00000020) |
mbed_official | 133:d4dda5c437f0 | 274 | #define USART_FLAG_IDLE ((uint32_t)0x00000010) |
mbed_official | 133:d4dda5c437f0 | 275 | #define USART_FLAG_ORE ((uint32_t)0x00000008) |
mbed_official | 133:d4dda5c437f0 | 276 | #define USART_FLAG_NE ((uint32_t)0x00000004) |
mbed_official | 133:d4dda5c437f0 | 277 | #define USART_FLAG_FE ((uint32_t)0x00000002) |
mbed_official | 133:d4dda5c437f0 | 278 | #define USART_FLAG_PE ((uint32_t)0x00000001) |
mbed_official | 133:d4dda5c437f0 | 279 | /** |
mbed_official | 133:d4dda5c437f0 | 280 | * @} |
mbed_official | 133:d4dda5c437f0 | 281 | */ |
mbed_official | 133:d4dda5c437f0 | 282 | |
mbed_official | 133:d4dda5c437f0 | 283 | /** @defgroup USART_Interrupt_definition |
mbed_official | 133:d4dda5c437f0 | 284 | * Elements values convention: 0xY000XXXX |
mbed_official | 133:d4dda5c437f0 | 285 | * - XXXX : Interrupt mask in the XX register |
mbed_official | 133:d4dda5c437f0 | 286 | * - Y : Interrupt source register (2bits) |
mbed_official | 133:d4dda5c437f0 | 287 | * - 01: CR1 register |
mbed_official | 133:d4dda5c437f0 | 288 | * - 10: CR2 register |
mbed_official | 133:d4dda5c437f0 | 289 | * - 11: CR3 register |
mbed_official | 133:d4dda5c437f0 | 290 | * |
mbed_official | 133:d4dda5c437f0 | 291 | * @{ |
mbed_official | 133:d4dda5c437f0 | 292 | */ |
mbed_official | 133:d4dda5c437f0 | 293 | #define USART_IT_PE ((uint32_t)0x10000100) |
mbed_official | 133:d4dda5c437f0 | 294 | #define USART_IT_TXE ((uint32_t)0x10000080) |
mbed_official | 133:d4dda5c437f0 | 295 | #define USART_IT_TC ((uint32_t)0x10000040) |
mbed_official | 133:d4dda5c437f0 | 296 | #define USART_IT_RXNE ((uint32_t)0x10000020) |
mbed_official | 133:d4dda5c437f0 | 297 | #define USART_IT_IDLE ((uint32_t)0x10000010) |
mbed_official | 133:d4dda5c437f0 | 298 | |
mbed_official | 133:d4dda5c437f0 | 299 | #define USART_IT_LBD ((uint32_t)0x20000040) |
mbed_official | 133:d4dda5c437f0 | 300 | #define USART_IT_CTS ((uint32_t)0x30000400) |
mbed_official | 242:7074e42da0b2 | 301 | |
mbed_official | 133:d4dda5c437f0 | 302 | #define USART_IT_ERR ((uint32_t)0x30000001) |
mbed_official | 133:d4dda5c437f0 | 303 | |
mbed_official | 133:d4dda5c437f0 | 304 | |
mbed_official | 133:d4dda5c437f0 | 305 | /** |
mbed_official | 133:d4dda5c437f0 | 306 | * @} |
mbed_official | 133:d4dda5c437f0 | 307 | */ |
mbed_official | 242:7074e42da0b2 | 308 | |
mbed_official | 133:d4dda5c437f0 | 309 | /** |
mbed_official | 133:d4dda5c437f0 | 310 | * @} |
mbed_official | 133:d4dda5c437f0 | 311 | */ |
mbed_official | 133:d4dda5c437f0 | 312 | |
mbed_official | 133:d4dda5c437f0 | 313 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 242:7074e42da0b2 | 314 | /** @brief Reset USART handle state |
mbed_official | 242:7074e42da0b2 | 315 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 242:7074e42da0b2 | 316 | * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral. |
mbed_official | 242:7074e42da0b2 | 317 | * @retval None |
mbed_official | 242:7074e42da0b2 | 318 | */ |
mbed_official | 242:7074e42da0b2 | 319 | #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET) |
mbed_official | 133:d4dda5c437f0 | 320 | |
mbed_official | 133:d4dda5c437f0 | 321 | /** @brief Checks whether the specified Smartcard flag is set or not. |
mbed_official | 133:d4dda5c437f0 | 322 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 242:7074e42da0b2 | 323 | * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral. |
mbed_official | 133:d4dda5c437f0 | 324 | * @param __FLAG__: specifies the flag to check. |
mbed_official | 133:d4dda5c437f0 | 325 | * This parameter can be one of the following values: |
mbed_official | 133:d4dda5c437f0 | 326 | * @arg USART_FLAG_TXE: Transmit data register empty flag |
mbed_official | 133:d4dda5c437f0 | 327 | * @arg USART_FLAG_TC: Transmission Complete flag |
mbed_official | 133:d4dda5c437f0 | 328 | * @arg USART_FLAG_RXNE: Receive data register not empty flag |
mbed_official | 133:d4dda5c437f0 | 329 | * @arg USART_FLAG_IDLE: Idle Line detection flag |
mbed_official | 133:d4dda5c437f0 | 330 | * @arg USART_FLAG_ORE: OverRun Error flag |
mbed_official | 133:d4dda5c437f0 | 331 | * @arg USART_FLAG_NE: Noise Error flag |
mbed_official | 133:d4dda5c437f0 | 332 | * @arg USART_FLAG_FE: Framing Error flag |
mbed_official | 133:d4dda5c437f0 | 333 | * @arg USART_FLAG_PE: Parity Error flag |
mbed_official | 133:d4dda5c437f0 | 334 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
mbed_official | 133:d4dda5c437f0 | 335 | */ |
mbed_official | 133:d4dda5c437f0 | 336 | |
mbed_official | 133:d4dda5c437f0 | 337 | #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
mbed_official | 133:d4dda5c437f0 | 338 | |
mbed_official | 133:d4dda5c437f0 | 339 | /** @brief Clears the specified Smartcard pending flags. |
mbed_official | 133:d4dda5c437f0 | 340 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 242:7074e42da0b2 | 341 | * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral. |
mbed_official | 133:d4dda5c437f0 | 342 | * @param __FLAG__: specifies the flag to check. |
mbed_official | 133:d4dda5c437f0 | 343 | * This parameter can be any combination of the following values: |
mbed_official | 133:d4dda5c437f0 | 344 | * @arg USART_FLAG_TC: Transmission Complete flag. |
mbed_official | 133:d4dda5c437f0 | 345 | * @arg USART_FLAG_RXNE: Receive data register not empty flag. |
mbed_official | 133:d4dda5c437f0 | 346 | * |
mbed_official | 133:d4dda5c437f0 | 347 | * @note PE (Parity error), FE (Framing error), NE (Noise error), ORE (OverRun |
mbed_official | 133:d4dda5c437f0 | 348 | * error) and IDLE (Idle line detected) flags are cleared by software |
mbed_official | 133:d4dda5c437f0 | 349 | * sequence: a read operation to USART_SR register followed by a read |
mbed_official | 133:d4dda5c437f0 | 350 | * operation to USART_DR register. |
mbed_official | 133:d4dda5c437f0 | 351 | * @note RXNE flag can be also cleared by a read to the USART_DR register. |
mbed_official | 133:d4dda5c437f0 | 352 | * @note TC flag can be also cleared by software sequence: a read operation to |
mbed_official | 133:d4dda5c437f0 | 353 | * USART_SR register followed by a write operation to USART_DR register. |
mbed_official | 133:d4dda5c437f0 | 354 | * @note TXE flag is cleared only by a write to the USART_DR register. |
mbed_official | 133:d4dda5c437f0 | 355 | * |
mbed_official | 133:d4dda5c437f0 | 356 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 357 | */ |
mbed_official | 133:d4dda5c437f0 | 358 | #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__)) |
mbed_official | 133:d4dda5c437f0 | 359 | |
mbed_official | 133:d4dda5c437f0 | 360 | |
mbed_official | 133:d4dda5c437f0 | 361 | /** @brief Enables or disables the specified Usart interrupts. |
mbed_official | 133:d4dda5c437f0 | 362 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 242:7074e42da0b2 | 363 | * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral. |
mbed_official | 133:d4dda5c437f0 | 364 | * @param __INTERRUPT__: specifies the USART interrupt source to check. |
mbed_official | 133:d4dda5c437f0 | 365 | * This parameter can be one of the following values: |
mbed_official | 133:d4dda5c437f0 | 366 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
mbed_official | 133:d4dda5c437f0 | 367 | * @arg USART_IT_TC: Transmission complete interrupt |
mbed_official | 133:d4dda5c437f0 | 368 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
mbed_official | 133:d4dda5c437f0 | 369 | * @arg USART_IT_IDLE: Idle line detection interrupt |
mbed_official | 133:d4dda5c437f0 | 370 | * @arg USART_IT_PE: Parity Error interrupt |
mbed_official | 133:d4dda5c437f0 | 371 | * @arg USART_IT_ERR: Error interrupt(Frame error, noise error, overrun error) |
mbed_official | 133:d4dda5c437f0 | 372 | * @param NewState: new state of the specified Usart interrupt. |
mbed_official | 133:d4dda5c437f0 | 373 | * This parameter can be: ENABLE or DISABLE. |
mbed_official | 133:d4dda5c437f0 | 374 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 375 | */ |
mbed_official | 133:d4dda5c437f0 | 376 | #define USART_IT_MASK ((uint32_t)0x0000FFFF) |
mbed_official | 133:d4dda5c437f0 | 377 | #define __USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 |= ((__INTERRUPT__) & USART_IT_MASK)): \ |
mbed_official | 133:d4dda5c437f0 | 378 | (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 |= ((__INTERRUPT__) & USART_IT_MASK)): \ |
mbed_official | 133:d4dda5c437f0 | 379 | ((__HANDLE__)->Instance->CR3 |= ((__INTERRUPT__) & USART_IT_MASK))) |
mbed_official | 133:d4dda5c437f0 | 380 | #define __USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((((__INTERRUPT__) >> 28) == 1)? ((__HANDLE__)->Instance->CR1 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ |
mbed_official | 133:d4dda5c437f0 | 381 | (((__INTERRUPT__) >> 28) == 2)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & USART_IT_MASK)): \ |
mbed_official | 133:d4dda5c437f0 | 382 | ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & USART_IT_MASK))) |
mbed_official | 133:d4dda5c437f0 | 383 | |
mbed_official | 133:d4dda5c437f0 | 384 | |
mbed_official | 133:d4dda5c437f0 | 385 | /** @brief Checks whether the specified Usart interrupt has occurred or not. |
mbed_official | 133:d4dda5c437f0 | 386 | * @param __HANDLE__: specifies the USART Handle. |
mbed_official | 242:7074e42da0b2 | 387 | * This parameter can be USARTx where x: 1, 2, 3 or 6 to select the USART peripheral. |
mbed_official | 133:d4dda5c437f0 | 388 | * @param __IT__: specifies the USART interrupt source to check. |
mbed_official | 133:d4dda5c437f0 | 389 | * This parameter can be one of the following values: |
mbed_official | 133:d4dda5c437f0 | 390 | * @arg USART_IT_TXE: Transmit Data Register empty interrupt |
mbed_official | 133:d4dda5c437f0 | 391 | * @arg USART_IT_TC: Transmission complete interrupt |
mbed_official | 133:d4dda5c437f0 | 392 | * @arg USART_IT_RXNE: Receive Data register not empty interrupt |
mbed_official | 133:d4dda5c437f0 | 393 | * @arg USART_IT_IDLE: Idle line detection interrupt |
mbed_official | 133:d4dda5c437f0 | 394 | * @arg USART_IT_ERR: Error interrupt |
mbed_official | 133:d4dda5c437f0 | 395 | * @arg USART_IT_PE: Parity Error interrupt |
mbed_official | 133:d4dda5c437f0 | 396 | * @retval The new state of __IT__ (TRUE or FALSE). |
mbed_official | 133:d4dda5c437f0 | 397 | */ |
mbed_official | 133:d4dda5c437f0 | 398 | #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) (((((__IT__) >> 28) == 1)? (__HANDLE__)->Instance->CR1:(((((uint32_t)(__IT__)) >> 28) == 2)? \ |
mbed_official | 133:d4dda5c437f0 | 399 | (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (((uint32_t)(__IT__)) & USART_IT_MASK)) |
mbed_official | 133:d4dda5c437f0 | 400 | |
mbed_official | 133:d4dda5c437f0 | 401 | #define __USART_ENABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
mbed_official | 133:d4dda5c437f0 | 402 | #define __USART_DISABLE(__HANDLE__) ( (__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
mbed_official | 133:d4dda5c437f0 | 403 | |
mbed_official | 133:d4dda5c437f0 | 404 | #define __DIV(_PCLK_, _BAUD_) (((_PCLK_)*25)/(4*(_BAUD_))) |
mbed_official | 133:d4dda5c437f0 | 405 | #define __DIVMANT(_PCLK_, _BAUD_) (__DIV((_PCLK_), (_BAUD_))/100) |
mbed_official | 133:d4dda5c437f0 | 406 | #define __DIVFRAQ(_PCLK_, _BAUD_) (((__DIV((_PCLK_), (_BAUD_)) - (__DIVMANT((_PCLK_), (_BAUD_)) * 100)) * 16 + 50) / 100) |
mbed_official | 133:d4dda5c437f0 | 407 | #define __USART_BRR(_PCLK_, _BAUD_) ((__DIVMANT((_PCLK_), (_BAUD_)) << 4)|(__DIVFRAQ((_PCLK_), (_BAUD_)) & 0x0F)) |
mbed_official | 133:d4dda5c437f0 | 408 | |
mbed_official | 133:d4dda5c437f0 | 409 | #define IS_USART_BAUDRATE(BAUDRATE) ((BAUDRATE) < 10500001) |
mbed_official | 133:d4dda5c437f0 | 410 | |
mbed_official | 133:d4dda5c437f0 | 411 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 412 | /* Initialization/de-initialization functions **********************************/ |
mbed_official | 133:d4dda5c437f0 | 413 | HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 414 | HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 415 | void HAL_USART_MspInit(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 416 | void HAL_USART_MspDeInit(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 417 | /* IO operation functions *******************************************************/ |
mbed_official | 133:d4dda5c437f0 | 418 | HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 419 | HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 420 | HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout); |
mbed_official | 133:d4dda5c437f0 | 421 | HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
mbed_official | 133:d4dda5c437f0 | 422 | HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
mbed_official | 133:d4dda5c437f0 | 423 | HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
mbed_official | 133:d4dda5c437f0 | 424 | HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size); |
mbed_official | 133:d4dda5c437f0 | 425 | HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size); |
mbed_official | 133:d4dda5c437f0 | 426 | HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size); |
mbed_official | 133:d4dda5c437f0 | 427 | HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 428 | HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 429 | HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 430 | void HAL_USART_IRQHandler(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 431 | void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 432 | void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 433 | void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 434 | void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 435 | void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 436 | void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 437 | |
mbed_official | 133:d4dda5c437f0 | 438 | /* Peripheral State functions **************************************************/ |
mbed_official | 133:d4dda5c437f0 | 439 | HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 440 | uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart); |
mbed_official | 133:d4dda5c437f0 | 441 | |
mbed_official | 133:d4dda5c437f0 | 442 | /** |
mbed_official | 133:d4dda5c437f0 | 443 | * @} |
mbed_official | 133:d4dda5c437f0 | 444 | */ |
mbed_official | 133:d4dda5c437f0 | 445 | |
mbed_official | 133:d4dda5c437f0 | 446 | /** |
mbed_official | 133:d4dda5c437f0 | 447 | * @} |
mbed_official | 133:d4dda5c437f0 | 448 | */ |
mbed_official | 133:d4dda5c437f0 | 449 | |
mbed_official | 133:d4dda5c437f0 | 450 | #ifdef __cplusplus |
mbed_official | 133:d4dda5c437f0 | 451 | } |
mbed_official | 133:d4dda5c437f0 | 452 | #endif |
mbed_official | 133:d4dda5c437f0 | 453 | |
mbed_official | 133:d4dda5c437f0 | 454 | #endif /* __STM32F4xx_HAL_USART_H */ |
mbed_official | 133:d4dda5c437f0 | 455 | |
mbed_official | 133:d4dda5c437f0 | 456 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |