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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_tim_ex.h@242:7074e42da0b2, 2014-06-27 (annotated)

Committer:
mbed_official
Date:
Fri Jun 27 07:30:09 2014 +0100
Revision:
242:7074e42da0b2
Parent:
133:d4dda5c437f0 
Synchronized with git revision 124ef5e3add9e74a3221347a3fbeea7c8b3cf353



Full URL: https://github.com/mbedmicro/mbed/commit/124ef5e3add9e74a3221347a3fbeea7c8b3cf353/



[DISCO_F407VG] HAL update.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_tim_ex.h
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief Header file of TIM HAL Extension module.
mbed_official 133:d4dda5c437f0 8 ******************************************************************************
mbed_official 133:d4dda5c437f0 9 * @attention
mbed_official 133:d4dda5c437f0 10 *
mbed_official 133:d4dda5c437f0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 12 *
mbed_official 133:d4dda5c437f0 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 14 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 16 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 19 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 21 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 22 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 23 *
mbed_official 133:d4dda5c437f0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 34 *
mbed_official 133:d4dda5c437f0 35 ******************************************************************************
mbed_official 133:d4dda5c437f0 36 */
mbed_official 133:d4dda5c437f0 37
mbed_official 133:d4dda5c437f0 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 133:d4dda5c437f0 39 #ifndef __STM32F4xx_HAL_TIM_EX_H
mbed_official 133:d4dda5c437f0 40 #define __STM32F4xx_HAL_TIM_EX_H
mbed_official 133:d4dda5c437f0 41
mbed_official 133:d4dda5c437f0 42 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 43 extern "C" {
mbed_official 133:d4dda5c437f0 44 #endif
mbed_official 133:d4dda5c437f0 45
mbed_official 133:d4dda5c437f0 46 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 47 #include "stm32f4xx_hal_def.h"
mbed_official 133:d4dda5c437f0 48
mbed_official 133:d4dda5c437f0 49 /** @addtogroup STM32F4xx_HAL
mbed_official 133:d4dda5c437f0 50 * @{
mbed_official 133:d4dda5c437f0 51 */
mbed_official 133:d4dda5c437f0 52
mbed_official 133:d4dda5c437f0 53 /** @addtogroup TIMEx
mbed_official 133:d4dda5c437f0 54 * @{
mbed_official 133:d4dda5c437f0 55 */
mbed_official 133:d4dda5c437f0 56
mbed_official 133:d4dda5c437f0 57 /* Exported types ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 58
mbed_official 133:d4dda5c437f0 59 /**
mbed_official 133:d4dda5c437f0 60 * @brief TIM Hall sensor Configuration Structure definition
mbed_official 133:d4dda5c437f0 61 */
mbed_official 133:d4dda5c437f0 62
mbed_official 133:d4dda5c437f0 63 typedef struct
mbed_official 133:d4dda5c437f0 64 {
mbed_official 133:d4dda5c437f0 65
mbed_official 133:d4dda5c437f0 66 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
mbed_official 133:d4dda5c437f0 67 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
mbed_official 133:d4dda5c437f0 68
mbed_official 133:d4dda5c437f0 69 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
mbed_official 133:d4dda5c437f0 70 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
mbed_official 133:d4dda5c437f0 71
mbed_official 133:d4dda5c437f0 72 uint32_t IC1Filter; /*!< Specifies the input capture filter.
mbed_official 133:d4dda5c437f0 73 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
mbed_official 133:d4dda5c437f0 74 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
mbed_official 133:d4dda5c437f0 75 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
mbed_official 133:d4dda5c437f0 76 } TIM_HallSensor_InitTypeDef;
mbed_official 133:d4dda5c437f0 77
mbed_official 133:d4dda5c437f0 78 /**
mbed_official 133:d4dda5c437f0 79 * @brief TIM Master configuration Structure definition
mbed_official 133:d4dda5c437f0 80 */
mbed_official 133:d4dda5c437f0 81 typedef struct {
mbed_official 242:7074e42da0b2 82 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection.
mbed_official 242:7074e42da0b2 83 This parameter can be a value of @ref TIMEx_Master_Mode_Selection */
mbed_official 242:7074e42da0b2 84 uint32_t MasterSlaveMode; /*!< Master/slave mode selection.
mbed_official 242:7074e42da0b2 85 This parameter can be a value of @ref TIMEx_Master_Slave_Mode */
mbed_official 133:d4dda5c437f0 86 }TIM_MasterConfigTypeDef;
mbed_official 133:d4dda5c437f0 87
mbed_official 133:d4dda5c437f0 88 /**
mbed_official 133:d4dda5c437f0 89 * @brief TIM Break and Dead time configuration Structure definition
mbed_official 133:d4dda5c437f0 90 */
mbed_official 133:d4dda5c437f0 91 typedef struct
mbed_official 133:d4dda5c437f0 92 {
mbed_official 242:7074e42da0b2 93 uint32_t OffStateRunMode; /*!< TIM off state in run mode.
mbed_official 242:7074e42da0b2 94 This parameter can be a value of @ref TIMEx_OSSR_Off_State_Selection_for_Run_mode_state */
mbed_official 242:7074e42da0b2 95 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode.
mbed_official 242:7074e42da0b2 96 This parameter can be a value of @ref TIMEx_OSSI_Off_State_Selection_for_Idle_mode_state */
mbed_official 242:7074e42da0b2 97 uint32_t LockLevel; /*!< TIM Lock level.
mbed_official 242:7074e42da0b2 98 This parameter can be a value of @ref TIMEx_Lock_level */
mbed_official 242:7074e42da0b2 99 uint32_t DeadTime; /*!< TIM dead Time.
mbed_official 133:d4dda5c437f0 100 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
mbed_official 242:7074e42da0b2 101 uint32_t BreakState; /*!< TIM Break State.
mbed_official 242:7074e42da0b2 102 This parameter can be a value of @ref TIMEx_Break_Input_enable_disable */
mbed_official 242:7074e42da0b2 103 uint32_t BreakPolarity; /*!< TIM Break input polarity.
mbed_official 242:7074e42da0b2 104 This parameter can be a value of @ref TIMEx_Break_Polarity */
mbed_official 242:7074e42da0b2 105 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state.
mbed_official 242:7074e42da0b2 106 This parameter can be a value of @ref TIMEx_AOE_Bit_Set_Reset */
mbed_official 133:d4dda5c437f0 107 }TIM_BreakDeadTimeConfigTypeDef;
mbed_official 133:d4dda5c437f0 108
mbed_official 133:d4dda5c437f0 109 /* Exported constants --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 110 /** @defgroup TIMEx_Exported_Constants
mbed_official 133:d4dda5c437f0 111 * @{
mbed_official 133:d4dda5c437f0 112 */
mbed_official 242:7074e42da0b2 113 /** @defgroup TIMEx_OSSR_Off_State_Selection_for_Run_mode_state
mbed_official 242:7074e42da0b2 114 * @{
mbed_official 242:7074e42da0b2 115 */
mbed_official 242:7074e42da0b2 116 #define TIM_OSSR_ENABLE (TIM_BDTR_OSSR)
mbed_official 242:7074e42da0b2 117 #define TIM_OSSR_DISABLE ((uint32_t)0x0000)
mbed_official 133:d4dda5c437f0 118
mbed_official 242:7074e42da0b2 119 #define IS_TIM_OSSR_STATE(STATE) (((STATE) == TIM_OSSR_ENABLE) || \
mbed_official 242:7074e42da0b2 120 ((STATE) == TIM_OSSR_DISABLE))
mbed_official 242:7074e42da0b2 121 /**
mbed_official 242:7074e42da0b2 122 * @}
mbed_official 242:7074e42da0b2 123 */
mbed_official 242:7074e42da0b2 124
mbed_official 242:7074e42da0b2 125 /** @defgroup TIMEx_OSSI_Off_State_Selection_for_Idle_mode_state
mbed_official 242:7074e42da0b2 126 * @{
mbed_official 242:7074e42da0b2 127 */
mbed_official 242:7074e42da0b2 128 #define TIM_OSSI_ENABLE (TIM_BDTR_OSSI)
mbed_official 242:7074e42da0b2 129 #define TIM_OSSI_DISABLE ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 130
mbed_official 242:7074e42da0b2 131 #define IS_TIM_OSSI_STATE(STATE) (((STATE) == TIM_OSSI_ENABLE) || \
mbed_official 242:7074e42da0b2 132 ((STATE) == TIM_OSSI_DISABLE))
mbed_official 242:7074e42da0b2 133 /**
mbed_official 242:7074e42da0b2 134 * @}
mbed_official 242:7074e42da0b2 135 */
mbed_official 242:7074e42da0b2 136 /** @defgroup TIMEx_Lock_level
mbed_official 242:7074e42da0b2 137 * @{
mbed_official 242:7074e42da0b2 138 */
mbed_official 242:7074e42da0b2 139 #define TIM_LOCKLEVEL_OFF ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 140 #define TIM_LOCKLEVEL_1 (TIM_BDTR_LOCK_0)
mbed_official 242:7074e42da0b2 141 #define TIM_LOCKLEVEL_2 (TIM_BDTR_LOCK_1)
mbed_official 242:7074e42da0b2 142 #define TIM_LOCKLEVEL_3 (TIM_BDTR_LOCK)
mbed_official 242:7074e42da0b2 143
mbed_official 242:7074e42da0b2 144 #define IS_TIM_LOCK_LEVEL(LEVEL) (((LEVEL) == TIM_LOCKLEVEL_OFF) || \
mbed_official 242:7074e42da0b2 145 ((LEVEL) == TIM_LOCKLEVEL_1) || \
mbed_official 242:7074e42da0b2 146 ((LEVEL) == TIM_LOCKLEVEL_2) || \
mbed_official 242:7074e42da0b2 147 ((LEVEL) == TIM_LOCKLEVEL_3))
mbed_official 242:7074e42da0b2 148 /**
mbed_official 242:7074e42da0b2 149 * @}
mbed_official 242:7074e42da0b2 150 */
mbed_official 242:7074e42da0b2 151 /** @defgroup TIMEx_Break_Input_enable_disable
mbed_official 242:7074e42da0b2 152 * @{
mbed_official 242:7074e42da0b2 153 */
mbed_official 242:7074e42da0b2 154 #define TIM_BREAK_ENABLE (TIM_BDTR_BKE)
mbed_official 242:7074e42da0b2 155 #define TIM_BREAK_DISABLE ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 156
mbed_official 242:7074e42da0b2 157 #define IS_TIM_BREAK_STATE(STATE) (((STATE) == TIM_BREAK_ENABLE) || \
mbed_official 242:7074e42da0b2 158 ((STATE) == TIM_BREAK_DISABLE))
mbed_official 242:7074e42da0b2 159 /**
mbed_official 242:7074e42da0b2 160 * @}
mbed_official 242:7074e42da0b2 161 */
mbed_official 242:7074e42da0b2 162 /** @defgroup TIMEx_Break_Polarity
mbed_official 242:7074e42da0b2 163 * @{
mbed_official 242:7074e42da0b2 164 */
mbed_official 242:7074e42da0b2 165 #define TIM_BREAKPOLARITY_LOW ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 166 #define TIM_BREAKPOLARITY_HIGH (TIM_BDTR_BKP)
mbed_official 242:7074e42da0b2 167
mbed_official 242:7074e42da0b2 168 #define IS_TIM_BREAK_POLARITY(POLARITY) (((POLARITY) == TIM_BREAKPOLARITY_LOW) || \
mbed_official 242:7074e42da0b2 169 ((POLARITY) == TIM_BREAKPOLARITY_HIGH))
mbed_official 242:7074e42da0b2 170 /**
mbed_official 242:7074e42da0b2 171 * @}
mbed_official 242:7074e42da0b2 172 */
mbed_official 242:7074e42da0b2 173 /** @defgroup TIMEx_AOE_Bit_Set_Reset
mbed_official 242:7074e42da0b2 174 * @{
mbed_official 242:7074e42da0b2 175 */
mbed_official 242:7074e42da0b2 176 #define TIM_AUTOMATICOUTPUT_ENABLE (TIM_BDTR_AOE)
mbed_official 242:7074e42da0b2 177 #define TIM_AUTOMATICOUTPUT_DISABLE ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 178
mbed_official 242:7074e42da0b2 179 #define IS_TIM_AUTOMATIC_OUTPUT_STATE(STATE) (((STATE) == TIM_AUTOMATICOUTPUT_ENABLE) || \
mbed_official 242:7074e42da0b2 180 ((STATE) == TIM_AUTOMATICOUTPUT_DISABLE))
mbed_official 242:7074e42da0b2 181 /**
mbed_official 242:7074e42da0b2 182 * @}
mbed_official 242:7074e42da0b2 183 */
mbed_official 242:7074e42da0b2 184
mbed_official 242:7074e42da0b2 185 /** @defgroup TIMEx_Master_Mode_Selection
mbed_official 242:7074e42da0b2 186 * @{
mbed_official 242:7074e42da0b2 187 */
mbed_official 242:7074e42da0b2 188 #define TIM_TRGO_RESET ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 189 #define TIM_TRGO_ENABLE (TIM_CR2_MMS_0)
mbed_official 242:7074e42da0b2 190 #define TIM_TRGO_UPDATE (TIM_CR2_MMS_1)
mbed_official 242:7074e42da0b2 191 #define TIM_TRGO_OC1 ((TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
mbed_official 242:7074e42da0b2 192 #define TIM_TRGO_OC1REF (TIM_CR2_MMS_2)
mbed_official 242:7074e42da0b2 193 #define TIM_TRGO_OC2REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_0))
mbed_official 242:7074e42da0b2 194 #define TIM_TRGO_OC3REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1))
mbed_official 242:7074e42da0b2 195 #define TIM_TRGO_OC4REF ((TIM_CR2_MMS_2 | TIM_CR2_MMS_1 | TIM_CR2_MMS_0))
mbed_official 242:7074e42da0b2 196
mbed_official 242:7074e42da0b2 197 #define IS_TIM_TRGO_SOURCE(SOURCE) (((SOURCE) == TIM_TRGO_RESET) || \
mbed_official 242:7074e42da0b2 198 ((SOURCE) == TIM_TRGO_ENABLE) || \
mbed_official 242:7074e42da0b2 199 ((SOURCE) == TIM_TRGO_UPDATE) || \
mbed_official 242:7074e42da0b2 200 ((SOURCE) == TIM_TRGO_OC1) || \
mbed_official 242:7074e42da0b2 201 ((SOURCE) == TIM_TRGO_OC1REF) || \
mbed_official 242:7074e42da0b2 202 ((SOURCE) == TIM_TRGO_OC2REF) || \
mbed_official 242:7074e42da0b2 203 ((SOURCE) == TIM_TRGO_OC3REF) || \
mbed_official 242:7074e42da0b2 204 ((SOURCE) == TIM_TRGO_OC4REF))
mbed_official 242:7074e42da0b2 205
mbed_official 242:7074e42da0b2 206
mbed_official 242:7074e42da0b2 207 /**
mbed_official 242:7074e42da0b2 208 * @}
mbed_official 242:7074e42da0b2 209 */
mbed_official 242:7074e42da0b2 210
mbed_official 242:7074e42da0b2 211 /** @defgroup TIMEx_Master_Slave_Mode
mbed_official 242:7074e42da0b2 212 * @{
mbed_official 242:7074e42da0b2 213 */
mbed_official 242:7074e42da0b2 214
mbed_official 242:7074e42da0b2 215 #define TIM_MASTERSLAVEMODE_ENABLE ((uint32_t)0x0080)
mbed_official 242:7074e42da0b2 216 #define TIM_MASTERSLAVEMODE_DISABLE ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 217 #define IS_TIM_MSM_STATE(STATE) (((STATE) == TIM_MASTERSLAVEMODE_ENABLE) || \
mbed_official 242:7074e42da0b2 218 ((STATE) == TIM_MASTERSLAVEMODE_DISABLE))
mbed_official 242:7074e42da0b2 219 /**
mbed_official 242:7074e42da0b2 220 * @}
mbed_official 242:7074e42da0b2 221 */
mbed_official 242:7074e42da0b2 222
mbed_official 242:7074e42da0b2 223 /** @defgroup TIMEx_Commutation_Mode
mbed_official 242:7074e42da0b2 224 * @{
mbed_official 242:7074e42da0b2 225 */
mbed_official 242:7074e42da0b2 226 #define TIM_COMMUTATION_TRGI (TIM_CR2_CCUS)
mbed_official 242:7074e42da0b2 227 #define TIM_COMMUTATION_SOFTWARE ((uint32_t)0x0000)
mbed_official 242:7074e42da0b2 228 /**
mbed_official 242:7074e42da0b2 229 * @}
mbed_official 242:7074e42da0b2 230 */
mbed_official 242:7074e42da0b2 231
mbed_official 133:d4dda5c437f0 232 /** @defgroup TIMEx_Remap
mbed_official 133:d4dda5c437f0 233 * @{
mbed_official 133:d4dda5c437f0 234 */
mbed_official 133:d4dda5c437f0 235
mbed_official 133:d4dda5c437f0 236 #define TIM_TIM2_TIM8_TRGO (0x00000000)
mbed_official 133:d4dda5c437f0 237 #define TIM_TIM2_ETH_PTP (0x00000400)
mbed_official 133:d4dda5c437f0 238 #define TIM_TIM2_USBFS_SOF (0x00000800)
mbed_official 133:d4dda5c437f0 239 #define TIM_TIM2_USBHS_SOF (0x00000C00)
mbed_official 133:d4dda5c437f0 240 #define TIM_TIM5_GPIO (0x00000000)
mbed_official 133:d4dda5c437f0 241 #define TIM_TIM5_LSI (0x00000040)
mbed_official 133:d4dda5c437f0 242 #define TIM_TIM5_LSE (0x00000080)
mbed_official 133:d4dda5c437f0 243 #define TIM_TIM5_RTC (0x000000C0)
mbed_official 133:d4dda5c437f0 244 #define TIM_TIM11_GPIO (0x00000000)
mbed_official 133:d4dda5c437f0 245 #define TIM_TIM11_HSE (0x00000002)
mbed_official 133:d4dda5c437f0 246
mbed_official 133:d4dda5c437f0 247 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM2_TIM8_TRGO)||\
mbed_official 133:d4dda5c437f0 248 ((TIM_REMAP) == TIM_TIM2_ETH_PTP)||\
mbed_official 133:d4dda5c437f0 249 ((TIM_REMAP) == TIM_TIM2_USBFS_SOF)||\
mbed_official 133:d4dda5c437f0 250 ((TIM_REMAP) == TIM_TIM2_USBHS_SOF)||\
mbed_official 133:d4dda5c437f0 251 ((TIM_REMAP) == TIM_TIM5_GPIO)||\
mbed_official 133:d4dda5c437f0 252 ((TIM_REMAP) == TIM_TIM5_LSI)||\
mbed_official 133:d4dda5c437f0 253 ((TIM_REMAP) == TIM_TIM5_LSE)||\
mbed_official 133:d4dda5c437f0 254 ((TIM_REMAP) == TIM_TIM5_RTC)||\
mbed_official 133:d4dda5c437f0 255 ((TIM_REMAP) == TIM_TIM11_GPIO)||\
mbed_official 133:d4dda5c437f0 256 ((TIM_REMAP) == TIM_TIM11_HSE))
mbed_official 133:d4dda5c437f0 257
mbed_official 133:d4dda5c437f0 258 /**
mbed_official 133:d4dda5c437f0 259 * @}
mbed_official 133:d4dda5c437f0 260 */
mbed_official 133:d4dda5c437f0 261
mbed_official 133:d4dda5c437f0 262 /**
mbed_official 133:d4dda5c437f0 263 * @}
mbed_official 133:d4dda5c437f0 264 */
mbed_official 133:d4dda5c437f0 265
mbed_official 133:d4dda5c437f0 266 /* Exported macro ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 267
mbed_official 133:d4dda5c437f0 268 /* Exported functions --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 269
mbed_official 133:d4dda5c437f0 270 /* Timer Hall Sensor functions **********************************************/
mbed_official 133:d4dda5c437f0 271 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef* htim, TIM_HallSensor_InitTypeDef* sConfig);
mbed_official 133:d4dda5c437f0 272 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 273
mbed_official 133:d4dda5c437f0 274 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 275 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 276
mbed_official 133:d4dda5c437f0 277 /* Blocking mode: Polling */
mbed_official 133:d4dda5c437f0 278 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 279 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 280 /* Non-Blocking mode: Interrupt */
mbed_official 133:d4dda5c437f0 281 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 282 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 283 /* Non-Blocking mode: DMA */
mbed_official 133:d4dda5c437f0 284 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef* htim, uint32_t *pData, uint16_t Length);
mbed_official 133:d4dda5c437f0 285 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 286
mbed_official 133:d4dda5c437f0 287 /* Timer Complementary Output Compare functions *****************************/
mbed_official 133:d4dda5c437f0 288 /* Blocking mode: Polling */
mbed_official 133:d4dda5c437f0 289 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 290 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 291
mbed_official 133:d4dda5c437f0 292 /* Non-Blocking mode: Interrupt */
mbed_official 133:d4dda5c437f0 293 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 294 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 295
mbed_official 133:d4dda5c437f0 296 /* Non-Blocking mode: DMA */
mbed_official 133:d4dda5c437f0 297 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
mbed_official 133:d4dda5c437f0 298 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 299
mbed_official 133:d4dda5c437f0 300 /* Timer Complementary PWM functions ****************************************/
mbed_official 133:d4dda5c437f0 301 /* Blocking mode: Polling */
mbed_official 133:d4dda5c437f0 302 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 303 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 304
mbed_official 133:d4dda5c437f0 305 /* Non-Blocking mode: Interrupt */
mbed_official 133:d4dda5c437f0 306 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 307 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 308 /* Non-Blocking mode: DMA */
mbed_official 133:d4dda5c437f0 309 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef* htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
mbed_official 133:d4dda5c437f0 310 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef* htim, uint32_t Channel);
mbed_official 133:d4dda5c437f0 311
mbed_official 133:d4dda5c437f0 312 /* Timer Complementary One Pulse functions **********************************/
mbed_official 133:d4dda5c437f0 313 /* Blocking mode: Polling */
mbed_official 133:d4dda5c437f0 314 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
mbed_official 133:d4dda5c437f0 315 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
mbed_official 133:d4dda5c437f0 316
mbed_official 133:d4dda5c437f0 317 /* Non-Blocking mode: Interrupt */
mbed_official 133:d4dda5c437f0 318 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
mbed_official 133:d4dda5c437f0 319 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef* htim, uint32_t OutputChannel);
mbed_official 133:d4dda5c437f0 320
mbed_official 133:d4dda5c437f0 321 /* Extnsion Control functions ************************************************/
mbed_official 133:d4dda5c437f0 322 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
mbed_official 133:d4dda5c437f0 323 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
mbed_official 133:d4dda5c437f0 324 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef* htim, uint32_t InputTrigger, uint32_t CommutationSource);
mbed_official 133:d4dda5c437f0 325 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef* htim, TIM_MasterConfigTypeDef * sMasterConfig);
mbed_official 133:d4dda5c437f0 326 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef* htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
mbed_official 133:d4dda5c437f0 327 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef* htim, uint32_t Remap);
mbed_official 133:d4dda5c437f0 328
mbed_official 133:d4dda5c437f0 329 /* Extension Callback *********************************************************/
mbed_official 133:d4dda5c437f0 330 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 331 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 332 void HAL_TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 333
mbed_official 133:d4dda5c437f0 334 /* Extension Peripheral State functions **************************************/
mbed_official 133:d4dda5c437f0 335 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef* htim);
mbed_official 133:d4dda5c437f0 336
mbed_official 133:d4dda5c437f0 337 /**
mbed_official 133:d4dda5c437f0 338 * @}
mbed_official 133:d4dda5c437f0 339 */
mbed_official 133:d4dda5c437f0 340
mbed_official 133:d4dda5c437f0 341 /**
mbed_official 133:d4dda5c437f0 342 * @}
mbed_official 133:d4dda5c437f0 343 */
mbed_official 133:d4dda5c437f0 344
mbed_official 133:d4dda5c437f0 345 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 346 }
mbed_official 133:d4dda5c437f0 347 #endif
mbed_official 133:d4dda5c437f0 348
mbed_official 133:d4dda5c437f0 349 #endif /* __STM32F4xx_HAL_TIM_EX_H */
mbed_official 133:d4dda5c437f0 350
mbed_official 133:d4dda5c437f0 351 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/