Sigve Sebastian Farstad / mbed-src

mbed w/ spi bug fig

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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_sram.h@242:7074e42da0b2, 2014-06-27 (annotated)

Committer:
mbed_official
Date:
Fri Jun 27 07:30:09 2014 +0100
Revision:
242:7074e42da0b2
Parent:
133:d4dda5c437f0 
Synchronized with git revision 124ef5e3add9e74a3221347a3fbeea7c8b3cf353



Full URL: https://github.com/mbedmicro/mbed/commit/124ef5e3add9e74a3221347a3fbeea7c8b3cf353/



[DISCO_F407VG] HAL update.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_sram.h
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief Header file of SRAM HAL module.
mbed_official 133:d4dda5c437f0 8 ******************************************************************************
mbed_official 133:d4dda5c437f0 9 * @attention
mbed_official 133:d4dda5c437f0 10 *
mbed_official 133:d4dda5c437f0 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 12 *
mbed_official 133:d4dda5c437f0 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 14 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 16 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 19 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 21 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 22 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 23 *
mbed_official 133:d4dda5c437f0 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 34 *
mbed_official 133:d4dda5c437f0 35 ******************************************************************************
mbed_official 133:d4dda5c437f0 36 */
mbed_official 133:d4dda5c437f0 37
mbed_official 133:d4dda5c437f0 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 133:d4dda5c437f0 39 #ifndef __STM32F4xx_HAL_SRAM_H
mbed_official 133:d4dda5c437f0 40 #define __STM32F4xx_HAL_SRAM_H
mbed_official 133:d4dda5c437f0 41
mbed_official 133:d4dda5c437f0 42 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 43 extern "C" {
mbed_official 133:d4dda5c437f0 44 #endif
mbed_official 133:d4dda5c437f0 45
mbed_official 133:d4dda5c437f0 46 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 47 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx)|| defined(STM32F417xx)
mbed_official 133:d4dda5c437f0 48 #include "stm32f4xx_ll_fsmc.h"
mbed_official 133:d4dda5c437f0 49 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */
mbed_official 133:d4dda5c437f0 50
mbed_official 133:d4dda5c437f0 51 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 52 #include "stm32f4xx_ll_fmc.h"
mbed_official 133:d4dda5c437f0 53 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 54
mbed_official 133:d4dda5c437f0 55
mbed_official 133:d4dda5c437f0 56 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 57 * @{
mbed_official 133:d4dda5c437f0 58 */
mbed_official 133:d4dda5c437f0 59
mbed_official 133:d4dda5c437f0 60 /** @addtogroup SRAM
mbed_official 133:d4dda5c437f0 61 * @{
mbed_official 133:d4dda5c437f0 62 */
mbed_official 133:d4dda5c437f0 63
mbed_official 133:d4dda5c437f0 64 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 65
mbed_official 133:d4dda5c437f0 66 /* Exported typedef ----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 67
mbed_official 133:d4dda5c437f0 68 /**
mbed_official 133:d4dda5c437f0 69 * @brief HAL SRAM State structures definition
mbed_official 133:d4dda5c437f0 70 */
mbed_official 133:d4dda5c437f0 71 typedef enum
mbed_official 133:d4dda5c437f0 72 {
mbed_official 133:d4dda5c437f0 73 HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */
mbed_official 133:d4dda5c437f0 74 HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */
mbed_official 133:d4dda5c437f0 75 HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */
mbed_official 133:d4dda5c437f0 76 HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
mbed_official 133:d4dda5c437f0 77 HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */
mbed_official 133:d4dda5c437f0 78
mbed_official 133:d4dda5c437f0 79 }HAL_SRAM_StateTypeDef;
mbed_official 133:d4dda5c437f0 80
mbed_official 133:d4dda5c437f0 81 /**
mbed_official 133:d4dda5c437f0 82 * @brief SRAM handle Structure definition
mbed_official 133:d4dda5c437f0 83 */
mbed_official 133:d4dda5c437f0 84 typedef struct
mbed_official 133:d4dda5c437f0 85 {
mbed_official 133:d4dda5c437f0 86 FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
mbed_official 133:d4dda5c437f0 87
mbed_official 133:d4dda5c437f0 88 FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
mbed_official 133:d4dda5c437f0 89
mbed_official 133:d4dda5c437f0 90 FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
mbed_official 133:d4dda5c437f0 91
mbed_official 133:d4dda5c437f0 92 HAL_LockTypeDef Lock; /*!< SRAM locking object */
mbed_official 133:d4dda5c437f0 93
mbed_official 133:d4dda5c437f0 94 __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
mbed_official 133:d4dda5c437f0 95
mbed_official 133:d4dda5c437f0 96 DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 }SRAM_HandleTypeDef;
mbed_official 133:d4dda5c437f0 99
mbed_official 242:7074e42da0b2 100 /* Exported constants --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 101 /* Exported macro ------------------------------------------------------------*/
mbed_official 242:7074e42da0b2 102
mbed_official 242:7074e42da0b2 103 /** @brief Reset SRAM handle state
mbed_official 242:7074e42da0b2 104 * @param __HANDLE__: SRAM handle
mbed_official 242:7074e42da0b2 105 * @retval None
mbed_official 242:7074e42da0b2 106 */
mbed_official 242:7074e42da0b2 107 #define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
mbed_official 242:7074e42da0b2 108
mbed_official 133:d4dda5c437f0 109 /* Exported functions --------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 110
mbed_official 133:d4dda5c437f0 111 /* Initialization/de-initialization functions **********************************/
mbed_official 133:d4dda5c437f0 112 HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
mbed_official 133:d4dda5c437f0 113 HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
mbed_official 133:d4dda5c437f0 114 void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
mbed_official 133:d4dda5c437f0 115 void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
mbed_official 133:d4dda5c437f0 116
mbed_official 133:d4dda5c437f0 117 /* I/O operation functions *****************************************************/
mbed_official 133:d4dda5c437f0 118 HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 119 HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 120 HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 121 HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 122 HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 123 HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 124 HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 125 HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
mbed_official 133:d4dda5c437f0 126
mbed_official 133:d4dda5c437f0 127 void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 128 void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 129
mbed_official 133:d4dda5c437f0 130 /* SRAM Control functions ******************************************************/
mbed_official 133:d4dda5c437f0 131 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
mbed_official 133:d4dda5c437f0 132 HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
mbed_official 133:d4dda5c437f0 133
mbed_official 133:d4dda5c437f0 134 /* SRAM State functions *********************************************************/
mbed_official 133:d4dda5c437f0 135 HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
mbed_official 133:d4dda5c437f0 136
mbed_official 133:d4dda5c437f0 137 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 138 /**
mbed_official 133:d4dda5c437f0 139 * @}
mbed_official 133:d4dda5c437f0 140 */
mbed_official 133:d4dda5c437f0 141
mbed_official 133:d4dda5c437f0 142 /**
mbed_official 133:d4dda5c437f0 143 * @}
mbed_official 133:d4dda5c437f0 144 */
mbed_official 133:d4dda5c437f0 145
mbed_official 133:d4dda5c437f0 146 #ifdef __cplusplus
mbed_official 133:d4dda5c437f0 147 }
mbed_official 133:d4dda5c437f0 148 #endif
mbed_official 133:d4dda5c437f0 149
mbed_official 133:d4dda5c437f0 150 #endif /* __STM32F4xx_HAL_SRAM_H */
mbed_official 133:d4dda5c437f0 151
mbed_official 133:d4dda5c437f0 152 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/