mbed w/ spi bug fig
Fork of mbed-src by
targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_iwdg.h@242:7074e42da0b2, 2014-06-27 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jun 27 07:30:09 2014 +0100
- Revision:
- 242:7074e42da0b2
- Parent:
- 133:d4dda5c437f0
Synchronized with git revision 124ef5e3add9e74a3221347a3fbeea7c8b3cf353
Full URL: https://github.com/mbedmicro/mbed/commit/124ef5e3add9e74a3221347a3fbeea7c8b3cf353/
[DISCO_F407VG] HAL update.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
mbed_official | 133:d4dda5c437f0 | 1 | /** |
mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_iwdg.h |
mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
mbed_official | 242:7074e42da0b2 | 5 | * @version V1.1.0RC2 |
mbed_official | 242:7074e42da0b2 | 6 | * @date 14-May-2014 |
mbed_official | 133:d4dda5c437f0 | 7 | * @brief Header file of IWDG HAL module. |
mbed_official | 133:d4dda5c437f0 | 8 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 9 | * @attention |
mbed_official | 133:d4dda5c437f0 | 10 | * |
mbed_official | 133:d4dda5c437f0 | 11 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
mbed_official | 133:d4dda5c437f0 | 12 | * |
mbed_official | 133:d4dda5c437f0 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
mbed_official | 133:d4dda5c437f0 | 14 | * are permitted provided that the following conditions are met: |
mbed_official | 133:d4dda5c437f0 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 16 | * this list of conditions and the following disclaimer. |
mbed_official | 133:d4dda5c437f0 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
mbed_official | 133:d4dda5c437f0 | 18 | * this list of conditions and the following disclaimer in the documentation |
mbed_official | 133:d4dda5c437f0 | 19 | * and/or other materials provided with the distribution. |
mbed_official | 133:d4dda5c437f0 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
mbed_official | 133:d4dda5c437f0 | 21 | * may be used to endorse or promote products derived from this software |
mbed_official | 133:d4dda5c437f0 | 22 | * without specific prior written permission. |
mbed_official | 133:d4dda5c437f0 | 23 | * |
mbed_official | 133:d4dda5c437f0 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
mbed_official | 133:d4dda5c437f0 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
mbed_official | 133:d4dda5c437f0 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
mbed_official | 133:d4dda5c437f0 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
mbed_official | 133:d4dda5c437f0 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
mbed_official | 133:d4dda5c437f0 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
mbed_official | 133:d4dda5c437f0 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
mbed_official | 133:d4dda5c437f0 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
mbed_official | 133:d4dda5c437f0 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
mbed_official | 133:d4dda5c437f0 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
mbed_official | 133:d4dda5c437f0 | 34 | * |
mbed_official | 133:d4dda5c437f0 | 35 | ****************************************************************************** |
mbed_official | 133:d4dda5c437f0 | 36 | */ |
mbed_official | 133:d4dda5c437f0 | 37 | |
mbed_official | 133:d4dda5c437f0 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 39 | #ifndef __STM32F4xx_HAL_IWDG_H |
mbed_official | 133:d4dda5c437f0 | 40 | #define __STM32F4xx_HAL_IWDG_H |
mbed_official | 133:d4dda5c437f0 | 41 | |
mbed_official | 133:d4dda5c437f0 | 42 | #ifdef __cplusplus |
mbed_official | 133:d4dda5c437f0 | 43 | extern "C" { |
mbed_official | 133:d4dda5c437f0 | 44 | #endif |
mbed_official | 133:d4dda5c437f0 | 45 | |
mbed_official | 133:d4dda5c437f0 | 46 | /* Includes ------------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 47 | #include "stm32f4xx_hal_def.h" |
mbed_official | 133:d4dda5c437f0 | 48 | |
mbed_official | 133:d4dda5c437f0 | 49 | /** @addtogroup STM32F4xx_HAL_Driver |
mbed_official | 133:d4dda5c437f0 | 50 | * @{ |
mbed_official | 133:d4dda5c437f0 | 51 | */ |
mbed_official | 133:d4dda5c437f0 | 52 | |
mbed_official | 133:d4dda5c437f0 | 53 | /** @addtogroup IWDG |
mbed_official | 133:d4dda5c437f0 | 54 | * @{ |
mbed_official | 133:d4dda5c437f0 | 55 | */ |
mbed_official | 133:d4dda5c437f0 | 56 | |
mbed_official | 133:d4dda5c437f0 | 57 | /* Exported types ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 58 | |
mbed_official | 133:d4dda5c437f0 | 59 | /** |
mbed_official | 133:d4dda5c437f0 | 60 | * @brief IWDG HAL State Structure definition |
mbed_official | 133:d4dda5c437f0 | 61 | */ |
mbed_official | 133:d4dda5c437f0 | 62 | typedef enum |
mbed_official | 133:d4dda5c437f0 | 63 | { |
mbed_official | 133:d4dda5c437f0 | 64 | HAL_IWDG_STATE_RESET = 0x00, /*!< IWDG not yet initialized or disabled */ |
mbed_official | 133:d4dda5c437f0 | 65 | HAL_IWDG_STATE_READY = 0x01, /*!< IWDG initialized and ready for use */ |
mbed_official | 133:d4dda5c437f0 | 66 | HAL_IWDG_STATE_BUSY = 0x02, /*!< IWDG internal process is ongoing */ |
mbed_official | 133:d4dda5c437f0 | 67 | HAL_IWDG_STATE_TIMEOUT = 0x03, /*!< IWDG timeout state */ |
mbed_official | 133:d4dda5c437f0 | 68 | HAL_IWDG_STATE_ERROR = 0x04 /*!< IWDG error state */ |
mbed_official | 133:d4dda5c437f0 | 69 | |
mbed_official | 133:d4dda5c437f0 | 70 | }HAL_IWDG_StateTypeDef; |
mbed_official | 133:d4dda5c437f0 | 71 | |
mbed_official | 133:d4dda5c437f0 | 72 | /** |
mbed_official | 133:d4dda5c437f0 | 73 | * @brief IWDG Init structure definition |
mbed_official | 133:d4dda5c437f0 | 74 | */ |
mbed_official | 133:d4dda5c437f0 | 75 | typedef struct |
mbed_official | 133:d4dda5c437f0 | 76 | { |
mbed_official | 133:d4dda5c437f0 | 77 | uint32_t Prescaler; /*!< Select the prescaler of the IWDG. |
mbed_official | 133:d4dda5c437f0 | 78 | This parameter can be a value of @ref IWDG_Prescaler */ |
mbed_official | 133:d4dda5c437f0 | 79 | |
mbed_official | 133:d4dda5c437f0 | 80 | uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. |
mbed_official | 133:d4dda5c437f0 | 81 | This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ |
mbed_official | 133:d4dda5c437f0 | 82 | |
mbed_official | 133:d4dda5c437f0 | 83 | }IWDG_InitTypeDef; |
mbed_official | 133:d4dda5c437f0 | 84 | |
mbed_official | 133:d4dda5c437f0 | 85 | /** |
mbed_official | 133:d4dda5c437f0 | 86 | * @brief IWDG handle Structure definition |
mbed_official | 133:d4dda5c437f0 | 87 | */ |
mbed_official | 133:d4dda5c437f0 | 88 | typedef struct |
mbed_official | 133:d4dda5c437f0 | 89 | { |
mbed_official | 133:d4dda5c437f0 | 90 | IWDG_TypeDef *Instance; /*!< Register base address */ |
mbed_official | 133:d4dda5c437f0 | 91 | |
mbed_official | 133:d4dda5c437f0 | 92 | IWDG_InitTypeDef Init; /*!< IWDG required parameters */ |
mbed_official | 133:d4dda5c437f0 | 93 | |
mbed_official | 133:d4dda5c437f0 | 94 | HAL_LockTypeDef Lock; /*!< IWDG locking object */ |
mbed_official | 133:d4dda5c437f0 | 95 | |
mbed_official | 133:d4dda5c437f0 | 96 | __IO HAL_IWDG_StateTypeDef State; /*!< IWDG communication state */ |
mbed_official | 133:d4dda5c437f0 | 97 | |
mbed_official | 133:d4dda5c437f0 | 98 | }IWDG_HandleTypeDef; |
mbed_official | 133:d4dda5c437f0 | 99 | |
mbed_official | 133:d4dda5c437f0 | 100 | /* Exported constants --------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 101 | /** @defgroup IWDG_Exported_Constants |
mbed_official | 133:d4dda5c437f0 | 102 | * @{ |
mbed_official | 133:d4dda5c437f0 | 103 | */ |
mbed_official | 133:d4dda5c437f0 | 104 | |
mbed_official | 133:d4dda5c437f0 | 105 | /** @defgroup IWDG_Registers_BitMask |
mbed_official | 133:d4dda5c437f0 | 106 | * @{ |
mbed_official | 133:d4dda5c437f0 | 107 | */ |
mbed_official | 133:d4dda5c437f0 | 108 | /* --- KR Register ---*/ |
mbed_official | 133:d4dda5c437f0 | 109 | /* KR register bit mask */ |
mbed_official | 133:d4dda5c437f0 | 110 | #define KR_KEY_RELOAD ((uint32_t)0xAAAA) /*!< IWDG reload counter enable */ |
mbed_official | 133:d4dda5c437f0 | 111 | #define KR_KEY_ENABLE ((uint32_t)0xCCCC) /*!< IWDG peripheral enable */ |
mbed_official | 133:d4dda5c437f0 | 112 | #define KR_KEY_EWA ((uint32_t)0x5555) /*!< IWDG KR write Access enable */ |
mbed_official | 133:d4dda5c437f0 | 113 | #define KR_KEY_DWA ((uint32_t)0x0000) /*!< IWDG KR write Access disable */ |
mbed_official | 133:d4dda5c437f0 | 114 | |
mbed_official | 133:d4dda5c437f0 | 115 | /** |
mbed_official | 133:d4dda5c437f0 | 116 | * @} |
mbed_official | 133:d4dda5c437f0 | 117 | */ |
mbed_official | 133:d4dda5c437f0 | 118 | |
mbed_official | 133:d4dda5c437f0 | 119 | /** @defgroup IWDG_Flag_definition |
mbed_official | 133:d4dda5c437f0 | 120 | * @{ |
mbed_official | 133:d4dda5c437f0 | 121 | */ |
mbed_official | 133:d4dda5c437f0 | 122 | #define IWDG_FLAG_PVU ((uint32_t)0x0001) /*!< Watchdog counter prescaler value update flag */ |
mbed_official | 133:d4dda5c437f0 | 123 | #define IWDG_FLAG_RVU ((uint32_t)0x0002) /*!< Watchdog counter reload value update flag */ |
mbed_official | 133:d4dda5c437f0 | 124 | |
mbed_official | 133:d4dda5c437f0 | 125 | #define IS_IWDG_FLAG(FLAG) (((FLAG) == IWDG_FLAG_PVU) || \ |
mbed_official | 133:d4dda5c437f0 | 126 | ((FLAG) == IWDG_FLAG_RVU)) |
mbed_official | 133:d4dda5c437f0 | 127 | |
mbed_official | 133:d4dda5c437f0 | 128 | /** |
mbed_official | 133:d4dda5c437f0 | 129 | * @} |
mbed_official | 133:d4dda5c437f0 | 130 | */ |
mbed_official | 133:d4dda5c437f0 | 131 | |
mbed_official | 133:d4dda5c437f0 | 132 | /** @defgroup IWDG_Prescaler |
mbed_official | 133:d4dda5c437f0 | 133 | * @{ |
mbed_official | 133:d4dda5c437f0 | 134 | */ |
mbed_official | 133:d4dda5c437f0 | 135 | #define IWDG_PRESCALER_4 ((uint8_t)0x00) /*!< IWDG prescaler set to 4 */ |
mbed_official | 133:d4dda5c437f0 | 136 | #define IWDG_PRESCALER_8 ((uint8_t)0x01) /*!< IWDG prescaler set to 8 */ |
mbed_official | 133:d4dda5c437f0 | 137 | #define IWDG_PRESCALER_16 ((uint8_t)0x02) /*!< IWDG prescaler set to 16 */ |
mbed_official | 133:d4dda5c437f0 | 138 | #define IWDG_PRESCALER_32 ((uint8_t)0x03) /*!< IWDG prescaler set to 32 */ |
mbed_official | 133:d4dda5c437f0 | 139 | #define IWDG_PRESCALER_64 ((uint8_t)0x04) /*!< IWDG prescaler set to 64 */ |
mbed_official | 133:d4dda5c437f0 | 140 | #define IWDG_PRESCALER_128 ((uint8_t)0x05) /*!< IWDG prescaler set to 128 */ |
mbed_official | 133:d4dda5c437f0 | 141 | #define IWDG_PRESCALER_256 ((uint8_t)0x06) /*!< IWDG prescaler set to 256 */ |
mbed_official | 133:d4dda5c437f0 | 142 | |
mbed_official | 133:d4dda5c437f0 | 143 | #define IS_IWDG_PRESCALER(PRESCALER) (((PRESCALER) == IWDG_PRESCALER_4) || \ |
mbed_official | 133:d4dda5c437f0 | 144 | ((PRESCALER) == IWDG_PRESCALER_8) || \ |
mbed_official | 133:d4dda5c437f0 | 145 | ((PRESCALER) == IWDG_PRESCALER_16) || \ |
mbed_official | 133:d4dda5c437f0 | 146 | ((PRESCALER) == IWDG_PRESCALER_32) || \ |
mbed_official | 133:d4dda5c437f0 | 147 | ((PRESCALER) == IWDG_PRESCALER_64) || \ |
mbed_official | 133:d4dda5c437f0 | 148 | ((PRESCALER) == IWDG_PRESCALER_128)|| \ |
mbed_official | 133:d4dda5c437f0 | 149 | ((PRESCALER) == IWDG_PRESCALER_256)) |
mbed_official | 133:d4dda5c437f0 | 150 | |
mbed_official | 133:d4dda5c437f0 | 151 | /** |
mbed_official | 133:d4dda5c437f0 | 152 | * @} |
mbed_official | 133:d4dda5c437f0 | 153 | */ |
mbed_official | 133:d4dda5c437f0 | 154 | |
mbed_official | 133:d4dda5c437f0 | 155 | /** @defgroup IWDG_Reload_Value |
mbed_official | 133:d4dda5c437f0 | 156 | * @{ |
mbed_official | 133:d4dda5c437f0 | 157 | */ |
mbed_official | 133:d4dda5c437f0 | 158 | #define IS_IWDG_RELOAD(RELOAD) ((RELOAD) <= 0xFFF) |
mbed_official | 133:d4dda5c437f0 | 159 | |
mbed_official | 133:d4dda5c437f0 | 160 | /** |
mbed_official | 133:d4dda5c437f0 | 161 | * @} |
mbed_official | 133:d4dda5c437f0 | 162 | */ |
mbed_official | 133:d4dda5c437f0 | 163 | |
mbed_official | 133:d4dda5c437f0 | 164 | /** |
mbed_official | 133:d4dda5c437f0 | 165 | * @} |
mbed_official | 133:d4dda5c437f0 | 166 | */ |
mbed_official | 133:d4dda5c437f0 | 167 | |
mbed_official | 133:d4dda5c437f0 | 168 | /* Exported macro ------------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 169 | |
mbed_official | 242:7074e42da0b2 | 170 | /** @brief Reset IWDG handle state |
mbed_official | 242:7074e42da0b2 | 171 | * @param __HANDLE__: IWDG handle |
mbed_official | 242:7074e42da0b2 | 172 | * @retval None |
mbed_official | 242:7074e42da0b2 | 173 | */ |
mbed_official | 242:7074e42da0b2 | 174 | #define __HAL_IWDG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IWDG_STATE_RESET) |
mbed_official | 242:7074e42da0b2 | 175 | |
mbed_official | 133:d4dda5c437f0 | 176 | /** |
mbed_official | 133:d4dda5c437f0 | 177 | * @brief Enables the IWDG peripheral. |
mbed_official | 133:d4dda5c437f0 | 178 | * @param __HANDLE__: IWDG handle |
mbed_official | 133:d4dda5c437f0 | 179 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 180 | */ |
mbed_official | 133:d4dda5c437f0 | 181 | #define __HAL_IWDG_START(__HANDLE__) ((__HANDLE__)->Instance->KR |= KR_KEY_ENABLE) |
mbed_official | 133:d4dda5c437f0 | 182 | |
mbed_official | 133:d4dda5c437f0 | 183 | /** |
mbed_official | 133:d4dda5c437f0 | 184 | * @brief Reloads IWDG counter with value defined in the reload register |
mbed_official | 133:d4dda5c437f0 | 185 | * (write access to IWDG_PR and IWDG_RLR registers disabled). |
mbed_official | 133:d4dda5c437f0 | 186 | * @param __HANDLE__: IWDG handle |
mbed_official | 133:d4dda5c437f0 | 187 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 188 | */ |
mbed_official | 133:d4dda5c437f0 | 189 | #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_RELOAD) |
mbed_official | 133:d4dda5c437f0 | 190 | |
mbed_official | 133:d4dda5c437f0 | 191 | /** |
mbed_official | 133:d4dda5c437f0 | 192 | * @brief Enables write access to IWDG_PR and IWDG_RLR registers. |
mbed_official | 133:d4dda5c437f0 | 193 | * @param __HANDLE__: IWDG handle |
mbed_official | 133:d4dda5c437f0 | 194 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 195 | */ |
mbed_official | 133:d4dda5c437f0 | 196 | #define __HAL_IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_EWA) |
mbed_official | 133:d4dda5c437f0 | 197 | |
mbed_official | 133:d4dda5c437f0 | 198 | /** |
mbed_official | 133:d4dda5c437f0 | 199 | * @brief Disables write access to IWDG_PR and IWDG_RLR registers. |
mbed_official | 133:d4dda5c437f0 | 200 | * @param __HANDLE__: IWDG handle |
mbed_official | 133:d4dda5c437f0 | 201 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 202 | */ |
mbed_official | 133:d4dda5c437f0 | 203 | #define __HAL_IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) (((__HANDLE__)->Instance->KR) |= KR_KEY_DWA) |
mbed_official | 133:d4dda5c437f0 | 204 | |
mbed_official | 133:d4dda5c437f0 | 205 | /** |
mbed_official | 133:d4dda5c437f0 | 206 | * @brief Gets the selected IWDG's flag status. |
mbed_official | 133:d4dda5c437f0 | 207 | * @param __HANDLE__: IWDG handle |
mbed_official | 133:d4dda5c437f0 | 208 | * @param __FLAG__: specifies the flag to check. |
mbed_official | 133:d4dda5c437f0 | 209 | * This parameter can be one of the following values: |
mbed_official | 133:d4dda5c437f0 | 210 | * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag |
mbed_official | 133:d4dda5c437f0 | 211 | * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag |
mbed_official | 133:d4dda5c437f0 | 212 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
mbed_official | 133:d4dda5c437f0 | 213 | */ |
mbed_official | 133:d4dda5c437f0 | 214 | #define __HAL_IWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) |
mbed_official | 133:d4dda5c437f0 | 215 | |
mbed_official | 133:d4dda5c437f0 | 216 | /** |
mbed_official | 133:d4dda5c437f0 | 217 | * @brief Clears the IWDG's pending flags. |
mbed_official | 133:d4dda5c437f0 | 218 | * @param __HANDLE__: IWDG handle |
mbed_official | 133:d4dda5c437f0 | 219 | * @param __FLAG__: specifies the flag to clear. |
mbed_official | 133:d4dda5c437f0 | 220 | * This parameter can be one of the following values: |
mbed_official | 133:d4dda5c437f0 | 221 | * @arg IWDG_FLAG_PVU: Watchdog counter reload value update flag |
mbed_official | 133:d4dda5c437f0 | 222 | * @arg IWDG_FLAG_RVU: Watchdog counter prescaler value flag |
mbed_official | 133:d4dda5c437f0 | 223 | * @retval None |
mbed_official | 133:d4dda5c437f0 | 224 | */ |
mbed_official | 133:d4dda5c437f0 | 225 | #define __HAL_IWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR &= ~(__FLAG__)) |
mbed_official | 133:d4dda5c437f0 | 226 | |
mbed_official | 133:d4dda5c437f0 | 227 | |
mbed_official | 133:d4dda5c437f0 | 228 | /* Exported functions --------------------------------------------------------*/ |
mbed_official | 133:d4dda5c437f0 | 229 | |
mbed_official | 133:d4dda5c437f0 | 230 | /* Initialization/de-initialization functions ********************************/ |
mbed_official | 133:d4dda5c437f0 | 231 | HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); |
mbed_official | 133:d4dda5c437f0 | 232 | void HAL_IWDG_MspInit(IWDG_HandleTypeDef *hiwdg); |
mbed_official | 133:d4dda5c437f0 | 233 | |
mbed_official | 133:d4dda5c437f0 | 234 | /* I/O operation functions ****************************************************/ |
mbed_official | 133:d4dda5c437f0 | 235 | HAL_StatusTypeDef HAL_IWDG_Start(IWDG_HandleTypeDef *hiwdg); |
mbed_official | 133:d4dda5c437f0 | 236 | HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); |
mbed_official | 133:d4dda5c437f0 | 237 | |
mbed_official | 133:d4dda5c437f0 | 238 | /* Peripheral State functions ************************************************/ |
mbed_official | 133:d4dda5c437f0 | 239 | HAL_IWDG_StateTypeDef HAL_IWDG_GetState(IWDG_HandleTypeDef *hiwdg); |
mbed_official | 133:d4dda5c437f0 | 240 | |
mbed_official | 133:d4dda5c437f0 | 241 | /** |
mbed_official | 133:d4dda5c437f0 | 242 | * @} |
mbed_official | 133:d4dda5c437f0 | 243 | */ |
mbed_official | 133:d4dda5c437f0 | 244 | |
mbed_official | 133:d4dda5c437f0 | 245 | /** |
mbed_official | 133:d4dda5c437f0 | 246 | * @} |
mbed_official | 133:d4dda5c437f0 | 247 | */ |
mbed_official | 133:d4dda5c437f0 | 248 | |
mbed_official | 133:d4dda5c437f0 | 249 | #ifdef __cplusplus |
mbed_official | 133:d4dda5c437f0 | 250 | } |
mbed_official | 133:d4dda5c437f0 | 251 | #endif |
mbed_official | 133:d4dda5c437f0 | 252 | |
mbed_official | 133:d4dda5c437f0 | 253 | #endif /* __STM32F4xx_HAL_IWDG_H */ |
mbed_official | 133:d4dda5c437f0 | 254 | |
mbed_official | 133:d4dda5c437f0 | 255 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |