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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_hash_ex.c@242:7074e42da0b2, 2014-06-27 (annotated)

Committer:
mbed_official
Date:
Fri Jun 27 07:30:09 2014 +0100
Revision:
242:7074e42da0b2
Parent:
133:d4dda5c437f0 
Synchronized with git revision 124ef5e3add9e74a3221347a3fbeea7c8b3cf353



Full URL: https://github.com/mbedmicro/mbed/commit/124ef5e3add9e74a3221347a3fbeea7c8b3cf353/



[DISCO_F407VG] HAL update.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_hash_ex.c
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief HASH HAL Extension module driver.
mbed_official 133:d4dda5c437f0 8 * This file provides firmware functions to manage the following
mbed_official 133:d4dda5c437f0 9 * functionalities of HASH peripheral:
mbed_official 133:d4dda5c437f0 10 * + Extended HASH processing functions based on SHA224 Algorithm
mbed_official 133:d4dda5c437f0 11 * + Extended HASH processing functions based on SHA256 Algorithm
mbed_official 133:d4dda5c437f0 12 *
mbed_official 133:d4dda5c437f0 13 @verbatim
mbed_official 133:d4dda5c437f0 14 ==============================================================================
mbed_official 133:d4dda5c437f0 15 ##### How to use this driver #####
mbed_official 133:d4dda5c437f0 16 ==============================================================================
mbed_official 133:d4dda5c437f0 17 [..]
mbed_official 133:d4dda5c437f0 18 The HASH HAL driver can be used as follows:
mbed_official 133:d4dda5c437f0 19 (#)Initialize the HASH low level resources by implementing the HAL_HASH_MspInit():
mbed_official 133:d4dda5c437f0 20 (##) Enable the HASH interface clock using __HASH_CLK_ENABLE()
mbed_official 133:d4dda5c437f0 21 (##) In case of using processing APIs based on interrupts (e.g. HAL_HMACEx_SHA224_Start())
mbed_official 133:d4dda5c437f0 22 (+++) Configure the HASH interrupt priority using HAL_NVIC_SetPriority()
mbed_official 133:d4dda5c437f0 23 (+++) Enable the HASH IRQ handler using HAL_NVIC_EnableIRQ()
mbed_official 133:d4dda5c437f0 24 (+++) In HASH IRQ handler, call HAL_HASH_IRQHandler()
mbed_official 133:d4dda5c437f0 25 (##) In case of using DMA to control data transfer (e.g. HAL_HMACEx_SH224_Start_DMA())
mbed_official 133:d4dda5c437f0 26 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
mbed_official 133:d4dda5c437f0 27 (+++) Configure and enable one DMA stream one for managing data transfer from
mbed_official 133:d4dda5c437f0 28 memory to peripheral (input stream). Managing data transfer from
mbed_official 133:d4dda5c437f0 29 peripheral to memory can be performed only using CPU
mbed_official 133:d4dda5c437f0 30 (+++) Associate the initialized DMA handle to the HASH DMA handle
mbed_official 133:d4dda5c437f0 31 using __HAL_LINKDMA()
mbed_official 133:d4dda5c437f0 32 (+++) Configure the priority and enable the NVIC for the transfer complete
mbed_official 133:d4dda5c437f0 33 interrupt on the DMA Stream: HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
mbed_official 133:d4dda5c437f0 34 (#)Initialize the HASH HAL using HAL_HASH_Init(). This function configures mainly:
mbed_official 133:d4dda5c437f0 35 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit.
mbed_official 133:d4dda5c437f0 36 (##) For HMAC, the encryption key.
mbed_official 133:d4dda5c437f0 37 (##) For HMAC, the key size used for encryption.
mbed_official 133:d4dda5c437f0 38 (#)Three processing functions are available:
mbed_official 133:d4dda5c437f0 39 (##) Polling mode: processing APIs are blocking functions
mbed_official 133:d4dda5c437f0 40 i.e. they process the data and wait till the digest computation is finished
mbed_official 133:d4dda5c437f0 41 e.g. HAL_HASHEx_SHA224_Start()
mbed_official 133:d4dda5c437f0 42 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
mbed_official 133:d4dda5c437f0 43 i.e. they process the data under interrupt
mbed_official 133:d4dda5c437f0 44 e.g. HAL_HASHEx_SHA224_Start_IT()
mbed_official 133:d4dda5c437f0 45 (##) DMA mode: processing APIs are not blocking functions and the CPU is
mbed_official 133:d4dda5c437f0 46 not used for data transfer i.e. the data transfer is ensured by DMA
mbed_official 133:d4dda5c437f0 47 e.g. HAL_HASHEx_SHA224_Start_DMA()
mbed_official 133:d4dda5c437f0 48 (#)When the processing function is called at first time after HAL_HASH_Init()
mbed_official 133:d4dda5c437f0 49 the HASH peripheral is initialized and processes the buffer in input.
mbed_official 133:d4dda5c437f0 50 After that, the digest computation is started.
mbed_official 133:d4dda5c437f0 51 When processing multi-buffer use the accumulate function to write the
mbed_official 133:d4dda5c437f0 52 data in the peripheral without starting the digest computation. In last
mbed_official 133:d4dda5c437f0 53 buffer use the start function to input the last buffer ans start the digest
mbed_official 133:d4dda5c437f0 54 computation.
mbed_official 133:d4dda5c437f0 55 (##) e.g. HAL_HASHEx_SHA224_Accumulate() : write 1st data buffer in the peripheral without starting the digest computation
mbed_official 133:d4dda5c437f0 56 (##) write (n-1)th data buffer in the peripheral without starting the digest computation
mbed_official 133:d4dda5c437f0 57 (##) HAL_HASHEx_SHA224_Start() : write (n)th data buffer in the peripheral and start the digest computation
mbed_official 133:d4dda5c437f0 58 (#)In HMAC mode, there is no Accumulate API. Only Start API is available.
mbed_official 133:d4dda5c437f0 59 (#)In case of using DMA, call the DMA start processing e.g. HAL_HASHEx_SHA224_Start_DMA().
mbed_official 133:d4dda5c437f0 60 After that, call the finish function in order to get the digest value
mbed_official 133:d4dda5c437f0 61 e.g. HAL_HASHEx_SHA224_Finish()
mbed_official 133:d4dda5c437f0 62 (#)Call HAL_HASH_DeInit() to deinitialize the HASH peripheral.
mbed_official 133:d4dda5c437f0 63
mbed_official 133:d4dda5c437f0 64 @endverbatim
mbed_official 133:d4dda5c437f0 65 ******************************************************************************
mbed_official 133:d4dda5c437f0 66 * @attention
mbed_official 133:d4dda5c437f0 67 *
mbed_official 133:d4dda5c437f0 68 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 69 *
mbed_official 133:d4dda5c437f0 70 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 71 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 72 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 73 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 74 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 75 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 76 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 77 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 78 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 79 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 80 *
mbed_official 133:d4dda5c437f0 81 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 82 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 83 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 84 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 85 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 86 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 87 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 88 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 89 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 90 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 91 *
mbed_official 133:d4dda5c437f0 92 ******************************************************************************
mbed_official 133:d4dda5c437f0 93 */
mbed_official 133:d4dda5c437f0 94
mbed_official 133:d4dda5c437f0 95 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 96 #include "stm32f4xx_hal.h"
mbed_official 133:d4dda5c437f0 97
mbed_official 133:d4dda5c437f0 98 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 99 * @{
mbed_official 133:d4dda5c437f0 100 */
mbed_official 133:d4dda5c437f0 101
mbed_official 133:d4dda5c437f0 102 /** @defgroup HASHEx
mbed_official 133:d4dda5c437f0 103 * @brief HASH Extension HAL module driver.
mbed_official 133:d4dda5c437f0 104 * @{
mbed_official 133:d4dda5c437f0 105 */
mbed_official 133:d4dda5c437f0 106
mbed_official 133:d4dda5c437f0 107 #ifdef HAL_HASH_MODULE_ENABLED
mbed_official 133:d4dda5c437f0 108
mbed_official 133:d4dda5c437f0 109 #if defined(STM32F437xx) || defined(STM32F439xx)
mbed_official 133:d4dda5c437f0 110
mbed_official 133:d4dda5c437f0 111 /* Private typedef -----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 112 /* Private define ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 113 /* Private macro -------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 114 /* Private variables ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 115 /* Private function prototypes -----------------------------------------------*/
mbed_official 133:d4dda5c437f0 116 static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 117 static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size);
mbed_official 133:d4dda5c437f0 118 static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size);
mbed_official 133:d4dda5c437f0 119 static void HASHEx_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 133:d4dda5c437f0 120
mbed_official 133:d4dda5c437f0 121 /* Private functions ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 122
mbed_official 133:d4dda5c437f0 123 /** @defgroup HASHEx_Private_Functions
mbed_official 133:d4dda5c437f0 124 * @{
mbed_official 133:d4dda5c437f0 125 */
mbed_official 133:d4dda5c437f0 126
mbed_official 133:d4dda5c437f0 127 /** @defgroup HASHEx_Group1 HASH processing functions
mbed_official 133:d4dda5c437f0 128 * @brief processing functions using polling mode
mbed_official 133:d4dda5c437f0 129 *
mbed_official 133:d4dda5c437f0 130 @verbatim
mbed_official 133:d4dda5c437f0 131 ===============================================================================
mbed_official 133:d4dda5c437f0 132 ##### HASH processing using polling mode functions #####
mbed_official 133:d4dda5c437f0 133 ===============================================================================
mbed_official 133:d4dda5c437f0 134 [..] This section provides functions allowing to calculate in polling mode
mbed_official 133:d4dda5c437f0 135 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 136 (+) SHA224
mbed_official 133:d4dda5c437f0 137 (+) SHA256
mbed_official 133:d4dda5c437f0 138
mbed_official 133:d4dda5c437f0 139 @endverbatim
mbed_official 133:d4dda5c437f0 140 * @{
mbed_official 133:d4dda5c437f0 141 */
mbed_official 133:d4dda5c437f0 142
mbed_official 133:d4dda5c437f0 143 /**
mbed_official 133:d4dda5c437f0 144 * @brief Initializes the HASH peripheral in SHA224 mode
mbed_official 133:d4dda5c437f0 145 * then processes pInBuffer. The digest is available in pOutBuffer
mbed_official 242:7074e42da0b2 146 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 147 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 148 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 149 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 150 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 151 * @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
mbed_official 133:d4dda5c437f0 152 * @param Timeout: Specify Timeout value
mbed_official 133:d4dda5c437f0 153 * @retval HAL status
mbed_official 133:d4dda5c437f0 154 */
mbed_official 133:d4dda5c437f0 155 HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 156 {
mbed_official 133:d4dda5c437f0 157 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 158
mbed_official 133:d4dda5c437f0 159 /* Process Locked */
mbed_official 133:d4dda5c437f0 160 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 161
mbed_official 133:d4dda5c437f0 162 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 163 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 164
mbed_official 133:d4dda5c437f0 165 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 166 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 167 {
mbed_official 133:d4dda5c437f0 168 /* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 169 the message digest of a new message */
mbed_official 133:d4dda5c437f0 170 HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 171 }
mbed_official 133:d4dda5c437f0 172
mbed_official 133:d4dda5c437f0 173 /* Set the phase */
mbed_official 133:d4dda5c437f0 174 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 175
mbed_official 133:d4dda5c437f0 176 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 177 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 178
mbed_official 133:d4dda5c437f0 179 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 180 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 181
mbed_official 133:d4dda5c437f0 182 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 183 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 184
mbed_official 133:d4dda5c437f0 185 /* Get timeout */
mbed_official 133:d4dda5c437f0 186 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 187
mbed_official 133:d4dda5c437f0 188 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 189 {
mbed_official 133:d4dda5c437f0 190 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 191 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 192 {
mbed_official 133:d4dda5c437f0 193 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 194 {
mbed_official 133:d4dda5c437f0 195 /* Change state */
mbed_official 133:d4dda5c437f0 196 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 197
mbed_official 133:d4dda5c437f0 198 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 199 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 200
mbed_official 133:d4dda5c437f0 201 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 202 }
mbed_official 133:d4dda5c437f0 203 }
mbed_official 133:d4dda5c437f0 204 }
mbed_official 133:d4dda5c437f0 205
mbed_official 133:d4dda5c437f0 206 /* Read the message digest */
mbed_official 133:d4dda5c437f0 207 HASHEx_GetDigest(pOutBuffer, 28);
mbed_official 133:d4dda5c437f0 208
mbed_official 133:d4dda5c437f0 209 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 210 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 211
mbed_official 133:d4dda5c437f0 212 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 213 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 214
mbed_official 133:d4dda5c437f0 215 /* Return function status */
mbed_official 133:d4dda5c437f0 216 return HAL_OK;
mbed_official 133:d4dda5c437f0 217 }
mbed_official 133:d4dda5c437f0 218
mbed_official 133:d4dda5c437f0 219 /**
mbed_official 133:d4dda5c437f0 220 * @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 221 The digest is available in pOutBuffer.
mbed_official 242:7074e42da0b2 222 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 223 * the configuration information for HASH module
mbed_official 242:7074e42da0b2 224 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 225 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 226 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 227 * @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
mbed_official 133:d4dda5c437f0 228 * @param Timeout: Specify Timeout value
mbed_official 133:d4dda5c437f0 229 * @retval HAL status
mbed_official 133:d4dda5c437f0 230 */
mbed_official 133:d4dda5c437f0 231 HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 232 {
mbed_official 133:d4dda5c437f0 233 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 234
mbed_official 133:d4dda5c437f0 235 /* Process Locked */
mbed_official 133:d4dda5c437f0 236 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 237
mbed_official 133:d4dda5c437f0 238 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 239 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 240
mbed_official 133:d4dda5c437f0 241 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 242 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 243 {
mbed_official 133:d4dda5c437f0 244 /* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 245 the message digest of a new message */
mbed_official 133:d4dda5c437f0 246 HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 247 }
mbed_official 133:d4dda5c437f0 248
mbed_official 133:d4dda5c437f0 249 /* Set the phase */
mbed_official 133:d4dda5c437f0 250 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 251
mbed_official 133:d4dda5c437f0 252 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 253 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 254
mbed_official 133:d4dda5c437f0 255 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 256 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 257
mbed_official 133:d4dda5c437f0 258 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 259 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 260
mbed_official 133:d4dda5c437f0 261 /* Get timeout */
mbed_official 133:d4dda5c437f0 262 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 263
mbed_official 133:d4dda5c437f0 264 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 265 {
mbed_official 133:d4dda5c437f0 266 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 267 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 268 {
mbed_official 133:d4dda5c437f0 269 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 270 {
mbed_official 133:d4dda5c437f0 271 /* Change state */
mbed_official 133:d4dda5c437f0 272 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 273
mbed_official 133:d4dda5c437f0 274 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 275 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 276
mbed_official 133:d4dda5c437f0 277 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 278 }
mbed_official 133:d4dda5c437f0 279 }
mbed_official 133:d4dda5c437f0 280 }
mbed_official 133:d4dda5c437f0 281
mbed_official 133:d4dda5c437f0 282 /* Read the message digest */
mbed_official 133:d4dda5c437f0 283 HASHEx_GetDigest(pOutBuffer, 32);
mbed_official 133:d4dda5c437f0 284
mbed_official 133:d4dda5c437f0 285 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 286 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 287
mbed_official 133:d4dda5c437f0 288 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 289 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 290
mbed_official 133:d4dda5c437f0 291 /* Return function status */
mbed_official 133:d4dda5c437f0 292 return HAL_OK;
mbed_official 133:d4dda5c437f0 293 }
mbed_official 133:d4dda5c437f0 294
mbed_official 133:d4dda5c437f0 295
mbed_official 133:d4dda5c437f0 296 /**
mbed_official 133:d4dda5c437f0 297 * @brief Initializes the HASH peripheral in SHA224 mode
mbed_official 133:d4dda5c437f0 298 * then processes pInBuffer. The digest is available in pOutBuffer
mbed_official 242:7074e42da0b2 299 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 300 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 301 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 302 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 303 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 304 * @retval HAL status
mbed_official 133:d4dda5c437f0 305 */
mbed_official 133:d4dda5c437f0 306 HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 307 {
mbed_official 133:d4dda5c437f0 308 /* Process Locked */
mbed_official 133:d4dda5c437f0 309 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 310
mbed_official 133:d4dda5c437f0 311 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 312 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 313
mbed_official 133:d4dda5c437f0 314 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 315 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 316 {
mbed_official 133:d4dda5c437f0 317 /* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 318 the message digest of a new message */
mbed_official 133:d4dda5c437f0 319 HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 320 }
mbed_official 133:d4dda5c437f0 321
mbed_official 133:d4dda5c437f0 322 /* Set the phase */
mbed_official 133:d4dda5c437f0 323 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 324
mbed_official 133:d4dda5c437f0 325 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 326 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 327
mbed_official 133:d4dda5c437f0 328 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 329 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 330
mbed_official 133:d4dda5c437f0 331 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 332 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 333
mbed_official 133:d4dda5c437f0 334 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 335 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 336
mbed_official 133:d4dda5c437f0 337 /* Return function status */
mbed_official 133:d4dda5c437f0 338 return HAL_OK;
mbed_official 133:d4dda5c437f0 339 }
mbed_official 133:d4dda5c437f0 340
mbed_official 133:d4dda5c437f0 341
mbed_official 133:d4dda5c437f0 342 /**
mbed_official 133:d4dda5c437f0 343 * @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 344 The digest is available in pOutBuffer.
mbed_official 242:7074e42da0b2 345 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 346 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 347 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 348 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 349 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 350 * @retval HAL status
mbed_official 133:d4dda5c437f0 351 */
mbed_official 133:d4dda5c437f0 352 HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 353 {
mbed_official 133:d4dda5c437f0 354 /* Process Locked */
mbed_official 133:d4dda5c437f0 355 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 356
mbed_official 133:d4dda5c437f0 357 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 358 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 359
mbed_official 133:d4dda5c437f0 360 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 361 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 362 {
mbed_official 133:d4dda5c437f0 363 /* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 364 the message digest of a new message */
mbed_official 133:d4dda5c437f0 365 HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 366 }
mbed_official 133:d4dda5c437f0 367
mbed_official 133:d4dda5c437f0 368 /* Set the phase */
mbed_official 133:d4dda5c437f0 369 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 370
mbed_official 133:d4dda5c437f0 371 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 372 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 373
mbed_official 133:d4dda5c437f0 374 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 375 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 376
mbed_official 133:d4dda5c437f0 377 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 378 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 379
mbed_official 133:d4dda5c437f0 380 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 381 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 382
mbed_official 133:d4dda5c437f0 383 /* Return function status */
mbed_official 133:d4dda5c437f0 384 return HAL_OK;
mbed_official 133:d4dda5c437f0 385 }
mbed_official 133:d4dda5c437f0 386
mbed_official 133:d4dda5c437f0 387
mbed_official 133:d4dda5c437f0 388 /**
mbed_official 133:d4dda5c437f0 389 * @}
mbed_official 133:d4dda5c437f0 390 */
mbed_official 133:d4dda5c437f0 391
mbed_official 133:d4dda5c437f0 392 /** @defgroup HASHEx_Group2 HMAC processing functions using polling mode
mbed_official 133:d4dda5c437f0 393 * @brief HMAC processing functions using polling mode .
mbed_official 133:d4dda5c437f0 394 *
mbed_official 133:d4dda5c437f0 395 @verbatim
mbed_official 133:d4dda5c437f0 396 ===============================================================================
mbed_official 133:d4dda5c437f0 397 ##### HMAC processing using polling mode functions #####
mbed_official 133:d4dda5c437f0 398 ===============================================================================
mbed_official 133:d4dda5c437f0 399 [..] This section provides functions allowing to calculate in polling mode
mbed_official 133:d4dda5c437f0 400 the HMAC value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 401 (+) SHA224
mbed_official 133:d4dda5c437f0 402 (+) SHA256
mbed_official 133:d4dda5c437f0 403
mbed_official 133:d4dda5c437f0 404 @endverbatim
mbed_official 133:d4dda5c437f0 405 * @{
mbed_official 133:d4dda5c437f0 406 */
mbed_official 133:d4dda5c437f0 407
mbed_official 133:d4dda5c437f0 408 /**
mbed_official 133:d4dda5c437f0 409 * @brief Initializes the HASH peripheral in HMAC SHA224 mode
mbed_official 133:d4dda5c437f0 410 * then processes pInBuffer. The digest is available in pOutBuffer.
mbed_official 242:7074e42da0b2 411 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 412 * the configuration information for HASH module
mbed_official 242:7074e42da0b2 413 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 414 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 415 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 416 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 417 * @retval HAL status
mbed_official 133:d4dda5c437f0 418 */
mbed_official 133:d4dda5c437f0 419 HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 420 {
mbed_official 133:d4dda5c437f0 421 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 422
mbed_official 133:d4dda5c437f0 423 /* Process Locked */
mbed_official 133:d4dda5c437f0 424 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 425
mbed_official 133:d4dda5c437f0 426 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 427 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 428
mbed_official 133:d4dda5c437f0 429 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 430 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 431 {
mbed_official 133:d4dda5c437f0 432 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 433 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 434 {
mbed_official 133:d4dda5c437f0 435 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 436 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 437 }
mbed_official 133:d4dda5c437f0 438 else
mbed_official 133:d4dda5c437f0 439 {
mbed_official 133:d4dda5c437f0 440 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 441 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 442 }
mbed_official 133:d4dda5c437f0 443 }
mbed_official 133:d4dda5c437f0 444
mbed_official 133:d4dda5c437f0 445 /* Set the phase */
mbed_official 133:d4dda5c437f0 446 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 447
mbed_official 133:d4dda5c437f0 448 /************************** STEP 1 ******************************************/
mbed_official 133:d4dda5c437f0 449 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 450 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 451
mbed_official 133:d4dda5c437f0 452 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 453 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 454
mbed_official 133:d4dda5c437f0 455 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 456 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 457
mbed_official 133:d4dda5c437f0 458 /* Get timeout */
mbed_official 133:d4dda5c437f0 459 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 460
mbed_official 133:d4dda5c437f0 461 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 462 {
mbed_official 133:d4dda5c437f0 463 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 464 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 465 {
mbed_official 133:d4dda5c437f0 466 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 467 {
mbed_official 133:d4dda5c437f0 468 /* Change state */
mbed_official 133:d4dda5c437f0 469 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 470
mbed_official 133:d4dda5c437f0 471 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 472 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 473
mbed_official 133:d4dda5c437f0 474 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 475 }
mbed_official 133:d4dda5c437f0 476 }
mbed_official 133:d4dda5c437f0 477 }
mbed_official 133:d4dda5c437f0 478 /************************** STEP 2 ******************************************/
mbed_official 133:d4dda5c437f0 479 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 480 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 481
mbed_official 133:d4dda5c437f0 482 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 483 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 484
mbed_official 133:d4dda5c437f0 485 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 486 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 487
mbed_official 133:d4dda5c437f0 488 /* Get timeout */
mbed_official 133:d4dda5c437f0 489 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 490
mbed_official 133:d4dda5c437f0 491 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 492 {
mbed_official 133:d4dda5c437f0 493 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 494 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 495 {
mbed_official 133:d4dda5c437f0 496 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 497 {
mbed_official 133:d4dda5c437f0 498 /* Change state */
mbed_official 133:d4dda5c437f0 499 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 500
mbed_official 133:d4dda5c437f0 501 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 502 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 503
mbed_official 133:d4dda5c437f0 504 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 505 }
mbed_official 133:d4dda5c437f0 506 }
mbed_official 133:d4dda5c437f0 507 }
mbed_official 133:d4dda5c437f0 508 /************************** STEP 3 ******************************************/
mbed_official 133:d4dda5c437f0 509 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 510 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 511
mbed_official 133:d4dda5c437f0 512 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 513 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 514
mbed_official 133:d4dda5c437f0 515 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 516 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 517
mbed_official 133:d4dda5c437f0 518 /* Get timeout */
mbed_official 133:d4dda5c437f0 519 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 520
mbed_official 133:d4dda5c437f0 521 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 522 {
mbed_official 133:d4dda5c437f0 523 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 524 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 525 {
mbed_official 133:d4dda5c437f0 526 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 527 {
mbed_official 133:d4dda5c437f0 528 /* Change state */
mbed_official 133:d4dda5c437f0 529 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 530
mbed_official 133:d4dda5c437f0 531 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 532 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 533
mbed_official 133:d4dda5c437f0 534 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 535 }
mbed_official 133:d4dda5c437f0 536 }
mbed_official 133:d4dda5c437f0 537 }
mbed_official 133:d4dda5c437f0 538 /* Read the message digest */
mbed_official 133:d4dda5c437f0 539 HASHEx_GetDigest(pOutBuffer, 28);
mbed_official 133:d4dda5c437f0 540
mbed_official 133:d4dda5c437f0 541 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 542 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 543
mbed_official 133:d4dda5c437f0 544 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 545 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 546
mbed_official 133:d4dda5c437f0 547 /* Return function status */
mbed_official 133:d4dda5c437f0 548 return HAL_OK;
mbed_official 133:d4dda5c437f0 549 }
mbed_official 133:d4dda5c437f0 550
mbed_official 133:d4dda5c437f0 551 /**
mbed_official 133:d4dda5c437f0 552 * @brief Initializes the HASH peripheral in HMAC SHA256 mode
mbed_official 133:d4dda5c437f0 553 * then processes pInBuffer. The digest is available in pOutBuffer
mbed_official 242:7074e42da0b2 554 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 555 * the configuration information for HASH module
mbed_official 242:7074e42da0b2 556 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 557 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 558 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 559 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 560 * @retval HAL status
mbed_official 133:d4dda5c437f0 561 */
mbed_official 133:d4dda5c437f0 562 HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 563 {
mbed_official 133:d4dda5c437f0 564 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 565
mbed_official 133:d4dda5c437f0 566 /* Process Locked */
mbed_official 133:d4dda5c437f0 567 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 568
mbed_official 133:d4dda5c437f0 569 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 570 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 571
mbed_official 133:d4dda5c437f0 572 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 573 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 574 {
mbed_official 133:d4dda5c437f0 575 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 576 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 577 {
mbed_official 133:d4dda5c437f0 578 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 579 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey);
mbed_official 133:d4dda5c437f0 580 }
mbed_official 133:d4dda5c437f0 581 else
mbed_official 133:d4dda5c437f0 582 {
mbed_official 133:d4dda5c437f0 583 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 584 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC);
mbed_official 133:d4dda5c437f0 585 }
mbed_official 133:d4dda5c437f0 586 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 587 the message digest of a new message */
mbed_official 133:d4dda5c437f0 588 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 589 }
mbed_official 133:d4dda5c437f0 590
mbed_official 133:d4dda5c437f0 591 /* Set the phase */
mbed_official 133:d4dda5c437f0 592 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 593
mbed_official 133:d4dda5c437f0 594 /************************** STEP 1 ******************************************/
mbed_official 133:d4dda5c437f0 595 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 596 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 597
mbed_official 133:d4dda5c437f0 598 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 599 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 600
mbed_official 133:d4dda5c437f0 601 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 602 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 603
mbed_official 133:d4dda5c437f0 604 /* Get timeout */
mbed_official 133:d4dda5c437f0 605 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 606
mbed_official 133:d4dda5c437f0 607 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 608 {
mbed_official 133:d4dda5c437f0 609 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 610 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 611 {
mbed_official 133:d4dda5c437f0 612 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 613 {
mbed_official 133:d4dda5c437f0 614 /* Change state */
mbed_official 133:d4dda5c437f0 615 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 616
mbed_official 133:d4dda5c437f0 617 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 618 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 619
mbed_official 133:d4dda5c437f0 620 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 621 }
mbed_official 133:d4dda5c437f0 622 }
mbed_official 133:d4dda5c437f0 623 }
mbed_official 133:d4dda5c437f0 624 /************************** STEP 2 ******************************************/
mbed_official 133:d4dda5c437f0 625 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 626 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 627
mbed_official 133:d4dda5c437f0 628 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 629 HASHEx_WriteData(pInBuffer, Size);
mbed_official 133:d4dda5c437f0 630
mbed_official 133:d4dda5c437f0 631 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 632 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 633
mbed_official 133:d4dda5c437f0 634 /* Get timeout */
mbed_official 133:d4dda5c437f0 635 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 636
mbed_official 133:d4dda5c437f0 637 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 638 {
mbed_official 133:d4dda5c437f0 639 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 640 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 641 {
mbed_official 133:d4dda5c437f0 642 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 643 {
mbed_official 133:d4dda5c437f0 644 /* Change state */
mbed_official 133:d4dda5c437f0 645 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 646
mbed_official 133:d4dda5c437f0 647 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 648 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 649
mbed_official 133:d4dda5c437f0 650 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 651 }
mbed_official 133:d4dda5c437f0 652 }
mbed_official 133:d4dda5c437f0 653 }
mbed_official 133:d4dda5c437f0 654 /************************** STEP 3 ******************************************/
mbed_official 133:d4dda5c437f0 655 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 656 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 657
mbed_official 133:d4dda5c437f0 658 /* Write input buffer in data register */
mbed_official 133:d4dda5c437f0 659 HASHEx_WriteData(hhash->Init.pKey, hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 660
mbed_official 133:d4dda5c437f0 661 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 662 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 663
mbed_official 133:d4dda5c437f0 664 /* Get timeout */
mbed_official 133:d4dda5c437f0 665 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 666
mbed_official 133:d4dda5c437f0 667 while((HASH->SR & HASH_FLAG_BUSY) == HASH_FLAG_BUSY)
mbed_official 133:d4dda5c437f0 668 {
mbed_official 133:d4dda5c437f0 669 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 670 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 671 {
mbed_official 133:d4dda5c437f0 672 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 673 {
mbed_official 133:d4dda5c437f0 674 /* Change state */
mbed_official 133:d4dda5c437f0 675 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 676
mbed_official 133:d4dda5c437f0 677 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 678 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 679
mbed_official 133:d4dda5c437f0 680 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 681 }
mbed_official 133:d4dda5c437f0 682 }
mbed_official 133:d4dda5c437f0 683 }
mbed_official 133:d4dda5c437f0 684 /* Read the message digest */
mbed_official 133:d4dda5c437f0 685 HASHEx_GetDigest(pOutBuffer, 32);
mbed_official 133:d4dda5c437f0 686
mbed_official 133:d4dda5c437f0 687 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 688 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 689
mbed_official 133:d4dda5c437f0 690 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 691 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 692
mbed_official 133:d4dda5c437f0 693 /* Return function status */
mbed_official 133:d4dda5c437f0 694 return HAL_OK;
mbed_official 133:d4dda5c437f0 695 }
mbed_official 133:d4dda5c437f0 696
mbed_official 133:d4dda5c437f0 697 /**
mbed_official 133:d4dda5c437f0 698 * @}
mbed_official 133:d4dda5c437f0 699 */
mbed_official 133:d4dda5c437f0 700
mbed_official 133:d4dda5c437f0 701 /** @defgroup HASHEx_Group3 HASH processing functions using interrupt mode
mbed_official 133:d4dda5c437f0 702 * @brief processing functions using interrupt mode.
mbed_official 133:d4dda5c437f0 703 *
mbed_official 133:d4dda5c437f0 704 @verbatim
mbed_official 133:d4dda5c437f0 705 ===============================================================================
mbed_official 133:d4dda5c437f0 706 ##### HASH processing using interrupt functions #####
mbed_official 133:d4dda5c437f0 707 ===============================================================================
mbed_official 133:d4dda5c437f0 708 [..] This section provides functions allowing to calculate in interrupt mode
mbed_official 133:d4dda5c437f0 709 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 710 (+) SHA224
mbed_official 133:d4dda5c437f0 711 (+) SHA256
mbed_official 133:d4dda5c437f0 712
mbed_official 133:d4dda5c437f0 713 @endverbatim
mbed_official 133:d4dda5c437f0 714 * @{
mbed_official 133:d4dda5c437f0 715 */
mbed_official 133:d4dda5c437f0 716
mbed_official 133:d4dda5c437f0 717 /**
mbed_official 133:d4dda5c437f0 718 * @brief Initializes the HASH peripheral in SHA224 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 719 * The digest is available in pOutBuffer.
mbed_official 242:7074e42da0b2 720 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 721 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 722 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 723 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 724 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 725 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 726 * @retval HAL status
mbed_official 133:d4dda5c437f0 727 */
mbed_official 133:d4dda5c437f0 728 HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
mbed_official 133:d4dda5c437f0 729 {
mbed_official 133:d4dda5c437f0 730 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 731 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 732 uint32_t inputcounter;
mbed_official 133:d4dda5c437f0 733
mbed_official 133:d4dda5c437f0 734 /* Process Locked */
mbed_official 133:d4dda5c437f0 735 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 736
mbed_official 133:d4dda5c437f0 737 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 738 {
mbed_official 133:d4dda5c437f0 739 hhash->HashITCounter = 1;
mbed_official 133:d4dda5c437f0 740 }
mbed_official 133:d4dda5c437f0 741 else
mbed_official 133:d4dda5c437f0 742 {
mbed_official 133:d4dda5c437f0 743 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 744 }
mbed_official 133:d4dda5c437f0 745 if(hhash->State == HAL_HASH_STATE_READY)
mbed_official 133:d4dda5c437f0 746 {
mbed_official 133:d4dda5c437f0 747 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 748 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 749
mbed_official 133:d4dda5c437f0 750 hhash->HashInCount = Size;
mbed_official 133:d4dda5c437f0 751 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 752 hhash->pHashOutBuffPtr = pOutBuffer;
mbed_official 133:d4dda5c437f0 753
mbed_official 133:d4dda5c437f0 754 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 755 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 756 {
mbed_official 133:d4dda5c437f0 757 /* Select the SHA224 mode */
mbed_official 133:d4dda5c437f0 758 HASH->CR |= HASH_AlgoSelection_SHA224;
mbed_official 133:d4dda5c437f0 759 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 760 the message digest of a new message */
mbed_official 133:d4dda5c437f0 761 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 762 }
mbed_official 133:d4dda5c437f0 763
mbed_official 133:d4dda5c437f0 764 /* Set the phase */
mbed_official 133:d4dda5c437f0 765 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 766
mbed_official 133:d4dda5c437f0 767 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 768 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 769
mbed_official 133:d4dda5c437f0 770 /* Enable Interrupts */
mbed_official 133:d4dda5c437f0 771 HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
mbed_official 133:d4dda5c437f0 772
mbed_official 133:d4dda5c437f0 773 /* Return function status */
mbed_official 133:d4dda5c437f0 774 return HAL_OK;
mbed_official 133:d4dda5c437f0 775 }
mbed_official 133:d4dda5c437f0 776 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 777 {
mbed_official 133:d4dda5c437f0 778 /* Read the message digest */
mbed_official 133:d4dda5c437f0 779 HASHEx_GetDigest(hhash->pHashOutBuffPtr, 28);
mbed_official 133:d4dda5c437f0 780 if(hhash->HashInCount == 0)
mbed_official 133:d4dda5c437f0 781 {
mbed_official 133:d4dda5c437f0 782 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 783 HASH->IMR = 0;
mbed_official 133:d4dda5c437f0 784 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 785 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 786 /* Call digest computation complete callback */
mbed_official 133:d4dda5c437f0 787 HAL_HASH_DgstCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 788 }
mbed_official 133:d4dda5c437f0 789 }
mbed_official 133:d4dda5c437f0 790 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
mbed_official 133:d4dda5c437f0 791 {
mbed_official 133:d4dda5c437f0 792 if(hhash->HashInCount > 64)
mbed_official 133:d4dda5c437f0 793 {
mbed_official 133:d4dda5c437f0 794 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 795 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 796 for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
mbed_official 133:d4dda5c437f0 797 {
mbed_official 133:d4dda5c437f0 798 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 799 inputaddr+=4;
mbed_official 133:d4dda5c437f0 800 }
mbed_official 133:d4dda5c437f0 801 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 802 {
mbed_official 133:d4dda5c437f0 803 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 804 if(hhash->HashInCount >= 68)
mbed_official 133:d4dda5c437f0 805 {
mbed_official 133:d4dda5c437f0 806 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 807 hhash->HashInCount -= 68;
mbed_official 133:d4dda5c437f0 808 hhash->pHashInBuffPtr+= 68;
mbed_official 133:d4dda5c437f0 809 }
mbed_official 133:d4dda5c437f0 810 else
mbed_official 133:d4dda5c437f0 811 {
mbed_official 133:d4dda5c437f0 812 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 813 }
mbed_official 133:d4dda5c437f0 814 }
mbed_official 133:d4dda5c437f0 815 else
mbed_official 133:d4dda5c437f0 816 {
mbed_official 133:d4dda5c437f0 817 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 818 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 819 hhash->pHashInBuffPtr+= 64;
mbed_official 133:d4dda5c437f0 820 }
mbed_official 133:d4dda5c437f0 821 }
mbed_official 133:d4dda5c437f0 822 else
mbed_official 133:d4dda5c437f0 823 {
mbed_official 133:d4dda5c437f0 824 /* Get the buffer address */
mbed_official 133:d4dda5c437f0 825 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 826 /* Get the buffer counter */
mbed_official 133:d4dda5c437f0 827 inputcounter = hhash->HashInCount;
mbed_official 133:d4dda5c437f0 828 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 829 HASH->IMR &= ~(HASH_IT_DINI);
mbed_official 133:d4dda5c437f0 830 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 831 __HAL_HASH_SET_NBVALIDBITS(inputcounter);
mbed_official 133:d4dda5c437f0 832
mbed_official 133:d4dda5c437f0 833 if((inputcounter > 4) && (inputcounter%4))
mbed_official 133:d4dda5c437f0 834 {
mbed_official 133:d4dda5c437f0 835 inputcounter = (inputcounter+4-inputcounter%4);
mbed_official 133:d4dda5c437f0 836 }
mbed_official 133:d4dda5c437f0 837
mbed_official 133:d4dda5c437f0 838 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 839 for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
mbed_official 133:d4dda5c437f0 840 {
mbed_official 133:d4dda5c437f0 841 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 842 inputaddr+=4;
mbed_official 133:d4dda5c437f0 843 }
mbed_official 133:d4dda5c437f0 844 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 845 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 846 /* Reset buffer counter */
mbed_official 133:d4dda5c437f0 847 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 848 }
mbed_official 133:d4dda5c437f0 849 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 850 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 851 }
mbed_official 133:d4dda5c437f0 852
mbed_official 133:d4dda5c437f0 853 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 854 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 855
mbed_official 133:d4dda5c437f0 856 /* Return function status */
mbed_official 133:d4dda5c437f0 857 return HAL_OK;
mbed_official 133:d4dda5c437f0 858 }
mbed_official 133:d4dda5c437f0 859
mbed_official 133:d4dda5c437f0 860
mbed_official 133:d4dda5c437f0 861 /**
mbed_official 133:d4dda5c437f0 862 * @brief Initializes the HASH peripheral in SHA256 mode then processes pInBuffer.
mbed_official 133:d4dda5c437f0 863 * The digest is available in pOutBuffer.
mbed_official 242:7074e42da0b2 864 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 865 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 866 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 867 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 868 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 869 * @param pOutBuffer: Pointer to the computed digest. Its size must be 20 bytes.
mbed_official 133:d4dda5c437f0 870 * @retval HAL status
mbed_official 133:d4dda5c437f0 871 */
mbed_official 133:d4dda5c437f0 872 HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer)
mbed_official 133:d4dda5c437f0 873 {
mbed_official 133:d4dda5c437f0 874 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 875 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 876 uint32_t inputcounter;
mbed_official 133:d4dda5c437f0 877
mbed_official 133:d4dda5c437f0 878 /* Process Locked */
mbed_official 133:d4dda5c437f0 879 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 880
mbed_official 133:d4dda5c437f0 881 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 882 {
mbed_official 133:d4dda5c437f0 883 hhash->HashITCounter = 1;
mbed_official 133:d4dda5c437f0 884 }
mbed_official 133:d4dda5c437f0 885 else
mbed_official 133:d4dda5c437f0 886 {
mbed_official 133:d4dda5c437f0 887 hhash->HashITCounter = 0;
mbed_official 133:d4dda5c437f0 888 }
mbed_official 133:d4dda5c437f0 889 if(hhash->State == HAL_HASH_STATE_READY)
mbed_official 133:d4dda5c437f0 890 {
mbed_official 133:d4dda5c437f0 891 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 892 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 893
mbed_official 133:d4dda5c437f0 894 hhash->HashInCount = Size;
mbed_official 133:d4dda5c437f0 895 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 896 hhash->pHashOutBuffPtr = pOutBuffer;
mbed_official 133:d4dda5c437f0 897
mbed_official 133:d4dda5c437f0 898 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 899 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 900 {
mbed_official 133:d4dda5c437f0 901 /* Select the SHA256 mode */
mbed_official 133:d4dda5c437f0 902 HASH->CR |= HASH_AlgoSelection_SHA256;
mbed_official 133:d4dda5c437f0 903 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 904 the message digest of a new message */
mbed_official 133:d4dda5c437f0 905 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 906 }
mbed_official 133:d4dda5c437f0 907
mbed_official 133:d4dda5c437f0 908 /* Set the phase */
mbed_official 133:d4dda5c437f0 909 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 910
mbed_official 133:d4dda5c437f0 911 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 912 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 913
mbed_official 133:d4dda5c437f0 914 /* Enable Interrupts */
mbed_official 133:d4dda5c437f0 915 HASH->IMR = (HASH_IT_DINI | HASH_IT_DCI);
mbed_official 133:d4dda5c437f0 916
mbed_official 133:d4dda5c437f0 917 /* Return function status */
mbed_official 133:d4dda5c437f0 918 return HAL_OK;
mbed_official 133:d4dda5c437f0 919 }
mbed_official 133:d4dda5c437f0 920 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 921 {
mbed_official 133:d4dda5c437f0 922 /* Read the message digest */
mbed_official 133:d4dda5c437f0 923 HASHEx_GetDigest(hhash->pHashOutBuffPtr, 32);
mbed_official 133:d4dda5c437f0 924 if(hhash->HashInCount == 0)
mbed_official 133:d4dda5c437f0 925 {
mbed_official 133:d4dda5c437f0 926 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 927 HASH->IMR = 0;
mbed_official 133:d4dda5c437f0 928 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 929 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 930 /* Call digest computation complete callback */
mbed_official 133:d4dda5c437f0 931 HAL_HASH_DgstCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 932 }
mbed_official 133:d4dda5c437f0 933 }
mbed_official 133:d4dda5c437f0 934 if(__HAL_HASH_GET_FLAG(HASH_FLAG_DINIS))
mbed_official 133:d4dda5c437f0 935 {
mbed_official 133:d4dda5c437f0 936 if(hhash->HashInCount > 64)
mbed_official 133:d4dda5c437f0 937 {
mbed_official 133:d4dda5c437f0 938 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 939 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 940 for(buffercounter = 0; buffercounter < 64; buffercounter+=4)
mbed_official 133:d4dda5c437f0 941 {
mbed_official 133:d4dda5c437f0 942 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 943 inputaddr+=4;
mbed_official 133:d4dda5c437f0 944 }
mbed_official 133:d4dda5c437f0 945 if(hhash->HashITCounter == 0)
mbed_official 133:d4dda5c437f0 946 {
mbed_official 133:d4dda5c437f0 947 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 948
mbed_official 133:d4dda5c437f0 949 if(hhash->HashInCount >= 68)
mbed_official 133:d4dda5c437f0 950 {
mbed_official 133:d4dda5c437f0 951 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 952 hhash->HashInCount -= 68;
mbed_official 133:d4dda5c437f0 953 hhash->pHashInBuffPtr+= 68;
mbed_official 133:d4dda5c437f0 954 }
mbed_official 133:d4dda5c437f0 955 else
mbed_official 133:d4dda5c437f0 956 {
mbed_official 133:d4dda5c437f0 957 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 958 }
mbed_official 133:d4dda5c437f0 959 }
mbed_official 133:d4dda5c437f0 960 else
mbed_official 133:d4dda5c437f0 961 {
mbed_official 133:d4dda5c437f0 962 /* Decrement buffer counter */
mbed_official 133:d4dda5c437f0 963 hhash->HashInCount -= 64;
mbed_official 133:d4dda5c437f0 964 hhash->pHashInBuffPtr+= 64;
mbed_official 133:d4dda5c437f0 965 }
mbed_official 133:d4dda5c437f0 966 }
mbed_official 133:d4dda5c437f0 967 else
mbed_official 133:d4dda5c437f0 968 {
mbed_official 133:d4dda5c437f0 969 /* Get the buffer address */
mbed_official 133:d4dda5c437f0 970 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 971 /* Get the buffer counter */
mbed_official 133:d4dda5c437f0 972 inputcounter = hhash->HashInCount;
mbed_official 133:d4dda5c437f0 973 /* Disable Interrupts */
mbed_official 133:d4dda5c437f0 974 HASH->IMR &= ~(HASH_IT_DINI);
mbed_official 133:d4dda5c437f0 975 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 976 __HAL_HASH_SET_NBVALIDBITS(inputcounter);
mbed_official 133:d4dda5c437f0 977
mbed_official 133:d4dda5c437f0 978 if((inputcounter > 4) && (inputcounter%4))
mbed_official 133:d4dda5c437f0 979 {
mbed_official 133:d4dda5c437f0 980 inputcounter = (inputcounter+4-inputcounter%4);
mbed_official 133:d4dda5c437f0 981 }
mbed_official 133:d4dda5c437f0 982
mbed_official 133:d4dda5c437f0 983 /* Write the Input block in the Data IN register */
mbed_official 133:d4dda5c437f0 984 for(buffercounter = 0; buffercounter < inputcounter/4; buffercounter++)
mbed_official 133:d4dda5c437f0 985 {
mbed_official 133:d4dda5c437f0 986 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 987 inputaddr+=4;
mbed_official 133:d4dda5c437f0 988 }
mbed_official 133:d4dda5c437f0 989 /* Start the digest calculation */
mbed_official 133:d4dda5c437f0 990 __HAL_HASH_START_DIGEST();
mbed_official 133:d4dda5c437f0 991 /* Reset buffer counter */
mbed_official 133:d4dda5c437f0 992 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 993 }
mbed_official 133:d4dda5c437f0 994 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 995 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 996 }
mbed_official 133:d4dda5c437f0 997
mbed_official 133:d4dda5c437f0 998 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 999 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1000
mbed_official 133:d4dda5c437f0 1001 /* Return function status */
mbed_official 133:d4dda5c437f0 1002 return HAL_OK;
mbed_official 133:d4dda5c437f0 1003 }
mbed_official 133:d4dda5c437f0 1004
mbed_official 133:d4dda5c437f0 1005 /**
mbed_official 133:d4dda5c437f0 1006 * @brief This function handles HASH interrupt request.
mbed_official 242:7074e42da0b2 1007 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1008 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 1009 * @retval None
mbed_official 133:d4dda5c437f0 1010 */
mbed_official 133:d4dda5c437f0 1011 void HAL_HASHEx_IRQHandler(HASH_HandleTypeDef *hhash)
mbed_official 133:d4dda5c437f0 1012 {
mbed_official 133:d4dda5c437f0 1013 switch(HASH->CR & HASH_CR_ALGO)
mbed_official 133:d4dda5c437f0 1014 {
mbed_official 133:d4dda5c437f0 1015
mbed_official 133:d4dda5c437f0 1016 case HASH_AlgoSelection_SHA224:
mbed_official 133:d4dda5c437f0 1017 HAL_HASHEx_SHA224_Start_IT(hhash, NULL, 0, NULL);
mbed_official 133:d4dda5c437f0 1018 break;
mbed_official 133:d4dda5c437f0 1019
mbed_official 133:d4dda5c437f0 1020 case HASH_AlgoSelection_SHA256:
mbed_official 133:d4dda5c437f0 1021 HAL_HASHEx_SHA256_Start_IT(hhash, NULL, 0, NULL);
mbed_official 133:d4dda5c437f0 1022 break;
mbed_official 133:d4dda5c437f0 1023
mbed_official 133:d4dda5c437f0 1024 default:
mbed_official 133:d4dda5c437f0 1025 break;
mbed_official 133:d4dda5c437f0 1026 }
mbed_official 133:d4dda5c437f0 1027 }
mbed_official 133:d4dda5c437f0 1028
mbed_official 133:d4dda5c437f0 1029 /**
mbed_official 133:d4dda5c437f0 1030 * @}
mbed_official 133:d4dda5c437f0 1031 */
mbed_official 133:d4dda5c437f0 1032
mbed_official 133:d4dda5c437f0 1033 /** @defgroup HASHEx_Group4 HASH processing functions using DMA mode
mbed_official 133:d4dda5c437f0 1034 * @brief processing functions using DMA mode.
mbed_official 133:d4dda5c437f0 1035 *
mbed_official 133:d4dda5c437f0 1036 @verbatim
mbed_official 133:d4dda5c437f0 1037 ===============================================================================
mbed_official 133:d4dda5c437f0 1038 ##### HASH processing using DMA functions #####
mbed_official 133:d4dda5c437f0 1039 ===============================================================================
mbed_official 133:d4dda5c437f0 1040 [..] This section provides functions allowing to calculate in DMA mode
mbed_official 133:d4dda5c437f0 1041 the hash value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 1042 (+) SHA224
mbed_official 133:d4dda5c437f0 1043 (+) SHA256
mbed_official 133:d4dda5c437f0 1044
mbed_official 133:d4dda5c437f0 1045 @endverbatim
mbed_official 133:d4dda5c437f0 1046 * @{
mbed_official 133:d4dda5c437f0 1047 */
mbed_official 133:d4dda5c437f0 1048
mbed_official 133:d4dda5c437f0 1049
mbed_official 133:d4dda5c437f0 1050 /**
mbed_official 133:d4dda5c437f0 1051 * @brief Initializes the HASH peripheral in SHA224 mode then enables DMA to
mbed_official 133:d4dda5c437f0 1052 control data transfer. Use HAL_HASH_SHA224_Finish() to get the digest.
mbed_official 242:7074e42da0b2 1053 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1054 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 1055 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1056 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1057 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1058 * @retval HAL status
mbed_official 133:d4dda5c437f0 1059 */
mbed_official 133:d4dda5c437f0 1060 HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1061 {
mbed_official 133:d4dda5c437f0 1062 uint32_t inputaddr = (uint32_t)pInBuffer;
mbed_official 133:d4dda5c437f0 1063
mbed_official 133:d4dda5c437f0 1064 /* Process Locked */
mbed_official 133:d4dda5c437f0 1065 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1066
mbed_official 133:d4dda5c437f0 1067 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1068 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1069
mbed_official 133:d4dda5c437f0 1070 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1071 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1072 {
mbed_official 133:d4dda5c437f0 1073 /* Select the SHA224 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 1074 the message digest of a new message */
mbed_official 133:d4dda5c437f0 1075 HASH->CR |= HASH_AlgoSelection_SHA224 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 1076 }
mbed_official 133:d4dda5c437f0 1077
mbed_official 133:d4dda5c437f0 1078 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1079 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 1080
mbed_official 133:d4dda5c437f0 1081 /* Set the phase */
mbed_official 133:d4dda5c437f0 1082 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1083
mbed_official 133:d4dda5c437f0 1084 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1085 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1086 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1087 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1088
mbed_official 133:d4dda5c437f0 1089 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1090 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
mbed_official 133:d4dda5c437f0 1091
mbed_official 133:d4dda5c437f0 1092 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1093 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1094
mbed_official 133:d4dda5c437f0 1095 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1096 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1097
mbed_official 133:d4dda5c437f0 1098 /* Return function status */
mbed_official 133:d4dda5c437f0 1099 return HAL_OK;
mbed_official 133:d4dda5c437f0 1100 }
mbed_official 133:d4dda5c437f0 1101
mbed_official 133:d4dda5c437f0 1102 /**
mbed_official 133:d4dda5c437f0 1103 * @brief Returns the computed digest in SHA224
mbed_official 242:7074e42da0b2 1104 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1105 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 1106 * @param pOutBuffer: Pointer to the computed digest. Its size must be 28 bytes.
mbed_official 242:7074e42da0b2 1107 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 1108 * @retval HAL status
mbed_official 133:d4dda5c437f0 1109 */
mbed_official 133:d4dda5c437f0 1110 HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 1111 {
mbed_official 133:d4dda5c437f0 1112 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 1113
mbed_official 133:d4dda5c437f0 1114 /* Process Locked */
mbed_official 133:d4dda5c437f0 1115 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1116
mbed_official 133:d4dda5c437f0 1117 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1118 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1119
mbed_official 133:d4dda5c437f0 1120 /* Get timeout */
mbed_official 133:d4dda5c437f0 1121 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1122
mbed_official 133:d4dda5c437f0 1123 while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 1124 {
mbed_official 133:d4dda5c437f0 1125 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1126 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1127 {
mbed_official 133:d4dda5c437f0 1128 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1129 {
mbed_official 133:d4dda5c437f0 1130 /* Change state */
mbed_official 133:d4dda5c437f0 1131 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1132
mbed_official 133:d4dda5c437f0 1133 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1134 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1135
mbed_official 133:d4dda5c437f0 1136 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1137 }
mbed_official 133:d4dda5c437f0 1138 }
mbed_official 133:d4dda5c437f0 1139 }
mbed_official 133:d4dda5c437f0 1140
mbed_official 133:d4dda5c437f0 1141 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1142 HASHEx_GetDigest(pOutBuffer, 28);
mbed_official 133:d4dda5c437f0 1143
mbed_official 133:d4dda5c437f0 1144 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1145 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1146
mbed_official 133:d4dda5c437f0 1147 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1148 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1149
mbed_official 133:d4dda5c437f0 1150 /* Return function status */
mbed_official 133:d4dda5c437f0 1151 return HAL_OK;
mbed_official 133:d4dda5c437f0 1152 }
mbed_official 133:d4dda5c437f0 1153
mbed_official 133:d4dda5c437f0 1154 /**
mbed_official 133:d4dda5c437f0 1155 * @brief Initializes the HASH peripheral in SHA256 mode then enables DMA to
mbed_official 133:d4dda5c437f0 1156 control data transfer. Use HAL_HASH_SHA256_Finish() to get the digest.
mbed_official 242:7074e42da0b2 1157 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1158 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 1159 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1160 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1161 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1162 * @retval HAL status
mbed_official 133:d4dda5c437f0 1163 */
mbed_official 133:d4dda5c437f0 1164 HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1165 {
mbed_official 133:d4dda5c437f0 1166 uint32_t inputaddr = (uint32_t)pInBuffer;
mbed_official 133:d4dda5c437f0 1167
mbed_official 133:d4dda5c437f0 1168 /* Process Locked */
mbed_official 133:d4dda5c437f0 1169 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1170
mbed_official 133:d4dda5c437f0 1171 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1172 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1173
mbed_official 133:d4dda5c437f0 1174 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1175 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1176 {
mbed_official 133:d4dda5c437f0 1177 /* Select the SHA256 mode and reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 1178 the message digest of a new message */
mbed_official 133:d4dda5c437f0 1179 HASH->CR |= HASH_AlgoSelection_SHA256 | HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 1180 }
mbed_official 133:d4dda5c437f0 1181
mbed_official 133:d4dda5c437f0 1182 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1183 __HAL_HASH_SET_NBVALIDBITS(Size);
mbed_official 133:d4dda5c437f0 1184
mbed_official 133:d4dda5c437f0 1185 /* Set the phase */
mbed_official 133:d4dda5c437f0 1186 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1187
mbed_official 133:d4dda5c437f0 1188 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1189 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1190 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1191 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1192
mbed_official 133:d4dda5c437f0 1193 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1194 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (Size%4 ? (Size+3)/4:Size/4));
mbed_official 133:d4dda5c437f0 1195
mbed_official 133:d4dda5c437f0 1196 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1197 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1198
mbed_official 133:d4dda5c437f0 1199 /* Process UnLock */
mbed_official 133:d4dda5c437f0 1200 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1201
mbed_official 133:d4dda5c437f0 1202 /* Return function status */
mbed_official 133:d4dda5c437f0 1203 return HAL_OK;
mbed_official 133:d4dda5c437f0 1204 }
mbed_official 133:d4dda5c437f0 1205
mbed_official 133:d4dda5c437f0 1206 /**
mbed_official 133:d4dda5c437f0 1207 * @brief Returns the computed digest in SHA256.
mbed_official 242:7074e42da0b2 1208 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1209 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 1210 * @param pOutBuffer: Pointer to the computed digest. Its size must be 32 bytes.
mbed_official 242:7074e42da0b2 1211 * @param Timeout: Timeout value
mbed_official 133:d4dda5c437f0 1212 * @retval HAL status
mbed_official 133:d4dda5c437f0 1213 */
mbed_official 133:d4dda5c437f0 1214 HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout)
mbed_official 133:d4dda5c437f0 1215 {
mbed_official 133:d4dda5c437f0 1216 uint32_t timeout = 0;
mbed_official 133:d4dda5c437f0 1217
mbed_official 133:d4dda5c437f0 1218 /* Process Locked */
mbed_official 133:d4dda5c437f0 1219 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1220
mbed_official 133:d4dda5c437f0 1221 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1222 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1223
mbed_official 133:d4dda5c437f0 1224 /* Get timeout */
mbed_official 133:d4dda5c437f0 1225 timeout = HAL_GetTick() + Timeout;
mbed_official 133:d4dda5c437f0 1226
mbed_official 133:d4dda5c437f0 1227 while(HAL_IS_BIT_CLR(HASH->SR, HASH_FLAG_DCIS))
mbed_official 133:d4dda5c437f0 1228 {
mbed_official 133:d4dda5c437f0 1229 /* Check for the Timeout */
mbed_official 133:d4dda5c437f0 1230 if(Timeout != HAL_MAX_DELAY)
mbed_official 133:d4dda5c437f0 1231 {
mbed_official 133:d4dda5c437f0 1232 if(HAL_GetTick() >= timeout)
mbed_official 133:d4dda5c437f0 1233 {
mbed_official 133:d4dda5c437f0 1234 /* Change state */
mbed_official 133:d4dda5c437f0 1235 hhash->State = HAL_HASH_STATE_TIMEOUT;
mbed_official 133:d4dda5c437f0 1236
mbed_official 133:d4dda5c437f0 1237 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1238 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1239
mbed_official 133:d4dda5c437f0 1240 return HAL_TIMEOUT;
mbed_official 133:d4dda5c437f0 1241 }
mbed_official 133:d4dda5c437f0 1242 }
mbed_official 133:d4dda5c437f0 1243 }
mbed_official 133:d4dda5c437f0 1244
mbed_official 133:d4dda5c437f0 1245 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1246 HASHEx_GetDigest(pOutBuffer, 32);
mbed_official 133:d4dda5c437f0 1247
mbed_official 133:d4dda5c437f0 1248 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1249 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1250
mbed_official 133:d4dda5c437f0 1251 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1252 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1253
mbed_official 133:d4dda5c437f0 1254 /* Return function status */
mbed_official 133:d4dda5c437f0 1255 return HAL_OK;
mbed_official 133:d4dda5c437f0 1256 }
mbed_official 133:d4dda5c437f0 1257
mbed_official 133:d4dda5c437f0 1258
mbed_official 133:d4dda5c437f0 1259 /**
mbed_official 133:d4dda5c437f0 1260 * @}
mbed_official 133:d4dda5c437f0 1261 */
mbed_official 133:d4dda5c437f0 1262 /** @defgroup HASHEx_Group5 HMAC processing functions using DMA mode
mbed_official 133:d4dda5c437f0 1263 * @brief HMAC processing functions using DMA mode .
mbed_official 133:d4dda5c437f0 1264 *
mbed_official 133:d4dda5c437f0 1265 @verbatim
mbed_official 133:d4dda5c437f0 1266 ===============================================================================
mbed_official 133:d4dda5c437f0 1267 ##### HMAC processing using DMA functions #####
mbed_official 133:d4dda5c437f0 1268 ===============================================================================
mbed_official 133:d4dda5c437f0 1269 [..] This section provides functions allowing to calculate in DMA mode
mbed_official 133:d4dda5c437f0 1270 the HMAC value using one of the following algorithms:
mbed_official 133:d4dda5c437f0 1271 (+) SHA224
mbed_official 133:d4dda5c437f0 1272 (+) SHA256
mbed_official 133:d4dda5c437f0 1273
mbed_official 133:d4dda5c437f0 1274 @endverbatim
mbed_official 133:d4dda5c437f0 1275 * @{
mbed_official 133:d4dda5c437f0 1276 */
mbed_official 133:d4dda5c437f0 1277
mbed_official 133:d4dda5c437f0 1278 /**
mbed_official 133:d4dda5c437f0 1279 * @brief Initializes the HASH peripheral in HMAC SHA224 mode
mbed_official 133:d4dda5c437f0 1280 * then enables DMA to control data transfer.
mbed_official 242:7074e42da0b2 1281 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1282 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 1283 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1284 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1285 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1286 * @retval HAL status
mbed_official 133:d4dda5c437f0 1287 */
mbed_official 133:d4dda5c437f0 1288 HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1289 {
mbed_official 133:d4dda5c437f0 1290 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 1291
mbed_official 133:d4dda5c437f0 1292 /* Process Locked */
mbed_official 133:d4dda5c437f0 1293 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1294
mbed_official 133:d4dda5c437f0 1295 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1296 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1297
mbed_official 133:d4dda5c437f0 1298 /* Save buffer pointer and size in handle */
mbed_official 133:d4dda5c437f0 1299 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 1300 hhash->HashBuffSize = Size;
mbed_official 133:d4dda5c437f0 1301 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1302
mbed_official 133:d4dda5c437f0 1303 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1304 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1305 {
mbed_official 133:d4dda5c437f0 1306 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1307 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1308 {
mbed_official 133:d4dda5c437f0 1309 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 1310 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1311 }
mbed_official 133:d4dda5c437f0 1312 else
mbed_official 133:d4dda5c437f0 1313 {
mbed_official 133:d4dda5c437f0 1314 /* Select the HMAC SHA224 mode */
mbed_official 133:d4dda5c437f0 1315 HASH->CR |= (HASH_AlgoSelection_SHA224 | HASH_AlgoMode_HMAC | HASH_CR_INIT);
mbed_official 133:d4dda5c437f0 1316 }
mbed_official 133:d4dda5c437f0 1317 }
mbed_official 133:d4dda5c437f0 1318
mbed_official 133:d4dda5c437f0 1319 /* Set the phase */
mbed_official 133:d4dda5c437f0 1320 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1321
mbed_official 133:d4dda5c437f0 1322 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1323 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1324
mbed_official 133:d4dda5c437f0 1325 /* Get the key address */
mbed_official 133:d4dda5c437f0 1326 inputaddr = (uint32_t)(hhash->Init.pKey);
mbed_official 133:d4dda5c437f0 1327
mbed_official 133:d4dda5c437f0 1328 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1329 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1330 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1331 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1332
mbed_official 133:d4dda5c437f0 1333 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1334 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
mbed_official 133:d4dda5c437f0 1335 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1336 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1337
mbed_official 133:d4dda5c437f0 1338 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1339 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1340
mbed_official 133:d4dda5c437f0 1341 /* Return function status */
mbed_official 133:d4dda5c437f0 1342 return HAL_OK;
mbed_official 133:d4dda5c437f0 1343 }
mbed_official 133:d4dda5c437f0 1344
mbed_official 133:d4dda5c437f0 1345 /**
mbed_official 133:d4dda5c437f0 1346 * @brief Initializes the HASH peripheral in HMAC SHA256 mode
mbed_official 133:d4dda5c437f0 1347 * then enables DMA to control data transfer.
mbed_official 242:7074e42da0b2 1348 * @param hhash: pointer to a HASH_HandleTypeDef structure that contains
mbed_official 242:7074e42da0b2 1349 * the configuration information for HASH module
mbed_official 133:d4dda5c437f0 1350 * @param pInBuffer: Pointer to the input buffer (buffer to be hashed).
mbed_official 133:d4dda5c437f0 1351 * @param Size: Length of the input buffer in bytes.
mbed_official 133:d4dda5c437f0 1352 * If the Size is not multiple of 64 bytes, the padding is managed by hardware.
mbed_official 133:d4dda5c437f0 1353 * @retval HAL status
mbed_official 133:d4dda5c437f0 1354 */
mbed_official 133:d4dda5c437f0 1355 HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1356 {
mbed_official 133:d4dda5c437f0 1357 uint32_t inputaddr;
mbed_official 133:d4dda5c437f0 1358
mbed_official 133:d4dda5c437f0 1359 /* Process Locked */
mbed_official 133:d4dda5c437f0 1360 __HAL_LOCK(hhash);
mbed_official 133:d4dda5c437f0 1361
mbed_official 133:d4dda5c437f0 1362 /* Change the HASH state */
mbed_official 133:d4dda5c437f0 1363 hhash->State = HAL_HASH_STATE_BUSY;
mbed_official 133:d4dda5c437f0 1364
mbed_official 133:d4dda5c437f0 1365 /* Save buffer pointer and size in handle */
mbed_official 133:d4dda5c437f0 1366 hhash->pHashInBuffPtr = pInBuffer;
mbed_official 133:d4dda5c437f0 1367 hhash->HashBuffSize = Size;
mbed_official 133:d4dda5c437f0 1368 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1369
mbed_official 133:d4dda5c437f0 1370 /* Check if initialization phase has already been performed */
mbed_official 133:d4dda5c437f0 1371 if(hhash->Phase == HAL_HASH_PHASE_READY)
mbed_official 133:d4dda5c437f0 1372 {
mbed_official 133:d4dda5c437f0 1373 /* Check if key size is greater than 64 bytes */
mbed_official 133:d4dda5c437f0 1374 if(hhash->Init.KeySize > 64)
mbed_official 133:d4dda5c437f0 1375 {
mbed_official 133:d4dda5c437f0 1376 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 1377 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC | HASH_HMACKeyType_LongKey);
mbed_official 133:d4dda5c437f0 1378 }
mbed_official 133:d4dda5c437f0 1379 else
mbed_official 133:d4dda5c437f0 1380 {
mbed_official 133:d4dda5c437f0 1381 /* Select the HMAC SHA256 mode */
mbed_official 133:d4dda5c437f0 1382 HASH->CR |= (HASH_AlgoSelection_SHA256 | HASH_AlgoMode_HMAC);
mbed_official 133:d4dda5c437f0 1383 }
mbed_official 133:d4dda5c437f0 1384 /* Reset the HASH processor core, so that the HASH will be ready to compute
mbed_official 133:d4dda5c437f0 1385 the message digest of a new message */
mbed_official 133:d4dda5c437f0 1386 HASH->CR |= HASH_CR_INIT;
mbed_official 133:d4dda5c437f0 1387 }
mbed_official 133:d4dda5c437f0 1388
mbed_official 133:d4dda5c437f0 1389 /* Set the phase */
mbed_official 133:d4dda5c437f0 1390 hhash->Phase = HAL_HASH_PHASE_PROCESS;
mbed_official 133:d4dda5c437f0 1391
mbed_official 133:d4dda5c437f0 1392 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1393 __HAL_HASH_SET_NBVALIDBITS(hhash->Init.KeySize);
mbed_official 133:d4dda5c437f0 1394
mbed_official 133:d4dda5c437f0 1395 /* Get the key address */
mbed_official 133:d4dda5c437f0 1396 inputaddr = (uint32_t)(hhash->Init.pKey);
mbed_official 133:d4dda5c437f0 1397
mbed_official 133:d4dda5c437f0 1398 /* Set the HASH DMA transfer complete callback */
mbed_official 133:d4dda5c437f0 1399 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1400 /* Set the DMA error callback */
mbed_official 133:d4dda5c437f0 1401 hhash->hdmain->XferErrorCallback = HASHEx_DMAError;
mbed_official 133:d4dda5c437f0 1402
mbed_official 133:d4dda5c437f0 1403 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1404 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (hhash->Init.KeySize%4 ? (hhash->Init.KeySize+3)/4:hhash->Init.KeySize/4));
mbed_official 133:d4dda5c437f0 1405 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1406 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1407
mbed_official 133:d4dda5c437f0 1408 /* Process Unlocked */
mbed_official 133:d4dda5c437f0 1409 __HAL_UNLOCK(hhash);
mbed_official 133:d4dda5c437f0 1410
mbed_official 133:d4dda5c437f0 1411 /* Return function status */
mbed_official 133:d4dda5c437f0 1412 return HAL_OK;
mbed_official 133:d4dda5c437f0 1413 }
mbed_official 133:d4dda5c437f0 1414
mbed_official 133:d4dda5c437f0 1415 /**
mbed_official 133:d4dda5c437f0 1416 * @}
mbed_official 133:d4dda5c437f0 1417 */
mbed_official 133:d4dda5c437f0 1418
mbed_official 133:d4dda5c437f0 1419 /**
mbed_official 133:d4dda5c437f0 1420 * @brief Writes the input buffer in data register.
mbed_official 133:d4dda5c437f0 1421 * @param pInBuffer: Pointer to input buffer
mbed_official 133:d4dda5c437f0 1422 * @param Size: The size of input buffer
mbed_official 133:d4dda5c437f0 1423 * @retval None
mbed_official 133:d4dda5c437f0 1424 */
mbed_official 133:d4dda5c437f0 1425 static void HASHEx_WriteData(uint8_t *pInBuffer, uint32_t Size)
mbed_official 133:d4dda5c437f0 1426 {
mbed_official 133:d4dda5c437f0 1427 uint32_t buffercounter;
mbed_official 133:d4dda5c437f0 1428 uint32_t inputaddr = (uint32_t) pInBuffer;
mbed_official 133:d4dda5c437f0 1429
mbed_official 133:d4dda5c437f0 1430 for(buffercounter = 0; buffercounter < Size; buffercounter+=4)
mbed_official 133:d4dda5c437f0 1431 {
mbed_official 133:d4dda5c437f0 1432 HASH->DIN = *(uint32_t*)inputaddr;
mbed_official 133:d4dda5c437f0 1433 inputaddr+=4;
mbed_official 133:d4dda5c437f0 1434 }
mbed_official 133:d4dda5c437f0 1435 }
mbed_official 133:d4dda5c437f0 1436
mbed_official 133:d4dda5c437f0 1437 /**
mbed_official 133:d4dda5c437f0 1438 * @brief Provides the message digest result.
mbed_official 133:d4dda5c437f0 1439 * @param pMsgDigest: Pointer to the message digest
mbed_official 133:d4dda5c437f0 1440 * @param Size: The size of the message digest in bytes
mbed_official 133:d4dda5c437f0 1441 * @retval None
mbed_official 133:d4dda5c437f0 1442 */
mbed_official 133:d4dda5c437f0 1443 static void HASHEx_GetDigest(uint8_t *pMsgDigest, uint8_t Size)
mbed_official 133:d4dda5c437f0 1444 {
mbed_official 133:d4dda5c437f0 1445 uint32_t msgdigest = (uint32_t)pMsgDigest;
mbed_official 133:d4dda5c437f0 1446
mbed_official 133:d4dda5c437f0 1447 switch(Size)
mbed_official 133:d4dda5c437f0 1448 {
mbed_official 133:d4dda5c437f0 1449 case 16:
mbed_official 133:d4dda5c437f0 1450 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1451 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1452 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1453 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1454 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1455 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1456 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1457 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1458 break;
mbed_official 133:d4dda5c437f0 1459 case 20:
mbed_official 133:d4dda5c437f0 1460 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1461 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1462 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1463 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1464 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1465 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1466 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1467 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1468 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1469 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1470 break;
mbed_official 133:d4dda5c437f0 1471 case 28:
mbed_official 133:d4dda5c437f0 1472 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1473 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1474 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1475 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1476 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1477 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1478 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1479 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1480 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1481 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1482 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1483 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
mbed_official 133:d4dda5c437f0 1484 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1485 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
mbed_official 133:d4dda5c437f0 1486 break;
mbed_official 133:d4dda5c437f0 1487 case 32:
mbed_official 133:d4dda5c437f0 1488 /* Read the message digest */
mbed_official 133:d4dda5c437f0 1489 *(uint32_t*)(msgdigest) = __REV(HASH->HR[0]);
mbed_official 133:d4dda5c437f0 1490 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1491 *(uint32_t*)(msgdigest) = __REV(HASH->HR[1]);
mbed_official 133:d4dda5c437f0 1492 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1493 *(uint32_t*)(msgdigest) = __REV(HASH->HR[2]);
mbed_official 133:d4dda5c437f0 1494 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1495 *(uint32_t*)(msgdigest) = __REV(HASH->HR[3]);
mbed_official 133:d4dda5c437f0 1496 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1497 *(uint32_t*)(msgdigest) = __REV(HASH->HR[4]);
mbed_official 133:d4dda5c437f0 1498 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1499 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[5]);
mbed_official 133:d4dda5c437f0 1500 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1501 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[6]);
mbed_official 133:d4dda5c437f0 1502 msgdigest+=4;
mbed_official 133:d4dda5c437f0 1503 *(uint32_t*)(msgdigest) = __REV(HASH_DIGEST->HR[7]);
mbed_official 133:d4dda5c437f0 1504 break;
mbed_official 133:d4dda5c437f0 1505 default:
mbed_official 133:d4dda5c437f0 1506 break;
mbed_official 133:d4dda5c437f0 1507 }
mbed_official 133:d4dda5c437f0 1508 }
mbed_official 133:d4dda5c437f0 1509
mbed_official 133:d4dda5c437f0 1510 /**
mbed_official 133:d4dda5c437f0 1511 * @brief DMA HASH Input Data complete callback.
mbed_official 133:d4dda5c437f0 1512 * @param hdma: DMA handle
mbed_official 133:d4dda5c437f0 1513 * @retval None
mbed_official 133:d4dda5c437f0 1514 */
mbed_official 133:d4dda5c437f0 1515 static void HASHEx_DMAXferCplt(DMA_HandleTypeDef *hdma)
mbed_official 133:d4dda5c437f0 1516 {
mbed_official 133:d4dda5c437f0 1517 HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 133:d4dda5c437f0 1518 uint32_t inputaddr = 0;
mbed_official 133:d4dda5c437f0 1519 uint32_t buffersize = 0;
mbed_official 133:d4dda5c437f0 1520
mbed_official 133:d4dda5c437f0 1521 if((HASH->CR & HASH_CR_MODE) != HASH_CR_MODE)
mbed_official 133:d4dda5c437f0 1522 {
mbed_official 133:d4dda5c437f0 1523 /* Disable the DMA transfer */
mbed_official 133:d4dda5c437f0 1524 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1525
mbed_official 133:d4dda5c437f0 1526 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1527 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1528
mbed_official 133:d4dda5c437f0 1529 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 1530 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 1531 }
mbed_official 133:d4dda5c437f0 1532 else
mbed_official 133:d4dda5c437f0 1533 {
mbed_official 133:d4dda5c437f0 1534 /* Increment Interrupt counter */
mbed_official 133:d4dda5c437f0 1535 hhash->HashInCount++;
mbed_official 133:d4dda5c437f0 1536 /* Disable the DMA transfer before starting the next transfer */
mbed_official 133:d4dda5c437f0 1537 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1538
mbed_official 133:d4dda5c437f0 1539 if(hhash->HashInCount <= 2)
mbed_official 133:d4dda5c437f0 1540 {
mbed_official 133:d4dda5c437f0 1541 /* In case HashInCount = 1, set the DMA to transfer data to HASH DIN register */
mbed_official 133:d4dda5c437f0 1542 if(hhash->HashInCount == 1)
mbed_official 133:d4dda5c437f0 1543 {
mbed_official 133:d4dda5c437f0 1544 inputaddr = (uint32_t)hhash->pHashInBuffPtr;
mbed_official 133:d4dda5c437f0 1545 buffersize = hhash->HashBuffSize;
mbed_official 133:d4dda5c437f0 1546 }
mbed_official 133:d4dda5c437f0 1547 /* In case HashInCount = 2, set the DMA to transfer key to HASH DIN register */
mbed_official 133:d4dda5c437f0 1548 else if(hhash->HashInCount == 2)
mbed_official 133:d4dda5c437f0 1549 {
mbed_official 133:d4dda5c437f0 1550 inputaddr = (uint32_t)hhash->Init.pKey;
mbed_official 133:d4dda5c437f0 1551 buffersize = hhash->Init.KeySize;
mbed_official 133:d4dda5c437f0 1552 }
mbed_official 133:d4dda5c437f0 1553 /* Configure the number of valid bits in last word of the message */
mbed_official 133:d4dda5c437f0 1554 HASH->STR |= 8 * (buffersize % 4);
mbed_official 133:d4dda5c437f0 1555
mbed_official 133:d4dda5c437f0 1556 /* Set the HASH DMA transfer complete */
mbed_official 133:d4dda5c437f0 1557 hhash->hdmain->XferCpltCallback = HASHEx_DMAXferCplt;
mbed_official 133:d4dda5c437f0 1558
mbed_official 133:d4dda5c437f0 1559 /* Enable the DMA In DMA Stream */
mbed_official 133:d4dda5c437f0 1560 HAL_DMA_Start_IT(hhash->hdmain, inputaddr, (uint32_t)&HASH->DIN, (buffersize%4 ? (buffersize+3)/4:buffersize/4));
mbed_official 133:d4dda5c437f0 1561
mbed_official 133:d4dda5c437f0 1562 /* Enable DMA requests */
mbed_official 133:d4dda5c437f0 1563 HASH->CR |= (HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1564 }
mbed_official 133:d4dda5c437f0 1565 else
mbed_official 133:d4dda5c437f0 1566 {
mbed_official 133:d4dda5c437f0 1567 /* Disable the DMA transfer */
mbed_official 133:d4dda5c437f0 1568 HASH->CR &= (uint32_t)(~HASH_CR_DMAE);
mbed_official 133:d4dda5c437f0 1569
mbed_official 133:d4dda5c437f0 1570 /* Reset the InCount */
mbed_official 133:d4dda5c437f0 1571 hhash->HashInCount = 0;
mbed_official 133:d4dda5c437f0 1572
mbed_official 133:d4dda5c437f0 1573 /* Change HASH peripheral state */
mbed_official 133:d4dda5c437f0 1574 hhash->State = HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1575
mbed_official 133:d4dda5c437f0 1576 /* Call Input data transfer complete callback */
mbed_official 133:d4dda5c437f0 1577 HAL_HASH_InCpltCallback(hhash);
mbed_official 133:d4dda5c437f0 1578 }
mbed_official 133:d4dda5c437f0 1579 }
mbed_official 133:d4dda5c437f0 1580 }
mbed_official 133:d4dda5c437f0 1581
mbed_official 133:d4dda5c437f0 1582 /**
mbed_official 133:d4dda5c437f0 1583 * @brief DMA HASH communication error callback.
mbed_official 133:d4dda5c437f0 1584 * @param hdma: DMA handle
mbed_official 133:d4dda5c437f0 1585 * @retval None
mbed_official 133:d4dda5c437f0 1586 */
mbed_official 133:d4dda5c437f0 1587 static void HASHEx_DMAError(DMA_HandleTypeDef *hdma)
mbed_official 133:d4dda5c437f0 1588 {
mbed_official 133:d4dda5c437f0 1589 HASH_HandleTypeDef* hhash = ( HASH_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
mbed_official 133:d4dda5c437f0 1590 hhash->State= HAL_HASH_STATE_READY;
mbed_official 133:d4dda5c437f0 1591 HAL_HASH_ErrorCallback(hhash);
mbed_official 133:d4dda5c437f0 1592 }
mbed_official 133:d4dda5c437f0 1593
mbed_official 133:d4dda5c437f0 1594
mbed_official 133:d4dda5c437f0 1595 /**
mbed_official 133:d4dda5c437f0 1596 * @}
mbed_official 133:d4dda5c437f0 1597 */
mbed_official 133:d4dda5c437f0 1598 #endif /* STM32F437xx || STM32F439xx */
mbed_official 133:d4dda5c437f0 1599
mbed_official 133:d4dda5c437f0 1600 #endif /* HAL_HASH_MODULE_ENABLED */
mbed_official 133:d4dda5c437f0 1601 /**
mbed_official 133:d4dda5c437f0 1602 * @}
mbed_official 133:d4dda5c437f0 1603 */
mbed_official 133:d4dda5c437f0 1604
mbed_official 133:d4dda5c437f0 1605 /**
mbed_official 133:d4dda5c437f0 1606 * @}
mbed_official 133:d4dda5c437f0 1607 */
mbed_official 133:d4dda5c437f0 1608
mbed_official 133:d4dda5c437f0 1609 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/