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targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_dma_ex.c@242:7074e42da0b2, 2014-06-27 (annotated)

Committer:
mbed_official
Date:
Fri Jun 27 07:30:09 2014 +0100
Revision:
242:7074e42da0b2
Parent:
133:d4dda5c437f0 
Synchronized with git revision 124ef5e3add9e74a3221347a3fbeea7c8b3cf353



Full URL: https://github.com/mbedmicro/mbed/commit/124ef5e3add9e74a3221347a3fbeea7c8b3cf353/



[DISCO_F407VG] HAL update.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 133:d4dda5c437f0 1 /**
mbed_official 133:d4dda5c437f0 2 ******************************************************************************
mbed_official 133:d4dda5c437f0 3 * @file stm32f4xx_hal_dma_ex.c
mbed_official 133:d4dda5c437f0 4 * @author MCD Application Team
mbed_official 242:7074e42da0b2 5 * @version V1.1.0RC2
mbed_official 242:7074e42da0b2 6 * @date 14-May-2014
mbed_official 133:d4dda5c437f0 7 * @brief DMA Extension HAL module driver
mbed_official 133:d4dda5c437f0 8 * This file provides firmware functions to manage the following
mbed_official 133:d4dda5c437f0 9 * functionalities of the DMA Extension peripheral:
mbed_official 133:d4dda5c437f0 10 * + Extended features functions
mbed_official 133:d4dda5c437f0 11 *
mbed_official 133:d4dda5c437f0 12 @verbatim
mbed_official 133:d4dda5c437f0 13 ==============================================================================
mbed_official 133:d4dda5c437f0 14 ##### How to use this driver #####
mbed_official 133:d4dda5c437f0 15 ==============================================================================
mbed_official 133:d4dda5c437f0 16 [..]
mbed_official 133:d4dda5c437f0 17 The DMA Extension HAL driver can be used as follows:
mbed_official 133:d4dda5c437f0 18 (#) Start a multi buffer transfer using the HAL_DMA_MultiBufferStart() function
mbed_official 133:d4dda5c437f0 19 for polling mode or HAL_DMA_MultiBufferStart_IT() for interrupt mode.
mbed_official 133:d4dda5c437f0 20
mbed_official 133:d4dda5c437f0 21 -@- In Memory-to-Memory transfer mode, Multi (Double) Buffer mode is not allowed.
mbed_official 133:d4dda5c437f0 22 -@- When Multi (Double) Buffer mode is enabled the, transfer is circular by default.
mbed_official 133:d4dda5c437f0 23 -@- In Multi (Double) buffer mode, it is possible to update the base address for
mbed_official 242:7074e42da0b2 24 the AHB memory port on the fly (DMA_SxM0AR or DMA_SxM1AR) when the stream is enabled.
mbed_official 133:d4dda5c437f0 25
mbed_official 133:d4dda5c437f0 26 @endverbatim
mbed_official 133:d4dda5c437f0 27 ******************************************************************************
mbed_official 133:d4dda5c437f0 28 * @attention
mbed_official 133:d4dda5c437f0 29 *
mbed_official 133:d4dda5c437f0 30 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 133:d4dda5c437f0 31 *
mbed_official 133:d4dda5c437f0 32 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 133:d4dda5c437f0 33 * are permitted provided that the following conditions are met:
mbed_official 133:d4dda5c437f0 34 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 133:d4dda5c437f0 35 * this list of conditions and the following disclaimer.
mbed_official 133:d4dda5c437f0 36 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 133:d4dda5c437f0 37 * this list of conditions and the following disclaimer in the documentation
mbed_official 133:d4dda5c437f0 38 * and/or other materials provided with the distribution.
mbed_official 133:d4dda5c437f0 39 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 133:d4dda5c437f0 40 * may be used to endorse or promote products derived from this software
mbed_official 133:d4dda5c437f0 41 * without specific prior written permission.
mbed_official 133:d4dda5c437f0 42 *
mbed_official 133:d4dda5c437f0 43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 133:d4dda5c437f0 44 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 133:d4dda5c437f0 45 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 133:d4dda5c437f0 46 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 133:d4dda5c437f0 47 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 133:d4dda5c437f0 48 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 133:d4dda5c437f0 49 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 133:d4dda5c437f0 50 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 133:d4dda5c437f0 51 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 133:d4dda5c437f0 52 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 133:d4dda5c437f0 53 *
mbed_official 133:d4dda5c437f0 54 ******************************************************************************
mbed_official 133:d4dda5c437f0 55 */
mbed_official 133:d4dda5c437f0 56
mbed_official 133:d4dda5c437f0 57 /* Includes ------------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 58 #include "stm32f4xx_hal.h"
mbed_official 133:d4dda5c437f0 59
mbed_official 133:d4dda5c437f0 60 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 133:d4dda5c437f0 61 * @{
mbed_official 133:d4dda5c437f0 62 */
mbed_official 133:d4dda5c437f0 63
mbed_official 133:d4dda5c437f0 64 /** @defgroup DMAEx
mbed_official 133:d4dda5c437f0 65 * @brief DMA Extended HAL module driver
mbed_official 133:d4dda5c437f0 66 * @{
mbed_official 133:d4dda5c437f0 67 */
mbed_official 133:d4dda5c437f0 68
mbed_official 133:d4dda5c437f0 69 #ifdef HAL_DMA_MODULE_ENABLED
mbed_official 133:d4dda5c437f0 70
mbed_official 133:d4dda5c437f0 71 /* Private typedef -----------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 72 /* Private define ------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 73 /* Private macro -------------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 74 /* Private variables ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 75 /* Private function prototypes -----------------------------------------------*/
mbed_official 133:d4dda5c437f0 76 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength);
mbed_official 133:d4dda5c437f0 77
mbed_official 133:d4dda5c437f0 78 /* Private functions ---------------------------------------------------------*/
mbed_official 133:d4dda5c437f0 79
mbed_official 133:d4dda5c437f0 80 /** @defgroup DMAEx_Private_Functions
mbed_official 133:d4dda5c437f0 81 * @{
mbed_official 133:d4dda5c437f0 82 */
mbed_official 133:d4dda5c437f0 83
mbed_official 133:d4dda5c437f0 84
mbed_official 133:d4dda5c437f0 85 /** @defgroup DMAEx_Group1 Extended features functions
mbed_official 133:d4dda5c437f0 86 * @brief Extended features functions
mbed_official 133:d4dda5c437f0 87 *
mbed_official 133:d4dda5c437f0 88 @verbatim
mbed_official 133:d4dda5c437f0 89 ===============================================================================
mbed_official 133:d4dda5c437f0 90 ##### Extended features functions #####
mbed_official 133:d4dda5c437f0 91 ===============================================================================
mbed_official 133:d4dda5c437f0 92 [..] This section provides functions allowing to:
mbed_official 133:d4dda5c437f0 93 (+) Configure the source, destination address and data length and
mbed_official 133:d4dda5c437f0 94 Start MultiBuffer DMA transfer
mbed_official 133:d4dda5c437f0 95 (+) Configure the source, destination address and data length and
mbed_official 133:d4dda5c437f0 96 Start MultiBuffer DMA transfer with interrupt
mbed_official 133:d4dda5c437f0 97 (+) Change on the fly the memory0 or memory1 address.
mbed_official 133:d4dda5c437f0 98
mbed_official 133:d4dda5c437f0 99 @endverbatim
mbed_official 133:d4dda5c437f0 100 * @{
mbed_official 133:d4dda5c437f0 101 */
mbed_official 133:d4dda5c437f0 102
mbed_official 133:d4dda5c437f0 103
mbed_official 133:d4dda5c437f0 104 /**
mbed_official 133:d4dda5c437f0 105 * @brief Starts the multi_buffer DMA Transfer.
mbed_official 133:d4dda5c437f0 106 * @param hdma : pointer to a DMA_HandleTypeDef structure that contains
mbed_official 133:d4dda5c437f0 107 * the configuration information for the specified DMA Stream.
mbed_official 133:d4dda5c437f0 108 * @param SrcAddress: The source memory Buffer address
mbed_official 133:d4dda5c437f0 109 * @param DstAddress: The destination memory Buffer address
mbed_official 133:d4dda5c437f0 110 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
mbed_official 133:d4dda5c437f0 111 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 133:d4dda5c437f0 112 * @retval HAL status
mbed_official 133:d4dda5c437f0 113 */
mbed_official 133:d4dda5c437f0 114 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
mbed_official 133:d4dda5c437f0 115 {
mbed_official 133:d4dda5c437f0 116 /* Process Locked */
mbed_official 133:d4dda5c437f0 117 __HAL_LOCK(hdma);
mbed_official 133:d4dda5c437f0 118
mbed_official 133:d4dda5c437f0 119 /* Current memory buffer used is Memory 0 */
mbed_official 133:d4dda5c437f0 120 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 133:d4dda5c437f0 121 {
mbed_official 133:d4dda5c437f0 122 hdma->State = HAL_DMA_STATE_BUSY_MEM0;
mbed_official 133:d4dda5c437f0 123 }
mbed_official 133:d4dda5c437f0 124 /* Current memory buffer used is Memory 1 */
mbed_official 133:d4dda5c437f0 125 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 133:d4dda5c437f0 126 {
mbed_official 133:d4dda5c437f0 127 hdma->State = HAL_DMA_STATE_BUSY_MEM1;
mbed_official 133:d4dda5c437f0 128 }
mbed_official 133:d4dda5c437f0 129
mbed_official 133:d4dda5c437f0 130 /* Check the parameters */
mbed_official 133:d4dda5c437f0 131 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 133:d4dda5c437f0 132
mbed_official 133:d4dda5c437f0 133 /* Disable the peripheral */
mbed_official 133:d4dda5c437f0 134 __HAL_DMA_DISABLE(hdma);
mbed_official 133:d4dda5c437f0 135
mbed_official 133:d4dda5c437f0 136 /* Enable the double buffer mode */
mbed_official 133:d4dda5c437f0 137 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
mbed_official 133:d4dda5c437f0 138
mbed_official 133:d4dda5c437f0 139 /* Configure DMA Stream destination address */
mbed_official 133:d4dda5c437f0 140 hdma->Instance->M1AR = SecondMemAddress;
mbed_official 133:d4dda5c437f0 141
mbed_official 133:d4dda5c437f0 142 /* Configure the source, destination address and the data length */
mbed_official 133:d4dda5c437f0 143 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 133:d4dda5c437f0 144
mbed_official 133:d4dda5c437f0 145 /* Enable the peripheral */
mbed_official 133:d4dda5c437f0 146 __HAL_DMA_ENABLE(hdma);
mbed_official 133:d4dda5c437f0 147
mbed_official 133:d4dda5c437f0 148 return HAL_OK;
mbed_official 133:d4dda5c437f0 149 }
mbed_official 133:d4dda5c437f0 150
mbed_official 133:d4dda5c437f0 151 /**
mbed_official 133:d4dda5c437f0 152 * @brief Starts the multi_buffer DMA Transfer with interrupt enabled.
mbed_official 133:d4dda5c437f0 153 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 133:d4dda5c437f0 154 * the configuration information for the specified DMA Stream.
mbed_official 133:d4dda5c437f0 155 * @param SrcAddress: The source memory Buffer address
mbed_official 133:d4dda5c437f0 156 * @param DstAddress: The destination memory Buffer address
mbed_official 133:d4dda5c437f0 157 * @param SecondMemAddress: The second memory Buffer address in case of multi buffer Transfer
mbed_official 133:d4dda5c437f0 158 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 133:d4dda5c437f0 159 * @retval HAL status
mbed_official 133:d4dda5c437f0 160 */
mbed_official 133:d4dda5c437f0 161 HAL_StatusTypeDef HAL_DMAEx_MultiBufferStart_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t SecondMemAddress, uint32_t DataLength)
mbed_official 133:d4dda5c437f0 162 {
mbed_official 133:d4dda5c437f0 163 /* Process Locked */
mbed_official 133:d4dda5c437f0 164 __HAL_LOCK(hdma);
mbed_official 133:d4dda5c437f0 165
mbed_official 133:d4dda5c437f0 166 /* Current memory buffer used is Memory 0 */
mbed_official 133:d4dda5c437f0 167 if((hdma->Instance->CR & DMA_SxCR_CT) == 0)
mbed_official 133:d4dda5c437f0 168 {
mbed_official 133:d4dda5c437f0 169 hdma->State = HAL_DMA_STATE_BUSY_MEM0;
mbed_official 133:d4dda5c437f0 170 }
mbed_official 133:d4dda5c437f0 171 /* Current memory buffer used is Memory 1 */
mbed_official 133:d4dda5c437f0 172 else if((hdma->Instance->CR & DMA_SxCR_CT) != 0)
mbed_official 133:d4dda5c437f0 173 {
mbed_official 133:d4dda5c437f0 174 hdma->State = HAL_DMA_STATE_BUSY_MEM1;
mbed_official 133:d4dda5c437f0 175 }
mbed_official 133:d4dda5c437f0 176
mbed_official 133:d4dda5c437f0 177 /* Check the parameters */
mbed_official 133:d4dda5c437f0 178 assert_param(IS_DMA_BUFFER_SIZE(DataLength));
mbed_official 133:d4dda5c437f0 179
mbed_official 133:d4dda5c437f0 180 /* Disable the peripheral */
mbed_official 133:d4dda5c437f0 181 __HAL_DMA_DISABLE(hdma);
mbed_official 133:d4dda5c437f0 182
mbed_official 133:d4dda5c437f0 183 /* Enable the Double buffer mode */
mbed_official 133:d4dda5c437f0 184 hdma->Instance->CR |= (uint32_t)DMA_SxCR_DBM;
mbed_official 133:d4dda5c437f0 185
mbed_official 133:d4dda5c437f0 186 /* Configure DMA Stream destination address */
mbed_official 133:d4dda5c437f0 187 hdma->Instance->M1AR = SecondMemAddress;
mbed_official 133:d4dda5c437f0 188
mbed_official 133:d4dda5c437f0 189 /* Configure the source, destination address and the data length */
mbed_official 133:d4dda5c437f0 190 DMA_MultiBufferSetConfig(hdma, SrcAddress, DstAddress, DataLength);
mbed_official 133:d4dda5c437f0 191
mbed_official 133:d4dda5c437f0 192 /* Enable the transfer complete interrupt */
mbed_official 133:d4dda5c437f0 193 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TC);
mbed_official 133:d4dda5c437f0 194
mbed_official 133:d4dda5c437f0 195 /* Enable the Half transfer interrupt */
mbed_official 133:d4dda5c437f0 196 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_HT);
mbed_official 133:d4dda5c437f0 197
mbed_official 133:d4dda5c437f0 198 /* Enable the transfer Error interrupt */
mbed_official 133:d4dda5c437f0 199 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_TE);
mbed_official 133:d4dda5c437f0 200
mbed_official 133:d4dda5c437f0 201 /* Enable the fifo Error interrupt */
mbed_official 133:d4dda5c437f0 202 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_FE);
mbed_official 133:d4dda5c437f0 203
mbed_official 133:d4dda5c437f0 204 /* Enable the direct mode Error interrupt */
mbed_official 133:d4dda5c437f0 205 __HAL_DMA_ENABLE_IT(hdma, DMA_IT_DME);
mbed_official 133:d4dda5c437f0 206
mbed_official 133:d4dda5c437f0 207 /* Enable the peripheral */
mbed_official 133:d4dda5c437f0 208 __HAL_DMA_ENABLE(hdma);
mbed_official 133:d4dda5c437f0 209
mbed_official 133:d4dda5c437f0 210 return HAL_OK;
mbed_official 133:d4dda5c437f0 211 }
mbed_official 133:d4dda5c437f0 212
mbed_official 133:d4dda5c437f0 213 /**
mbed_official 133:d4dda5c437f0 214 * @brief Change the memory0 or memory1 address on the fly.
mbed_official 133:d4dda5c437f0 215 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 133:d4dda5c437f0 216 * the configuration information for the specified DMA Stream.
mbed_official 133:d4dda5c437f0 217 * @param Address: The new address
mbed_official 133:d4dda5c437f0 218 * @param memory: the memory to be changed, This parameter can be one of
mbed_official 133:d4dda5c437f0 219 * the following values:
mbed_official 242:7074e42da0b2 220 * MEMORY0 /
mbed_official 242:7074e42da0b2 221 * MEMORY1
mbed_official 133:d4dda5c437f0 222 * @note The MEMORY0 address can be changed only when the current transfer use
mbed_official 133:d4dda5c437f0 223 * MEMORY1 and the MEMORY1 address can be changed only when the current
mbed_official 133:d4dda5c437f0 224 * transfer use MEMORY0.
mbed_official 133:d4dda5c437f0 225 * @retval HAL status
mbed_official 133:d4dda5c437f0 226 */
mbed_official 133:d4dda5c437f0 227 HAL_StatusTypeDef HAL_DMAEx_ChangeMemory(DMA_HandleTypeDef *hdma, uint32_t Address, HAL_DMA_MemoryTypeDef memory)
mbed_official 133:d4dda5c437f0 228 {
mbed_official 133:d4dda5c437f0 229 if(memory == MEMORY0)
mbed_official 133:d4dda5c437f0 230 {
mbed_official 133:d4dda5c437f0 231 /* change the memory0 address */
mbed_official 133:d4dda5c437f0 232 hdma->Instance->M0AR = Address;
mbed_official 133:d4dda5c437f0 233 }
mbed_official 133:d4dda5c437f0 234 else
mbed_official 133:d4dda5c437f0 235 {
mbed_official 133:d4dda5c437f0 236 /* change the memory1 address */
mbed_official 133:d4dda5c437f0 237 hdma->Instance->M1AR = Address;
mbed_official 133:d4dda5c437f0 238 }
mbed_official 133:d4dda5c437f0 239
mbed_official 133:d4dda5c437f0 240 return HAL_OK;
mbed_official 133:d4dda5c437f0 241 }
mbed_official 133:d4dda5c437f0 242
mbed_official 133:d4dda5c437f0 243 /**
mbed_official 133:d4dda5c437f0 244 * @}
mbed_official 133:d4dda5c437f0 245 */
mbed_official 133:d4dda5c437f0 246
mbed_official 133:d4dda5c437f0 247 /**
mbed_official 133:d4dda5c437f0 248 * @brief Set the DMA Transfer parameter.
mbed_official 133:d4dda5c437f0 249 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 133:d4dda5c437f0 250 * the configuration information for the specified DMA Stream.
mbed_official 133:d4dda5c437f0 251 * @param SrcAddress: The source memory Buffer address
mbed_official 133:d4dda5c437f0 252 * @param DstAddress: The destination memory Buffer address
mbed_official 133:d4dda5c437f0 253 * @param DataLength: The length of data to be transferred from source to destination
mbed_official 133:d4dda5c437f0 254 * @retval HAL status
mbed_official 133:d4dda5c437f0 255 */
mbed_official 133:d4dda5c437f0 256 static void DMA_MultiBufferSetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
mbed_official 133:d4dda5c437f0 257 {
mbed_official 133:d4dda5c437f0 258 /* Configure DMA Stream data length */
mbed_official 133:d4dda5c437f0 259 hdma->Instance->NDTR = DataLength;
mbed_official 133:d4dda5c437f0 260
mbed_official 133:d4dda5c437f0 261 /* Peripheral to Memory */
mbed_official 133:d4dda5c437f0 262 if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
mbed_official 133:d4dda5c437f0 263 {
mbed_official 133:d4dda5c437f0 264 /* Configure DMA Stream destination address */
mbed_official 133:d4dda5c437f0 265 hdma->Instance->PAR = DstAddress;
mbed_official 133:d4dda5c437f0 266
mbed_official 133:d4dda5c437f0 267 /* Configure DMA Stream source address */
mbed_official 133:d4dda5c437f0 268 hdma->Instance->M0AR = SrcAddress;
mbed_official 133:d4dda5c437f0 269 }
mbed_official 133:d4dda5c437f0 270 /* Memory to Peripheral */
mbed_official 133:d4dda5c437f0 271 else
mbed_official 133:d4dda5c437f0 272 {
mbed_official 133:d4dda5c437f0 273 /* Configure DMA Stream source address */
mbed_official 133:d4dda5c437f0 274 hdma->Instance->PAR = SrcAddress;
mbed_official 133:d4dda5c437f0 275
mbed_official 133:d4dda5c437f0 276 /* Configure DMA Stream destination address */
mbed_official 133:d4dda5c437f0 277 hdma->Instance->M0AR = DstAddress;
mbed_official 133:d4dda5c437f0 278 }
mbed_official 133:d4dda5c437f0 279 }
mbed_official 133:d4dda5c437f0 280
mbed_official 133:d4dda5c437f0 281 /**
mbed_official 133:d4dda5c437f0 282 * @}
mbed_official 133:d4dda5c437f0 283 */
mbed_official 133:d4dda5c437f0 284
mbed_official 133:d4dda5c437f0 285 #endif /* HAL_DMA_MODULE_ENABLED */
mbed_official 133:d4dda5c437f0 286 /**
mbed_official 133:d4dda5c437f0 287 * @}
mbed_official 133:d4dda5c437f0 288 */
mbed_official 133:d4dda5c437f0 289
mbed_official 133:d4dda5c437f0 290 /**
mbed_official 133:d4dda5c437f0 291 * @}
mbed_official 133:d4dda5c437f0 292 */
mbed_official 133:d4dda5c437f0 293
mbed_official 133:d4dda5c437f0 294 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/