Sigve Sebastian Farstad
mbed w/ spi bug fig
Fork of
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mbed official
targets/cmsis/TARGET_STM/TARGET_DISCO_F407VG/stm32f4xx_hal_adc_ex.c@242:7074e42da0b2, 2014-06-27 (annotated)
- Committer:
- mbed_official
- Date:
- Fri Jun 27 07:30:09 2014 +0100
- Revision:
- 242:7074e42da0b2
- Parent:
- 133:d4dda5c437f0
Synchronized with git revision 124ef5e3add9e74a3221347a3fbeea7c8b3cf353
Full URL: https://github.com/mbedmicro/mbed/commit/124ef5e3add9e74a3221347a3fbeea7c8b3cf353/
[DISCO_F407VG] HAL update.
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 133:d4dda5c437f0 | 1 | /** |
| mbed_official | 133:d4dda5c437f0 | 2 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 3 | * @file stm32f4xx_hal_adc_ex.c |
| mbed_official | 133:d4dda5c437f0 | 4 | * @author MCD Application Team |
| mbed_official | 242:7074e42da0b2 | 5 | * @version V1.1.0RC2 |
| mbed_official | 242:7074e42da0b2 | 6 | * @date 14-May-2014 |
| mbed_official | 133:d4dda5c437f0 | 7 | * @brief This file provides firmware functions to manage the following |
| mbed_official | 133:d4dda5c437f0 | 8 | * functionalities of the ADC extension peripheral: |
| mbed_official | 133:d4dda5c437f0 | 9 | * + Extended features functions |
| mbed_official | 133:d4dda5c437f0 | 10 | * |
| mbed_official | 133:d4dda5c437f0 | 11 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 12 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 13 | ##### How to use this driver ##### |
| mbed_official | 133:d4dda5c437f0 | 14 | ============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 15 | [..] |
| mbed_official | 133:d4dda5c437f0 | 16 | (#)Initialize the ADC low level resources by implementing the HAL_ADC_MspInit(): |
| mbed_official | 133:d4dda5c437f0 | 17 | (##) Enable the ADC interface clock using __ADC_CLK_ENABLE() |
| mbed_official | 133:d4dda5c437f0 | 18 | (##) ADC pins configuration |
| mbed_official | 133:d4dda5c437f0 | 19 | (+++) Enable the clock for the ADC GPIOs using the following function: |
| mbed_official | 133:d4dda5c437f0 | 20 | __GPIOx_CLK_ENABLE() |
| mbed_official | 133:d4dda5c437f0 | 21 | (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() |
| mbed_official | 133:d4dda5c437f0 | 22 | (##) In case of using interrupts (e.g. HAL_ADC_Start_IT()) |
| mbed_official | 133:d4dda5c437f0 | 23 | (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority() |
| mbed_official | 133:d4dda5c437f0 | 24 | (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ() |
| mbed_official | 133:d4dda5c437f0 | 25 | (+++) In ADC IRQ handler, call HAL_ADC_IRQHandler() |
| mbed_official | 133:d4dda5c437f0 | 26 | (##) In case of using DMA to control data transfer (e.g. HAL_ADC_Start_DMA()) |
| mbed_official | 242:7074e42da0b2 | 27 | (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE() |
| mbed_official | 242:7074e42da0b2 | 28 | (+++) Configure and enable two DMA streams stream for managing data |
| mbed_official | 133:d4dda5c437f0 | 29 | transfer from peripheral to memory (output stream) |
| mbed_official | 242:7074e42da0b2 | 30 | (+++) Associate the initilalized DMA handle to the ADC DMA handle |
| mbed_official | 133:d4dda5c437f0 | 31 | using __HAL_LINKDMA() |
| mbed_official | 242:7074e42da0b2 | 32 | (+++) Configure the priority and enable the NVIC for the transfer complete |
| mbed_official | 133:d4dda5c437f0 | 33 | interrupt on the two DMA Streams. The output stream should have higher |
| mbed_official | 242:7074e42da0b2 | 34 | priority than the input stream. |
| mbed_official | 133:d4dda5c437f0 | 35 | (#) Configure the ADC Prescaler, conversion resolution and data alignment |
| mbed_official | 133:d4dda5c437f0 | 36 | using the HAL_ADC_Init() function. |
| mbed_official | 133:d4dda5c437f0 | 37 | |
| mbed_official | 133:d4dda5c437f0 | 38 | (#) Configure the ADC Injected channels group features, use HAL_ADC_Init() |
| mbed_official | 133:d4dda5c437f0 | 39 | and HAL_ADC_ConfigChannel() functions. |
| mbed_official | 133:d4dda5c437f0 | 40 | |
| mbed_official | 242:7074e42da0b2 | 41 | (#) Three operation modes are available within this driver : |
| mbed_official | 133:d4dda5c437f0 | 42 | |
| mbed_official | 133:d4dda5c437f0 | 43 | *** Polling mode IO operation *** |
| mbed_official | 133:d4dda5c437f0 | 44 | ================================= |
| mbed_official | 133:d4dda5c437f0 | 45 | [..] |
| mbed_official | 133:d4dda5c437f0 | 46 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart() |
| mbed_official | 133:d4dda5c437f0 | 47 | (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage |
| mbed_official | 133:d4dda5c437f0 | 48 | user can specify the value of timeout according to his end application |
| mbed_official | 133:d4dda5c437f0 | 49 | (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function. |
| mbed_official | 133:d4dda5c437f0 | 50 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop() |
| mbed_official | 133:d4dda5c437f0 | 51 | |
| mbed_official | 133:d4dda5c437f0 | 52 | *** Interrupt mode IO operation *** |
| mbed_official | 133:d4dda5c437f0 | 53 | =================================== |
| mbed_official | 133:d4dda5c437f0 | 54 | [..] |
| mbed_official | 133:d4dda5c437f0 | 55 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT() |
| mbed_official | 133:d4dda5c437f0 | 56 | (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine |
| mbed_official | 133:d4dda5c437f0 | 57 | (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can |
| mbed_official | 133:d4dda5c437f0 | 58 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback |
| mbed_official | 133:d4dda5c437f0 | 59 | (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can |
| mbed_official | 133:d4dda5c437f0 | 60 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback |
| mbed_official | 133:d4dda5c437f0 | 61 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT() |
| mbed_official | 133:d4dda5c437f0 | 62 | |
| mbed_official | 133:d4dda5c437f0 | 63 | |
| mbed_official | 133:d4dda5c437f0 | 64 | *** DMA mode IO operation *** |
| mbed_official | 133:d4dda5c437f0 | 65 | ============================== |
| mbed_official | 133:d4dda5c437f0 | 66 | [..] |
| mbed_official | 133:d4dda5c437f0 | 67 | (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length |
| mbed_official | 242:7074e42da0b2 | 68 | of data to be transferred at each end of conversion |
| mbed_official | 133:d4dda5c437f0 | 69 | (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can |
| mbed_official | 133:d4dda5c437f0 | 70 | add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback |
| mbed_official | 133:d4dda5c437f0 | 71 | (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can |
| mbed_official | 133:d4dda5c437f0 | 72 | add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback |
| mbed_official | 133:d4dda5c437f0 | 73 | (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA() |
| mbed_official | 133:d4dda5c437f0 | 74 | |
| mbed_official | 133:d4dda5c437f0 | 75 | *** Multi mode ADCs Regular channels configuration *** |
| mbed_official | 133:d4dda5c437f0 | 76 | ====================================================== |
| mbed_official | 133:d4dda5c437f0 | 77 | [..] |
| mbed_official | 133:d4dda5c437f0 | 78 | (+) Select the Multi mode ADC regular channels features (dual or triple mode) |
| mbed_official | 133:d4dda5c437f0 | 79 | and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions. |
| mbed_official | 133:d4dda5c437f0 | 80 | (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length |
| mbed_official | 242:7074e42da0b2 | 81 | of data to be transferred at each end of conversion |
| mbed_official | 133:d4dda5c437f0 | 82 | (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function. |
| mbed_official | 133:d4dda5c437f0 | 83 | |
| mbed_official | 133:d4dda5c437f0 | 84 | |
| mbed_official | 133:d4dda5c437f0 | 85 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 86 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 87 | * @attention |
| mbed_official | 133:d4dda5c437f0 | 88 | * |
| mbed_official | 133:d4dda5c437f0 | 89 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 133:d4dda5c437f0 | 90 | * |
| mbed_official | 133:d4dda5c437f0 | 91 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 133:d4dda5c437f0 | 92 | * are permitted provided that the following conditions are met: |
| mbed_official | 133:d4dda5c437f0 | 93 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 94 | * this list of conditions and the following disclaimer. |
| mbed_official | 133:d4dda5c437f0 | 95 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 133:d4dda5c437f0 | 96 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 133:d4dda5c437f0 | 97 | * and/or other materials provided with the distribution. |
| mbed_official | 133:d4dda5c437f0 | 98 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 133:d4dda5c437f0 | 99 | * may be used to endorse or promote products derived from this software |
| mbed_official | 133:d4dda5c437f0 | 100 | * without specific prior written permission. |
| mbed_official | 133:d4dda5c437f0 | 101 | * |
| mbed_official | 133:d4dda5c437f0 | 102 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 133:d4dda5c437f0 | 103 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 133:d4dda5c437f0 | 104 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 133:d4dda5c437f0 | 105 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 133:d4dda5c437f0 | 106 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 133:d4dda5c437f0 | 107 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 133:d4dda5c437f0 | 108 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 133:d4dda5c437f0 | 109 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 133:d4dda5c437f0 | 110 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 133:d4dda5c437f0 | 111 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 133:d4dda5c437f0 | 112 | * |
| mbed_official | 133:d4dda5c437f0 | 113 | ****************************************************************************** |
| mbed_official | 133:d4dda5c437f0 | 114 | */ |
| mbed_official | 133:d4dda5c437f0 | 115 | |
| mbed_official | 133:d4dda5c437f0 | 116 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 117 | #include "stm32f4xx_hal.h" |
| mbed_official | 133:d4dda5c437f0 | 118 | |
| mbed_official | 133:d4dda5c437f0 | 119 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 133:d4dda5c437f0 | 120 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 121 | */ |
| mbed_official | 133:d4dda5c437f0 | 122 | |
| mbed_official | 133:d4dda5c437f0 | 123 | /** @defgroup ADCEx |
| mbed_official | 133:d4dda5c437f0 | 124 | * @brief ADC Extended driver modules |
| mbed_official | 133:d4dda5c437f0 | 125 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 126 | */ |
| mbed_official | 133:d4dda5c437f0 | 127 | |
| mbed_official | 133:d4dda5c437f0 | 128 | #ifdef HAL_ADC_MODULE_ENABLED |
| mbed_official | 133:d4dda5c437f0 | 129 | |
| mbed_official | 133:d4dda5c437f0 | 130 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 131 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 132 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 133 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 134 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 135 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma); |
| mbed_official | 133:d4dda5c437f0 | 136 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma); |
| mbed_official | 133:d4dda5c437f0 | 137 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma); |
| mbed_official | 133:d4dda5c437f0 | 138 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 133:d4dda5c437f0 | 139 | |
| mbed_official | 133:d4dda5c437f0 | 140 | /** @defgroup ADCEx_Private_Functions |
| mbed_official | 133:d4dda5c437f0 | 141 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 142 | */ |
| mbed_official | 133:d4dda5c437f0 | 143 | |
| mbed_official | 133:d4dda5c437f0 | 144 | /** @defgroup ADCEx_Group1 Extended features functions |
| mbed_official | 133:d4dda5c437f0 | 145 | * @brief Extended features functions |
| mbed_official | 133:d4dda5c437f0 | 146 | * |
| mbed_official | 133:d4dda5c437f0 | 147 | @verbatim |
| mbed_official | 133:d4dda5c437f0 | 148 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 149 | ##### Extended features functions ##### |
| mbed_official | 133:d4dda5c437f0 | 150 | =============================================================================== |
| mbed_official | 133:d4dda5c437f0 | 151 | [..] This section provides functions allowing to: |
| mbed_official | 133:d4dda5c437f0 | 152 | (+) Start conversion of injected channel. |
| mbed_official | 133:d4dda5c437f0 | 153 | (+) Stop conversion of injected channel. |
| mbed_official | 133:d4dda5c437f0 | 154 | (+) Start multimode and enable DMA transfer. |
| mbed_official | 133:d4dda5c437f0 | 155 | (+) Stop multimode and disable DMA transfer. |
| mbed_official | 133:d4dda5c437f0 | 156 | (+) Get result of injected channel conversion. |
| mbed_official | 133:d4dda5c437f0 | 157 | (+) Get result of multimode conversion. |
| mbed_official | 133:d4dda5c437f0 | 158 | (+) Configure injected channels. |
| mbed_official | 133:d4dda5c437f0 | 159 | (+) Configure multimode. |
| mbed_official | 133:d4dda5c437f0 | 160 | |
| mbed_official | 133:d4dda5c437f0 | 161 | @endverbatim |
| mbed_official | 133:d4dda5c437f0 | 162 | * @{ |
| mbed_official | 133:d4dda5c437f0 | 163 | */ |
| mbed_official | 133:d4dda5c437f0 | 164 | |
| mbed_official | 133:d4dda5c437f0 | 165 | /** |
| mbed_official | 133:d4dda5c437f0 | 166 | * @brief Enables the selected ADC software start conversion of the injected channels. |
| mbed_official | 133:d4dda5c437f0 | 167 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 168 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 169 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 170 | */ |
| mbed_official | 133:d4dda5c437f0 | 171 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc) |
| mbed_official | 133:d4dda5c437f0 | 172 | { |
| mbed_official | 133:d4dda5c437f0 | 173 | uint32_t i = 0, tmp1 = 0, tmp2 = 0; |
| mbed_official | 133:d4dda5c437f0 | 174 | |
| mbed_official | 133:d4dda5c437f0 | 175 | /* Process locked */ |
| mbed_official | 133:d4dda5c437f0 | 176 | __HAL_LOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 177 | |
| mbed_official | 133:d4dda5c437f0 | 178 | /* Check if a regular conversion is ongoing */ |
| mbed_official | 133:d4dda5c437f0 | 179 | if(hadc->State == HAL_ADC_STATE_BUSY_REG) |
| mbed_official | 133:d4dda5c437f0 | 180 | { |
| mbed_official | 133:d4dda5c437f0 | 181 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 182 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; |
| mbed_official | 133:d4dda5c437f0 | 183 | } |
| mbed_official | 133:d4dda5c437f0 | 184 | else |
| mbed_official | 133:d4dda5c437f0 | 185 | { |
| mbed_official | 133:d4dda5c437f0 | 186 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 187 | hadc->State = HAL_ADC_STATE_BUSY_INJ; |
| mbed_official | 133:d4dda5c437f0 | 188 | } |
| mbed_official | 133:d4dda5c437f0 | 189 | |
| mbed_official | 133:d4dda5c437f0 | 190 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
| mbed_official | 133:d4dda5c437f0 | 191 | Tstab time the ADC's stabilization */ |
| mbed_official | 133:d4dda5c437f0 | 192 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
| mbed_official | 133:d4dda5c437f0 | 193 | { |
| mbed_official | 133:d4dda5c437f0 | 194 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 195 | __HAL_ADC_ENABLE(hadc); |
| mbed_official | 133:d4dda5c437f0 | 196 | |
| mbed_official | 133:d4dda5c437f0 | 197 | /* Delay inserted to wait during Tstab time the ADC's stabilazation */ |
| mbed_official | 133:d4dda5c437f0 | 198 | for(; i <= 540; i++) |
| mbed_official | 133:d4dda5c437f0 | 199 | { |
| mbed_official | 133:d4dda5c437f0 | 200 | __NOP(); |
| mbed_official | 133:d4dda5c437f0 | 201 | } |
| mbed_official | 133:d4dda5c437f0 | 202 | } |
| mbed_official | 133:d4dda5c437f0 | 203 | |
| mbed_official | 133:d4dda5c437f0 | 204 | /* Check if Multimode enabled */ |
| mbed_official | 133:d4dda5c437f0 | 205 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) |
| mbed_official | 133:d4dda5c437f0 | 206 | { |
| mbed_official | 133:d4dda5c437f0 | 207 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
| mbed_official | 133:d4dda5c437f0 | 208 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
| mbed_official | 133:d4dda5c437f0 | 209 | if(tmp1 && tmp2) |
| mbed_official | 133:d4dda5c437f0 | 210 | { |
| mbed_official | 133:d4dda5c437f0 | 211 | /* Enable the selected ADC software conversion for injected group */ |
| mbed_official | 133:d4dda5c437f0 | 212 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
| mbed_official | 133:d4dda5c437f0 | 213 | } |
| mbed_official | 133:d4dda5c437f0 | 214 | } |
| mbed_official | 133:d4dda5c437f0 | 215 | else |
| mbed_official | 133:d4dda5c437f0 | 216 | { |
| mbed_official | 133:d4dda5c437f0 | 217 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
| mbed_official | 133:d4dda5c437f0 | 218 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
| mbed_official | 133:d4dda5c437f0 | 219 | if((hadc->Instance == ADC1) && tmp1 && tmp2) |
| mbed_official | 133:d4dda5c437f0 | 220 | { |
| mbed_official | 133:d4dda5c437f0 | 221 | /* Enable the selected ADC software conversion for injected group */ |
| mbed_official | 133:d4dda5c437f0 | 222 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
| mbed_official | 133:d4dda5c437f0 | 223 | } |
| mbed_official | 133:d4dda5c437f0 | 224 | } |
| mbed_official | 133:d4dda5c437f0 | 225 | |
| mbed_official | 133:d4dda5c437f0 | 226 | /* Process unlocked */ |
| mbed_official | 133:d4dda5c437f0 | 227 | __HAL_UNLOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 228 | |
| mbed_official | 133:d4dda5c437f0 | 229 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 230 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 231 | } |
| mbed_official | 133:d4dda5c437f0 | 232 | |
| mbed_official | 133:d4dda5c437f0 | 233 | /** |
| mbed_official | 133:d4dda5c437f0 | 234 | * @brief Enables the interrupt and starts ADC conversion of injected channels. |
| mbed_official | 133:d4dda5c437f0 | 235 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 236 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 237 | * |
| mbed_official | 133:d4dda5c437f0 | 238 | * @retval HAL status. |
| mbed_official | 133:d4dda5c437f0 | 239 | */ |
| mbed_official | 133:d4dda5c437f0 | 240 | HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc) |
| mbed_official | 133:d4dda5c437f0 | 241 | { |
| mbed_official | 133:d4dda5c437f0 | 242 | uint32_t i = 0, tmp1 = 0, tmp2 =0; |
| mbed_official | 133:d4dda5c437f0 | 243 | |
| mbed_official | 133:d4dda5c437f0 | 244 | /* Process locked */ |
| mbed_official | 133:d4dda5c437f0 | 245 | __HAL_LOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 246 | |
| mbed_official | 133:d4dda5c437f0 | 247 | /* Check if a regular conversion is ongoing */ |
| mbed_official | 133:d4dda5c437f0 | 248 | if(hadc->State == HAL_ADC_STATE_BUSY_REG) |
| mbed_official | 133:d4dda5c437f0 | 249 | { |
| mbed_official | 133:d4dda5c437f0 | 250 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 251 | hadc->State = HAL_ADC_STATE_BUSY_INJ_REG; |
| mbed_official | 133:d4dda5c437f0 | 252 | } |
| mbed_official | 133:d4dda5c437f0 | 253 | else |
| mbed_official | 133:d4dda5c437f0 | 254 | { |
| mbed_official | 133:d4dda5c437f0 | 255 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 256 | hadc->State = HAL_ADC_STATE_BUSY_INJ; |
| mbed_official | 133:d4dda5c437f0 | 257 | } |
| mbed_official | 133:d4dda5c437f0 | 258 | |
| mbed_official | 133:d4dda5c437f0 | 259 | /* Set ADC error code to none */ |
| mbed_official | 133:d4dda5c437f0 | 260 | hadc->ErrorCode = HAL_ADC_ERROR_NONE; |
| mbed_official | 133:d4dda5c437f0 | 261 | |
| mbed_official | 133:d4dda5c437f0 | 262 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
| mbed_official | 133:d4dda5c437f0 | 263 | Tstab time the ADC's stabilization */ |
| mbed_official | 133:d4dda5c437f0 | 264 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
| mbed_official | 133:d4dda5c437f0 | 265 | { |
| mbed_official | 133:d4dda5c437f0 | 266 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 267 | __HAL_ADC_ENABLE(hadc); |
| mbed_official | 133:d4dda5c437f0 | 268 | |
| mbed_official | 133:d4dda5c437f0 | 269 | /* Delay inserted to wait during Tstab time the ADC's stabilazation */ |
| mbed_official | 133:d4dda5c437f0 | 270 | for(; i <= 540; i++) |
| mbed_official | 133:d4dda5c437f0 | 271 | { |
| mbed_official | 133:d4dda5c437f0 | 272 | __NOP(); |
| mbed_official | 133:d4dda5c437f0 | 273 | } |
| mbed_official | 133:d4dda5c437f0 | 274 | } |
| mbed_official | 133:d4dda5c437f0 | 275 | |
| mbed_official | 133:d4dda5c437f0 | 276 | /* Enable the ADC end of conversion interrupt for injected group */ |
| mbed_official | 133:d4dda5c437f0 | 277 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC); |
| mbed_official | 133:d4dda5c437f0 | 278 | |
| mbed_official | 133:d4dda5c437f0 | 279 | /* Enable the ADC overrun interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 280 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
| mbed_official | 133:d4dda5c437f0 | 281 | |
| mbed_official | 133:d4dda5c437f0 | 282 | /* Check if Multimode enabled */ |
| mbed_official | 133:d4dda5c437f0 | 283 | if(HAL_IS_BIT_CLR(ADC->CCR, ADC_CCR_MULTI)) |
| mbed_official | 133:d4dda5c437f0 | 284 | { |
| mbed_official | 133:d4dda5c437f0 | 285 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
| mbed_official | 133:d4dda5c437f0 | 286 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
| mbed_official | 133:d4dda5c437f0 | 287 | if(tmp1 && tmp2) |
| mbed_official | 133:d4dda5c437f0 | 288 | { |
| mbed_official | 133:d4dda5c437f0 | 289 | /* Enable the selected ADC software conversion for injected group */ |
| mbed_official | 133:d4dda5c437f0 | 290 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
| mbed_official | 133:d4dda5c437f0 | 291 | } |
| mbed_official | 133:d4dda5c437f0 | 292 | } |
| mbed_official | 133:d4dda5c437f0 | 293 | else |
| mbed_official | 133:d4dda5c437f0 | 294 | { |
| mbed_official | 133:d4dda5c437f0 | 295 | tmp1 = HAL_IS_BIT_CLR(hadc->Instance->CR2, ADC_CR2_JEXTEN); |
| mbed_official | 133:d4dda5c437f0 | 296 | tmp2 = HAL_IS_BIT_CLR(hadc->Instance->CR1, ADC_CR1_JAUTO); |
| mbed_official | 133:d4dda5c437f0 | 297 | if((hadc->Instance == ADC1) && tmp1 && tmp2) |
| mbed_official | 133:d4dda5c437f0 | 298 | { |
| mbed_official | 133:d4dda5c437f0 | 299 | /* Enable the selected ADC software conversion for injected group */ |
| mbed_official | 133:d4dda5c437f0 | 300 | hadc->Instance->CR2 |= ADC_CR2_JSWSTART; |
| mbed_official | 133:d4dda5c437f0 | 301 | } |
| mbed_official | 133:d4dda5c437f0 | 302 | } |
| mbed_official | 133:d4dda5c437f0 | 303 | |
| mbed_official | 133:d4dda5c437f0 | 304 | /* Process unlocked */ |
| mbed_official | 133:d4dda5c437f0 | 305 | __HAL_UNLOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 306 | |
| mbed_official | 133:d4dda5c437f0 | 307 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 308 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 309 | } |
| mbed_official | 133:d4dda5c437f0 | 310 | |
| mbed_official | 133:d4dda5c437f0 | 311 | /** |
| mbed_official | 133:d4dda5c437f0 | 312 | * @brief Disables ADC and stop conversion of injected channels. |
| mbed_official | 133:d4dda5c437f0 | 313 | * |
| mbed_official | 133:d4dda5c437f0 | 314 | * @note Caution: This function will stop also regular channels. |
| mbed_official | 133:d4dda5c437f0 | 315 | * |
| mbed_official | 133:d4dda5c437f0 | 316 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 317 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 318 | * @retval HAL status. |
| mbed_official | 133:d4dda5c437f0 | 319 | */ |
| mbed_official | 133:d4dda5c437f0 | 320 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc) |
| mbed_official | 133:d4dda5c437f0 | 321 | { |
| mbed_official | 133:d4dda5c437f0 | 322 | /* Disable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 323 | __HAL_ADC_DISABLE(hadc); |
| mbed_official | 133:d4dda5c437f0 | 324 | |
| mbed_official | 133:d4dda5c437f0 | 325 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 326 | hadc->State = HAL_ADC_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 327 | |
| mbed_official | 133:d4dda5c437f0 | 328 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 329 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 330 | } |
| mbed_official | 133:d4dda5c437f0 | 331 | |
| mbed_official | 133:d4dda5c437f0 | 332 | /** |
| mbed_official | 133:d4dda5c437f0 | 333 | * @brief Poll for injected conversion complete |
| mbed_official | 133:d4dda5c437f0 | 334 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 335 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 336 | * @param Timeout: Timeout value in millisecond. |
| mbed_official | 133:d4dda5c437f0 | 337 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 338 | */ |
| mbed_official | 133:d4dda5c437f0 | 339 | HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout) |
| mbed_official | 133:d4dda5c437f0 | 340 | { |
| mbed_official | 133:d4dda5c437f0 | 341 | uint32_t timeout; |
| mbed_official | 133:d4dda5c437f0 | 342 | |
| mbed_official | 133:d4dda5c437f0 | 343 | /* Get timeout */ |
| mbed_official | 133:d4dda5c437f0 | 344 | timeout = HAL_GetTick() + Timeout; |
| mbed_official | 133:d4dda5c437f0 | 345 | |
| mbed_official | 133:d4dda5c437f0 | 346 | /* Check End of conversion flag */ |
| mbed_official | 133:d4dda5c437f0 | 347 | while(!(__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOC))) |
| mbed_official | 133:d4dda5c437f0 | 348 | { |
| mbed_official | 133:d4dda5c437f0 | 349 | /* Check for the Timeout */ |
| mbed_official | 133:d4dda5c437f0 | 350 | if(Timeout != HAL_MAX_DELAY) |
| mbed_official | 133:d4dda5c437f0 | 351 | { |
| mbed_official | 133:d4dda5c437f0 | 352 | if(HAL_GetTick() >= timeout) |
| mbed_official | 133:d4dda5c437f0 | 353 | { |
| mbed_official | 133:d4dda5c437f0 | 354 | hadc->State= HAL_ADC_STATE_TIMEOUT; |
| mbed_official | 133:d4dda5c437f0 | 355 | /* Process unlocked */ |
| mbed_official | 133:d4dda5c437f0 | 356 | __HAL_UNLOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 357 | return HAL_TIMEOUT; |
| mbed_official | 133:d4dda5c437f0 | 358 | } |
| mbed_official | 133:d4dda5c437f0 | 359 | } |
| mbed_official | 133:d4dda5c437f0 | 360 | } |
| mbed_official | 133:d4dda5c437f0 | 361 | |
| mbed_official | 133:d4dda5c437f0 | 362 | /* Check if a regular conversion is ready */ |
| mbed_official | 133:d4dda5c437f0 | 363 | if(hadc->State == HAL_ADC_STATE_EOC_REG) |
| mbed_official | 133:d4dda5c437f0 | 364 | { |
| mbed_official | 133:d4dda5c437f0 | 365 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 366 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
| mbed_official | 133:d4dda5c437f0 | 367 | } |
| mbed_official | 133:d4dda5c437f0 | 368 | else |
| mbed_official | 133:d4dda5c437f0 | 369 | { |
| mbed_official | 133:d4dda5c437f0 | 370 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 371 | hadc->State = HAL_ADC_STATE_EOC_INJ; |
| mbed_official | 133:d4dda5c437f0 | 372 | } |
| mbed_official | 133:d4dda5c437f0 | 373 | |
| mbed_official | 133:d4dda5c437f0 | 374 | /* Return ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 375 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 376 | } |
| mbed_official | 133:d4dda5c437f0 | 377 | |
| mbed_official | 133:d4dda5c437f0 | 378 | /** |
| mbed_official | 133:d4dda5c437f0 | 379 | * @brief Disables the interrupt and stop ADC conversion of injected channels. |
| mbed_official | 133:d4dda5c437f0 | 380 | * |
| mbed_official | 133:d4dda5c437f0 | 381 | * @note Caution: This function will stop also regular channels. |
| mbed_official | 133:d4dda5c437f0 | 382 | * |
| mbed_official | 133:d4dda5c437f0 | 383 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 384 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 385 | * @retval HAL status. |
| mbed_official | 133:d4dda5c437f0 | 386 | */ |
| mbed_official | 133:d4dda5c437f0 | 387 | HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc) |
| mbed_official | 133:d4dda5c437f0 | 388 | { |
| mbed_official | 133:d4dda5c437f0 | 389 | /* Disable the ADC end of conversion interrupt for regular group */ |
| mbed_official | 133:d4dda5c437f0 | 390 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_EOC); |
| mbed_official | 133:d4dda5c437f0 | 391 | |
| mbed_official | 133:d4dda5c437f0 | 392 | /* Disable the ADC end of conversion interrupt for injected group */ |
| mbed_official | 133:d4dda5c437f0 | 393 | __HAL_ADC_DISABLE_IT(hadc, ADC_CR1_JEOCIE); |
| mbed_official | 133:d4dda5c437f0 | 394 | |
| mbed_official | 133:d4dda5c437f0 | 395 | /* Enable the Periphral */ |
| mbed_official | 133:d4dda5c437f0 | 396 | __HAL_ADC_DISABLE(hadc); |
| mbed_official | 133:d4dda5c437f0 | 397 | |
| mbed_official | 133:d4dda5c437f0 | 398 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 399 | hadc->State = HAL_ADC_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 400 | |
| mbed_official | 133:d4dda5c437f0 | 401 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 402 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 403 | } |
| mbed_official | 133:d4dda5c437f0 | 404 | |
| mbed_official | 133:d4dda5c437f0 | 405 | /** |
| mbed_official | 133:d4dda5c437f0 | 406 | * @brief Gets the converted value from data register of injected channel. |
| mbed_official | 133:d4dda5c437f0 | 407 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 408 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 409 | * @param InjectedRank: the ADC injected rank. |
| mbed_official | 133:d4dda5c437f0 | 410 | * This parameter can be one of the following values: |
| mbed_official | 242:7074e42da0b2 | 411 | * @arg ADC_INJECTED_RANK_1: Injected Channel1 selected |
| mbed_official | 242:7074e42da0b2 | 412 | * @arg ADC_INJECTED_RANK_2: Injected Channel2 selected |
| mbed_official | 242:7074e42da0b2 | 413 | * @arg ADC_INJECTED_RANK_3: Injected Channel3 selected |
| mbed_official | 242:7074e42da0b2 | 414 | * @arg ADC_INJECTED_RANK_4: Injected Channel4 selected |
| mbed_official | 133:d4dda5c437f0 | 415 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 416 | */ |
| mbed_official | 133:d4dda5c437f0 | 417 | uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank) |
| mbed_official | 133:d4dda5c437f0 | 418 | { |
| mbed_official | 133:d4dda5c437f0 | 419 | __IO uint32_t tmp = 0; |
| mbed_official | 133:d4dda5c437f0 | 420 | |
| mbed_official | 133:d4dda5c437f0 | 421 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 422 | assert_param(IS_ADC_INJECTED_RANK(InjectedRank)); |
| mbed_official | 133:d4dda5c437f0 | 423 | |
| mbed_official | 133:d4dda5c437f0 | 424 | /* Clear the ADCx's flag for injected end of conversion */ |
| mbed_official | 133:d4dda5c437f0 | 425 | __HAL_ADC_CLEAR_FLAG(hadc,ADC_FLAG_JEOC); |
| mbed_official | 133:d4dda5c437f0 | 426 | |
| mbed_official | 133:d4dda5c437f0 | 427 | /* Return the selected ADC converted value */ |
| mbed_official | 133:d4dda5c437f0 | 428 | switch(InjectedRank) |
| mbed_official | 133:d4dda5c437f0 | 429 | { |
| mbed_official | 133:d4dda5c437f0 | 430 | case ADC_INJECTED_RANK_4: |
| mbed_official | 133:d4dda5c437f0 | 431 | { |
| mbed_official | 133:d4dda5c437f0 | 432 | tmp = hadc->Instance->JDR4; |
| mbed_official | 133:d4dda5c437f0 | 433 | } |
| mbed_official | 133:d4dda5c437f0 | 434 | break; |
| mbed_official | 133:d4dda5c437f0 | 435 | case ADC_INJECTED_RANK_3: |
| mbed_official | 133:d4dda5c437f0 | 436 | { |
| mbed_official | 133:d4dda5c437f0 | 437 | tmp = hadc->Instance->JDR3; |
| mbed_official | 133:d4dda5c437f0 | 438 | } |
| mbed_official | 133:d4dda5c437f0 | 439 | break; |
| mbed_official | 133:d4dda5c437f0 | 440 | case ADC_INJECTED_RANK_2: |
| mbed_official | 133:d4dda5c437f0 | 441 | { |
| mbed_official | 133:d4dda5c437f0 | 442 | tmp = hadc->Instance->JDR2; |
| mbed_official | 133:d4dda5c437f0 | 443 | } |
| mbed_official | 133:d4dda5c437f0 | 444 | break; |
| mbed_official | 133:d4dda5c437f0 | 445 | case ADC_INJECTED_RANK_1: |
| mbed_official | 133:d4dda5c437f0 | 446 | { |
| mbed_official | 133:d4dda5c437f0 | 447 | tmp = hadc->Instance->JDR1; |
| mbed_official | 133:d4dda5c437f0 | 448 | } |
| mbed_official | 133:d4dda5c437f0 | 449 | break; |
| mbed_official | 133:d4dda5c437f0 | 450 | default: |
| mbed_official | 133:d4dda5c437f0 | 451 | break; |
| mbed_official | 133:d4dda5c437f0 | 452 | } |
| mbed_official | 133:d4dda5c437f0 | 453 | return tmp; |
| mbed_official | 133:d4dda5c437f0 | 454 | } |
| mbed_official | 133:d4dda5c437f0 | 455 | |
| mbed_official | 133:d4dda5c437f0 | 456 | /** |
| mbed_official | 133:d4dda5c437f0 | 457 | * @brief Enables ADC DMA request after last transfer (Multi-ADC mode) and enables ADC peripheral |
| mbed_official | 133:d4dda5c437f0 | 458 | * |
| mbed_official | 133:d4dda5c437f0 | 459 | * @note Caution: This function must be used only with the ADC master. |
| mbed_official | 133:d4dda5c437f0 | 460 | * |
| mbed_official | 133:d4dda5c437f0 | 461 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 462 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 463 | * @param pData: Pointer to buffer in which transferred from ADC peripheral to memory will be stored. |
| mbed_official | 133:d4dda5c437f0 | 464 | * @param Length: The length of data to be transferred from ADC peripheral to memory. |
| mbed_official | 242:7074e42da0b2 | 465 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 466 | */ |
| mbed_official | 133:d4dda5c437f0 | 467 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length) |
| mbed_official | 133:d4dda5c437f0 | 468 | { |
| mbed_official | 133:d4dda5c437f0 | 469 | uint16_t counter = 0; |
| mbed_official | 133:d4dda5c437f0 | 470 | |
| mbed_official | 133:d4dda5c437f0 | 471 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 472 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode)); |
| mbed_official | 133:d4dda5c437f0 | 473 | assert_param(IS_ADC_EXT_TRIG_EDGE(hadc->Init.ExternalTrigConvEdge)); |
| mbed_official | 133:d4dda5c437f0 | 474 | assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests)); |
| mbed_official | 133:d4dda5c437f0 | 475 | |
| mbed_official | 133:d4dda5c437f0 | 476 | /* Process locked */ |
| mbed_official | 133:d4dda5c437f0 | 477 | __HAL_LOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 478 | |
| mbed_official | 133:d4dda5c437f0 | 479 | /* Enable ADC overrun interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 480 | __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR); |
| mbed_official | 133:d4dda5c437f0 | 481 | |
| mbed_official | 133:d4dda5c437f0 | 482 | if (hadc->Init.DMAContinuousRequests != DISABLE) |
| mbed_official | 133:d4dda5c437f0 | 483 | { |
| mbed_official | 133:d4dda5c437f0 | 484 | /* Enable the selected ADC DMA request after last transfer */ |
| mbed_official | 133:d4dda5c437f0 | 485 | ADC->CCR |= ADC_CCR_DDS; |
| mbed_official | 133:d4dda5c437f0 | 486 | } |
| mbed_official | 133:d4dda5c437f0 | 487 | else |
| mbed_official | 133:d4dda5c437f0 | 488 | { |
| mbed_official | 133:d4dda5c437f0 | 489 | /* Disable the selected ADC EOC rising on each regular channel conversion */ |
| mbed_official | 133:d4dda5c437f0 | 490 | ADC->CCR &= ~ADC_CCR_DDS; |
| mbed_official | 133:d4dda5c437f0 | 491 | } |
| mbed_official | 133:d4dda5c437f0 | 492 | |
| mbed_official | 133:d4dda5c437f0 | 493 | /* Set the DMA transfer complete callback */ |
| mbed_official | 133:d4dda5c437f0 | 494 | hadc->DMA_Handle->XferCpltCallback = ADC_MultiModeDMAConvCplt; |
| mbed_official | 133:d4dda5c437f0 | 495 | |
| mbed_official | 133:d4dda5c437f0 | 496 | /* Set the DMA half transfer complete callback */ |
| mbed_official | 133:d4dda5c437f0 | 497 | hadc->DMA_Handle->XferHalfCpltCallback = ADC_MultiModeDMAHalfConvCplt; |
| mbed_official | 133:d4dda5c437f0 | 498 | |
| mbed_official | 133:d4dda5c437f0 | 499 | /* Set the DMA error callback */ |
| mbed_official | 133:d4dda5c437f0 | 500 | hadc->DMA_Handle->XferErrorCallback = ADC_MultiModeDMAError ; |
| mbed_official | 133:d4dda5c437f0 | 501 | |
| mbed_official | 133:d4dda5c437f0 | 502 | /* Enable the DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 503 | HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&ADC->CDR, (uint32_t)pData, Length); |
| mbed_official | 133:d4dda5c437f0 | 504 | |
| mbed_official | 133:d4dda5c437f0 | 505 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 506 | hadc->State = HAL_ADC_STATE_BUSY_REG; |
| mbed_official | 133:d4dda5c437f0 | 507 | |
| mbed_official | 133:d4dda5c437f0 | 508 | /* Check if ADC peripheral is disabled in order to enable it and wait during |
| mbed_official | 133:d4dda5c437f0 | 509 | Tstab time the ADC's stabilization */ |
| mbed_official | 133:d4dda5c437f0 | 510 | if((hadc->Instance->CR2 & ADC_CR2_ADON) != ADC_CR2_ADON) |
| mbed_official | 133:d4dda5c437f0 | 511 | { |
| mbed_official | 133:d4dda5c437f0 | 512 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 513 | __HAL_ADC_ENABLE(hadc); |
| mbed_official | 133:d4dda5c437f0 | 514 | |
| mbed_official | 133:d4dda5c437f0 | 515 | /* Delay inserted to wait during Tstab time the ADC's stabilazation */ |
| mbed_official | 133:d4dda5c437f0 | 516 | for(; counter <= 540; counter++) |
| mbed_official | 133:d4dda5c437f0 | 517 | { |
| mbed_official | 133:d4dda5c437f0 | 518 | __NOP(); |
| mbed_official | 133:d4dda5c437f0 | 519 | } |
| mbed_official | 133:d4dda5c437f0 | 520 | } |
| mbed_official | 133:d4dda5c437f0 | 521 | |
| mbed_official | 133:d4dda5c437f0 | 522 | /* if no external trigger present enable software conversion of regular channels */ |
| mbed_official | 133:d4dda5c437f0 | 523 | if (hadc->Init.ExternalTrigConvEdge == ADC_EXTERNALTRIGCONVEDGE_NONE) |
| mbed_official | 133:d4dda5c437f0 | 524 | { |
| mbed_official | 133:d4dda5c437f0 | 525 | /* Enable the selected ADC software conversion for regular group */ |
| mbed_official | 133:d4dda5c437f0 | 526 | hadc->Instance->CR2 |= (uint32_t)ADC_CR2_SWSTART; |
| mbed_official | 133:d4dda5c437f0 | 527 | } |
| mbed_official | 133:d4dda5c437f0 | 528 | |
| mbed_official | 133:d4dda5c437f0 | 529 | /* Process unlocked */ |
| mbed_official | 133:d4dda5c437f0 | 530 | __HAL_UNLOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 531 | |
| mbed_official | 133:d4dda5c437f0 | 532 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 533 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 534 | } |
| mbed_official | 133:d4dda5c437f0 | 535 | |
| mbed_official | 133:d4dda5c437f0 | 536 | /** |
| mbed_official | 133:d4dda5c437f0 | 537 | * @brief Disables ADC DMA (multi-ADC mode) and disables ADC peripheral |
| mbed_official | 133:d4dda5c437f0 | 538 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 539 | * the configuration information for the specified ADC. |
| mbed_official | 242:7074e42da0b2 | 540 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 541 | */ |
| mbed_official | 133:d4dda5c437f0 | 542 | HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc) |
| mbed_official | 133:d4dda5c437f0 | 543 | { |
| mbed_official | 133:d4dda5c437f0 | 544 | /* Process locked */ |
| mbed_official | 133:d4dda5c437f0 | 545 | __HAL_LOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 546 | |
| mbed_official | 133:d4dda5c437f0 | 547 | /* Enable the Peripheral */ |
| mbed_official | 133:d4dda5c437f0 | 548 | __HAL_ADC_DISABLE(hadc); |
| mbed_official | 133:d4dda5c437f0 | 549 | |
| mbed_official | 133:d4dda5c437f0 | 550 | /* Disable ADC overrun interrupt */ |
| mbed_official | 133:d4dda5c437f0 | 551 | __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR); |
| mbed_official | 133:d4dda5c437f0 | 552 | |
| mbed_official | 133:d4dda5c437f0 | 553 | /* Disable the selected ADC DMA request after last transfer */ |
| mbed_official | 133:d4dda5c437f0 | 554 | ADC->CCR &= ~ADC_CCR_DDS; |
| mbed_official | 133:d4dda5c437f0 | 555 | |
| mbed_official | 133:d4dda5c437f0 | 556 | /* Disable the ADC DMA Stream */ |
| mbed_official | 133:d4dda5c437f0 | 557 | HAL_DMA_Abort(hadc->DMA_Handle); |
| mbed_official | 133:d4dda5c437f0 | 558 | |
| mbed_official | 133:d4dda5c437f0 | 559 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 560 | hadc->State = HAL_ADC_STATE_READY; |
| mbed_official | 133:d4dda5c437f0 | 561 | |
| mbed_official | 133:d4dda5c437f0 | 562 | /* Process unlocked */ |
| mbed_official | 133:d4dda5c437f0 | 563 | __HAL_UNLOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 564 | |
| mbed_official | 133:d4dda5c437f0 | 565 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 566 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 567 | } |
| mbed_official | 133:d4dda5c437f0 | 568 | |
| mbed_official | 133:d4dda5c437f0 | 569 | /** |
| mbed_official | 133:d4dda5c437f0 | 570 | * @brief Returns the last ADC1, ADC2 and ADC3 regular conversions results |
| mbed_official | 133:d4dda5c437f0 | 571 | * data in the selected multi mode. |
| mbed_official | 133:d4dda5c437f0 | 572 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 573 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 574 | * @retval The converted data value. |
| mbed_official | 133:d4dda5c437f0 | 575 | */ |
| mbed_official | 133:d4dda5c437f0 | 576 | uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc) |
| mbed_official | 133:d4dda5c437f0 | 577 | { |
| mbed_official | 133:d4dda5c437f0 | 578 | /* Return the multi mode conversion value */ |
| mbed_official | 133:d4dda5c437f0 | 579 | return ADC->CDR; |
| mbed_official | 133:d4dda5c437f0 | 580 | } |
| mbed_official | 133:d4dda5c437f0 | 581 | |
| mbed_official | 133:d4dda5c437f0 | 582 | /** |
| mbed_official | 133:d4dda5c437f0 | 583 | * @brief Injected conversion complete callback in non blocking mode |
| mbed_official | 133:d4dda5c437f0 | 584 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 585 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 586 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 587 | */ |
| mbed_official | 133:d4dda5c437f0 | 588 | __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc) |
| mbed_official | 133:d4dda5c437f0 | 589 | { |
| mbed_official | 133:d4dda5c437f0 | 590 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 133:d4dda5c437f0 | 591 | the HAL_ADC_InjectedConvCpltCallback could be implemented in the user file |
| mbed_official | 133:d4dda5c437f0 | 592 | */ |
| mbed_official | 133:d4dda5c437f0 | 593 | } |
| mbed_official | 133:d4dda5c437f0 | 594 | |
| mbed_official | 133:d4dda5c437f0 | 595 | /** |
| mbed_official | 133:d4dda5c437f0 | 596 | * @brief Configures for the selected ADC injected channel its corresponding |
| mbed_official | 133:d4dda5c437f0 | 597 | * rank in the sequencer and its sample time. |
| mbed_official | 133:d4dda5c437f0 | 598 | * @param hadc: pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 599 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 600 | * @param sConfigInjected: ADC configuration structure for injected channel. |
| mbed_official | 133:d4dda5c437f0 | 601 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 602 | */ |
| mbed_official | 133:d4dda5c437f0 | 603 | HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc, ADC_InjectionConfTypeDef* sConfigInjected) |
| mbed_official | 133:d4dda5c437f0 | 604 | { |
| mbed_official | 133:d4dda5c437f0 | 605 | |
| mbed_official | 133:d4dda5c437f0 | 606 | #ifdef USE_FULL_ASSERT |
| mbed_official | 133:d4dda5c437f0 | 607 | uint32_t tmp = 0; |
| mbed_official | 133:d4dda5c437f0 | 608 | #endif /* USE_FULL_ASSERT */ |
| mbed_official | 133:d4dda5c437f0 | 609 | |
| mbed_official | 133:d4dda5c437f0 | 610 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 611 | assert_param(IS_ADC_CHANNEL(sConfigInjected->InjectedChannel)); |
| mbed_official | 133:d4dda5c437f0 | 612 | assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank)); |
| mbed_official | 133:d4dda5c437f0 | 613 | assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime)); |
| mbed_official | 133:d4dda5c437f0 | 614 | assert_param(IS_ADC_EXT_INJEC_TRIG(sConfigInjected->ExternalTrigInjecConv)); |
| mbed_official | 133:d4dda5c437f0 | 615 | assert_param(IS_ADC_EXT_INJEC_TRIG_EDGE(sConfigInjected->ExternalTrigInjecConvEdge)); |
| mbed_official | 133:d4dda5c437f0 | 616 | assert_param(IS_ADC_INJECTED_LENGTH(sConfigInjected->InjectedNbrOfConversion)); |
| mbed_official | 133:d4dda5c437f0 | 617 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv)); |
| mbed_official | 133:d4dda5c437f0 | 618 | assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode)); |
| mbed_official | 133:d4dda5c437f0 | 619 | |
| mbed_official | 133:d4dda5c437f0 | 620 | #ifdef USE_FULL_ASSERT |
| mbed_official | 133:d4dda5c437f0 | 621 | tmp = __HAL_ADC_GET_RESOLUTION(hadc); |
| mbed_official | 133:d4dda5c437f0 | 622 | assert_param(IS_ADC_RANGE(tmp, sConfigInjected->InjectedOffset)); |
| mbed_official | 133:d4dda5c437f0 | 623 | #endif /* USE_FULL_ASSERT */ |
| mbed_official | 133:d4dda5c437f0 | 624 | |
| mbed_official | 133:d4dda5c437f0 | 625 | /* Process locked */ |
| mbed_official | 133:d4dda5c437f0 | 626 | __HAL_LOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 627 | |
| mbed_official | 133:d4dda5c437f0 | 628 | /* if ADC_Channel_10 ... ADC_Channel_18 is selected */ |
| mbed_official | 133:d4dda5c437f0 | 629 | if (sConfigInjected->InjectedChannel > ADC_CHANNEL_9) |
| mbed_official | 133:d4dda5c437f0 | 630 | { |
| mbed_official | 133:d4dda5c437f0 | 631 | /* Clear the old sample time */ |
| mbed_official | 133:d4dda5c437f0 | 632 | hadc->Instance->SMPR1 &= ~__HAL_ADC_SMPR1(ADC_SMPR1_SMP10, sConfigInjected->InjectedChannel); |
| mbed_official | 133:d4dda5c437f0 | 633 | |
| mbed_official | 133:d4dda5c437f0 | 634 | /* Set the new sample time */ |
| mbed_official | 133:d4dda5c437f0 | 635 | hadc->Instance->SMPR1 |= __HAL_ADC_SMPR1(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); |
| mbed_official | 133:d4dda5c437f0 | 636 | } |
| mbed_official | 133:d4dda5c437f0 | 637 | else /* ADC_Channel include in ADC_Channel_[0..9] */ |
| mbed_official | 133:d4dda5c437f0 | 638 | { |
| mbed_official | 133:d4dda5c437f0 | 639 | /* Clear the old sample time */ |
| mbed_official | 133:d4dda5c437f0 | 640 | hadc->Instance->SMPR2 &= ~__HAL_ADC_SMPR2(ADC_SMPR2_SMP0, sConfigInjected->InjectedChannel); |
| mbed_official | 133:d4dda5c437f0 | 641 | |
| mbed_official | 133:d4dda5c437f0 | 642 | /* Set the new sample time */ |
| mbed_official | 133:d4dda5c437f0 | 643 | hadc->Instance->SMPR2 |= __HAL_ADC_SMPR2(sConfigInjected->InjectedSamplingTime, sConfigInjected->InjectedChannel); |
| mbed_official | 133:d4dda5c437f0 | 644 | } |
| mbed_official | 133:d4dda5c437f0 | 645 | |
| mbed_official | 133:d4dda5c437f0 | 646 | /*---------------------------- ADCx JSQR Configuration -----------------*/ |
| mbed_official | 133:d4dda5c437f0 | 647 | hadc->Instance->JSQR &= ~(ADC_JSQR_JL); |
| mbed_official | 133:d4dda5c437f0 | 648 | hadc->Instance->JSQR |= __HAL_ADC_SQR1(sConfigInjected->InjectedNbrOfConversion); |
| mbed_official | 133:d4dda5c437f0 | 649 | |
| mbed_official | 133:d4dda5c437f0 | 650 | /* Rank configuration */ |
| mbed_official | 133:d4dda5c437f0 | 651 | |
| mbed_official | 133:d4dda5c437f0 | 652 | /* Clear the old SQx bits for the selected rank */ |
| mbed_official | 133:d4dda5c437f0 | 653 | hadc->Instance->JSQR &= ~__HAL_ADC_JSQR(ADC_JSQR_JSQ1, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); |
| mbed_official | 133:d4dda5c437f0 | 654 | |
| mbed_official | 133:d4dda5c437f0 | 655 | /* Set the SQx bits for the selected rank */ |
| mbed_official | 133:d4dda5c437f0 | 656 | hadc->Instance->JSQR |= __HAL_ADC_JSQR(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank,sConfigInjected->InjectedNbrOfConversion); |
| mbed_official | 133:d4dda5c437f0 | 657 | |
| mbed_official | 133:d4dda5c437f0 | 658 | /* Select external trigger to start conversion */ |
| mbed_official | 133:d4dda5c437f0 | 659 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTSEL); |
| mbed_official | 133:d4dda5c437f0 | 660 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConv; |
| mbed_official | 133:d4dda5c437f0 | 661 | |
| mbed_official | 133:d4dda5c437f0 | 662 | /* Select external trigger polarity */ |
| mbed_official | 133:d4dda5c437f0 | 663 | hadc->Instance->CR2 &= ~(ADC_CR2_JEXTEN); |
| mbed_official | 133:d4dda5c437f0 | 664 | hadc->Instance->CR2 |= sConfigInjected->ExternalTrigInjecConvEdge; |
| mbed_official | 133:d4dda5c437f0 | 665 | |
| mbed_official | 133:d4dda5c437f0 | 666 | if (sConfigInjected->AutoInjectedConv != DISABLE) |
| mbed_official | 133:d4dda5c437f0 | 667 | { |
| mbed_official | 133:d4dda5c437f0 | 668 | /* Enable the selected ADC automatic injected group conversion */ |
| mbed_official | 133:d4dda5c437f0 | 669 | hadc->Instance->CR1 |= ADC_CR1_JAUTO; |
| mbed_official | 133:d4dda5c437f0 | 670 | } |
| mbed_official | 133:d4dda5c437f0 | 671 | else |
| mbed_official | 133:d4dda5c437f0 | 672 | { |
| mbed_official | 133:d4dda5c437f0 | 673 | /* Disable the selected ADC automatic injected group conversion */ |
| mbed_official | 133:d4dda5c437f0 | 674 | hadc->Instance->CR1 &= ~(ADC_CR1_JAUTO); |
| mbed_official | 133:d4dda5c437f0 | 675 | } |
| mbed_official | 133:d4dda5c437f0 | 676 | |
| mbed_official | 133:d4dda5c437f0 | 677 | if (sConfigInjected->InjectedDiscontinuousConvMode != DISABLE) |
| mbed_official | 133:d4dda5c437f0 | 678 | { |
| mbed_official | 133:d4dda5c437f0 | 679 | /* Enable the selected ADC injected discontinuous mode */ |
| mbed_official | 133:d4dda5c437f0 | 680 | hadc->Instance->CR1 |= ADC_CR1_JDISCEN; |
| mbed_official | 133:d4dda5c437f0 | 681 | } |
| mbed_official | 133:d4dda5c437f0 | 682 | else |
| mbed_official | 133:d4dda5c437f0 | 683 | { |
| mbed_official | 133:d4dda5c437f0 | 684 | /* Disable the selected ADC injected discontinuous mode */ |
| mbed_official | 133:d4dda5c437f0 | 685 | hadc->Instance->CR1 &= ~(ADC_CR1_JDISCEN); |
| mbed_official | 133:d4dda5c437f0 | 686 | } |
| mbed_official | 133:d4dda5c437f0 | 687 | |
| mbed_official | 133:d4dda5c437f0 | 688 | switch(sConfigInjected->InjectedRank) |
| mbed_official | 133:d4dda5c437f0 | 689 | { |
| mbed_official | 133:d4dda5c437f0 | 690 | case 1: |
| mbed_official | 133:d4dda5c437f0 | 691 | /* Set injected channel 1 offset */ |
| mbed_official | 133:d4dda5c437f0 | 692 | hadc->Instance->JOFR1 &= ~(ADC_JOFR1_JOFFSET1); |
| mbed_official | 133:d4dda5c437f0 | 693 | hadc->Instance->JOFR1 |= sConfigInjected->InjectedOffset; |
| mbed_official | 133:d4dda5c437f0 | 694 | break; |
| mbed_official | 133:d4dda5c437f0 | 695 | case 2: |
| mbed_official | 133:d4dda5c437f0 | 696 | /* Set injected channel 2 offset */ |
| mbed_official | 133:d4dda5c437f0 | 697 | hadc->Instance->JOFR2 &= ~(ADC_JOFR2_JOFFSET2); |
| mbed_official | 133:d4dda5c437f0 | 698 | hadc->Instance->JOFR2 |= sConfigInjected->InjectedOffset; |
| mbed_official | 133:d4dda5c437f0 | 699 | break; |
| mbed_official | 133:d4dda5c437f0 | 700 | case 3: |
| mbed_official | 133:d4dda5c437f0 | 701 | /* Set injected channel 3 offset */ |
| mbed_official | 133:d4dda5c437f0 | 702 | hadc->Instance->JOFR3 &= ~(ADC_JOFR3_JOFFSET3); |
| mbed_official | 133:d4dda5c437f0 | 703 | hadc->Instance->JOFR3 |= sConfigInjected->InjectedOffset; |
| mbed_official | 133:d4dda5c437f0 | 704 | break; |
| mbed_official | 133:d4dda5c437f0 | 705 | default: |
| mbed_official | 133:d4dda5c437f0 | 706 | /* Set injected channel 4 offset */ |
| mbed_official | 133:d4dda5c437f0 | 707 | hadc->Instance->JOFR4 &= ~(ADC_JOFR4_JOFFSET4); |
| mbed_official | 133:d4dda5c437f0 | 708 | hadc->Instance->JOFR4 |= sConfigInjected->InjectedOffset; |
| mbed_official | 133:d4dda5c437f0 | 709 | break; |
| mbed_official | 133:d4dda5c437f0 | 710 | } |
| mbed_official | 133:d4dda5c437f0 | 711 | |
| mbed_official | 133:d4dda5c437f0 | 712 | /* if ADC1 Channel_18 is selected enable VBAT Channel */ |
| mbed_official | 133:d4dda5c437f0 | 713 | if ((hadc->Instance == ADC1) && (sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)) |
| mbed_official | 133:d4dda5c437f0 | 714 | { |
| mbed_official | 133:d4dda5c437f0 | 715 | /* Enable the VBAT channel*/ |
| mbed_official | 133:d4dda5c437f0 | 716 | ADC->CCR |= ADC_CCR_VBATE; |
| mbed_official | 133:d4dda5c437f0 | 717 | } |
| mbed_official | 133:d4dda5c437f0 | 718 | |
| mbed_official | 133:d4dda5c437f0 | 719 | /* if ADC1 Channel_16 or Channel_17 is selected enable TSVREFE Channel(Temperature sensor and VREFINT) */ |
| mbed_official | 133:d4dda5c437f0 | 720 | if ((hadc->Instance == ADC1) && ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR) || (sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT))) |
| mbed_official | 133:d4dda5c437f0 | 721 | { |
| mbed_official | 133:d4dda5c437f0 | 722 | /* Enable the TSVREFE channel*/ |
| mbed_official | 133:d4dda5c437f0 | 723 | ADC->CCR |= ADC_CCR_TSVREFE; |
| mbed_official | 133:d4dda5c437f0 | 724 | } |
| mbed_official | 133:d4dda5c437f0 | 725 | |
| mbed_official | 133:d4dda5c437f0 | 726 | /* Process unlocked */ |
| mbed_official | 133:d4dda5c437f0 | 727 | __HAL_UNLOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 728 | |
| mbed_official | 133:d4dda5c437f0 | 729 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 730 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 731 | } |
| mbed_official | 133:d4dda5c437f0 | 732 | |
| mbed_official | 133:d4dda5c437f0 | 733 | /** |
| mbed_official | 133:d4dda5c437f0 | 734 | * @brief Configures the ADC multi-mode |
| mbed_official | 133:d4dda5c437f0 | 735 | * @param hadc : pointer to a ADC_HandleTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 736 | * the configuration information for the specified ADC. |
| mbed_official | 133:d4dda5c437f0 | 737 | * @param multimode : pointer to an ADC_MultiModeTypeDef structure that contains |
| mbed_official | 133:d4dda5c437f0 | 738 | * the configuration information for multimode. |
| mbed_official | 133:d4dda5c437f0 | 739 | * @retval HAL status |
| mbed_official | 133:d4dda5c437f0 | 740 | */ |
| mbed_official | 133:d4dda5c437f0 | 741 | HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode) |
| mbed_official | 133:d4dda5c437f0 | 742 | { |
| mbed_official | 133:d4dda5c437f0 | 743 | /* Check the parameters */ |
| mbed_official | 133:d4dda5c437f0 | 744 | assert_param(IS_ADC_MODE(multimode->Mode)); |
| mbed_official | 133:d4dda5c437f0 | 745 | assert_param(IS_ADC_DMA_ACCESS_MODE(multimode->DMAAccessMode)); |
| mbed_official | 133:d4dda5c437f0 | 746 | assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay)); |
| mbed_official | 133:d4dda5c437f0 | 747 | |
| mbed_official | 133:d4dda5c437f0 | 748 | /* Process locked */ |
| mbed_official | 133:d4dda5c437f0 | 749 | __HAL_LOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 750 | |
| mbed_official | 133:d4dda5c437f0 | 751 | /* Set ADC mode */ |
| mbed_official | 133:d4dda5c437f0 | 752 | ADC->CCR &= ~(ADC_CCR_MULTI); |
| mbed_official | 133:d4dda5c437f0 | 753 | ADC->CCR |= multimode->Mode; |
| mbed_official | 133:d4dda5c437f0 | 754 | |
| mbed_official | 133:d4dda5c437f0 | 755 | /* Set the ADC DMA access mode */ |
| mbed_official | 133:d4dda5c437f0 | 756 | ADC->CCR &= ~(ADC_CCR_DMA); |
| mbed_official | 133:d4dda5c437f0 | 757 | ADC->CCR |= multimode->DMAAccessMode; |
| mbed_official | 133:d4dda5c437f0 | 758 | |
| mbed_official | 133:d4dda5c437f0 | 759 | /* Set delay between two sampling phases */ |
| mbed_official | 133:d4dda5c437f0 | 760 | ADC->CCR &= ~(ADC_CCR_DELAY); |
| mbed_official | 133:d4dda5c437f0 | 761 | ADC->CCR |= multimode->TwoSamplingDelay; |
| mbed_official | 133:d4dda5c437f0 | 762 | |
| mbed_official | 133:d4dda5c437f0 | 763 | /* Process unlocked */ |
| mbed_official | 133:d4dda5c437f0 | 764 | __HAL_UNLOCK(hadc); |
| mbed_official | 133:d4dda5c437f0 | 765 | |
| mbed_official | 133:d4dda5c437f0 | 766 | /* Return function status */ |
| mbed_official | 133:d4dda5c437f0 | 767 | return HAL_OK; |
| mbed_official | 133:d4dda5c437f0 | 768 | } |
| mbed_official | 133:d4dda5c437f0 | 769 | |
| mbed_official | 133:d4dda5c437f0 | 770 | /** |
| mbed_official | 133:d4dda5c437f0 | 771 | * @} |
| mbed_official | 133:d4dda5c437f0 | 772 | */ |
| mbed_official | 133:d4dda5c437f0 | 773 | |
| mbed_official | 133:d4dda5c437f0 | 774 | /** |
| mbed_official | 133:d4dda5c437f0 | 775 | * @brief DMA transfer complete callback. |
| mbed_official | 242:7074e42da0b2 | 776 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 242:7074e42da0b2 | 777 | * the configuration information for the specified DMA module. |
| mbed_official | 133:d4dda5c437f0 | 778 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 779 | */ |
| mbed_official | 133:d4dda5c437f0 | 780 | static void ADC_MultiModeDMAConvCplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 133:d4dda5c437f0 | 781 | { |
| mbed_official | 133:d4dda5c437f0 | 782 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| mbed_official | 133:d4dda5c437f0 | 783 | |
| mbed_official | 133:d4dda5c437f0 | 784 | /* Check if an injected conversion is ready */ |
| mbed_official | 133:d4dda5c437f0 | 785 | if(hadc->State == HAL_ADC_STATE_EOC_INJ) |
| mbed_official | 133:d4dda5c437f0 | 786 | { |
| mbed_official | 133:d4dda5c437f0 | 787 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 788 | hadc->State = HAL_ADC_STATE_EOC_INJ_REG; |
| mbed_official | 133:d4dda5c437f0 | 789 | } |
| mbed_official | 133:d4dda5c437f0 | 790 | else |
| mbed_official | 133:d4dda5c437f0 | 791 | { |
| mbed_official | 133:d4dda5c437f0 | 792 | /* Change ADC state */ |
| mbed_official | 133:d4dda5c437f0 | 793 | hadc->State = HAL_ADC_STATE_EOC_REG; |
| mbed_official | 133:d4dda5c437f0 | 794 | } |
| mbed_official | 133:d4dda5c437f0 | 795 | |
| mbed_official | 133:d4dda5c437f0 | 796 | HAL_ADC_ConvCpltCallback(hadc); |
| mbed_official | 133:d4dda5c437f0 | 797 | } |
| mbed_official | 133:d4dda5c437f0 | 798 | |
| mbed_official | 133:d4dda5c437f0 | 799 | /** |
| mbed_official | 133:d4dda5c437f0 | 800 | * @brief DMA half transfer complete callback. |
| mbed_official | 242:7074e42da0b2 | 801 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 242:7074e42da0b2 | 802 | * the configuration information for the specified DMA module. |
| mbed_official | 133:d4dda5c437f0 | 803 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 804 | */ |
| mbed_official | 133:d4dda5c437f0 | 805 | static void ADC_MultiModeDMAHalfConvCplt(DMA_HandleTypeDef *hdma) |
| mbed_official | 133:d4dda5c437f0 | 806 | { |
| mbed_official | 133:d4dda5c437f0 | 807 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| mbed_official | 133:d4dda5c437f0 | 808 | /* Conversion complete callback */ |
| mbed_official | 133:d4dda5c437f0 | 809 | HAL_ADC_ConvHalfCpltCallback(hadc); |
| mbed_official | 133:d4dda5c437f0 | 810 | } |
| mbed_official | 133:d4dda5c437f0 | 811 | |
| mbed_official | 133:d4dda5c437f0 | 812 | /** |
| mbed_official | 133:d4dda5c437f0 | 813 | * @brief DMA error callback |
| mbed_official | 242:7074e42da0b2 | 814 | * @param hdma: pointer to a DMA_HandleTypeDef structure that contains |
| mbed_official | 242:7074e42da0b2 | 815 | * the configuration information for the specified DMA module. |
| mbed_official | 133:d4dda5c437f0 | 816 | * @retval None |
| mbed_official | 133:d4dda5c437f0 | 817 | */ |
| mbed_official | 133:d4dda5c437f0 | 818 | static void ADC_MultiModeDMAError(DMA_HandleTypeDef *hdma) |
| mbed_official | 133:d4dda5c437f0 | 819 | { |
| mbed_official | 133:d4dda5c437f0 | 820 | ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent; |
| mbed_official | 133:d4dda5c437f0 | 821 | hadc->State= HAL_ADC_STATE_ERROR; |
| mbed_official | 133:d4dda5c437f0 | 822 | /* Set ADC error code to DMA error */ |
| mbed_official | 133:d4dda5c437f0 | 823 | hadc->ErrorCode |= HAL_ADC_ERROR_DMA; |
| mbed_official | 133:d4dda5c437f0 | 824 | HAL_ADC_ErrorCallback(hadc); |
| mbed_official | 133:d4dda5c437f0 | 825 | } |
| mbed_official | 133:d4dda5c437f0 | 826 | |
| mbed_official | 133:d4dda5c437f0 | 827 | /** |
| mbed_official | 133:d4dda5c437f0 | 828 | * @} |
| mbed_official | 133:d4dda5c437f0 | 829 | */ |
| mbed_official | 133:d4dda5c437f0 | 830 | |
| mbed_official | 133:d4dda5c437f0 | 831 | #endif /* HAL_ADC_MODULE_ENABLED */ |
| mbed_official | 133:d4dda5c437f0 | 832 | /** |
| mbed_official | 133:d4dda5c437f0 | 833 | * @} |
| mbed_official | 133:d4dda5c437f0 | 834 | */ |
| mbed_official | 133:d4dda5c437f0 | 835 | |
| mbed_official | 133:d4dda5c437f0 | 836 | /** |
| mbed_official | 133:d4dda5c437f0 | 837 | * @} |
| mbed_official | 133:d4dda5c437f0 | 838 | */ |
| mbed_official | 133:d4dda5c437f0 | 839 | |
| mbed_official | 133:d4dda5c437f0 | 840 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |