Samuel Mokrani / Mbed 2 deprecated USBMSD_SD_HelloWorld_Mbed

USBMSD SD card Hello World for Mbed platforms

Dependencies:   mbed USBMSD_SD USBDevice

USBDevice/USBMSD/USBMSD.cpp@4:980e6470dcce, 2011-11-12 (annotated)

Committer:
samux
Date:
Sat Nov 12 17:53:04 2011 +0000
Revision:
4:980e6470dcce
Parent:
3:0ffb2eee9e06
Child:
5:8afbc15d6892
will try to find a solution to init before connecting devices

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 2:27a7e7f8d399 1 // USBMSD.cpp
samux 2:27a7e7f8d399 2 // USB mass storage device example
samux 2:27a7e7f8d399 3 // Copyright (c) 2011 ARM Limited. All rights reserved.
samux 2:27a7e7f8d399 4
samux 2:27a7e7f8d399 5 #include "stdint.h"
samux 2:27a7e7f8d399 6 #include "USBMSD.h"
samux 2:27a7e7f8d399 7 #include "USBBusInterface.h"
samux 2:27a7e7f8d399 8
samux 2:27a7e7f8d399 9 #define CBW_Signature 0x43425355
samux 2:27a7e7f8d399 10 #define CSW_Signature 0x53425355
samux 2:27a7e7f8d399 11
samux 2:27a7e7f8d399 12 // SCSI Commands
samux 2:27a7e7f8d399 13 #define TEST_UNIT_READY 0x00
samux 2:27a7e7f8d399 14 #define REQUEST_SENSE 0x03
samux 2:27a7e7f8d399 15 #define FORMAT_UNIT 0x04
samux 2:27a7e7f8d399 16 #define INQUIRY 0x12
samux 2:27a7e7f8d399 17 #define MODE_SELECT6 0x15
samux 2:27a7e7f8d399 18 #define MODE_SENSE6 0x1A
samux 2:27a7e7f8d399 19 #define START_STOP_UNIT 0x1B
samux 2:27a7e7f8d399 20 #define MEDIA_REMOVAL 0x1E
samux 2:27a7e7f8d399 21 #define READ_FORMAT_CAPACITIES 0x23
samux 2:27a7e7f8d399 22 #define READ_CAPACITY 0x25
samux 2:27a7e7f8d399 23 #define READ10 0x28
samux 2:27a7e7f8d399 24 #define WRITE10 0x2A
samux 2:27a7e7f8d399 25 #define VERIFY10 0x2F
samux 2:27a7e7f8d399 26 #define READ12 0xA8
samux 2:27a7e7f8d399 27 #define WRITE12 0xAA
samux 2:27a7e7f8d399 28 #define MODE_SELECT10 0x55
samux 2:27a7e7f8d399 29 #define MODE_SENSE10 0x5A
samux 2:27a7e7f8d399 30
samux 2:27a7e7f8d399 31 // MSC class specific requests
samux 2:27a7e7f8d399 32 #define MSC_REQUEST_RESET 0xFF
samux 2:27a7e7f8d399 33 #define MSC_REQUEST_GET_MAX_LUN 0xFE
samux 2:27a7e7f8d399 34
samux 2:27a7e7f8d399 35 #define DEFAULT_CONFIGURATION (1)
samux 2:27a7e7f8d399 36
samux 2:27a7e7f8d399 37 // Max In/Out Packet Size on the bulk endpoint */
samux 2:27a7e7f8d399 38 #define MAX_PACKET MAX_PACKET_SIZE_EPBULK
samux 2:27a7e7f8d399 39
samux 2:27a7e7f8d399 40 // memory size
samux 4:980e6470dcce 41 #define MemorySize 0x400000
samux 2:27a7e7f8d399 42
samux 2:27a7e7f8d399 43 //number of blocks
samux 2:27a7e7f8d399 44 #define BlockCount (MemorySize / BlockSize)
samux 2:27a7e7f8d399 45
samux 2:27a7e7f8d399 46 // CSW Status
samux 2:27a7e7f8d399 47 enum Status {
samux 2:27a7e7f8d399 48 SCSI_PASSED,
samux 2:27a7e7f8d399 49 SCSI_FAILED,
samux 2:27a7e7f8d399 50 SCSI_PHASE_ERROR,
samux 2:27a7e7f8d399 51 };
samux 2:27a7e7f8d399 52
samux 2:27a7e7f8d399 53
samux 3:0ffb2eee9e06 54 USBMSD::USBMSD(uint16_t vendor_id, uint16_t product_id, uint16_t product_release): USBDevice(vendor_id, product_id, product_release) {
samux 2:27a7e7f8d399 55 }
samux 2:27a7e7f8d399 56
samux 2:27a7e7f8d399 57 // Called in ISR context to process a class specific request
samux 2:27a7e7f8d399 58 bool USBMSD::USBCallback_request(void) {
samux 2:27a7e7f8d399 59
samux 2:27a7e7f8d399 60 bool success = false;
samux 2:27a7e7f8d399 61 CONTROL_TRANSFER * transfer = getTransferPtr();
samux 2:27a7e7f8d399 62
samux 2:27a7e7f8d399 63 if (transfer->setup.bmRequestType.Type == CLASS_TYPE) {
samux 2:27a7e7f8d399 64 switch (transfer->setup.bRequest) {
samux 2:27a7e7f8d399 65 case MSC_REQUEST_RESET:
samux 2:27a7e7f8d399 66 reset();
samux 2:27a7e7f8d399 67 success = true;
samux 2:27a7e7f8d399 68 break;
samux 2:27a7e7f8d399 69 case MSC_REQUEST_GET_MAX_LUN:
samux 2:27a7e7f8d399 70 transfer->remaining = 1;
samux 2:27a7e7f8d399 71 transfer->ptr = getMaxLUN();
samux 2:27a7e7f8d399 72 transfer->direction = DEVICE_TO_HOST;
samux 2:27a7e7f8d399 73 success = true;
samux 2:27a7e7f8d399 74 break;
samux 2:27a7e7f8d399 75 default:
samux 2:27a7e7f8d399 76 break;
samux 2:27a7e7f8d399 77 }
samux 2:27a7e7f8d399 78 }
samux 2:27a7e7f8d399 79
samux 2:27a7e7f8d399 80 return success;
samux 2:27a7e7f8d399 81 }
samux 2:27a7e7f8d399 82
samux 2:27a7e7f8d399 83 void USBMSD::reset()
samux 2:27a7e7f8d399 84 {
samux 2:27a7e7f8d399 85 stage = STATE_READ_CBW;
samux 2:27a7e7f8d399 86 }
samux 2:27a7e7f8d399 87
samux 2:27a7e7f8d399 88 uint8_t * USBMSD::getMaxLUN()
samux 2:27a7e7f8d399 89 {
samux 2:27a7e7f8d399 90 static uint8_t LUN[] = {0};
samux 2:27a7e7f8d399 91 return LUN;
samux 2:27a7e7f8d399 92 }
samux 2:27a7e7f8d399 93
samux 2:27a7e7f8d399 94 // Called in ISR context called when a data is received
samux 2:27a7e7f8d399 95 bool USBMSD::EP2_OUT_callback() {
samux 2:27a7e7f8d399 96 uint16_t size = 0;
samux 2:27a7e7f8d399 97 uint8_t buf[MAX_PACKET_SIZE_EPBULK];
samux 2:27a7e7f8d399 98 read(EPBULK_OUT, buf, &size, MAX_PACKET_SIZE_EPBULK);
samux 2:27a7e7f8d399 99 switch (stage) {
samux 2:27a7e7f8d399 100 case STATE_READ_CBW:
samux 2:27a7e7f8d399 101 CBWDecode(buf, size);
samux 2:27a7e7f8d399 102 break;
samux 2:27a7e7f8d399 103 case STATE_PROCESS_CBW:
samux 2:27a7e7f8d399 104 switch (cbw.CB[0]) {
samux 2:27a7e7f8d399 105 case WRITE10:
samux 2:27a7e7f8d399 106 case WRITE12:
samux 2:27a7e7f8d399 107 memoryWrite(buf, size);
samux 2:27a7e7f8d399 108 break;
samux 2:27a7e7f8d399 109 case VERIFY10:
samux 2:27a7e7f8d399 110 memoryVerify(buf, size);
samux 2:27a7e7f8d399 111 break;
samux 2:27a7e7f8d399 112 }
samux 2:27a7e7f8d399 113 break;
samux 2:27a7e7f8d399 114 case STATE_WAIT_CSW:
samux 2:27a7e7f8d399 115 break;
samux 2:27a7e7f8d399 116 default:
samux 2:27a7e7f8d399 117 csw.Status = SCSI_PHASE_ERROR;
samux 2:27a7e7f8d399 118 sendCSW();
samux 2:27a7e7f8d399 119 break;
samux 2:27a7e7f8d399 120 }
samux 2:27a7e7f8d399 121
samux 2:27a7e7f8d399 122 //reactivate readings on the OUT bulk endpoint
samux 2:27a7e7f8d399 123 readStart(EPBULK_OUT, MAX_PACKET_SIZE_EPBULK);
samux 2:27a7e7f8d399 124 return true;
samux 2:27a7e7f8d399 125 }
samux 2:27a7e7f8d399 126
samux 2:27a7e7f8d399 127 // Called in ISR context when a data has been transferred
samux 2:27a7e7f8d399 128 bool USBMSD::EP2_IN_callback() {
samux 2:27a7e7f8d399 129 switch (stage) {
samux 2:27a7e7f8d399 130 case STATE_PROCESS_CBW:
samux 2:27a7e7f8d399 131 switch (cbw.CB[0]) {
samux 2:27a7e7f8d399 132 case READ10:
samux 2:27a7e7f8d399 133 case READ12:
samux 2:27a7e7f8d399 134 memoryRead();
samux 2:27a7e7f8d399 135 break;
samux 2:27a7e7f8d399 136 }
samux 2:27a7e7f8d399 137 break;
samux 2:27a7e7f8d399 138 case STATE_SEND_CSW:
samux 2:27a7e7f8d399 139 sendCSW();
samux 2:27a7e7f8d399 140 break;
samux 2:27a7e7f8d399 141 case STATE_ERROR:
samux 2:27a7e7f8d399 142 stallEndpoint(EPBULK_IN);
samux 2:27a7e7f8d399 143 sendCSW();
samux 2:27a7e7f8d399 144 break;
samux 2:27a7e7f8d399 145 case STATE_WAIT_CSW:
samux 2:27a7e7f8d399 146 stage = STATE_READ_CBW;
samux 2:27a7e7f8d399 147 break;
samux 2:27a7e7f8d399 148 }
samux 2:27a7e7f8d399 149 return true;
samux 2:27a7e7f8d399 150 }
samux 2:27a7e7f8d399 151
samux 2:27a7e7f8d399 152
samux 2:27a7e7f8d399 153 void USBMSD::memoryWrite (uint8_t * buf, uint16_t size) {
samux 2:27a7e7f8d399 154
samux 2:27a7e7f8d399 155 if ((addr + size) > MemorySize) {
samux 2:27a7e7f8d399 156 size = MemorySize - addr;
samux 2:27a7e7f8d399 157 stage = STATE_WAIT_CSW;
samux 2:27a7e7f8d399 158 stallEndpoint(EPBULK_OUT);
samux 2:27a7e7f8d399 159 }
samux 2:27a7e7f8d399 160
samux 2:27a7e7f8d399 161 // we fill an array in RAM of 1 block before writing it in memory
samux 2:27a7e7f8d399 162 for (int i = 0; i < size; i++)
samux 2:27a7e7f8d399 163 page[addr%BlockSize + i] = buf[i];
samux 2:27a7e7f8d399 164
samux 2:27a7e7f8d399 165 // if the array is filled, write it in memory
samux 2:27a7e7f8d399 166 if (!((addr + size)%BlockSize))
samux 3:0ffb2eee9e06 167 blockWrite(page, addr/BlockSize);
samux 2:27a7e7f8d399 168
samux 2:27a7e7f8d399 169 addr += size;
samux 2:27a7e7f8d399 170 length -= size;
samux 2:27a7e7f8d399 171 csw.DataResidue -= size;
samux 2:27a7e7f8d399 172
samux 2:27a7e7f8d399 173 if ((!length) || (stage == STATE_WAIT_CSW)) {
samux 2:27a7e7f8d399 174 csw.Status = SCSI_PASSED;
samux 2:27a7e7f8d399 175 sendCSW();
samux 2:27a7e7f8d399 176 }
samux 2:27a7e7f8d399 177 }
samux 2:27a7e7f8d399 178
samux 2:27a7e7f8d399 179 void USBMSD::memoryVerify (uint8_t * buf, uint16_t size) {
samux 2:27a7e7f8d399 180 uint32_t n;
samux 2:27a7e7f8d399 181
samux 2:27a7e7f8d399 182 if ((addr + size) > MemorySize) {
samux 2:27a7e7f8d399 183 size = MemorySize - addr;
samux 2:27a7e7f8d399 184 stage = STATE_WAIT_CSW;
samux 2:27a7e7f8d399 185 stallEndpoint(EPBULK_OUT);
samux 2:27a7e7f8d399 186 }
samux 2:27a7e7f8d399 187
samux 2:27a7e7f8d399 188 // beginning of a new block -> load a whole block in RAM
samux 2:27a7e7f8d399 189 if (!(addr%BlockSize))
samux 3:0ffb2eee9e06 190 blockRead(page, addr/BlockSize);
samux 2:27a7e7f8d399 191
samux 2:27a7e7f8d399 192 // info are in RAM -> no need to re-read memory
samux 2:27a7e7f8d399 193 for (n = 0; n < size; n++) {
samux 2:27a7e7f8d399 194 if (page[addr%BlockSize + n] != buf[n]) {
samux 2:27a7e7f8d399 195 memOK = false;
samux 2:27a7e7f8d399 196 break;
samux 2:27a7e7f8d399 197 }
samux 2:27a7e7f8d399 198 }
samux 2:27a7e7f8d399 199
samux 2:27a7e7f8d399 200 addr += size;
samux 2:27a7e7f8d399 201 length -= size;
samux 2:27a7e7f8d399 202 csw.DataResidue -= size;
samux 2:27a7e7f8d399 203
samux 2:27a7e7f8d399 204 if ( !length || (stage == STATE_WAIT_CSW)) {
samux 2:27a7e7f8d399 205 csw.Status = (memOK) ? SCSI_PASSED : SCSI_FAILED;
samux 2:27a7e7f8d399 206 sendCSW();
samux 2:27a7e7f8d399 207 }
samux 2:27a7e7f8d399 208 }
samux 2:27a7e7f8d399 209
samux 2:27a7e7f8d399 210
samux 2:27a7e7f8d399 211 bool USBMSD::inquiryRequest (void) {
samux 2:27a7e7f8d399 212 uint8_t inquiry[] = { 0x00, 0x80, 0x00, 0x01,
samux 2:27a7e7f8d399 213 36 - 4, 0x80, 0x00, 0x00,
samux 2:27a7e7f8d399 214 'M', 'B', 'E', 'D', '.', 'O', 'R', 'G',
samux 2:27a7e7f8d399 215 'M', 'B', 'E', 'D', ' ', 'U', 'S', 'B', ' ', 'D', 'I', 'S', 'K', ' ', ' ', ' ',
samux 2:27a7e7f8d399 216 '1', '.', '0', ' ',
samux 2:27a7e7f8d399 217 };
samux 2:27a7e7f8d399 218 if (!write(inquiry, sizeof(inquiry))) {
samux 2:27a7e7f8d399 219 return false;
samux 2:27a7e7f8d399 220 }
samux 2:27a7e7f8d399 221 return true;
samux 2:27a7e7f8d399 222 }
samux 2:27a7e7f8d399 223
samux 2:27a7e7f8d399 224
samux 2:27a7e7f8d399 225 bool USBMSD::readFormatCapacity() {
samux 2:27a7e7f8d399 226 uint8_t capacity[] = { 0x00, 0x00, 0x00, 0x08,
samux 2:27a7e7f8d399 227 (BlockCount >> 24) & 0xff,
samux 2:27a7e7f8d399 228 (BlockCount >> 16) & 0xff,
samux 2:27a7e7f8d399 229 (BlockCount >> 8) & 0xff,
samux 2:27a7e7f8d399 230 (BlockCount >> 0) & 0xff,
samux 2:27a7e7f8d399 231
samux 2:27a7e7f8d399 232 0x02,
samux 2:27a7e7f8d399 233 (BlockSize >> 16) & 0xff,
samux 2:27a7e7f8d399 234 (BlockSize >> 8) & 0xff,
samux 2:27a7e7f8d399 235 (BlockSize >> 0) & 0xff,
samux 2:27a7e7f8d399 236 };
samux 2:27a7e7f8d399 237 if (!write(capacity, sizeof(capacity))) {
samux 2:27a7e7f8d399 238 return false;
samux 2:27a7e7f8d399 239 }
samux 2:27a7e7f8d399 240 return true;
samux 2:27a7e7f8d399 241 }
samux 2:27a7e7f8d399 242
samux 2:27a7e7f8d399 243
samux 2:27a7e7f8d399 244 bool USBMSD::readCapacity (void) {
samux 2:27a7e7f8d399 245 uint8_t capacity[] = {
samux 2:27a7e7f8d399 246 ((BlockCount - 1) >> 24) & 0xff,
samux 2:27a7e7f8d399 247 ((BlockCount - 1) >> 16) & 0xff,
samux 2:27a7e7f8d399 248 ((BlockCount - 1) >> 8) & 0xff,
samux 2:27a7e7f8d399 249 ((BlockCount - 1) >> 0) & 0xff,
samux 2:27a7e7f8d399 250
samux 2:27a7e7f8d399 251 (BlockSize >> 24) & 0xff,
samux 2:27a7e7f8d399 252 (BlockSize >> 16) & 0xff,
samux 2:27a7e7f8d399 253 (BlockSize >> 8) & 0xff,
samux 2:27a7e7f8d399 254 (BlockSize >> 0) & 0xff,
samux 2:27a7e7f8d399 255 };
samux 2:27a7e7f8d399 256 if (!write(capacity, sizeof(capacity))) {
samux 2:27a7e7f8d399 257 return false;
samux 2:27a7e7f8d399 258 }
samux 2:27a7e7f8d399 259 return true;
samux 2:27a7e7f8d399 260
samux 2:27a7e7f8d399 261 }
samux 2:27a7e7f8d399 262
samux 2:27a7e7f8d399 263 bool USBMSD::write (uint8_t * buf, uint16_t size) {
samux 2:27a7e7f8d399 264
samux 2:27a7e7f8d399 265 if (size >= cbw.DataLength) {
samux 2:27a7e7f8d399 266 size = cbw.DataLength;
samux 2:27a7e7f8d399 267 }
samux 2:27a7e7f8d399 268 stage = STATE_SEND_CSW;
samux 2:27a7e7f8d399 269
samux 2:27a7e7f8d399 270 if (!writeNB(EPBULK_IN, buf, size, MAX_PACKET_SIZE_EPBULK)) {
samux 2:27a7e7f8d399 271 return false;
samux 2:27a7e7f8d399 272 }
samux 2:27a7e7f8d399 273
samux 2:27a7e7f8d399 274 csw.DataResidue -= size;
samux 2:27a7e7f8d399 275 csw.Status = SCSI_PASSED;
samux 2:27a7e7f8d399 276 return true;
samux 2:27a7e7f8d399 277 }
samux 2:27a7e7f8d399 278
samux 2:27a7e7f8d399 279
samux 2:27a7e7f8d399 280 bool USBMSD::modeSense6 (void) {
samux 2:27a7e7f8d399 281 uint8_t sense6[] = { 0x03, 0x00, 0x00, 0x00 };
samux 2:27a7e7f8d399 282 if (!write(sense6, sizeof(sense6))) {
samux 2:27a7e7f8d399 283 return false;
samux 2:27a7e7f8d399 284 }
samux 2:27a7e7f8d399 285 return true;
samux 2:27a7e7f8d399 286 }
samux 2:27a7e7f8d399 287
samux 2:27a7e7f8d399 288 void USBMSD::sendCSW() {
samux 2:27a7e7f8d399 289 csw.Signature = CSW_Signature;
samux 2:27a7e7f8d399 290 writeNB(EPBULK_IN, (uint8_t *)&csw, sizeof(CSW), MAX_PACKET_SIZE_EPBULK);
samux 2:27a7e7f8d399 291 stage = STATE_WAIT_CSW;
samux 2:27a7e7f8d399 292 }
samux 2:27a7e7f8d399 293
samux 2:27a7e7f8d399 294 bool USBMSD::requestSense (void) {
samux 2:27a7e7f8d399 295 uint8_t request_sense[] = {
samux 2:27a7e7f8d399 296 0x70, // Response Code
samux 2:27a7e7f8d399 297 0x00,
samux 2:27a7e7f8d399 298 0x05, // Sense Key: illegal request
samux 2:27a7e7f8d399 299 0x00,
samux 2:27a7e7f8d399 300 0x00,
samux 2:27a7e7f8d399 301 0x00,
samux 2:27a7e7f8d399 302 0x00,
samux 2:27a7e7f8d399 303 0x0A, // Additional Length
samux 2:27a7e7f8d399 304 0x00,
samux 2:27a7e7f8d399 305 0x00,
samux 2:27a7e7f8d399 306 0x00,
samux 2:27a7e7f8d399 307 0x00,
samux 2:27a7e7f8d399 308 0x30, // ASC
samux 2:27a7e7f8d399 309 0x01, // ASCQ
samux 2:27a7e7f8d399 310 0x00,
samux 2:27a7e7f8d399 311 0x00,
samux 2:27a7e7f8d399 312 0x00,
samux 2:27a7e7f8d399 313 0x00,
samux 2:27a7e7f8d399 314 };
samux 2:27a7e7f8d399 315
samux 2:27a7e7f8d399 316 if (!write(request_sense, sizeof(request_sense))) {
samux 2:27a7e7f8d399 317 return false;
samux 2:27a7e7f8d399 318 }
samux 2:27a7e7f8d399 319
samux 2:27a7e7f8d399 320 return true;
samux 2:27a7e7f8d399 321 }
samux 2:27a7e7f8d399 322
samux 2:27a7e7f8d399 323 void USBMSD::fail() {
samux 2:27a7e7f8d399 324 csw.Status = SCSI_FAILED;
samux 2:27a7e7f8d399 325 sendCSW();
samux 2:27a7e7f8d399 326 }
samux 2:27a7e7f8d399 327
samux 2:27a7e7f8d399 328 void USBMSD::CBWDecode(uint8_t * buf, uint16_t size) {
samux 2:27a7e7f8d399 329 if (size == sizeof(cbw)) {
samux 2:27a7e7f8d399 330 memcpy((uint8_t *)&cbw, buf, size);
samux 2:27a7e7f8d399 331 if (cbw.Signature == CBW_Signature) {
samux 2:27a7e7f8d399 332 csw.Tag = cbw.Tag;
samux 2:27a7e7f8d399 333 csw.DataResidue = cbw.DataLength;
samux 2:27a7e7f8d399 334 if ((cbw.CBLength < 1) || (cbw.CBLength > 16) ) {
samux 2:27a7e7f8d399 335 fail();
samux 2:27a7e7f8d399 336 } else {
samux 2:27a7e7f8d399 337 switch (cbw.CB[0]) {
samux 2:27a7e7f8d399 338 case TEST_UNIT_READY:
samux 2:27a7e7f8d399 339 testUnitReady();
samux 2:27a7e7f8d399 340 break;
samux 2:27a7e7f8d399 341 case REQUEST_SENSE:
samux 2:27a7e7f8d399 342 requestSense();
samux 2:27a7e7f8d399 343 break;
samux 2:27a7e7f8d399 344 case INQUIRY:
samux 2:27a7e7f8d399 345 inquiryRequest();
samux 2:27a7e7f8d399 346 break;
samux 2:27a7e7f8d399 347 case MODE_SENSE6:
samux 2:27a7e7f8d399 348 modeSense6();
samux 2:27a7e7f8d399 349 break;
samux 2:27a7e7f8d399 350 case READ_FORMAT_CAPACITIES:
samux 2:27a7e7f8d399 351 readFormatCapacity();
samux 2:27a7e7f8d399 352 break;
samux 2:27a7e7f8d399 353 case READ_CAPACITY:
samux 2:27a7e7f8d399 354 readCapacity();
samux 2:27a7e7f8d399 355 break;
samux 2:27a7e7f8d399 356 case READ10:
samux 2:27a7e7f8d399 357 case READ12:
samux 2:27a7e7f8d399 358 if (infoTransfer()) {
samux 2:27a7e7f8d399 359 if ((cbw.Flags & 0x80)) {
samux 2:27a7e7f8d399 360 stage = STATE_PROCESS_CBW;
samux 2:27a7e7f8d399 361 memoryRead();
samux 2:27a7e7f8d399 362 } else {
samux 2:27a7e7f8d399 363 stallEndpoint(EPBULK_OUT);
samux 2:27a7e7f8d399 364 csw.Status = SCSI_PHASE_ERROR;
samux 2:27a7e7f8d399 365 sendCSW();
samux 2:27a7e7f8d399 366 }
samux 2:27a7e7f8d399 367 }
samux 2:27a7e7f8d399 368 break;
samux 2:27a7e7f8d399 369 case WRITE10:
samux 2:27a7e7f8d399 370 case WRITE12:
samux 2:27a7e7f8d399 371 if (infoTransfer()) {
samux 2:27a7e7f8d399 372 if (!(cbw.Flags & 0x80)) {
samux 2:27a7e7f8d399 373 stage = STATE_PROCESS_CBW;
samux 2:27a7e7f8d399 374 } else {
samux 2:27a7e7f8d399 375 stallEndpoint(EPBULK_IN);
samux 2:27a7e7f8d399 376 csw.Status = SCSI_PHASE_ERROR;
samux 2:27a7e7f8d399 377 sendCSW();
samux 2:27a7e7f8d399 378 }
samux 2:27a7e7f8d399 379 }
samux 2:27a7e7f8d399 380 break;
samux 2:27a7e7f8d399 381 case VERIFY10:
samux 2:27a7e7f8d399 382 if (!(cbw.CB[1] & 0x02)) {
samux 2:27a7e7f8d399 383 csw.Status = SCSI_PASSED;
samux 2:27a7e7f8d399 384 sendCSW();
samux 2:27a7e7f8d399 385 break;
samux 2:27a7e7f8d399 386 }
samux 2:27a7e7f8d399 387 if (infoTransfer()) {
samux 2:27a7e7f8d399 388 if (!(cbw.Flags & 0x80)) {
samux 2:27a7e7f8d399 389 stage = STATE_PROCESS_CBW;
samux 2:27a7e7f8d399 390 memOK = true;
samux 2:27a7e7f8d399 391 } else {
samux 2:27a7e7f8d399 392 stallEndpoint(EPBULK_IN);
samux 2:27a7e7f8d399 393 csw.Status = SCSI_PHASE_ERROR;
samux 2:27a7e7f8d399 394 sendCSW();
samux 2:27a7e7f8d399 395 }
samux 2:27a7e7f8d399 396 }
samux 2:27a7e7f8d399 397 break;
samux 2:27a7e7f8d399 398 default:
samux 2:27a7e7f8d399 399 fail();
samux 2:27a7e7f8d399 400 break;
samux 2:27a7e7f8d399 401 }
samux 2:27a7e7f8d399 402 }
samux 2:27a7e7f8d399 403 }
samux 2:27a7e7f8d399 404 }
samux 2:27a7e7f8d399 405 }
samux 2:27a7e7f8d399 406
samux 2:27a7e7f8d399 407 void USBMSD::testUnitReady (void) {
samux 2:27a7e7f8d399 408
samux 2:27a7e7f8d399 409 if (cbw.DataLength != 0) {
samux 2:27a7e7f8d399 410 if ((cbw.Flags & 0x80) != 0) {
samux 2:27a7e7f8d399 411 stallEndpoint(EPBULK_IN);
samux 2:27a7e7f8d399 412 } else {
samux 2:27a7e7f8d399 413 stallEndpoint(EPBULK_OUT);
samux 2:27a7e7f8d399 414 }
samux 2:27a7e7f8d399 415 }
samux 2:27a7e7f8d399 416
samux 2:27a7e7f8d399 417 csw.Status = SCSI_PASSED;
samux 2:27a7e7f8d399 418 sendCSW();
samux 2:27a7e7f8d399 419 }
samux 2:27a7e7f8d399 420
samux 2:27a7e7f8d399 421
samux 2:27a7e7f8d399 422 void USBMSD::memoryRead (void) {
samux 2:27a7e7f8d399 423 uint32_t n;
samux 2:27a7e7f8d399 424
samux 2:27a7e7f8d399 425 n = (length > MAX_PACKET) ? MAX_PACKET : length;
samux 2:27a7e7f8d399 426
samux 2:27a7e7f8d399 427 if ((addr + n) > MemorySize) {
samux 2:27a7e7f8d399 428 n = MemorySize - addr;
samux 2:27a7e7f8d399 429 stage = STATE_ERROR;
samux 2:27a7e7f8d399 430 }
samux 2:27a7e7f8d399 431
samux 2:27a7e7f8d399 432 if (!(addr%BlockSize))
samux 3:0ffb2eee9e06 433 blockRead(page, addr/BlockSize);
samux 2:27a7e7f8d399 434
samux 2:27a7e7f8d399 435 writeNB(EPBULK_IN, &page[addr%BlockSize], n, MAX_PACKET_SIZE_EPBULK);
samux 2:27a7e7f8d399 436
samux 2:27a7e7f8d399 437 addr += n;
samux 2:27a7e7f8d399 438 length -= n;
samux 2:27a7e7f8d399 439
samux 2:27a7e7f8d399 440 csw.DataResidue -= n;
samux 2:27a7e7f8d399 441
samux 2:27a7e7f8d399 442 if (!length) {
samux 2:27a7e7f8d399 443 stage = STATE_SEND_CSW;
samux 2:27a7e7f8d399 444 }
samux 2:27a7e7f8d399 445
samux 2:27a7e7f8d399 446 if (stage != STATE_PROCESS_CBW) {
samux 2:27a7e7f8d399 447 csw.Status = SCSI_PASSED;
samux 2:27a7e7f8d399 448 }
samux 2:27a7e7f8d399 449 }
samux 2:27a7e7f8d399 450
samux 2:27a7e7f8d399 451
samux 2:27a7e7f8d399 452 bool USBMSD::infoTransfer (void) {
samux 2:27a7e7f8d399 453 uint32_t n;
samux 2:27a7e7f8d399 454
samux 2:27a7e7f8d399 455 // Logical Block Address of First Block
samux 2:27a7e7f8d399 456 n = (cbw.CB[2] << 24) | (cbw.CB[3] << 16) | (cbw.CB[4] << 8) | (cbw.CB[5] << 0);
samux 2:27a7e7f8d399 457
samux 2:27a7e7f8d399 458 addr = n * BlockSize;
samux 2:27a7e7f8d399 459
samux 2:27a7e7f8d399 460 // Number of Blocks to transfer
samux 2:27a7e7f8d399 461 switch (cbw.CB[0]) {
samux 2:27a7e7f8d399 462 case READ10:
samux 2:27a7e7f8d399 463 case WRITE10:
samux 2:27a7e7f8d399 464 case VERIFY10:
samux 2:27a7e7f8d399 465 n = (cbw.CB[7] << 8) | (cbw.CB[8] << 0);
samux 2:27a7e7f8d399 466 break;
samux 2:27a7e7f8d399 467
samux 2:27a7e7f8d399 468 case READ12:
samux 2:27a7e7f8d399 469 case WRITE12:
samux 2:27a7e7f8d399 470 n = (cbw.CB[6] << 24) | (cbw.CB[7] << 16) | (cbw.CB[8] << 8) | (cbw.CB[9] << 0);
samux 2:27a7e7f8d399 471 break;
samux 2:27a7e7f8d399 472 }
samux 2:27a7e7f8d399 473
samux 2:27a7e7f8d399 474 length = n * BlockSize;
samux 2:27a7e7f8d399 475
samux 2:27a7e7f8d399 476 if (!cbw.DataLength) { // host requests no data
samux 2:27a7e7f8d399 477 csw.Status = SCSI_FAILED;
samux 2:27a7e7f8d399 478 sendCSW();
samux 2:27a7e7f8d399 479 return false;
samux 2:27a7e7f8d399 480 }
samux 2:27a7e7f8d399 481
samux 2:27a7e7f8d399 482 if (cbw.DataLength != length) {
samux 2:27a7e7f8d399 483 if ((cbw.Flags & 0x80) != 0) {
samux 2:27a7e7f8d399 484 stallEndpoint(EPBULK_IN);
samux 2:27a7e7f8d399 485 } else {
samux 2:27a7e7f8d399 486 stallEndpoint(EPBULK_OUT);
samux 2:27a7e7f8d399 487 }
samux 2:27a7e7f8d399 488
samux 2:27a7e7f8d399 489 csw.Status = SCSI_FAILED;
samux 2:27a7e7f8d399 490 sendCSW();
samux 2:27a7e7f8d399 491 return false;
samux 2:27a7e7f8d399 492 }
samux 2:27a7e7f8d399 493
samux 2:27a7e7f8d399 494 return true;
samux 2:27a7e7f8d399 495 }
samux 2:27a7e7f8d399 496
samux 2:27a7e7f8d399 497
samux 2:27a7e7f8d399 498
samux 2:27a7e7f8d399 499
samux 2:27a7e7f8d399 500
samux 2:27a7e7f8d399 501 // Called in ISR context
samux 2:27a7e7f8d399 502 // Set configuration. Return false if the
samux 2:27a7e7f8d399 503 // configuration is not supported.
samux 2:27a7e7f8d399 504 bool USBMSD::USBCallback_setConfiguration(uint8_t configuration) {
samux 2:27a7e7f8d399 505 if (configuration != DEFAULT_CONFIGURATION) {
samux 2:27a7e7f8d399 506 return false;
samux 2:27a7e7f8d399 507 }
samux 2:27a7e7f8d399 508
samux 2:27a7e7f8d399 509 // Configure endpoints > 0
samux 2:27a7e7f8d399 510 addEndpoint(EPBULK_IN, MAX_PACKET_SIZE_EPBULK);
samux 2:27a7e7f8d399 511 addEndpoint(EPBULK_OUT, MAX_PACKET_SIZE_EPBULK);
samux 2:27a7e7f8d399 512
samux 2:27a7e7f8d399 513 //activate readings
samux 2:27a7e7f8d399 514 readStart(EPBULK_OUT, MAX_PACKET_SIZE_EPBULK);
samux 2:27a7e7f8d399 515 return true;
samux 2:27a7e7f8d399 516 }
samux 2:27a7e7f8d399 517
samux 2:27a7e7f8d399 518
samux 2:27a7e7f8d399 519 uint8_t * USBMSD::stringIinterfaceDesc() {
samux 2:27a7e7f8d399 520 static uint8_t stringIinterfaceDescriptor[] = {
samux 2:27a7e7f8d399 521 0x08, //bLength
samux 2:27a7e7f8d399 522 STRING_DESCRIPTOR, //bDescriptorType 0x03
samux 2:27a7e7f8d399 523 'M',0,'S',0,'D',0 //bString iInterface - MSD
samux 2:27a7e7f8d399 524 };
samux 2:27a7e7f8d399 525 return stringIinterfaceDescriptor;
samux 2:27a7e7f8d399 526 }
samux 2:27a7e7f8d399 527
samux 2:27a7e7f8d399 528 uint8_t * USBMSD::stringIproductDesc() {
samux 2:27a7e7f8d399 529 static uint8_t stringIproductDescriptor[] = {
samux 2:27a7e7f8d399 530 0x12, //bLength
samux 2:27a7e7f8d399 531 STRING_DESCRIPTOR, //bDescriptorType 0x03
samux 2:27a7e7f8d399 532 'M',0,'b',0,'e',0,'d',0,' ',0,'M',0,'S',0,'D',0 //bString iProduct - Mbed Audio
samux 2:27a7e7f8d399 533 };
samux 2:27a7e7f8d399 534 return stringIproductDescriptor;
samux 2:27a7e7f8d399 535 }
samux 2:27a7e7f8d399 536
samux 2:27a7e7f8d399 537
samux 2:27a7e7f8d399 538 uint8_t * USBMSD::configurationDesc() {
samux 2:27a7e7f8d399 539 static uint8_t configDescriptor[] = {
samux 2:27a7e7f8d399 540
samux 2:27a7e7f8d399 541 // Configuration 1
samux 2:27a7e7f8d399 542 9, // bLength
samux 2:27a7e7f8d399 543 2, // bDescriptorType
samux 2:27a7e7f8d399 544 LSB(9 + 9 + 7 + 7), // wTotalLength
samux 2:27a7e7f8d399 545 MSB(9 + 9 + 7 + 7),
samux 2:27a7e7f8d399 546 0x01, // bNumInterfaces
samux 2:27a7e7f8d399 547 0x01, // bConfigurationValue: 0x01 is used to select this configuration
samux 2:27a7e7f8d399 548 0x00, // iConfiguration: no string to describe this configuration
samux 2:27a7e7f8d399 549 0xC0, // bmAttributes
samux 2:27a7e7f8d399 550 100, // bMaxPower, device power consumption is 100 mA
samux 2:27a7e7f8d399 551
samux 2:27a7e7f8d399 552 // Interface 0, Alternate Setting 0, MSC Class
samux 2:27a7e7f8d399 553 9, // bLength
samux 2:27a7e7f8d399 554 4, // bDescriptorType
samux 2:27a7e7f8d399 555 0x00, // bInterfaceNumber
samux 2:27a7e7f8d399 556 0x00, // bAlternateSetting
samux 2:27a7e7f8d399 557 0x02, // bNumEndpoints
samux 2:27a7e7f8d399 558 0x08, // bInterfaceClass
samux 2:27a7e7f8d399 559 0x06, // bInterfaceSubClass
samux 2:27a7e7f8d399 560 0x50, // bInterfaceProtocol
samux 2:27a7e7f8d399 561 0x04, // iInterface
samux 2:27a7e7f8d399 562
samux 2:27a7e7f8d399 563 // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
samux 2:27a7e7f8d399 564 7, // bLength
samux 2:27a7e7f8d399 565 5, // bDescriptorType
samux 2:27a7e7f8d399 566 PHY_TO_DESC(EPBULK_IN), // bEndpointAddress
samux 2:27a7e7f8d399 567 0x02, // bmAttributes (0x02=bulk)
samux 2:27a7e7f8d399 568 LSB(MAX_PACKET_SIZE_EPBULK),// wMaxPacketSize (LSB)
samux 2:27a7e7f8d399 569 MSB(MAX_PACKET_SIZE_EPBULK),// wMaxPacketSize (MSB)
samux 2:27a7e7f8d399 570 0, // bInterval
samux 2:27a7e7f8d399 571
samux 2:27a7e7f8d399 572 // endpoint descriptor, USB spec 9.6.6, page 269-271, Table 9-13
samux 2:27a7e7f8d399 573 7, // bLength
samux 2:27a7e7f8d399 574 5, // bDescriptorType
samux 2:27a7e7f8d399 575 PHY_TO_DESC(EPBULK_OUT), // bEndpointAddress
samux 2:27a7e7f8d399 576 0x02, // bmAttributes (0x02=bulk)
samux 2:27a7e7f8d399 577 LSB(MAX_PACKET_SIZE_EPBULK),// wMaxPacketSize (LSB)
samux 2:27a7e7f8d399 578 MSB(MAX_PACKET_SIZE_EPBULK),// wMaxPacketSize (MSB)
samux 2:27a7e7f8d399 579 0 // bInterval
samux 2:27a7e7f8d399 580 };
samux 2:27a7e7f8d399 581 return configDescriptor;
samux 2:27a7e7f8d399 582 }