mini board PCU9669 (and PCA9665) sample code

Dependencies:   mbed PCU9669 utility PCA9665 I2C_slaves parallel_bus

Fork of mini_board_PCU9669_old by InetrfaceProducts NXP

Sample code for PCU9669 (PCU9661, PCA9663, PCA9661 and PCA9665) evaluation board.

PCU9669 evaluation board: Mini board PCU9669
User manual is available -> http://www.nxp.com/documents/user_manual/UM10580.pdf

Revision:
10:47974d9e6a5f
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mini_board_libs/PCU9669/transfer_manager.c	Fri Jul 06 08:30:10 2012 +0000
@@ -0,0 +1,179 @@
+/** A sample code for "mini board PCU9669/PCA9665"
+ *
+ *  @author  Akifumi (Tedd) OKANO, NXP Semiconductors
+ *  @version 1.0
+ *  @date    26-Mar-2012
+ *
+ *  Released under the MIT License: http://mbed.org/license/mit
+ *
+ *  An operation sample of PCU9669/PCA9665 I2C bus controller.
+ *  The mbed accesses the bus controller's parallel port (8/2 bit address and 8 bit data) by bit-banging.
+ *  The bit-banging is poerformed by PortInOut function of mbed library.
+ *
+ *    To make the code porting easier, all codes are partitioned into layers to abstract other parts.
+ *    The mbed specific parts are concentrated in lowest layer: "hardware_abs.*".
+ *    This module may need to be modified for the porting.
+ *
+ *    All other upper layers are writen in standard-C.
+ *
+ *    base code is written from 05-Sep-2011 to 09-Sep-2011.
+ *    And demo code has been build on 11-Sep-2011.
+ *    Debug and code adjustment has been done on 08-Sep-2011.
+ *    Small sanitization for main.cpp. All mbed related codes are moved in to "hardware_abs.*". 13-Oct-2011
+ *    hardware_abs are moved into parallel_bus library folder, 3 LED driver operation sample 13-Feb.-2012
+ *    PCU9669 and PCA9665 codes are packed in a project 14-Feb-2012. 
+ *    
+ *    Before builidng the code, please edit the file mini_board_PCU9669/config.h
+ *    Un-comment the target name what you want to target. 
+ */
+
+/*
+ *  "transfer_manager" is a module to manage I2C bus transfers.
+ *  In this sample code, single slave access (from START or RESTART condition to STOP or next RESTART
+ *  condition) is called transaction.
+ *
+ *  In this software, the transaction is a struct (the struct is defined in "transfer_manager.h")
+ *
+ *      typedef struct  transaction_st {
+ *          char    i2c_address     __attribute__((packed));
+ *          char    *data           __attribute__((packed));
+ *          char    length          __attribute__((packed));
+ *      }
+ *      transaction;
+ *
+ *  The transaction has target I2C slave address pointer to the data array and the data length.
+ *  Read/write drection is maneged by LSB of the i2c_address.
+ *
+ *  For the reading, in this version, a dummy data array can be used but it need to have actual data
+ *  because it will be accessed for buffer filling.
+ *  And transfer manager doesn't readback the buffer. So user need to readback by "buffer_read()"
+ *  function after transaction executed.
+ *
+ *  A transfer can be represented by array of transaction, i.e...
+ *
+ *      transaction     a_sample_of_transfer[];
+ *
+ *  This array_of_transaction: "transfer" is used for the setting of the registers and buffers.
+ *
+ *  See "main.cpp" for the actual sample of those transfer/transaction usage
+ */
+
+#include "transfer_manager.h"
+#include "PCU9669_access.h"     //  PCU9669 chip access interface
+
+void setup_transfer( char ch, transaction *t, char n_of_transaction ) {
+    int     i;
+#ifdef  PCU9669_BURST_DATA_ACCESS
+#else
+    int     j;
+#endif
+
+    write_ch_register( ch, CONTROL, 0x02 );  //  AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
+
+    for ( i = 0; i < n_of_transaction; i++ )
+        write_ch_register( ch, SLATABLE, (t + i)->i2c_address ); //
+
+    write_ch_register( ch, TRANCONFIG, n_of_transaction );  //  first byte of TRANCONFIG sets to # of transactions
+    write_ch_register( ch, TRANSEL, 0 );                    //  select #0 transaction
+
+    for ( i = 0; i < n_of_transaction; i++ )
+        write_ch_register( ch, TRANCONFIG, (t + i)->length );
+
+
+#ifdef  PCU9669_BURST_DATA_ACCESS
+    for ( i = 0; i < n_of_transaction; i++ )
+        write_ch_register_burst( ch, DATA, ((t + i)->data), (t + i)->length );
+
+#else
+    for ( i = 0; i < n_of_transaction; i++ )
+        for ( j = 0; j < (t + i)->length; j++ )
+            write_ch_register( ch, DATA, *(((t + i)->data) + j) );
+#endif
+}
+
+
+void set_n_of_transaction( char ch, char n_of_transaction )
+{
+    write_ch_register( ch, CONTROL, 0x02 );  //  AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
+    write_ch_register( ch, TRANCONFIG, n_of_transaction );  //  first byte of TRANCONFIG sets to # of transactions
+}
+
+
+void buffer_overwrite( char ch, char transaction_number, char offset, char *data, char length ) {
+#ifdef  PCU9669_BURST_DATA_ACCESS
+#else
+    int     i;
+#endif
+
+    write_ch_register( ch, TRANSEL, transaction_number );
+    write_ch_register( ch, TRANOFS, offset );
+
+#ifdef  PCU9669_BURST_DATA_ACCESS
+    write_ch_register_burst( ch, DATA, data, length );
+#else
+    for ( i = 0; i < length; i++ )
+        write_ch_register( ch, DATA, *data++ );
+#endif
+}
+
+void buffer_read( char ch, char transaction_number, char offset, char *data, char length ) {
+#ifdef  PCU9669_BURST_DATA_ACCESS
+#else
+    int     i;
+#endif
+
+    write_ch_register( ch, TRANSEL, transaction_number );
+    write_ch_register( ch, TRANOFS, offset );
+
+#ifdef  PCU9669_BURST_DATA_ACCESS
+    read_ch_register_burst( ch, DATA, data, length );
+#else
+    for ( i = 0; i < length; i++ )
+        *data++ = read_ch_register( ch, DATA );
+#endif
+}
+
+void start( char ch ) {
+    write_ch_register( ch, CONTROL, 0x40 );
+}
+
+void start_by_trigger( char ch, char polarity ) {
+    write_ch_register( ch, CONTROL, 0x48 | (polarity ? 0x10 : 0x00 ) );
+}
+
+void stop( char ch ) {
+    write_ch_register( ch, CONTROL, 0x20 ); //  set STO bit
+}
+
+/*  for test of register access order variation */
+/*
+void setup_transfer( char ch, transaction *t, char n_of_transaction ) {
+    int     i;
+    int     j;
+
+    write_ch_register( ch, CONTROL, 0x02 );                 //  AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
+    write_ch_register( ch, TRANCONFIG, n_of_transaction );  //  first byte of TRANCONFIG sets to # of transactions
+    write_ch_register( ch, TRANSEL, 0 );                    //  select #0 transaction
+
+    for ( i = 0; i < n_of_transaction; i++ ) {
+        write_ch_register( ch, SLATABLE, (t + i)->i2c_address ); //
+        write_ch_register( ch, TRANCONFIG, (t + i)->length );
+        write_ch_register_burst( ch, DATA, ((t + i)->data), (t + i)->length );
+    }
+}
+*/
+
+/*
+void single_transaction_buffer_fill( char ch, char slot, transaction *tp ) {
+    int     i;
+
+    write_ch_register( ch, CONTROL, 0x02 );  //  AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
+    write_ch_register( ch, TRANSEL, slot );     //  select #0 transfer
+    write_ch_register( ch, TRANCONFIG, 1 );  //  first byte of TRANCONFIG sets to # of transactions
+    write_ch_register( ch, TRANCONFIG, tp->length ); //  length of first transaction
+    write_ch_register( ch, SLATABLE, tp->i2c_address ); //
+
+    for ( i = 0; i < length; i++ )
+        write_ch_register( ch, DATA, *data++ ); //
+}
+*/