InetrfaceProducts NXP / Mbed 2 deprecated mini_board_PCU9669

mini board PCU9669 (and PCA9665) sample code

Dependencies:   mbed PCU9669 utility PCA9665 I2C_slaves parallel_bus

Fork of mini_board_PCU9669_old by InetrfaceProducts NXP

Sample code for PCU9669 (PCU9661, PCA9663, PCA9661 and PCA9665) evaluation board.

PCU9669 evaluation board: Mini board PCU9669
User manual is available -> http://www.nxp.com/documents/user_manual/UM10580.pdf

mini_board_libs/PCU9669/transfer_manager.c@10:47974d9e6a5f, 2012-07-06 (annotated)

Committer:
nxp_ip
Date:
Fri Jul 06 08:30:10 2012 +0000
Revision:
10:47974d9e6a5f
bug of "PCU9669_BURST_DATA_ACCESS" has been fixed

Who changed what in which revision?

UserRevisionLine numberNew contents of line
nxp_ip 10:47974d9e6a5f 1 /** A sample code for "mini board PCU9669/PCA9665"
nxp_ip 10:47974d9e6a5f 2 *
nxp_ip 10:47974d9e6a5f 3 * @author Akifumi (Tedd) OKANO, NXP Semiconductors
nxp_ip 10:47974d9e6a5f 4 * @version 1.0
nxp_ip 10:47974d9e6a5f 5 * @date 26-Mar-2012
nxp_ip 10:47974d9e6a5f 6 *
nxp_ip 10:47974d9e6a5f 7 * Released under the MIT License: http://mbed.org/license/mit
nxp_ip 10:47974d9e6a5f 8 *
nxp_ip 10:47974d9e6a5f 9 * An operation sample of PCU9669/PCA9665 I2C bus controller.
nxp_ip 10:47974d9e6a5f 10 * The mbed accesses the bus controller's parallel port (8/2 bit address and 8 bit data) by bit-banging.
nxp_ip 10:47974d9e6a5f 11 * The bit-banging is poerformed by PortInOut function of mbed library.
nxp_ip 10:47974d9e6a5f 12 *
nxp_ip 10:47974d9e6a5f 13 * To make the code porting easier, all codes are partitioned into layers to abstract other parts.
nxp_ip 10:47974d9e6a5f 14 * The mbed specific parts are concentrated in lowest layer: "hardware_abs.*".
nxp_ip 10:47974d9e6a5f 15 * This module may need to be modified for the porting.
nxp_ip 10:47974d9e6a5f 16 *
nxp_ip 10:47974d9e6a5f 17 * All other upper layers are writen in standard-C.
nxp_ip 10:47974d9e6a5f 18 *
nxp_ip 10:47974d9e6a5f 19 * base code is written from 05-Sep-2011 to 09-Sep-2011.
nxp_ip 10:47974d9e6a5f 20 * And demo code has been build on 11-Sep-2011.
nxp_ip 10:47974d9e6a5f 21 * Debug and code adjustment has been done on 08-Sep-2011.
nxp_ip 10:47974d9e6a5f 22 * Small sanitization for main.cpp. All mbed related codes are moved in to "hardware_abs.*". 13-Oct-2011
nxp_ip 10:47974d9e6a5f 23 * hardware_abs are moved into parallel_bus library folder, 3 LED driver operation sample 13-Feb.-2012
nxp_ip 10:47974d9e6a5f 24 * PCU9669 and PCA9665 codes are packed in a project 14-Feb-2012.
nxp_ip 10:47974d9e6a5f 25 *
nxp_ip 10:47974d9e6a5f 26 * Before builidng the code, please edit the file mini_board_PCU9669/config.h
nxp_ip 10:47974d9e6a5f 27 * Un-comment the target name what you want to target.
nxp_ip 10:47974d9e6a5f 28 */
nxp_ip 10:47974d9e6a5f 29
nxp_ip 10:47974d9e6a5f 30 /*
nxp_ip 10:47974d9e6a5f 31 * "transfer_manager" is a module to manage I2C bus transfers.
nxp_ip 10:47974d9e6a5f 32 * In this sample code, single slave access (from START or RESTART condition to STOP or next RESTART
nxp_ip 10:47974d9e6a5f 33 * condition) is called transaction.
nxp_ip 10:47974d9e6a5f 34 *
nxp_ip 10:47974d9e6a5f 35 * In this software, the transaction is a struct (the struct is defined in "transfer_manager.h")
nxp_ip 10:47974d9e6a5f 36 *
nxp_ip 10:47974d9e6a5f 37 * typedef struct transaction_st {
nxp_ip 10:47974d9e6a5f 38 * char i2c_address __attribute__((packed));
nxp_ip 10:47974d9e6a5f 39 * char *data __attribute__((packed));
nxp_ip 10:47974d9e6a5f 40 * char length __attribute__((packed));
nxp_ip 10:47974d9e6a5f 41 * }
nxp_ip 10:47974d9e6a5f 42 * transaction;
nxp_ip 10:47974d9e6a5f 43 *
nxp_ip 10:47974d9e6a5f 44 * The transaction has target I2C slave address pointer to the data array and the data length.
nxp_ip 10:47974d9e6a5f 45 * Read/write drection is maneged by LSB of the i2c_address.
nxp_ip 10:47974d9e6a5f 46 *
nxp_ip 10:47974d9e6a5f 47 * For the reading, in this version, a dummy data array can be used but it need to have actual data
nxp_ip 10:47974d9e6a5f 48 * because it will be accessed for buffer filling.
nxp_ip 10:47974d9e6a5f 49 * And transfer manager doesn't readback the buffer. So user need to readback by "buffer_read()"
nxp_ip 10:47974d9e6a5f 50 * function after transaction executed.
nxp_ip 10:47974d9e6a5f 51 *
nxp_ip 10:47974d9e6a5f 52 * A transfer can be represented by array of transaction, i.e...
nxp_ip 10:47974d9e6a5f 53 *
nxp_ip 10:47974d9e6a5f 54 * transaction a_sample_of_transfer[];
nxp_ip 10:47974d9e6a5f 55 *
nxp_ip 10:47974d9e6a5f 56 * This array_of_transaction: "transfer" is used for the setting of the registers and buffers.
nxp_ip 10:47974d9e6a5f 57 *
nxp_ip 10:47974d9e6a5f 58 * See "main.cpp" for the actual sample of those transfer/transaction usage
nxp_ip 10:47974d9e6a5f 59 */
nxp_ip 10:47974d9e6a5f 60
nxp_ip 10:47974d9e6a5f 61 #include "transfer_manager.h"
nxp_ip 10:47974d9e6a5f 62 #include "PCU9669_access.h" // PCU9669 chip access interface
nxp_ip 10:47974d9e6a5f 63
nxp_ip 10:47974d9e6a5f 64 void setup_transfer( char ch, transaction *t, char n_of_transaction ) {
nxp_ip 10:47974d9e6a5f 65 int i;
nxp_ip 10:47974d9e6a5f 66 #ifdef PCU9669_BURST_DATA_ACCESS
nxp_ip 10:47974d9e6a5f 67 #else
nxp_ip 10:47974d9e6a5f 68 int j;
nxp_ip 10:47974d9e6a5f 69 #endif
nxp_ip 10:47974d9e6a5f 70
nxp_ip 10:47974d9e6a5f 71 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 10:47974d9e6a5f 72
nxp_ip 10:47974d9e6a5f 73 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 10:47974d9e6a5f 74 write_ch_register( ch, SLATABLE, (t + i)->i2c_address ); //
nxp_ip 10:47974d9e6a5f 75
nxp_ip 10:47974d9e6a5f 76 write_ch_register( ch, TRANCONFIG, n_of_transaction ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 10:47974d9e6a5f 77 write_ch_register( ch, TRANSEL, 0 ); // select #0 transaction
nxp_ip 10:47974d9e6a5f 78
nxp_ip 10:47974d9e6a5f 79 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 10:47974d9e6a5f 80 write_ch_register( ch, TRANCONFIG, (t + i)->length );
nxp_ip 10:47974d9e6a5f 81
nxp_ip 10:47974d9e6a5f 82
nxp_ip 10:47974d9e6a5f 83 #ifdef PCU9669_BURST_DATA_ACCESS
nxp_ip 10:47974d9e6a5f 84 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 10:47974d9e6a5f 85 write_ch_register_burst( ch, DATA, ((t + i)->data), (t + i)->length );
nxp_ip 10:47974d9e6a5f 86
nxp_ip 10:47974d9e6a5f 87 #else
nxp_ip 10:47974d9e6a5f 88 for ( i = 0; i < n_of_transaction; i++ )
nxp_ip 10:47974d9e6a5f 89 for ( j = 0; j < (t + i)->length; j++ )
nxp_ip 10:47974d9e6a5f 90 write_ch_register( ch, DATA, *(((t + i)->data) + j) );
nxp_ip 10:47974d9e6a5f 91 #endif
nxp_ip 10:47974d9e6a5f 92 }
nxp_ip 10:47974d9e6a5f 93
nxp_ip 10:47974d9e6a5f 94
nxp_ip 10:47974d9e6a5f 95 void set_n_of_transaction( char ch, char n_of_transaction )
nxp_ip 10:47974d9e6a5f 96 {
nxp_ip 10:47974d9e6a5f 97 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 10:47974d9e6a5f 98 write_ch_register( ch, TRANCONFIG, n_of_transaction ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 10:47974d9e6a5f 99 }
nxp_ip 10:47974d9e6a5f 100
nxp_ip 10:47974d9e6a5f 101
nxp_ip 10:47974d9e6a5f 102 void buffer_overwrite( char ch, char transaction_number, char offset, char *data, char length ) {
nxp_ip 10:47974d9e6a5f 103 #ifdef PCU9669_BURST_DATA_ACCESS
nxp_ip 10:47974d9e6a5f 104 #else
nxp_ip 10:47974d9e6a5f 105 int i;
nxp_ip 10:47974d9e6a5f 106 #endif
nxp_ip 10:47974d9e6a5f 107
nxp_ip 10:47974d9e6a5f 108 write_ch_register( ch, TRANSEL, transaction_number );
nxp_ip 10:47974d9e6a5f 109 write_ch_register( ch, TRANOFS, offset );
nxp_ip 10:47974d9e6a5f 110
nxp_ip 10:47974d9e6a5f 111 #ifdef PCU9669_BURST_DATA_ACCESS
nxp_ip 10:47974d9e6a5f 112 write_ch_register_burst( ch, DATA, data, length );
nxp_ip 10:47974d9e6a5f 113 #else
nxp_ip 10:47974d9e6a5f 114 for ( i = 0; i < length; i++ )
nxp_ip 10:47974d9e6a5f 115 write_ch_register( ch, DATA, *data++ );
nxp_ip 10:47974d9e6a5f 116 #endif
nxp_ip 10:47974d9e6a5f 117 }
nxp_ip 10:47974d9e6a5f 118
nxp_ip 10:47974d9e6a5f 119 void buffer_read( char ch, char transaction_number, char offset, char *data, char length ) {
nxp_ip 10:47974d9e6a5f 120 #ifdef PCU9669_BURST_DATA_ACCESS
nxp_ip 10:47974d9e6a5f 121 #else
nxp_ip 10:47974d9e6a5f 122 int i;
nxp_ip 10:47974d9e6a5f 123 #endif
nxp_ip 10:47974d9e6a5f 124
nxp_ip 10:47974d9e6a5f 125 write_ch_register( ch, TRANSEL, transaction_number );
nxp_ip 10:47974d9e6a5f 126 write_ch_register( ch, TRANOFS, offset );
nxp_ip 10:47974d9e6a5f 127
nxp_ip 10:47974d9e6a5f 128 #ifdef PCU9669_BURST_DATA_ACCESS
nxp_ip 10:47974d9e6a5f 129 read_ch_register_burst( ch, DATA, data, length );
nxp_ip 10:47974d9e6a5f 130 #else
nxp_ip 10:47974d9e6a5f 131 for ( i = 0; i < length; i++ )
nxp_ip 10:47974d9e6a5f 132 *data++ = read_ch_register( ch, DATA );
nxp_ip 10:47974d9e6a5f 133 #endif
nxp_ip 10:47974d9e6a5f 134 }
nxp_ip 10:47974d9e6a5f 135
nxp_ip 10:47974d9e6a5f 136 void start( char ch ) {
nxp_ip 10:47974d9e6a5f 137 write_ch_register( ch, CONTROL, 0x40 );
nxp_ip 10:47974d9e6a5f 138 }
nxp_ip 10:47974d9e6a5f 139
nxp_ip 10:47974d9e6a5f 140 void start_by_trigger( char ch, char polarity ) {
nxp_ip 10:47974d9e6a5f 141 write_ch_register( ch, CONTROL, 0x48 | (polarity ? 0x10 : 0x00 ) );
nxp_ip 10:47974d9e6a5f 142 }
nxp_ip 10:47974d9e6a5f 143
nxp_ip 10:47974d9e6a5f 144 void stop( char ch ) {
nxp_ip 10:47974d9e6a5f 145 write_ch_register( ch, CONTROL, 0x20 ); // set STO bit
nxp_ip 10:47974d9e6a5f 146 }
nxp_ip 10:47974d9e6a5f 147
nxp_ip 10:47974d9e6a5f 148 /* for test of register access order variation */
nxp_ip 10:47974d9e6a5f 149 /*
nxp_ip 10:47974d9e6a5f 150 void setup_transfer( char ch, transaction *t, char n_of_transaction ) {
nxp_ip 10:47974d9e6a5f 151 int i;
nxp_ip 10:47974d9e6a5f 152 int j;
nxp_ip 10:47974d9e6a5f 153
nxp_ip 10:47974d9e6a5f 154 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 10:47974d9e6a5f 155 write_ch_register( ch, TRANCONFIG, n_of_transaction ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 10:47974d9e6a5f 156 write_ch_register( ch, TRANSEL, 0 ); // select #0 transaction
nxp_ip 10:47974d9e6a5f 157
nxp_ip 10:47974d9e6a5f 158 for ( i = 0; i < n_of_transaction; i++ ) {
nxp_ip 10:47974d9e6a5f 159 write_ch_register( ch, SLATABLE, (t + i)->i2c_address ); //
nxp_ip 10:47974d9e6a5f 160 write_ch_register( ch, TRANCONFIG, (t + i)->length );
nxp_ip 10:47974d9e6a5f 161 write_ch_register_burst( ch, DATA, ((t + i)->data), (t + i)->length );
nxp_ip 10:47974d9e6a5f 162 }
nxp_ip 10:47974d9e6a5f 163 }
nxp_ip 10:47974d9e6a5f 164 */
nxp_ip 10:47974d9e6a5f 165
nxp_ip 10:47974d9e6a5f 166 /*
nxp_ip 10:47974d9e6a5f 167 void single_transaction_buffer_fill( char ch, char slot, transaction *tp ) {
nxp_ip 10:47974d9e6a5f 168 int i;
nxp_ip 10:47974d9e6a5f 169
nxp_ip 10:47974d9e6a5f 170 write_ch_register( ch, CONTROL, 0x02 ); // AIPTRRST : AutoIncrementPointerReset (for SLATABLE TRANCONFIG and DATA)
nxp_ip 10:47974d9e6a5f 171 write_ch_register( ch, TRANSEL, slot ); // select #0 transfer
nxp_ip 10:47974d9e6a5f 172 write_ch_register( ch, TRANCONFIG, 1 ); // first byte of TRANCONFIG sets to # of transactions
nxp_ip 10:47974d9e6a5f 173 write_ch_register( ch, TRANCONFIG, tp->length ); // length of first transaction
nxp_ip 10:47974d9e6a5f 174 write_ch_register( ch, SLATABLE, tp->i2c_address ); //
nxp_ip 10:47974d9e6a5f 175
nxp_ip 10:47974d9e6a5f 176 for ( i = 0; i < length; i++ )
nxp_ip 10:47974d9e6a5f 177 write_ch_register( ch, DATA, *data++ ); //
nxp_ip 10:47974d9e6a5f 178 }
nxp_ip 10:47974d9e6a5f 179 */