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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/system_stm32f4xx.c@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:
mbed_official
Date:
Wed Feb 26 09:45:12 2014 +0000
Revision:
106:ced8cbb51063
Parent:
87:085cde657901
Child:
125:23cc3068a9e4
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file system_stm32f4xx.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 106:ced8cbb51063 5 * @version V1.0.0
mbed_official 106:ced8cbb51063 6 * @date 18-February-2014
mbed_official 87:085cde657901 7 * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
mbed_official 87:085cde657901 8 *
mbed_official 87:085cde657901 9 * This file provides two functions and one global variable to be called from
mbed_official 87:085cde657901 10 * user application:
mbed_official 87:085cde657901 11 * - SystemInit(): This function is called at startup just after reset and
mbed_official 87:085cde657901 12 * before branch to main program. This call is made inside
mbed_official 87:085cde657901 13 * the "startup_stm32f4xx.s" file.
mbed_official 87:085cde657901 14 *
mbed_official 87:085cde657901 15 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
mbed_official 87:085cde657901 16 * by the user application to setup the SysTick
mbed_official 87:085cde657901 17 * timer or configure other parameters.
mbed_official 87:085cde657901 18 *
mbed_official 87:085cde657901 19 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
mbed_official 87:085cde657901 20 * be called whenever the core clock is changed
mbed_official 87:085cde657901 21 * during program execution.
mbed_official 87:085cde657901 22 *
mbed_official 87:085cde657901 23 *
mbed_official 87:085cde657901 24 ******************************************************************************
mbed_official 87:085cde657901 25 * @attention
mbed_official 87:085cde657901 26 *
mbed_official 87:085cde657901 27 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 28 *
mbed_official 106:ced8cbb51063 29 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 106:ced8cbb51063 30 * are permitted provided that the following conditions are met:
mbed_official 106:ced8cbb51063 31 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 106:ced8cbb51063 32 * this list of conditions and the following disclaimer.
mbed_official 106:ced8cbb51063 33 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 106:ced8cbb51063 34 * this list of conditions and the following disclaimer in the documentation
mbed_official 106:ced8cbb51063 35 * and/or other materials provided with the distribution.
mbed_official 106:ced8cbb51063 36 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 106:ced8cbb51063 37 * may be used to endorse or promote products derived from this software
mbed_official 106:ced8cbb51063 38 * without specific prior written permission.
mbed_official 87:085cde657901 39 *
mbed_official 106:ced8cbb51063 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 106:ced8cbb51063 41 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 106:ced8cbb51063 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 106:ced8cbb51063 43 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 106:ced8cbb51063 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 106:ced8cbb51063 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 106:ced8cbb51063 46 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 106:ced8cbb51063 47 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 106:ced8cbb51063 48 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 106:ced8cbb51063 49 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 50 *
mbed_official 87:085cde657901 51 ******************************************************************************
mbed_official 87:085cde657901 52 */
mbed_official 87:085cde657901 53
mbed_official 87:085cde657901 54 /** @addtogroup CMSIS
mbed_official 87:085cde657901 55 * @{
mbed_official 87:085cde657901 56 */
mbed_official 87:085cde657901 57
mbed_official 87:085cde657901 58 /** @addtogroup stm32f4xx_system
mbed_official 87:085cde657901 59 * @{
mbed_official 87:085cde657901 60 */
mbed_official 87:085cde657901 61
mbed_official 87:085cde657901 62 /** @addtogroup STM32F4xx_System_Private_Includes
mbed_official 87:085cde657901 63 * @{
mbed_official 87:085cde657901 64 */
mbed_official 87:085cde657901 65
mbed_official 87:085cde657901 66 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 67
mbed_official 87:085cde657901 68 /**
mbed_official 87:085cde657901 69 * @}
mbed_official 87:085cde657901 70 */
mbed_official 87:085cde657901 71
mbed_official 87:085cde657901 72 /** @addtogroup STM32F4xx_System_Private_TypesDefinitions
mbed_official 87:085cde657901 73 * @{
mbed_official 87:085cde657901 74 */
mbed_official 87:085cde657901 75
mbed_official 87:085cde657901 76 /**
mbed_official 87:085cde657901 77 * @}
mbed_official 87:085cde657901 78 */
mbed_official 87:085cde657901 79
mbed_official 87:085cde657901 80 /** @addtogroup STM32F4xx_System_Private_Defines
mbed_official 87:085cde657901 81 * @{
mbed_official 87:085cde657901 82 */
mbed_official 87:085cde657901 83
mbed_official 87:085cde657901 84 /************************* Miscellaneous Configuration ************************/
mbed_official 87:085cde657901 85
mbed_official 87:085cde657901 86 /*!< Uncomment the following line if you need to relocate your vector Table in
mbed_official 87:085cde657901 87 Internal SRAM. */
mbed_official 87:085cde657901 88 /* #define VECT_TAB_SRAM */
mbed_official 87:085cde657901 89 #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
mbed_official 87:085cde657901 90 This value must be a multiple of 0x200. */
mbed_official 87:085cde657901 91 /******************************************************************************/
mbed_official 87:085cde657901 92
mbed_official 87:085cde657901 93 /**
mbed_official 87:085cde657901 94 * @}
mbed_official 87:085cde657901 95 */
mbed_official 87:085cde657901 96
mbed_official 87:085cde657901 97 /** @addtogroup STM32F4xx_System_Private_Macros
mbed_official 87:085cde657901 98 * @{
mbed_official 87:085cde657901 99 */
mbed_official 87:085cde657901 100
mbed_official 87:085cde657901 101 /**
mbed_official 87:085cde657901 102 * @}
mbed_official 87:085cde657901 103 */
mbed_official 87:085cde657901 104
mbed_official 87:085cde657901 105 /** @addtogroup STM32F4xx_System_Private_Variables
mbed_official 87:085cde657901 106 * @{
mbed_official 87:085cde657901 107 */
mbed_official 87:085cde657901 108 /* This variable is updated in three ways:
mbed_official 87:085cde657901 109 1) by calling CMSIS function SystemCoreClockUpdate()
mbed_official 87:085cde657901 110 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
mbed_official 87:085cde657901 111 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
mbed_official 87:085cde657901 112 Note: If you use this function to configure the system clock; then there
mbed_official 87:085cde657901 113 is no need to call the 2 first functions listed above, since SystemCoreClock
mbed_official 87:085cde657901 114 variable is updated automatically.
mbed_official 87:085cde657901 115 */
mbed_official 87:085cde657901 116 uint32_t SystemCoreClock = 16000000;
mbed_official 87:085cde657901 117 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 87:085cde657901 118
mbed_official 87:085cde657901 119 /**
mbed_official 87:085cde657901 120 * @}
mbed_official 87:085cde657901 121 */
mbed_official 87:085cde657901 122
mbed_official 87:085cde657901 123 /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
mbed_official 87:085cde657901 124 * @{
mbed_official 87:085cde657901 125 */
mbed_official 87:085cde657901 126
mbed_official 87:085cde657901 127 /**
mbed_official 87:085cde657901 128 * @}
mbed_official 87:085cde657901 129 */
mbed_official 87:085cde657901 130
mbed_official 87:085cde657901 131 /** @addtogroup STM32F4xx_System_Private_Functions
mbed_official 87:085cde657901 132 * @{
mbed_official 87:085cde657901 133 */
mbed_official 87:085cde657901 134
mbed_official 87:085cde657901 135 /**
mbed_official 87:085cde657901 136 * @brief Setup the microcontroller system
mbed_official 87:085cde657901 137 * Initialize the FPU setting, vector table location and External memory
mbed_official 87:085cde657901 138 * configuration.
mbed_official 87:085cde657901 139 * @param None
mbed_official 87:085cde657901 140 * @retval None
mbed_official 87:085cde657901 141 */
mbed_official 87:085cde657901 142 void SystemInit(void)
mbed_official 87:085cde657901 143 {
mbed_official 87:085cde657901 144 /* FPU settings ------------------------------------------------------------*/
mbed_official 87:085cde657901 145 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbed_official 87:085cde657901 146 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
mbed_official 87:085cde657901 147 #endif
mbed_official 87:085cde657901 148 /* Reset the RCC clock configuration to the default reset state ------------*/
mbed_official 87:085cde657901 149 /* Set HSION bit */
mbed_official 87:085cde657901 150 RCC->CR |= (uint32_t)0x00000001;
mbed_official 87:085cde657901 151
mbed_official 87:085cde657901 152 /* Reset CFGR register */
mbed_official 87:085cde657901 153 RCC->CFGR = 0x00000000;
mbed_official 87:085cde657901 154
mbed_official 87:085cde657901 155 /* Reset HSEON, CSSON and PLLON bits */
mbed_official 87:085cde657901 156 RCC->CR &= (uint32_t)0xFEF6FFFF;
mbed_official 87:085cde657901 157
mbed_official 87:085cde657901 158 /* Reset PLLCFGR register */
mbed_official 87:085cde657901 159 RCC->PLLCFGR = 0x24003010;
mbed_official 87:085cde657901 160
mbed_official 87:085cde657901 161 /* Reset HSEBYP bit */
mbed_official 87:085cde657901 162 RCC->CR &= (uint32_t)0xFFFBFFFF;
mbed_official 87:085cde657901 163
mbed_official 87:085cde657901 164 /* Disable all interrupts */
mbed_official 87:085cde657901 165 RCC->CIR = 0x00000000;
mbed_official 87:085cde657901 166
mbed_official 87:085cde657901 167 /* Configure the Vector Table location add offset address ------------------*/
mbed_official 87:085cde657901 168 #ifdef VECT_TAB_SRAM
mbed_official 87:085cde657901 169 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
mbed_official 87:085cde657901 170 #else
mbed_official 87:085cde657901 171 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
mbed_official 87:085cde657901 172 #endif
mbed_official 87:085cde657901 173
mbed_official 87:085cde657901 174 // [ADDED FOR MBED]
mbed_official 87:085cde657901 175 HAL_Init();
mbed_official 87:085cde657901 176 RCC_ClkInitTypeDef RCC_ClkInitStruct;
mbed_official 87:085cde657901 177 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
mbed_official 87:085cde657901 178 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
mbed_official 87:085cde657901 179 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 16 MHz
mbed_official 87:085cde657901 180 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1; // 16 MHz
mbed_official 87:085cde657901 181 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; // 8 MHz for the SPI
mbed_official 87:085cde657901 182 HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0);
mbed_official 87:085cde657901 183 }
mbed_official 87:085cde657901 184
mbed_official 87:085cde657901 185 // [ADDED FOR MBED]
mbed_official 87:085cde657901 186 void SysTick_Handler(void)
mbed_official 87:085cde657901 187 {
mbed_official 87:085cde657901 188 HAL_IncTick();
mbed_official 87:085cde657901 189 }
mbed_official 87:085cde657901 190
mbed_official 87:085cde657901 191 /**
mbed_official 87:085cde657901 192 * @brief Update SystemCoreClock variable according to Clock Register Values.
mbed_official 87:085cde657901 193 * The SystemCoreClock variable contains the core clock (HCLK), it can
mbed_official 87:085cde657901 194 * be used by the user application to setup the SysTick timer or configure
mbed_official 87:085cde657901 195 * other parameters.
mbed_official 87:085cde657901 196 *
mbed_official 87:085cde657901 197 * @note Each time the core clock (HCLK) changes, this function must be called
mbed_official 87:085cde657901 198 * to update SystemCoreClock variable value. Otherwise, any configuration
mbed_official 87:085cde657901 199 * based on this variable will be incorrect.
mbed_official 87:085cde657901 200 *
mbed_official 87:085cde657901 201 * @note - The system frequency computed by this function is not the real
mbed_official 87:085cde657901 202 * frequency in the chip. It is calculated based on the predefined
mbed_official 87:085cde657901 203 * constant and the selected clock source:
mbed_official 87:085cde657901 204 *
mbed_official 87:085cde657901 205 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
mbed_official 87:085cde657901 206 *
mbed_official 87:085cde657901 207 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
mbed_official 87:085cde657901 208 *
mbed_official 87:085cde657901 209 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
mbed_official 87:085cde657901 210 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 87:085cde657901 211 *
mbed_official 106:ced8cbb51063 212 * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
mbed_official 87:085cde657901 213 * 16 MHz) but the real value may vary depending on the variations
mbed_official 87:085cde657901 214 * in voltage and temperature.
mbed_official 87:085cde657901 215 *
mbed_official 106:ced8cbb51063 216 * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
mbed_official 106:ced8cbb51063 217 * depends on the application requirements), user has to ensure that HSE_VALUE
mbed_official 106:ced8cbb51063 218 * is same as the real frequency of the crystal used. Otherwise, this function
mbed_official 106:ced8cbb51063 219 * may have wrong result.
mbed_official 87:085cde657901 220 *
mbed_official 87:085cde657901 221 * - The result of this function could be not correct when using fractional
mbed_official 87:085cde657901 222 * value for HSE crystal.
mbed_official 87:085cde657901 223 *
mbed_official 87:085cde657901 224 * @param None
mbed_official 87:085cde657901 225 * @retval None
mbed_official 87:085cde657901 226 */
mbed_official 87:085cde657901 227 void SystemCoreClockUpdate(void)
mbed_official 87:085cde657901 228 {
mbed_official 87:085cde657901 229 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
mbed_official 87:085cde657901 230
mbed_official 87:085cde657901 231 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 87:085cde657901 232 tmp = RCC->CFGR & RCC_CFGR_SWS;
mbed_official 87:085cde657901 233
mbed_official 87:085cde657901 234 switch (tmp)
mbed_official 87:085cde657901 235 {
mbed_official 87:085cde657901 236 case 0x00: /* HSI used as system clock source */
mbed_official 87:085cde657901 237 SystemCoreClock = HSI_VALUE;
mbed_official 87:085cde657901 238 break;
mbed_official 87:085cde657901 239 case 0x04: /* HSE used as system clock source */
mbed_official 87:085cde657901 240 SystemCoreClock = HSE_VALUE;
mbed_official 87:085cde657901 241 break;
mbed_official 87:085cde657901 242 case 0x08: /* PLL used as system clock source */
mbed_official 87:085cde657901 243
mbed_official 87:085cde657901 244 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
mbed_official 87:085cde657901 245 SYSCLK = PLL_VCO / PLL_P
mbed_official 87:085cde657901 246 */
mbed_official 87:085cde657901 247 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
mbed_official 87:085cde657901 248 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
mbed_official 87:085cde657901 249
mbed_official 87:085cde657901 250 if (pllsource != 0)
mbed_official 87:085cde657901 251 {
mbed_official 87:085cde657901 252 /* HSE used as PLL clock source */
mbed_official 87:085cde657901 253 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
mbed_official 87:085cde657901 254 }
mbed_official 87:085cde657901 255 else
mbed_official 87:085cde657901 256 {
mbed_official 87:085cde657901 257 /* HSI used as PLL clock source */
mbed_official 87:085cde657901 258 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
mbed_official 87:085cde657901 259 }
mbed_official 87:085cde657901 260
mbed_official 87:085cde657901 261 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
mbed_official 87:085cde657901 262 SystemCoreClock = pllvco/pllp;
mbed_official 87:085cde657901 263 break;
mbed_official 87:085cde657901 264 default:
mbed_official 87:085cde657901 265 SystemCoreClock = HSI_VALUE;
mbed_official 87:085cde657901 266 break;
mbed_official 87:085cde657901 267 }
mbed_official 87:085cde657901 268 /* Compute HCLK frequency --------------------------------------------------*/
mbed_official 87:085cde657901 269 /* Get HCLK prescaler */
mbed_official 87:085cde657901 270 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
mbed_official 87:085cde657901 271 /* HCLK frequency */
mbed_official 87:085cde657901 272 SystemCoreClock >>= tmp;
mbed_official 87:085cde657901 273 }
mbed_official 87:085cde657901 274
mbed_official 87:085cde657901 275 /**
mbed_official 87:085cde657901 276 * @}
mbed_official 87:085cde657901 277 */
mbed_official 87:085cde657901 278
mbed_official 87:085cde657901 279 /**
mbed_official 87:085cde657901 280 * @}
mbed_official 87:085cde657901 281 */
mbed_official 87:085cde657901 282
mbed_official 87:085cde657901 283 /**
mbed_official 87:085cde657901 284 * @}
mbed_official 87:085cde657901 285 */
mbed_official 87:085cde657901 286 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/