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Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/system_stm32f4xx.c@125:23cc3068a9e4, 2014-03-19 (annotated)

Committer:
mbed_official
Date:
Wed Mar 19 10:15:22 2014 +0000
Revision:
125:23cc3068a9e4
Parent:
106:ced8cbb51063
Child:
126:549ba18ddd81
Synchronized with git revision ace35dfba3748c7cdc102eb38ec6b9e1067c3252



Full URL: https://github.com/mbedmicro/mbed/commit/ace35dfba3748c7cdc102eb38ec6b9e1067c3252/



[NUCLEO_F302R8] Add cmsis and hal files + change F401RE clock to 84MHz

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file system_stm32f4xx.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 106:ced8cbb51063 5 * @version V1.0.0
mbed_official 106:ced8cbb51063 6 * @date 18-February-2014
mbed_official 87:085cde657901 7 * @brief CMSIS Cortex-M4 Device Peripheral Access Layer System Source File.
mbed_official 87:085cde657901 8 *
mbed_official 87:085cde657901 9 * This file provides two functions and one global variable to be called from
mbed_official 87:085cde657901 10 * user application:
mbed_official 87:085cde657901 11 * - SystemInit(): This function is called at startup just after reset and
mbed_official 87:085cde657901 12 * before branch to main program. This call is made inside
mbed_official 87:085cde657901 13 * the "startup_stm32f4xx.s" file.
mbed_official 87:085cde657901 14 *
mbed_official 87:085cde657901 15 * - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
mbed_official 87:085cde657901 16 * by the user application to setup the SysTick
mbed_official 87:085cde657901 17 * timer or configure other parameters.
mbed_official 87:085cde657901 18 *
mbed_official 87:085cde657901 19 * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
mbed_official 87:085cde657901 20 * be called whenever the core clock is changed
mbed_official 87:085cde657901 21 * during program execution.
mbed_official 87:085cde657901 22 *
mbed_official 87:085cde657901 23 *
mbed_official 87:085cde657901 24 ******************************************************************************
mbed_official 87:085cde657901 25 * @attention
mbed_official 87:085cde657901 26 *
mbed_official 87:085cde657901 27 * <h2><center>&copy; COPYRIGHT 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 28 *
mbed_official 106:ced8cbb51063 29 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 106:ced8cbb51063 30 * are permitted provided that the following conditions are met:
mbed_official 106:ced8cbb51063 31 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 106:ced8cbb51063 32 * this list of conditions and the following disclaimer.
mbed_official 106:ced8cbb51063 33 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 106:ced8cbb51063 34 * this list of conditions and the following disclaimer in the documentation
mbed_official 106:ced8cbb51063 35 * and/or other materials provided with the distribution.
mbed_official 106:ced8cbb51063 36 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 106:ced8cbb51063 37 * may be used to endorse or promote products derived from this software
mbed_official 106:ced8cbb51063 38 * without specific prior written permission.
mbed_official 87:085cde657901 39 *
mbed_official 106:ced8cbb51063 40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 106:ced8cbb51063 41 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 106:ced8cbb51063 42 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 106:ced8cbb51063 43 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 106:ced8cbb51063 44 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 106:ced8cbb51063 45 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 106:ced8cbb51063 46 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 106:ced8cbb51063 47 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 106:ced8cbb51063 48 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 106:ced8cbb51063 49 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 50 *
mbed_official 87:085cde657901 51 ******************************************************************************
mbed_official 87:085cde657901 52 */
mbed_official 87:085cde657901 53
mbed_official 87:085cde657901 54 /** @addtogroup CMSIS
mbed_official 87:085cde657901 55 * @{
mbed_official 87:085cde657901 56 */
mbed_official 87:085cde657901 57
mbed_official 87:085cde657901 58 /** @addtogroup stm32f4xx_system
mbed_official 87:085cde657901 59 * @{
mbed_official 87:085cde657901 60 */
mbed_official 87:085cde657901 61
mbed_official 87:085cde657901 62 /** @addtogroup STM32F4xx_System_Private_Includes
mbed_official 87:085cde657901 63 * @{
mbed_official 87:085cde657901 64 */
mbed_official 87:085cde657901 65
mbed_official 87:085cde657901 66 #include "stm32f4xx_hal.h"
mbed_official 125:23cc3068a9e4 67 #include "error.h" /* [ADDED FOR MBED] */
mbed_official 87:085cde657901 68
mbed_official 87:085cde657901 69 /**
mbed_official 87:085cde657901 70 * @}
mbed_official 87:085cde657901 71 */
mbed_official 87:085cde657901 72
mbed_official 87:085cde657901 73 /** @addtogroup STM32F4xx_System_Private_TypesDefinitions
mbed_official 87:085cde657901 74 * @{
mbed_official 87:085cde657901 75 */
mbed_official 87:085cde657901 76
mbed_official 87:085cde657901 77 /**
mbed_official 87:085cde657901 78 * @}
mbed_official 87:085cde657901 79 */
mbed_official 87:085cde657901 80
mbed_official 87:085cde657901 81 /** @addtogroup STM32F4xx_System_Private_Defines
mbed_official 87:085cde657901 82 * @{
mbed_official 87:085cde657901 83 */
mbed_official 87:085cde657901 84
mbed_official 87:085cde657901 85 /************************* Miscellaneous Configuration ************************/
mbed_official 87:085cde657901 86
mbed_official 87:085cde657901 87 /*!< Uncomment the following line if you need to relocate your vector Table in
mbed_official 87:085cde657901 88 Internal SRAM. */
mbed_official 87:085cde657901 89 /* #define VECT_TAB_SRAM */
mbed_official 87:085cde657901 90 #define VECT_TAB_OFFSET 0x00 /*!< Vector Table base offset field.
mbed_official 87:085cde657901 91 This value must be a multiple of 0x200. */
mbed_official 87:085cde657901 92 /******************************************************************************/
mbed_official 87:085cde657901 93
mbed_official 87:085cde657901 94 /**
mbed_official 87:085cde657901 95 * @}
mbed_official 87:085cde657901 96 */
mbed_official 87:085cde657901 97
mbed_official 87:085cde657901 98 /** @addtogroup STM32F4xx_System_Private_Macros
mbed_official 87:085cde657901 99 * @{
mbed_official 87:085cde657901 100 */
mbed_official 87:085cde657901 101
mbed_official 87:085cde657901 102 /**
mbed_official 87:085cde657901 103 * @}
mbed_official 87:085cde657901 104 */
mbed_official 87:085cde657901 105
mbed_official 87:085cde657901 106 /** @addtogroup STM32F4xx_System_Private_Variables
mbed_official 87:085cde657901 107 * @{
mbed_official 87:085cde657901 108 */
mbed_official 87:085cde657901 109 /* This variable is updated in three ways:
mbed_official 87:085cde657901 110 1) by calling CMSIS function SystemCoreClockUpdate()
mbed_official 87:085cde657901 111 2) by calling HAL API function HAL_RCC_GetHCLKFreq()
mbed_official 87:085cde657901 112 3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
mbed_official 87:085cde657901 113 Note: If you use this function to configure the system clock; then there
mbed_official 87:085cde657901 114 is no need to call the 2 first functions listed above, since SystemCoreClock
mbed_official 87:085cde657901 115 variable is updated automatically.
mbed_official 87:085cde657901 116 */
mbed_official 125:23cc3068a9e4 117 uint32_t SystemCoreClock = 84000000; /* [CHANGED FOR MBED] */
mbed_official 87:085cde657901 118 __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
mbed_official 87:085cde657901 119
mbed_official 87:085cde657901 120 /**
mbed_official 87:085cde657901 121 * @}
mbed_official 87:085cde657901 122 */
mbed_official 87:085cde657901 123
mbed_official 87:085cde657901 124 /** @addtogroup STM32F4xx_System_Private_FunctionPrototypes
mbed_official 87:085cde657901 125 * @{
mbed_official 87:085cde657901 126 */
mbed_official 87:085cde657901 127
mbed_official 125:23cc3068a9e4 128 /* [ADDED FOR MBED] */
mbed_official 125:23cc3068a9e4 129 void SystemClock_Config(void);
mbed_official 125:23cc3068a9e4 130
mbed_official 87:085cde657901 131 /**
mbed_official 87:085cde657901 132 * @}
mbed_official 87:085cde657901 133 */
mbed_official 87:085cde657901 134
mbed_official 87:085cde657901 135 /** @addtogroup STM32F4xx_System_Private_Functions
mbed_official 87:085cde657901 136 * @{
mbed_official 87:085cde657901 137 */
mbed_official 87:085cde657901 138
mbed_official 87:085cde657901 139 /**
mbed_official 87:085cde657901 140 * @brief Setup the microcontroller system
mbed_official 87:085cde657901 141 * Initialize the FPU setting, vector table location and External memory
mbed_official 87:085cde657901 142 * configuration.
mbed_official 87:085cde657901 143 * @param None
mbed_official 87:085cde657901 144 * @retval None
mbed_official 87:085cde657901 145 */
mbed_official 87:085cde657901 146 void SystemInit(void)
mbed_official 87:085cde657901 147 {
mbed_official 87:085cde657901 148 /* FPU settings ------------------------------------------------------------*/
mbed_official 87:085cde657901 149 #if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
mbed_official 87:085cde657901 150 SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */
mbed_official 87:085cde657901 151 #endif
mbed_official 87:085cde657901 152 /* Reset the RCC clock configuration to the default reset state ------------*/
mbed_official 87:085cde657901 153 /* Set HSION bit */
mbed_official 87:085cde657901 154 RCC->CR |= (uint32_t)0x00000001;
mbed_official 87:085cde657901 155
mbed_official 87:085cde657901 156 /* Reset CFGR register */
mbed_official 87:085cde657901 157 RCC->CFGR = 0x00000000;
mbed_official 87:085cde657901 158
mbed_official 87:085cde657901 159 /* Reset HSEON, CSSON and PLLON bits */
mbed_official 87:085cde657901 160 RCC->CR &= (uint32_t)0xFEF6FFFF;
mbed_official 87:085cde657901 161
mbed_official 87:085cde657901 162 /* Reset PLLCFGR register */
mbed_official 87:085cde657901 163 RCC->PLLCFGR = 0x24003010;
mbed_official 87:085cde657901 164
mbed_official 87:085cde657901 165 /* Reset HSEBYP bit */
mbed_official 87:085cde657901 166 RCC->CR &= (uint32_t)0xFFFBFFFF;
mbed_official 87:085cde657901 167
mbed_official 87:085cde657901 168 /* Disable all interrupts */
mbed_official 87:085cde657901 169 RCC->CIR = 0x00000000;
mbed_official 87:085cde657901 170
mbed_official 87:085cde657901 171 /* Configure the Vector Table location add offset address ------------------*/
mbed_official 87:085cde657901 172 #ifdef VECT_TAB_SRAM
mbed_official 87:085cde657901 173 SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */
mbed_official 87:085cde657901 174 #else
mbed_official 87:085cde657901 175 SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH */
mbed_official 87:085cde657901 176 #endif
mbed_official 87:085cde657901 177
mbed_official 125:23cc3068a9e4 178 /* [ADDED FOR MBED] */
mbed_official 87:085cde657901 179 HAL_Init();
mbed_official 125:23cc3068a9e4 180 SystemClock_Config();
mbed_official 87:085cde657901 181 }
mbed_official 87:085cde657901 182
mbed_official 87:085cde657901 183 /**
mbed_official 87:085cde657901 184 * @brief Update SystemCoreClock variable according to Clock Register Values.
mbed_official 87:085cde657901 185 * The SystemCoreClock variable contains the core clock (HCLK), it can
mbed_official 87:085cde657901 186 * be used by the user application to setup the SysTick timer or configure
mbed_official 87:085cde657901 187 * other parameters.
mbed_official 87:085cde657901 188 *
mbed_official 87:085cde657901 189 * @note Each time the core clock (HCLK) changes, this function must be called
mbed_official 87:085cde657901 190 * to update SystemCoreClock variable value. Otherwise, any configuration
mbed_official 87:085cde657901 191 * based on this variable will be incorrect.
mbed_official 87:085cde657901 192 *
mbed_official 87:085cde657901 193 * @note - The system frequency computed by this function is not the real
mbed_official 87:085cde657901 194 * frequency in the chip. It is calculated based on the predefined
mbed_official 87:085cde657901 195 * constant and the selected clock source:
mbed_official 87:085cde657901 196 *
mbed_official 87:085cde657901 197 * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
mbed_official 87:085cde657901 198 *
mbed_official 87:085cde657901 199 * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
mbed_official 87:085cde657901 200 *
mbed_official 87:085cde657901 201 * - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
mbed_official 87:085cde657901 202 * or HSI_VALUE(*) multiplied/divided by the PLL factors.
mbed_official 87:085cde657901 203 *
mbed_official 106:ced8cbb51063 204 * (*) HSI_VALUE is a constant defined in stm32f4xx_hal_conf.h file (default value
mbed_official 87:085cde657901 205 * 16 MHz) but the real value may vary depending on the variations
mbed_official 87:085cde657901 206 * in voltage and temperature.
mbed_official 87:085cde657901 207 *
mbed_official 106:ced8cbb51063 208 * (**) HSE_VALUE is a constant defined in stm32f4xx_hal_conf.h file (its value
mbed_official 106:ced8cbb51063 209 * depends on the application requirements), user has to ensure that HSE_VALUE
mbed_official 106:ced8cbb51063 210 * is same as the real frequency of the crystal used. Otherwise, this function
mbed_official 106:ced8cbb51063 211 * may have wrong result.
mbed_official 87:085cde657901 212 *
mbed_official 87:085cde657901 213 * - The result of this function could be not correct when using fractional
mbed_official 87:085cde657901 214 * value for HSE crystal.
mbed_official 87:085cde657901 215 *
mbed_official 87:085cde657901 216 * @param None
mbed_official 87:085cde657901 217 * @retval None
mbed_official 87:085cde657901 218 */
mbed_official 87:085cde657901 219 void SystemCoreClockUpdate(void)
mbed_official 87:085cde657901 220 {
mbed_official 87:085cde657901 221 uint32_t tmp = 0, pllvco = 0, pllp = 2, pllsource = 0, pllm = 2;
mbed_official 87:085cde657901 222
mbed_official 87:085cde657901 223 /* Get SYSCLK source -------------------------------------------------------*/
mbed_official 87:085cde657901 224 tmp = RCC->CFGR & RCC_CFGR_SWS;
mbed_official 87:085cde657901 225
mbed_official 87:085cde657901 226 switch (tmp)
mbed_official 87:085cde657901 227 {
mbed_official 87:085cde657901 228 case 0x00: /* HSI used as system clock source */
mbed_official 87:085cde657901 229 SystemCoreClock = HSI_VALUE;
mbed_official 87:085cde657901 230 break;
mbed_official 87:085cde657901 231 case 0x04: /* HSE used as system clock source */
mbed_official 87:085cde657901 232 SystemCoreClock = HSE_VALUE;
mbed_official 87:085cde657901 233 break;
mbed_official 87:085cde657901 234 case 0x08: /* PLL used as system clock source */
mbed_official 87:085cde657901 235
mbed_official 87:085cde657901 236 /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N
mbed_official 87:085cde657901 237 SYSCLK = PLL_VCO / PLL_P
mbed_official 87:085cde657901 238 */
mbed_official 87:085cde657901 239 pllsource = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) >> 22;
mbed_official 87:085cde657901 240 pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM;
mbed_official 87:085cde657901 241
mbed_official 87:085cde657901 242 if (pllsource != 0)
mbed_official 87:085cde657901 243 {
mbed_official 87:085cde657901 244 /* HSE used as PLL clock source */
mbed_official 87:085cde657901 245 pllvco = (HSE_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
mbed_official 87:085cde657901 246 }
mbed_official 87:085cde657901 247 else
mbed_official 87:085cde657901 248 {
mbed_official 87:085cde657901 249 /* HSI used as PLL clock source */
mbed_official 87:085cde657901 250 pllvco = (HSI_VALUE / pllm) * ((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> 6);
mbed_official 87:085cde657901 251 }
mbed_official 87:085cde657901 252
mbed_official 87:085cde657901 253 pllp = (((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >>16) + 1 ) *2;
mbed_official 87:085cde657901 254 SystemCoreClock = pllvco/pllp;
mbed_official 87:085cde657901 255 break;
mbed_official 87:085cde657901 256 default:
mbed_official 87:085cde657901 257 SystemCoreClock = HSI_VALUE;
mbed_official 87:085cde657901 258 break;
mbed_official 87:085cde657901 259 }
mbed_official 87:085cde657901 260 /* Compute HCLK frequency --------------------------------------------------*/
mbed_official 87:085cde657901 261 /* Get HCLK prescaler */
mbed_official 87:085cde657901 262 tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4)];
mbed_official 87:085cde657901 263 /* HCLK frequency */
mbed_official 87:085cde657901 264 SystemCoreClock >>= tmp;
mbed_official 87:085cde657901 265 }
mbed_official 87:085cde657901 266
mbed_official 125:23cc3068a9e4 267 /* [ADDED FOR MBED]
mbed_official 125:23cc3068a9e4 268 Configure the System clock to 84 MHz (max value) using the internal HSI 16 MHz clock */
mbed_official 125:23cc3068a9e4 269 void SystemClock_Config(void)
mbed_official 125:23cc3068a9e4 270 {
mbed_official 125:23cc3068a9e4 271 RCC_ClkInitTypeDef RCC_ClkInitStruct;
mbed_official 125:23cc3068a9e4 272 RCC_OscInitTypeDef RCC_OscInitStruct;
mbed_official 125:23cc3068a9e4 273
mbed_official 125:23cc3068a9e4 274 /* The voltage scaling allows optimizing the power consumption when the device is
mbed_official 125:23cc3068a9e4 275 clocked below the maximum system frequency, to update the voltage scaling value
mbed_official 125:23cc3068a9e4 276 regarding system frequency refer to product datasheet. */
mbed_official 125:23cc3068a9e4 277 __PWR_CLK_ENABLE();
mbed_official 125:23cc3068a9e4 278 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
mbed_official 125:23cc3068a9e4 279
mbed_official 125:23cc3068a9e4 280 /* Enable HSI Oscillator and activate PLL with HSI as source */
mbed_official 125:23cc3068a9e4 281 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
mbed_official 125:23cc3068a9e4 282 RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
mbed_official 125:23cc3068a9e4 283 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
mbed_official 125:23cc3068a9e4 284 RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
mbed_official 125:23cc3068a9e4 285 RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
mbed_official 125:23cc3068a9e4 286 RCC_OscInitStruct.HSICalibrationValue = 16;
mbed_official 125:23cc3068a9e4 287 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
mbed_official 125:23cc3068a9e4 288 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
mbed_official 125:23cc3068a9e4 289 RCC_OscInitStruct.PLL.PLLM = 16;
mbed_official 125:23cc3068a9e4 290 RCC_OscInitStruct.PLL.PLLN = 336;
mbed_official 125:23cc3068a9e4 291 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4;
mbed_official 125:23cc3068a9e4 292 RCC_OscInitStruct.PLL.PLLQ = 7;
mbed_official 125:23cc3068a9e4 293 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
mbed_official 125:23cc3068a9e4 294 {
mbed_official 125:23cc3068a9e4 295 error("System clock initialization failed.");
mbed_official 125:23cc3068a9e4 296 }
mbed_official 125:23cc3068a9e4 297
mbed_official 125:23cc3068a9e4 298 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */
mbed_official 125:23cc3068a9e4 299 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
mbed_official 125:23cc3068a9e4 300 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
mbed_official 125:23cc3068a9e4 301 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 84 MHz
mbed_official 125:23cc3068a9e4 302 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 42 MHz
mbed_official 125:23cc3068a9e4 303 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 84 MHz (SPI1 clock...)
mbed_official 125:23cc3068a9e4 304 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
mbed_official 125:23cc3068a9e4 305 {
mbed_official 125:23cc3068a9e4 306 error("System clock initialization failed.");
mbed_official 125:23cc3068a9e4 307 }
mbed_official 125:23cc3068a9e4 308
mbed_official 125:23cc3068a9e4 309 /* Update the SystemCoreClock variable
mbed_official 125:23cc3068a9e4 310 - Not needed because the variable is already set on top of this file.
mbed_official 125:23cc3068a9e4 311 - Warning: this function call is removed by the compiler with -O3/-Otime options. */
mbed_official 125:23cc3068a9e4 312 //SystemCoreClockUpdate();
mbed_official 125:23cc3068a9e4 313
mbed_official 125:23cc3068a9e4 314 /* Output SYSCLK on MCO2 pin(PC9) for debugging purpose */
mbed_official 125:23cc3068a9e4 315 //HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); // 84 MHz / 4 = 21 MHz
mbed_official 125:23cc3068a9e4 316 }
mbed_official 125:23cc3068a9e4 317
mbed_official 125:23cc3068a9e4 318 /* [ADDED FOR MBED]
mbed_official 125:23cc3068a9e4 319 Used for the different timeouts in the HAL */
mbed_official 125:23cc3068a9e4 320 void SysTick_Handler(void)
mbed_official 125:23cc3068a9e4 321 {
mbed_official 125:23cc3068a9e4 322 HAL_IncTick();
mbed_official 125:23cc3068a9e4 323 }
mbed_official 125:23cc3068a9e4 324
mbed_official 87:085cde657901 325 /**
mbed_official 87:085cde657901 326 * @}
mbed_official 87:085cde657901 327 */
mbed_official 87:085cde657901 328
mbed_official 87:085cde657901 329 /**
mbed_official 87:085cde657901 330 * @}
mbed_official 87:085cde657901 331 */
mbed_official 87:085cde657901 332
mbed_official 87:085cde657901 333 /**
mbed_official 87:085cde657901 334 * @}
mbed_official 87:085cde657901 335 */
mbed_official 87:085cde657901 336 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/