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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_Freescale/TARGET_KLXX/rtc_api.c@587:61103edf8a92, 2015-07-10 (annotated)

Committer:
mbed_official
Date:
Fri Jul 10 14:15:08 2015 +0100
Revision:
587:61103edf8a92
Parent:
82:0b31dbcd4769 
Synchronized with git revision 6cb7294c83b739aaf94e7f5d477479c9e332c700



Full URL: https://github.com/mbedmicro/mbed/commit/6cb7294c83b739aaf94e7f5d477479c9e332c700/



[KL25Z] add 32KHz crystal clock setup 3 + minor RTC api changes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 82:0b31dbcd4769 1 /* mbed Microcontroller Library
mbed_official 82:0b31dbcd4769 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 82:0b31dbcd4769 3 *
mbed_official 82:0b31dbcd4769 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 82:0b31dbcd4769 5 * you may not use this file except in compliance with the License.
mbed_official 82:0b31dbcd4769 6 * You may obtain a copy of the License at
mbed_official 82:0b31dbcd4769 7 *
mbed_official 82:0b31dbcd4769 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 82:0b31dbcd4769 9 *
mbed_official 82:0b31dbcd4769 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 82:0b31dbcd4769 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 82:0b31dbcd4769 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 82:0b31dbcd4769 13 * See the License for the specific language governing permissions and
mbed_official 82:0b31dbcd4769 14 * limitations under the License.
mbed_official 82:0b31dbcd4769 15 */
mbed_official 82:0b31dbcd4769 16 #include "rtc_api.h"
mbed_official 82:0b31dbcd4769 17 #include "PeripheralPins.h"
mbed_official 587:61103edf8a92 18 #include "clk_freqs.h"
mbed_official 82:0b31dbcd4769 19
mbed_official 82:0b31dbcd4769 20 static void init(void) {
mbed_official 82:0b31dbcd4769 21 // enable RTC clock
mbed_official 82:0b31dbcd4769 22 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
mbed_official 82:0b31dbcd4769 23
mbed_official 82:0b31dbcd4769 24 // select RTC clock source
mbed_official 82:0b31dbcd4769 25 SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
mbed_official 587:61103edf8a92 26
mbed_official 587:61103edf8a92 27 // Enable external crystal source if clock source is 32KHz
mbed_official 587:61103edf8a92 28 if (extosc_frequency()==32768) {
mbed_official 587:61103edf8a92 29 SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(OSC32KCLK);
mbed_official 587:61103edf8a92 30 }
mbed_official 587:61103edf8a92 31 else{
mbed_official 587:61103edf8a92 32 // If main clock is NOT 32KHz crystal, use external 32KHz clock source defined in PeripheralPins.c
mbed_official 587:61103edf8a92 33 SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(PinMap_RTC[0].peripheral);
mbed_official 587:61103edf8a92 34 pinmap_pinout(PinMap_RTC[0].pin, PinMap_RTC); //Map RTC clk input (if not NC)
mbed_official 587:61103edf8a92 35 }
mbed_official 82:0b31dbcd4769 36 }
mbed_official 82:0b31dbcd4769 37
mbed_official 82:0b31dbcd4769 38 void rtc_init(void) {
mbed_official 82:0b31dbcd4769 39 init();
mbed_official 82:0b31dbcd4769 40
mbed_official 82:0b31dbcd4769 41 //Configure the TSR. default value: 1
mbed_official 82:0b31dbcd4769 42 RTC->TSR = 1;
mbed_official 82:0b31dbcd4769 43
mbed_official 82:0b31dbcd4769 44 if (PinMap_RTC[0].pin == NC) { //Use OSC32K
mbed_official 82:0b31dbcd4769 45 RTC->CR |= RTC_CR_OSCE_MASK;
mbed_official 82:0b31dbcd4769 46 //delay for OSCE stabilization
mbed_official 82:0b31dbcd4769 47 for(int i=0; i<0x1000; i++) __NOP();
mbed_official 82:0b31dbcd4769 48 }
mbed_official 82:0b31dbcd4769 49
mbed_official 82:0b31dbcd4769 50 // enable counter
mbed_official 82:0b31dbcd4769 51 RTC->SR |= RTC_SR_TCE_MASK;
mbed_official 82:0b31dbcd4769 52 }
mbed_official 82:0b31dbcd4769 53
mbed_official 82:0b31dbcd4769 54 void rtc_free(void) {
mbed_official 82:0b31dbcd4769 55 // [TODO]
mbed_official 82:0b31dbcd4769 56 }
mbed_official 82:0b31dbcd4769 57
mbed_official 82:0b31dbcd4769 58 /*
mbed_official 82:0b31dbcd4769 59 * Little check routine to see if the RTC has been enabled
mbed_official 82:0b31dbcd4769 60 * 0 = Disabled, 1 = Enabled
mbed_official 82:0b31dbcd4769 61 */
mbed_official 82:0b31dbcd4769 62 int rtc_isenabled(void) {
mbed_official 82:0b31dbcd4769 63 // even if the RTC module is enabled,
mbed_official 82:0b31dbcd4769 64 // as we use RTC_CLKIN and an external clock,
mbed_official 82:0b31dbcd4769 65 // we need to reconfigure the pins. That is why we
mbed_official 82:0b31dbcd4769 66 // call init() if the rtc is enabled
mbed_official 82:0b31dbcd4769 67
mbed_official 82:0b31dbcd4769 68 // if RTC not enabled return 0
mbed_official 82:0b31dbcd4769 69 SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;
mbed_official 82:0b31dbcd4769 70 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
mbed_official 82:0b31dbcd4769 71 if ((RTC->SR & RTC_SR_TCE_MASK) == 0)
mbed_official 82:0b31dbcd4769 72 return 0;
mbed_official 82:0b31dbcd4769 73
mbed_official 82:0b31dbcd4769 74 init();
mbed_official 82:0b31dbcd4769 75 return 1;
mbed_official 82:0b31dbcd4769 76 }
mbed_official 82:0b31dbcd4769 77
mbed_official 82:0b31dbcd4769 78 time_t rtc_read(void) {
mbed_official 82:0b31dbcd4769 79 return RTC->TSR;
mbed_official 82:0b31dbcd4769 80 }
mbed_official 82:0b31dbcd4769 81
mbed_official 82:0b31dbcd4769 82 void rtc_write(time_t t) {
mbed_official 82:0b31dbcd4769 83 // disable counter
mbed_official 82:0b31dbcd4769 84 RTC->SR &= ~RTC_SR_TCE_MASK;
mbed_official 82:0b31dbcd4769 85
mbed_official 82:0b31dbcd4769 86 // we do not write 0 into TSR
mbed_official 82:0b31dbcd4769 87 // to avoid invalid time
mbed_official 82:0b31dbcd4769 88 if (t == 0)
mbed_official 82:0b31dbcd4769 89 t = 1;
mbed_official 82:0b31dbcd4769 90
mbed_official 82:0b31dbcd4769 91 // write seconds
mbed_official 82:0b31dbcd4769 92 RTC->TSR = t;
mbed_official 82:0b31dbcd4769 93
mbed_official 82:0b31dbcd4769 94 // re-enable counter
mbed_official 82:0b31dbcd4769 95 RTC->SR |= RTC_SR_TCE_MASK;
mbed_official 82:0b31dbcd4769 96 }