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Last commit 20 Feb 2019 by 
mbed official
targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/instance/ins_tc6.h@579:53297373a894, 2015-07-01 (annotated)
- Committer:
- mbed_official
- Date:
- Wed Jul 01 09:45:11 2015 +0100
- Revision:
- 579:53297373a894
- Child:
- 592:a274ee790e56
Synchronized with git revision d5b4d2ab9c47edb4dc5776e7177b0c2263459081
Full URL: https://github.com/mbedmicro/mbed/commit/d5b4d2ab9c47edb4dc5776e7177b0c2263459081/
Initial version of drivers for SAMR21
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 579:53297373a894 | 1 | /** |
| mbed_official | 579:53297373a894 | 2 | * \file |
| mbed_official | 579:53297373a894 | 3 | * |
| mbed_official | 579:53297373a894 | 4 | * \brief Instance description for TC6 |
| mbed_official | 579:53297373a894 | 5 | * |
| mbed_official | 579:53297373a894 | 6 | * Copyright (c) 2014 Atmel Corporation. All rights reserved. |
| mbed_official | 579:53297373a894 | 7 | * |
| mbed_official | 579:53297373a894 | 8 | * \asf_license_start |
| mbed_official | 579:53297373a894 | 9 | * |
| mbed_official | 579:53297373a894 | 10 | * \page License |
| mbed_official | 579:53297373a894 | 11 | * |
| mbed_official | 579:53297373a894 | 12 | * Redistribution and use in source and binary forms, with or without |
| mbed_official | 579:53297373a894 | 13 | * modification, are permitted provided that the following conditions are met: |
| mbed_official | 579:53297373a894 | 14 | * |
| mbed_official | 579:53297373a894 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 579:53297373a894 | 16 | * this list of conditions and the following disclaimer. |
| mbed_official | 579:53297373a894 | 17 | * |
| mbed_official | 579:53297373a894 | 18 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 579:53297373a894 | 19 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 579:53297373a894 | 20 | * and/or other materials provided with the distribution. |
| mbed_official | 579:53297373a894 | 21 | * |
| mbed_official | 579:53297373a894 | 22 | * 3. The name of Atmel may not be used to endorse or promote products derived |
| mbed_official | 579:53297373a894 | 23 | * from this software without specific prior written permission. |
| mbed_official | 579:53297373a894 | 24 | * |
| mbed_official | 579:53297373a894 | 25 | * 4. This software may only be redistributed and used in connection with an |
| mbed_official | 579:53297373a894 | 26 | * Atmel microcontroller product. |
| mbed_official | 579:53297373a894 | 27 | * |
| mbed_official | 579:53297373a894 | 28 | * THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED |
| mbed_official | 579:53297373a894 | 29 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF |
| mbed_official | 579:53297373a894 | 30 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE |
| mbed_official | 579:53297373a894 | 31 | * EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR |
| mbed_official | 579:53297373a894 | 32 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 579:53297373a894 | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS |
| mbed_official | 579:53297373a894 | 34 | * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) |
| mbed_official | 579:53297373a894 | 35 | * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, |
| mbed_official | 579:53297373a894 | 36 | * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN |
| mbed_official | 579:53297373a894 | 37 | * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| mbed_official | 579:53297373a894 | 38 | * POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 579:53297373a894 | 39 | * |
| mbed_official | 579:53297373a894 | 40 | * \asf_license_stop |
| mbed_official | 579:53297373a894 | 41 | * |
| mbed_official | 579:53297373a894 | 42 | */ |
| mbed_official | 579:53297373a894 | 43 | /** |
| mbed_official | 579:53297373a894 | 44 | * Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a> |
| mbed_official | 579:53297373a894 | 45 | */ |
| mbed_official | 579:53297373a894 | 46 | |
| mbed_official | 579:53297373a894 | 47 | #ifndef _SAMD21_TC6_INSTANCE_ |
| mbed_official | 579:53297373a894 | 48 | #define _SAMD21_TC6_INSTANCE_ |
| mbed_official | 579:53297373a894 | 49 | |
| mbed_official | 579:53297373a894 | 50 | /* ========== Register definition for TC6 peripheral ========== */ |
| mbed_official | 579:53297373a894 | 51 | #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) |
| mbed_official | 579:53297373a894 | 52 | #define REG_TC6_CTRLA (0x42003800U) /**< \brief (TC6) Control A */ |
| mbed_official | 579:53297373a894 | 53 | #define REG_TC6_READREQ (0x42003802U) /**< \brief (TC6) Read Request */ |
| mbed_official | 579:53297373a894 | 54 | #define REG_TC6_CTRLBCLR (0x42003804U) /**< \brief (TC6) Control B Clear */ |
| mbed_official | 579:53297373a894 | 55 | #define REG_TC6_CTRLBSET (0x42003805U) /**< \brief (TC6) Control B Set */ |
| mbed_official | 579:53297373a894 | 56 | #define REG_TC6_CTRLC (0x42003806U) /**< \brief (TC6) Control C */ |
| mbed_official | 579:53297373a894 | 57 | #define REG_TC6_DBGCTRL (0x42003808U) /**< \brief (TC6) Debug Control */ |
| mbed_official | 579:53297373a894 | 58 | #define REG_TC6_EVCTRL (0x4200380AU) /**< \brief (TC6) Event Control */ |
| mbed_official | 579:53297373a894 | 59 | #define REG_TC6_INTENCLR (0x4200380CU) /**< \brief (TC6) Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 60 | #define REG_TC6_INTENSET (0x4200380DU) /**< \brief (TC6) Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 61 | #define REG_TC6_INTFLAG (0x4200380EU) /**< \brief (TC6) Interrupt Flag Status and Clear */ |
| mbed_official | 579:53297373a894 | 62 | #define REG_TC6_STATUS (0x4200380FU) /**< \brief (TC6) Status */ |
| mbed_official | 579:53297373a894 | 63 | #define REG_TC6_COUNT16_COUNT (0x42003810U) /**< \brief (TC6) COUNT16 Counter Value */ |
| mbed_official | 579:53297373a894 | 64 | #define REG_TC6_COUNT16_CC0 (0x42003818U) /**< \brief (TC6) COUNT16 Compare/Capture 0 */ |
| mbed_official | 579:53297373a894 | 65 | #define REG_TC6_COUNT16_CC1 (0x4200381AU) /**< \brief (TC6) COUNT16 Compare/Capture 1 */ |
| mbed_official | 579:53297373a894 | 66 | #define REG_TC6_COUNT32_COUNT (0x42003810U) /**< \brief (TC6) COUNT32 Counter Value */ |
| mbed_official | 579:53297373a894 | 67 | #define REG_TC6_COUNT32_CC0 (0x42003818U) /**< \brief (TC6) COUNT32 Compare/Capture 0 */ |
| mbed_official | 579:53297373a894 | 68 | #define REG_TC6_COUNT32_CC1 (0x4200381CU) /**< \brief (TC6) COUNT32 Compare/Capture 1 */ |
| mbed_official | 579:53297373a894 | 69 | #define REG_TC6_COUNT8_COUNT (0x42003810U) /**< \brief (TC6) COUNT8 Counter Value */ |
| mbed_official | 579:53297373a894 | 70 | #define REG_TC6_COUNT8_PER (0x42003814U) /**< \brief (TC6) COUNT8 Period Value */ |
| mbed_official | 579:53297373a894 | 71 | #define REG_TC6_COUNT8_CC0 (0x42003818U) /**< \brief (TC6) COUNT8 Compare/Capture 0 */ |
| mbed_official | 579:53297373a894 | 72 | #define REG_TC6_COUNT8_CC1 (0x42003819U) /**< \brief (TC6) COUNT8 Compare/Capture 1 */ |
| mbed_official | 579:53297373a894 | 73 | #else |
| mbed_official | 579:53297373a894 | 74 | #define REG_TC6_CTRLA (*(RwReg16*)0x42003800U) /**< \brief (TC6) Control A */ |
| mbed_official | 579:53297373a894 | 75 | #define REG_TC6_READREQ (*(RwReg16*)0x42003802U) /**< \brief (TC6) Read Request */ |
| mbed_official | 579:53297373a894 | 76 | #define REG_TC6_CTRLBCLR (*(RwReg8 *)0x42003804U) /**< \brief (TC6) Control B Clear */ |
| mbed_official | 579:53297373a894 | 77 | #define REG_TC6_CTRLBSET (*(RwReg8 *)0x42003805U) /**< \brief (TC6) Control B Set */ |
| mbed_official | 579:53297373a894 | 78 | #define REG_TC6_CTRLC (*(RwReg8 *)0x42003806U) /**< \brief (TC6) Control C */ |
| mbed_official | 579:53297373a894 | 79 | #define REG_TC6_DBGCTRL (*(RwReg8 *)0x42003808U) /**< \brief (TC6) Debug Control */ |
| mbed_official | 579:53297373a894 | 80 | #define REG_TC6_EVCTRL (*(RwReg16*)0x4200380AU) /**< \brief (TC6) Event Control */ |
| mbed_official | 579:53297373a894 | 81 | #define REG_TC6_INTENCLR (*(RwReg8 *)0x4200380CU) /**< \brief (TC6) Interrupt Enable Clear */ |
| mbed_official | 579:53297373a894 | 82 | #define REG_TC6_INTENSET (*(RwReg8 *)0x4200380DU) /**< \brief (TC6) Interrupt Enable Set */ |
| mbed_official | 579:53297373a894 | 83 | #define REG_TC6_INTFLAG (*(RwReg8 *)0x4200380EU) /**< \brief (TC6) Interrupt Flag Status and Clear */ |
| mbed_official | 579:53297373a894 | 84 | #define REG_TC6_STATUS (*(RoReg8 *)0x4200380FU) /**< \brief (TC6) Status */ |
| mbed_official | 579:53297373a894 | 85 | #define REG_TC6_COUNT16_COUNT (*(RwReg16*)0x42003810U) /**< \brief (TC6) COUNT16 Counter Value */ |
| mbed_official | 579:53297373a894 | 86 | #define REG_TC6_COUNT16_CC0 (*(RwReg16*)0x42003818U) /**< \brief (TC6) COUNT16 Compare/Capture 0 */ |
| mbed_official | 579:53297373a894 | 87 | #define REG_TC6_COUNT16_CC1 (*(RwReg16*)0x4200381AU) /**< \brief (TC6) COUNT16 Compare/Capture 1 */ |
| mbed_official | 579:53297373a894 | 88 | #define REG_TC6_COUNT32_COUNT (*(RwReg *)0x42003810U) /**< \brief (TC6) COUNT32 Counter Value */ |
| mbed_official | 579:53297373a894 | 89 | #define REG_TC6_COUNT32_CC0 (*(RwReg *)0x42003818U) /**< \brief (TC6) COUNT32 Compare/Capture 0 */ |
| mbed_official | 579:53297373a894 | 90 | #define REG_TC6_COUNT32_CC1 (*(RwReg *)0x4200381CU) /**< \brief (TC6) COUNT32 Compare/Capture 1 */ |
| mbed_official | 579:53297373a894 | 91 | #define REG_TC6_COUNT8_COUNT (*(RwReg8 *)0x42003810U) /**< \brief (TC6) COUNT8 Counter Value */ |
| mbed_official | 579:53297373a894 | 92 | #define REG_TC6_COUNT8_PER (*(RwReg8 *)0x42003814U) /**< \brief (TC6) COUNT8 Period Value */ |
| mbed_official | 579:53297373a894 | 93 | #define REG_TC6_COUNT8_CC0 (*(RwReg8 *)0x42003818U) /**< \brief (TC6) COUNT8 Compare/Capture 0 */ |
| mbed_official | 579:53297373a894 | 94 | #define REG_TC6_COUNT8_CC1 (*(RwReg8 *)0x42003819U) /**< \brief (TC6) COUNT8 Compare/Capture 1 */ |
| mbed_official | 579:53297373a894 | 95 | #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */ |
| mbed_official | 579:53297373a894 | 96 | |
| mbed_official | 579:53297373a894 | 97 | /* ========== Instance parameters for TC6 peripheral ========== */ |
| mbed_official | 579:53297373a894 | 98 | #define TC6_CC8_NUM 2 // Number of 8-bit Counters |
| mbed_official | 579:53297373a894 | 99 | #define TC6_CC16_NUM 2 // Number of 16-bit Counters |
| mbed_official | 579:53297373a894 | 100 | #define TC6_CC32_NUM 2 // Number of 32-bit Counters |
| mbed_official | 579:53297373a894 | 101 | #define TC6_DITHERING_EXT 0 // Dithering feature implemented |
| mbed_official | 579:53297373a894 | 102 | #define TC6_DMAC_ID_MC_0 34 |
| mbed_official | 579:53297373a894 | 103 | #define TC6_DMAC_ID_MC_1 35 |
| mbed_official | 579:53297373a894 | 104 | #define TC6_DMAC_ID_MC_LSB 34 |
| mbed_official | 579:53297373a894 | 105 | #define TC6_DMAC_ID_MC_MSB 35 |
| mbed_official | 579:53297373a894 | 106 | #define TC6_DMAC_ID_MC_SIZE 2 |
| mbed_official | 579:53297373a894 | 107 | #define TC6_DMAC_ID_OVF 33 // Indexes of DMA Overflow trigger |
| mbed_official | 579:53297373a894 | 108 | #define TC6_GCLK_ID 29 // Index of Generic Clock |
| mbed_official | 579:53297373a894 | 109 | #define TC6_MASTER 1 |
| mbed_official | 579:53297373a894 | 110 | #define TC6_OW_NUM 2 // Number of Output Waveforms |
| mbed_official | 579:53297373a894 | 111 | #define TC6_PERIOD_EXT 0 // Period feature implemented |
| mbed_official | 579:53297373a894 | 112 | #define TC6_SHADOW_EXT 0 // Shadow feature implemented |
| mbed_official | 579:53297373a894 | 113 | |
| mbed_official | 579:53297373a894 | 114 | #endif /* _SAMD21_TC6_INSTANCE_ */ |
