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This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

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If you are looking for a stable and tested release, please import one of the official mbed library releases:

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The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_KPSDK_CODE/hal/rtc/fsl_rtc_hal.h@324:406fd2029f23, 2014-09-18 (annotated)

Committer:
mbed_official
Date:
Thu Sep 18 14:00:17 2014 +0100
Revision:
324:406fd2029f23
Parent:
149:1fb5f62b92bd 
Synchronized with git revision a73f28e6fbca9559fbed2726410eeb4c0534a4a5



Full URL: https://github.com/mbedmicro/mbed/commit/a73f28e6fbca9559fbed2726410eeb4c0534a4a5/



Extended #476, which does not break ethernet for K64F

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 146:f64d43ff0c18 1 /*
mbed_official 146:f64d43ff0c18 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
mbed_official 146:f64d43ff0c18 3 * All rights reserved.
mbed_official 146:f64d43ff0c18 4 *
mbed_official 146:f64d43ff0c18 5 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 146:f64d43ff0c18 6 * are permitted provided that the following conditions are met:
mbed_official 146:f64d43ff0c18 7 *
mbed_official 146:f64d43ff0c18 8 * o Redistributions of source code must retain the above copyright notice, this list
mbed_official 146:f64d43ff0c18 9 * of conditions and the following disclaimer.
mbed_official 146:f64d43ff0c18 10 *
mbed_official 146:f64d43ff0c18 11 * o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 146:f64d43ff0c18 12 * list of conditions and the following disclaimer in the documentation and/or
mbed_official 146:f64d43ff0c18 13 * other materials provided with the distribution.
mbed_official 146:f64d43ff0c18 14 *
mbed_official 146:f64d43ff0c18 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 146:f64d43ff0c18 16 * contributors may be used to endorse or promote products derived from this
mbed_official 146:f64d43ff0c18 17 * software without specific prior written permission.
mbed_official 146:f64d43ff0c18 18 *
mbed_official 146:f64d43ff0c18 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 146:f64d43ff0c18 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 146:f64d43ff0c18 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 146:f64d43ff0c18 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 146:f64d43ff0c18 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 146:f64d43ff0c18 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 146:f64d43ff0c18 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 146:f64d43ff0c18 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 146:f64d43ff0c18 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 146:f64d43ff0c18 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 146:f64d43ff0c18 29 */
mbed_official 146:f64d43ff0c18 30 #if !defined(__FSL_RTC_HAL_H__)
mbed_official 146:f64d43ff0c18 31 #define __FSL_RTC_HAL_H__
mbed_official 146:f64d43ff0c18 32
mbed_official 324:406fd2029f23 33 #include <assert.h>
mbed_official 324:406fd2029f23 34 #include <stdint.h>
mbed_official 324:406fd2029f23 35 #include <stdbool.h>
mbed_official 146:f64d43ff0c18 36 #include "fsl_rtc_features.h"
mbed_official 146:f64d43ff0c18 37 #include "fsl_device_registers.h"
mbed_official 146:f64d43ff0c18 38
mbed_official 146:f64d43ff0c18 39 /*!
mbed_official 146:f64d43ff0c18 40 * @addtogroup rtc_hal
mbed_official 146:f64d43ff0c18 41 * @{
mbed_official 146:f64d43ff0c18 42 */
mbed_official 146:f64d43ff0c18 43
mbed_official 146:f64d43ff0c18 44 /*******************************************************************************
mbed_official 146:f64d43ff0c18 45 * Definitions
mbed_official 146:f64d43ff0c18 46 ******************************************************************************/
mbed_official 146:f64d43ff0c18 47
mbed_official 324:406fd2029f23 48 /*!
mbed_official 324:406fd2029f23 49 * @brief Structure is used to hold the time in a simple "date" format.
mbed_official 324:406fd2029f23 50 */
mbed_official 324:406fd2029f23 51 typedef struct RtcDatetime
mbed_official 146:f64d43ff0c18 52 {
mbed_official 324:406fd2029f23 53 uint16_t year; /*!< Range from 1970 to 2099.*/
mbed_official 324:406fd2029f23 54 uint16_t month; /*!< Range from 1 to 12.*/
mbed_official 324:406fd2029f23 55 uint16_t day; /*!< Range from 1 to 31 (depending on month).*/
mbed_official 324:406fd2029f23 56 uint16_t hour; /*!< Range from 0 to 23.*/
mbed_official 324:406fd2029f23 57 uint16_t minute; /*!< Range from 0 to 59.*/
mbed_official 324:406fd2029f23 58 uint8_t second; /*!< Range from 0 to 59.*/
mbed_official 324:406fd2029f23 59 } rtc_datetime_t;
mbed_official 146:f64d43ff0c18 60
mbed_official 146:f64d43ff0c18 61 /*******************************************************************************
mbed_official 146:f64d43ff0c18 62 * API
mbed_official 146:f64d43ff0c18 63 ******************************************************************************/
mbed_official 146:f64d43ff0c18 64
mbed_official 146:f64d43ff0c18 65 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 66 extern "C" {
mbed_official 146:f64d43ff0c18 67 #endif
mbed_official 146:f64d43ff0c18 68
mbed_official 324:406fd2029f23 69 /*!
mbed_official 324:406fd2029f23 70 * @name RTC HAL API Functions
mbed_official 324:406fd2029f23 71 * @{
mbed_official 324:406fd2029f23 72 */
mbed_official 324:406fd2029f23 73
mbed_official 324:406fd2029f23 74 /*!
mbed_official 324:406fd2029f23 75 * @brief Initializes the RTC module.
mbed_official 324:406fd2029f23 76 *
mbed_official 324:406fd2029f23 77 * This function enables the RTC oscillator.
mbed_official 324:406fd2029f23 78 *
mbed_official 324:406fd2029f23 79 * @param rtcBaseAddr The RTC base address.
mbed_official 324:406fd2029f23 80 */
mbed_official 324:406fd2029f23 81 void RTC_HAL_Enable(uint32_t rtcBaseAddr);
mbed_official 324:406fd2029f23 82
mbed_official 324:406fd2029f23 83 /*!
mbed_official 324:406fd2029f23 84 * @brief Disables the RTC module.
mbed_official 324:406fd2029f23 85 *
mbed_official 324:406fd2029f23 86 * This function disablesS the RTC counter and oscillator.
mbed_official 324:406fd2029f23 87 *
mbed_official 324:406fd2029f23 88 * @param rtcBaseAddr The RTC base address.
mbed_official 324:406fd2029f23 89 */
mbed_official 324:406fd2029f23 90 void RTC_HAL_Disable(uint32_t rtcBaseAddr);
mbed_official 324:406fd2029f23 91
mbed_official 324:406fd2029f23 92 /*!
mbed_official 324:406fd2029f23 93 * @brief Resets the RTC module.
mbed_official 146:f64d43ff0c18 94 *
mbed_official 324:406fd2029f23 95 * This function initiates a soft-reset of the RTC module to reset
mbed_official 324:406fd2029f23 96 * the RTC registers.
mbed_official 324:406fd2029f23 97 *
mbed_official 324:406fd2029f23 98 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 99 */
mbed_official 324:406fd2029f23 100 void RTC_HAL_Init(uint32_t rtcBaseAddr);
mbed_official 324:406fd2029f23 101
mbed_official 324:406fd2029f23 102 /*!
mbed_official 324:406fd2029f23 103 * @brief Converts seconds to date time format data structure.
mbed_official 324:406fd2029f23 104 *
mbed_official 324:406fd2029f23 105 * @param seconds holds the date and time information in seconds
mbed_official 324:406fd2029f23 106 * @param datetime holds the converted information from seconds in date and time format
mbed_official 324:406fd2029f23 107 */
mbed_official 324:406fd2029f23 108 void RTC_HAL_ConvertSecsToDatetime(const uint32_t * seconds, rtc_datetime_t * datetime);
mbed_official 324:406fd2029f23 109
mbed_official 324:406fd2029f23 110 /*!
mbed_official 324:406fd2029f23 111 * @brief Checks whether the date time structure elements have the information that is within the range.
mbed_official 324:406fd2029f23 112 *
mbed_official 324:406fd2029f23 113 * @param datetime holds the date and time information that needs to be converted to seconds
mbed_official 324:406fd2029f23 114 */
mbed_official 324:406fd2029f23 115 bool RTC_HAL_IsDatetimeCorrectFormat(const rtc_datetime_t * datetime);
mbed_official 324:406fd2029f23 116
mbed_official 324:406fd2029f23 117 /*!
mbed_official 324:406fd2029f23 118 * @brief Converts the date time format data structure to seconds.
mbed_official 324:406fd2029f23 119 *
mbed_official 324:406fd2029f23 120 * @param datetime holds the date and time information that needs to be converted to seconds
mbed_official 324:406fd2029f23 121 * @param seconds holds the converted date and time in seconds
mbed_official 146:f64d43ff0c18 122 */
mbed_official 324:406fd2029f23 123 void RTC_HAL_ConvertDatetimeToSecs(const rtc_datetime_t * datetime, uint32_t * seconds);
mbed_official 146:f64d43ff0c18 124
mbed_official 324:406fd2029f23 125 /*!
mbed_official 324:406fd2029f23 126 * @brief Sets the RTC date and time according to the given time structure.
mbed_official 324:406fd2029f23 127 *
mbed_official 324:406fd2029f23 128 * The function converts the data from the time structure to seconds and writes the seconds
mbed_official 324:406fd2029f23 129 * value to the RTC register. The RTC counter is started after setting the time.
mbed_official 324:406fd2029f23 130 *
mbed_official 324:406fd2029f23 131 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 132 * @param datetime [in] Pointer to structure where the date and time
mbed_official 324:406fd2029f23 133 * details to set are stored.
mbed_official 324:406fd2029f23 134 */
mbed_official 324:406fd2029f23 135 void RTC_HAL_SetDatetime(uint32_t rtcBaseAddr, const rtc_datetime_t * datetime);
mbed_official 324:406fd2029f23 136
mbed_official 324:406fd2029f23 137 /*!
mbed_official 324:406fd2029f23 138 * @brief Sets the RTC date and time according to the given time provided in seconds.
mbed_official 324:406fd2029f23 139 *
mbed_official 324:406fd2029f23 140 * The RTC counter is started after setting the time.
mbed_official 324:406fd2029f23 141 *
mbed_official 324:406fd2029f23 142 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 143 * @param seconds [in] Time in seconds
mbed_official 324:406fd2029f23 144 */
mbed_official 324:406fd2029f23 145 void RTC_HAL_SetDatetimeInsecs(uint32_t rtcBaseAddr, const uint32_t seconds);
mbed_official 146:f64d43ff0c18 146
mbed_official 324:406fd2029f23 147 /*!
mbed_official 324:406fd2029f23 148 * @brief Gets the RTC time and stores it in the given time structure.
mbed_official 324:406fd2029f23 149 *
mbed_official 324:406fd2029f23 150 * The function reads the value in seconds from the RTC register. It then converts to the
mbed_official 324:406fd2029f23 151 * time structure which provides the time in date, hour, minutes and seconds.
mbed_official 324:406fd2029f23 152 *
mbed_official 324:406fd2029f23 153 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 154 * @param datetime [out] pointer to a structure where the date and time details are
mbed_official 324:406fd2029f23 155 * stored.
mbed_official 324:406fd2029f23 156 */
mbed_official 324:406fd2029f23 157 void RTC_HAL_GetDatetime(uint32_t rtcBaseAddr, rtc_datetime_t * datetime);
mbed_official 324:406fd2029f23 158
mbed_official 324:406fd2029f23 159 /*!
mbed_official 324:406fd2029f23 160 * @brief Gets the RTC time and returns it in seconds.
mbed_official 324:406fd2029f23 161 *
mbed_official 324:406fd2029f23 162 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 163 * @param datetime [out] pointer to variable where the RTC time is stored in seconds
mbed_official 324:406fd2029f23 164 */
mbed_official 324:406fd2029f23 165 void RTC_HAL_GetDatetimeInSecs(uint32_t rtcBaseAddr, uint32_t * seconds);
mbed_official 324:406fd2029f23 166
mbed_official 324:406fd2029f23 167 /*!
mbed_official 324:406fd2029f23 168 * @brief Reads the value of the time alarm.
mbed_official 324:406fd2029f23 169 *
mbed_official 324:406fd2029f23 170 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 171 * @param date [out] pointer to a variable where the alarm date and time
mbed_official 324:406fd2029f23 172 * details are stored.
mbed_official 324:406fd2029f23 173 */
mbed_official 324:406fd2029f23 174 void RTC_HAL_GetAlarm(uint32_t rtcBaseAddr, rtc_datetime_t * date);
mbed_official 324:406fd2029f23 175
mbed_official 324:406fd2029f23 176 /*!
mbed_official 324:406fd2029f23 177 * @brief Sets the RTC alarm time and enables the alarm interrupt.
mbed_official 324:406fd2029f23 178 *
mbed_official 324:406fd2029f23 179 * The function checks whether the specified alarm time is greater than the present
mbed_official 324:406fd2029f23 180 * time. If not, the function does not set the alarm and returns an error.
mbed_official 324:406fd2029f23 181 *
mbed_official 324:406fd2029f23 182 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 183 * @param date [in] pointer to structure where the alarm date and time
mbed_official 324:406fd2029f23 184 * details will be stored at.
mbed_official 324:406fd2029f23 185 * @return true: success in setting the RTC alarm\n
mbed_official 324:406fd2029f23 186 * false: error in setting the RTC alarm.
mbed_official 324:406fd2029f23 187 */
mbed_official 324:406fd2029f23 188 bool RTC_HAL_SetAlarm(uint32_t rtcBaseAddr, const rtc_datetime_t * date);
mbed_official 324:406fd2029f23 189
mbed_official 324:406fd2029f23 190 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 146:f64d43ff0c18 191 /*-------------------------------------------------------------------------------------------*/
mbed_official 324:406fd2029f23 192 /* RTC Monotonic Counter*/
mbed_official 146:f64d43ff0c18 193 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 194
mbed_official 324:406fd2029f23 195 /*!
mbed_official 324:406fd2029f23 196 * @brief Reads the values of the Monotonic Counter High and Monotonic Counter Low and returns
mbed_official 324:406fd2029f23 197 * them as a single value.
mbed_official 324:406fd2029f23 198 *
mbed_official 324:406fd2029f23 199 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 200 * @param counter [out] pointer to variable where the value is stored.
mbed_official 324:406fd2029f23 201 */
mbed_official 324:406fd2029f23 202 void RTC_HAL_GetMonotonicCounter(uint32_t rtcBaseAddr, uint64_t * counter);
mbed_official 146:f64d43ff0c18 203
mbed_official 324:406fd2029f23 204 /*!
mbed_official 324:406fd2029f23 205 * @brief Writes values Monotonic Counter High and Monotonic Counter Low by decomposing
mbed_official 324:406fd2029f23 206 * the given single value.
mbed_official 324:406fd2029f23 207 *
mbed_official 324:406fd2029f23 208 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 209 * @param counter [in] pointer to variable where the value is stored.
mbed_official 324:406fd2029f23 210 */
mbed_official 324:406fd2029f23 211 void RTC_HAL_SetMonotonicCounter(uint32_t rtcBaseAddr, const uint64_t * counter);
mbed_official 146:f64d43ff0c18 212
mbed_official 324:406fd2029f23 213 /*!
mbed_official 324:406fd2029f23 214 * @brief Increments the Monotonic Counter by one.
mbed_official 324:406fd2029f23 215 *
mbed_official 324:406fd2029f23 216 * Increments the Monotonic Counter (registers RTC_MCLR and RTC_MCHR accordingly) by setting
mbed_official 324:406fd2029f23 217 * the monotonic counter enable (MER[MCE]) and then writing to the RTC_MCLR register. A write to the
mbed_official 324:406fd2029f23 218 * monotonic counter low that causes it to overflow also increments the monotonic counter high.
mbed_official 324:406fd2029f23 219 *
mbed_official 324:406fd2029f23 220 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 221 *
mbed_official 324:406fd2029f23 222 * @return true: success\n
mbed_official 324:406fd2029f23 223 * false: error occurred, either time invalid or monotonic overflow flag was found
mbed_official 324:406fd2029f23 224 */
mbed_official 324:406fd2029f23 225 bool RTC_HAL_IncrementMonotonicCounter(uint32_t rtcBaseAddr);
mbed_official 324:406fd2029f23 226 #endif
mbed_official 324:406fd2029f23 227 /*! @}*/
mbed_official 146:f64d43ff0c18 228
mbed_official 324:406fd2029f23 229 /*!
mbed_official 324:406fd2029f23 230 * @name RTC register access functions
mbed_official 324:406fd2029f23 231 * @{
mbed_official 324:406fd2029f23 232 */
mbed_official 146:f64d43ff0c18 233
mbed_official 324:406fd2029f23 234 /*!
mbed_official 324:406fd2029f23 235 * @brief Reads the value of the time seconds counter.
mbed_official 324:406fd2029f23 236 *
mbed_official 324:406fd2029f23 237 * The time counter reads as zero if either the SR[TOF] or the SR[TIF] is set.
mbed_official 324:406fd2029f23 238 *
mbed_official 324:406fd2029f23 239 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 240 *
mbed_official 324:406fd2029f23 241 * @return contents of the seconds register.
mbed_official 324:406fd2029f23 242 */
mbed_official 324:406fd2029f23 243 static inline uint32_t RTC_HAL_GetSecsReg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 244 {
mbed_official 324:406fd2029f23 245 return BR_RTC_TSR_TSR(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 246 }
mbed_official 146:f64d43ff0c18 247
mbed_official 324:406fd2029f23 248 /*!
mbed_official 324:406fd2029f23 249 * @brief Writes to the time seconds counter.
mbed_official 324:406fd2029f23 250 *
mbed_official 324:406fd2029f23 251 * When the time counter is enabled, the TSR is read only and increments
mbed_official 324:406fd2029f23 252 * once every second provided the SR[TOF] or SR[TIF] is not set. When the time counter
mbed_official 324:406fd2029f23 253 * is disabled, the TSR can be read or written. Writing to the TSR when the
mbed_official 324:406fd2029f23 254 * time counter is disabled clears the SR[TOF] and/or the SR[TIF]. Writing
mbed_official 324:406fd2029f23 255 * to the TSR register with zero is supported, but not recommended, since the TSR
mbed_official 324:406fd2029f23 256 * reads as zero when either the SR[TIF] or the SR[TOF] is set (indicating the time is
mbed_official 324:406fd2029f23 257 * invalid).
mbed_official 324:406fd2029f23 258 *
mbed_official 324:406fd2029f23 259 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 260 * @param seconds [in] seconds value.
mbed_official 324:406fd2029f23 261 *
mbed_official 146:f64d43ff0c18 262 */
mbed_official 324:406fd2029f23 263 static inline void RTC_HAL_SetSecsReg(uint32_t rtcBaseAddr, const uint32_t seconds)
mbed_official 146:f64d43ff0c18 264 {
mbed_official 324:406fd2029f23 265 HW_RTC_TPR_WR(rtcBaseAddr, (uint32_t)0x00000000U);
mbed_official 324:406fd2029f23 266 BW_RTC_TSR_TSR(rtcBaseAddr, seconds);
mbed_official 146:f64d43ff0c18 267 }
mbed_official 146:f64d43ff0c18 268
mbed_official 324:406fd2029f23 269 /*!
mbed_official 324:406fd2029f23 270 * @brief Sets the time alarm and clears the time alarm flag.
mbed_official 324:406fd2029f23 271 *
mbed_official 324:406fd2029f23 272 * When the time counter is enabled, the SR[TAF] is set whenever the TAR[TAR]
mbed_official 324:406fd2029f23 273 * equals the TSR[TSR] and the TSR[TSR] increments. Writing to the TAR
mbed_official 324:406fd2029f23 274 * clears the SR[TAF].
mbed_official 324:406fd2029f23 275 *
mbed_official 324:406fd2029f23 276 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 277 * @param seconds [in] alarm value in seconds.
mbed_official 146:f64d43ff0c18 278 */
mbed_official 324:406fd2029f23 279 static inline void RTC_HAL_SetAlarmReg(uint32_t rtcBaseAddr, const uint32_t seconds)
mbed_official 146:f64d43ff0c18 280 {
mbed_official 324:406fd2029f23 281 BW_RTC_TAR_TAR(rtcBaseAddr, seconds);
mbed_official 146:f64d43ff0c18 282 }
mbed_official 146:f64d43ff0c18 283
mbed_official 324:406fd2029f23 284 /*!
mbed_official 324:406fd2029f23 285 * @brief Gets the time alarm register contents.
mbed_official 324:406fd2029f23 286 *
mbed_official 324:406fd2029f23 287 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 288 *
mbed_official 324:406fd2029f23 289 * @return contents of the alarm register.
mbed_official 146:f64d43ff0c18 290 */
mbed_official 324:406fd2029f23 291 static inline uint32_t RTC_HAL_GetAlarmReg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 292 {
mbed_official 324:406fd2029f23 293 return BR_RTC_TAR_TAR(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 294 }
mbed_official 146:f64d43ff0c18 295
mbed_official 146:f64d43ff0c18 296
mbed_official 324:406fd2029f23 297 /*!
mbed_official 324:406fd2029f23 298 * @brief Reads the value of the time prescaler.
mbed_official 324:406fd2029f23 299 *
mbed_official 324:406fd2029f23 300 * The time counter reads as zero when either the SR[TOF] or the SR[TIF] is set.
mbed_official 324:406fd2029f23 301 *
mbed_official 324:406fd2029f23 302 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 303 *
mbed_official 324:406fd2029f23 304 * @return contents of the time prescaler register.
mbed_official 146:f64d43ff0c18 305 */
mbed_official 324:406fd2029f23 306 static inline uint16_t RTC_HAL_GetPrescaler(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 307 {
mbed_official 324:406fd2029f23 308 return BR_RTC_TPR_TPR(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 309 }
mbed_official 146:f64d43ff0c18 310
mbed_official 324:406fd2029f23 311 /*!
mbed_official 324:406fd2029f23 312 * @brief Sets the time prescaler.
mbed_official 324:406fd2029f23 313 *
mbed_official 324:406fd2029f23 314 * When the time counter is enabled, the TPR is read only and increments
mbed_official 324:406fd2029f23 315 * every 32.768 kHz clock cycle. When the time counter is disabled, the TPR
mbed_official 324:406fd2029f23 316 * can be read or written. The TSR[TSR] increments when bit 14 of the TPR
mbed_official 324:406fd2029f23 317 * transitions from a logic one to a logic zero.
mbed_official 324:406fd2029f23 318 *
mbed_official 324:406fd2029f23 319 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 320 * @param prescale Prescaler value
mbed_official 146:f64d43ff0c18 321 */
mbed_official 324:406fd2029f23 322 static inline void RTC_HAL_SetPrescaler(uint32_t rtcBaseAddr, const uint16_t prescale)
mbed_official 146:f64d43ff0c18 323 {
mbed_official 324:406fd2029f23 324 BW_RTC_TPR_TPR(rtcBaseAddr, prescale);
mbed_official 146:f64d43ff0c18 325 }
mbed_official 146:f64d43ff0c18 326
mbed_official 146:f64d43ff0c18 327 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 328 /* RTC Time Compensation*/
mbed_official 146:f64d43ff0c18 329 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 330
mbed_official 324:406fd2029f23 331 /*!
mbed_official 324:406fd2029f23 332 * @brief Reads the time compensation register contents.
mbed_official 324:406fd2029f23 333 *
mbed_official 324:406fd2029f23 334 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 335 *
mbed_official 324:406fd2029f23 336 * @return time compensation register contents.
mbed_official 324:406fd2029f23 337 */
mbed_official 324:406fd2029f23 338 static inline uint32_t RTC_HAL_GetCompensationReg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 339 {
mbed_official 324:406fd2029f23 340 return HW_RTC_TCR_RD(rtcBaseAddr);
mbed_official 324:406fd2029f23 341 }
mbed_official 324:406fd2029f23 342
mbed_official 324:406fd2029f23 343 /*!
mbed_official 324:406fd2029f23 344 * @brief Writes the value to the RTC TCR register.
mbed_official 324:406fd2029f23 345 *
mbed_official 324:406fd2029f23 346 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 347 * @param compValue value to be written to the compensation register.
mbed_official 324:406fd2029f23 348 */
mbed_official 324:406fd2029f23 349 static inline void RTC_HAL_SetCompensationReg(uint32_t rtcBaseAddr, const uint32_t compValue)
mbed_official 324:406fd2029f23 350 {
mbed_official 324:406fd2029f23 351 HW_RTC_TCR_WR(rtcBaseAddr, compValue);
mbed_official 146:f64d43ff0c18 352 }
mbed_official 146:f64d43ff0c18 353
mbed_official 324:406fd2029f23 354 /*!
mbed_official 324:406fd2029f23 355 * @brief Reads the current value of the compensation interval counter, which is the field CIC in the RTC TCR register.
mbed_official 324:406fd2029f23 356 *
mbed_official 324:406fd2029f23 357 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 358 *
mbed_official 324:406fd2029f23 359 * @return compensation interval value.
mbed_official 146:f64d43ff0c18 360 */
mbed_official 324:406fd2029f23 361 static inline uint8_t RTC_HAL_GetCompensationIntervalCounter(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 362 {
mbed_official 324:406fd2029f23 363 return BR_RTC_TCR_CIC(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 364 }
mbed_official 146:f64d43ff0c18 365
mbed_official 324:406fd2029f23 366 /*!
mbed_official 324:406fd2029f23 367 * @brief Reads the current value used by the compensation logic for the present second interval.
mbed_official 324:406fd2029f23 368 *
mbed_official 324:406fd2029f23 369 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 370 *
mbed_official 324:406fd2029f23 371 * @return time compensation value
mbed_official 146:f64d43ff0c18 372 */
mbed_official 324:406fd2029f23 373 static inline uint8_t RTC_HAL_GetTimeCompensationValue(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 374 {
mbed_official 324:406fd2029f23 375 return BR_RTC_TCR_TCV(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 376 }
mbed_official 146:f64d43ff0c18 377
mbed_official 324:406fd2029f23 378 /*!
mbed_official 324:406fd2029f23 379 * @brief Reads the compensation interval register.
mbed_official 324:406fd2029f23 380
mbed_official 324:406fd2029f23 381 * The value is the configured compensation interval in seconds from 1 to 256 to control
mbed_official 324:406fd2029f23 382 * how frequently the time compensation register should adjust the
mbed_official 324:406fd2029f23 383 * number of 32.768 kHz cycles in each second. The value is one
mbed_official 324:406fd2029f23 384 * less than the number of seconds (for example, zero means a
mbed_official 324:406fd2029f23 385 * configuration for a compensation interval of one second).
mbed_official 324:406fd2029f23 386 *
mbed_official 324:406fd2029f23 387 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 388 *
mbed_official 324:406fd2029f23 389 * @return compensation interval in seconds.
mbed_official 146:f64d43ff0c18 390 */
mbed_official 324:406fd2029f23 391 static inline uint8_t RTC_HAL_GetCompensationIntervalRegister(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 392 {
mbed_official 324:406fd2029f23 393 return BR_RTC_TCR_CIR(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 394 }
mbed_official 146:f64d43ff0c18 395
mbed_official 324:406fd2029f23 396 /*!
mbed_official 324:406fd2029f23 397 * @brief Writes the compensation interval.
mbed_official 324:406fd2029f23 398 *
mbed_official 324:406fd2029f23 399 * This configures the compensation interval in seconds from 1 to 256 to control
mbed_official 324:406fd2029f23 400 * how frequently the TCR should adjust the number of 32.768 kHz
mbed_official 324:406fd2029f23 401 * cycles in each second. The value written should be one less than
mbed_official 324:406fd2029f23 402 * the number of seconds (for example, write zero to configure for
mbed_official 324:406fd2029f23 403 * a compensation interval of one second). This register is double
mbed_official 324:406fd2029f23 404 * buffered and writes do not take affect until the end of the
mbed_official 324:406fd2029f23 405 * current compensation interval.
mbed_official 324:406fd2029f23 406 *
mbed_official 324:406fd2029f23 407 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 408 * @param value the compensation interval value.
mbed_official 146:f64d43ff0c18 409 */
mbed_official 324:406fd2029f23 410 static inline void RTC_HAL_SetCompensationIntervalRegister(uint32_t rtcBaseAddr, const uint8_t value)
mbed_official 146:f64d43ff0c18 411 {
mbed_official 324:406fd2029f23 412 BW_RTC_TCR_CIR(rtcBaseAddr, value);
mbed_official 146:f64d43ff0c18 413 }
mbed_official 146:f64d43ff0c18 414
mbed_official 324:406fd2029f23 415 /*!
mbed_official 324:406fd2029f23 416 * @brief Reads the time compensation value which is the configured number
mbed_official 324:406fd2029f23 417 * of 32.768 kHz clock cycles in each second.
mbed_official 324:406fd2029f23 418 *
mbed_official 324:406fd2029f23 419 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 420 *
mbed_official 324:406fd2029f23 421 * @return time compensation value.
mbed_official 146:f64d43ff0c18 422 */
mbed_official 324:406fd2029f23 423 static inline uint8_t RTC_HAL_GetTimeCompensationRegister(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 424 {
mbed_official 324:406fd2029f23 425 return BR_RTC_TCR_TCR(rtcBaseAddr);
mbed_official 324:406fd2029f23 426 }
mbed_official 324:406fd2029f23 427
mbed_official 324:406fd2029f23 428 /*!
mbed_official 324:406fd2029f23 429 * @brief Writes to the field Time Compensation Register (TCR) of the RTC Time Compensation Register (RTC_TCR).
mbed_official 324:406fd2029f23 430 *
mbed_official 324:406fd2029f23 431 * Configures the number of 32.768 kHz clock cycles in each second. This register is double
mbed_official 324:406fd2029f23 432 * buffered and writes do not take affect until the end of the
mbed_official 324:406fd2029f23 433 * current compensation interval.
mbed_official 324:406fd2029f23 434 * 80h Time prescaler register overflows every 32896 clock cycles.
mbed_official 324:406fd2029f23 435 * .. ...\n
mbed_official 324:406fd2029f23 436 * FFh Time prescaler register overflows every 32769 clock cycles.\n
mbed_official 324:406fd2029f23 437 * 00h Time prescaler register overflows every 32768 clock cycles.\n
mbed_official 324:406fd2029f23 438 * 01h Time prescaler register overflows every 32767 clock cycles.\n
mbed_official 324:406fd2029f23 439 * ... ...\n
mbed_official 324:406fd2029f23 440 * 7Fh Time prescaler register overflows every 32641 clock cycles.\n
mbed_official 324:406fd2029f23 441 *
mbed_official 324:406fd2029f23 442 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 443 * @param comp_value value of the time compensation.
mbed_official 324:406fd2029f23 444 */
mbed_official 324:406fd2029f23 445 static inline void RTC_HAL_SetTimeCompensationRegister(uint32_t rtcBaseAddr, const uint8_t compValue)
mbed_official 324:406fd2029f23 446 {
mbed_official 324:406fd2029f23 447 BW_RTC_TCR_TCR(rtcBaseAddr, compValue);
mbed_official 146:f64d43ff0c18 448 }
mbed_official 146:f64d43ff0c18 449
mbed_official 146:f64d43ff0c18 450 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 451 /* RTC Control*/
mbed_official 146:f64d43ff0c18 452 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 453
mbed_official 324:406fd2029f23 454 /*!
mbed_official 324:406fd2029f23 455 * @brief Enables/disables the oscillator configuration for the 2pF load.
mbed_official 324:406fd2029f23 456 *
mbed_official 324:406fd2029f23 457 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 458 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 459 * true: enables load\n
mbed_official 324:406fd2029f23 460 * false: disables load.
mbed_official 324:406fd2029f23 461 */
mbed_official 324:406fd2029f23 462 static inline void RTC_HAL_SetOsc2pfLoadCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 146:f64d43ff0c18 463 {
mbed_official 324:406fd2029f23 464 BW_RTC_CR_SC2P(rtcBaseAddr, enable);
mbed_official 146:f64d43ff0c18 465 }
mbed_official 146:f64d43ff0c18 466
mbed_official 324:406fd2029f23 467 /*!
mbed_official 324:406fd2029f23 468 * @brief Reads the oscillator 2pF load configure bit.
mbed_official 324:406fd2029f23 469 *
mbed_official 324:406fd2029f23 470 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 471 *
mbed_official 324:406fd2029f23 472 * @return true: 2pF additional load enabled.\n
mbed_official 324:406fd2029f23 473 * false: 2pF additional load disabled.
mbed_official 324:406fd2029f23 474 */
mbed_official 324:406fd2029f23 475 static inline bool RTC_HAL_GetOsc2pfLoad(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 476 {
mbed_official 324:406fd2029f23 477 return (bool)BR_RTC_CR_SC2P(rtcBaseAddr);
mbed_official 324:406fd2029f23 478 }
mbed_official 324:406fd2029f23 479
mbed_official 324:406fd2029f23 480 /*!
mbed_official 324:406fd2029f23 481 * @brief Enables/disables the oscillator configuration for the 4pF load.
mbed_official 324:406fd2029f23 482 *
mbed_official 324:406fd2029f23 483 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 484 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 485 * true: enables load.\n
mbed_official 324:406fd2029f23 486 * false: disables load
mbed_official 324:406fd2029f23 487 */
mbed_official 324:406fd2029f23 488 static inline void RTC_HAL_SetOsc4pfLoadCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 489 {
mbed_official 324:406fd2029f23 490 BW_RTC_CR_SC4P(rtcBaseAddr, enable);
mbed_official 146:f64d43ff0c18 491 }
mbed_official 146:f64d43ff0c18 492
mbed_official 324:406fd2029f23 493 /*!
mbed_official 324:406fd2029f23 494 * @brief Reads the oscillator 4pF load configure bit.
mbed_official 324:406fd2029f23 495 *
mbed_official 324:406fd2029f23 496 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 497 *
mbed_official 324:406fd2029f23 498 * @return true: 4pF additional load enabled.\n
mbed_official 324:406fd2029f23 499 * false: 4pF additional load disabled.
mbed_official 324:406fd2029f23 500 */
mbed_official 324:406fd2029f23 501 static inline bool RTC_HAL_GetOsc4pfLoad(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 502 {
mbed_official 324:406fd2029f23 503 return (bool)BR_RTC_CR_SC4P(rtcBaseAddr);
mbed_official 324:406fd2029f23 504 }
mbed_official 324:406fd2029f23 505
mbed_official 324:406fd2029f23 506 /*!
mbed_official 324:406fd2029f23 507 * @brief Enables/disables the oscillator configuration for the 8pF load.
mbed_official 324:406fd2029f23 508 *
mbed_official 324:406fd2029f23 509 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 510 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 511 * true: enables load.\n
mbed_official 324:406fd2029f23 512 * false: disables load.
mbed_official 324:406fd2029f23 513 */
mbed_official 324:406fd2029f23 514 static inline void RTC_HAL_SetOsc8pfLoadCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 515 {
mbed_official 324:406fd2029f23 516 BW_RTC_CR_SC8P(rtcBaseAddr, enable);
mbed_official 146:f64d43ff0c18 517 }
mbed_official 146:f64d43ff0c18 518
mbed_official 324:406fd2029f23 519 /*!
mbed_official 324:406fd2029f23 520 * @brief Reads the oscillator 8pF load configure bit.
mbed_official 324:406fd2029f23 521 *
mbed_official 324:406fd2029f23 522 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 523 *
mbed_official 324:406fd2029f23 524 * @return true: 8pF additional load enabled.\n
mbed_official 324:406fd2029f23 525 * false: 8pF additional load disabled.
mbed_official 324:406fd2029f23 526 */
mbed_official 324:406fd2029f23 527 static inline bool RTC_HAL_GetOsc8pfLoad(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 528 {
mbed_official 324:406fd2029f23 529 return (bool)BR_RTC_CR_SC8P(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 530 }
mbed_official 146:f64d43ff0c18 531
mbed_official 324:406fd2029f23 532 /*!
mbed_official 324:406fd2029f23 533 * @brief Enables/disables the oscillator configuration for the 16pF load.
mbed_official 324:406fd2029f23 534 *
mbed_official 324:406fd2029f23 535 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 536 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 537 * true: enables load.\n
mbed_official 324:406fd2029f23 538 * false: disables load.
mbed_official 324:406fd2029f23 539 */
mbed_official 324:406fd2029f23 540 static inline void RTC_HAL_SetOsc16pfLoadCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 146:f64d43ff0c18 541 {
mbed_official 324:406fd2029f23 542 BW_RTC_CR_SC16P(rtcBaseAddr, enable);
mbed_official 324:406fd2029f23 543 }
mbed_official 324:406fd2029f23 544
mbed_official 324:406fd2029f23 545 /*!
mbed_official 324:406fd2029f23 546 * @brief Reads the oscillator 16pF load configure bit.
mbed_official 324:406fd2029f23 547 *
mbed_official 324:406fd2029f23 548 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 549 *
mbed_official 324:406fd2029f23 550 * @return true: 16pF additional load enabled.\n
mbed_official 324:406fd2029f23 551 * false: 16pF additional load disabled.
mbed_official 324:406fd2029f23 552 */
mbed_official 324:406fd2029f23 553 static inline bool RTC_HAL_GetOsc16pfLoad(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 554 {
mbed_official 324:406fd2029f23 555 return (bool)BR_RTC_CR_SC16P(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 556 }
mbed_official 146:f64d43ff0c18 557
mbed_official 324:406fd2029f23 558 /*!
mbed_official 324:406fd2029f23 559 * @brief Enables/disables the 32 kHz clock output to other peripherals.
mbed_official 324:406fd2029f23 560 *
mbed_official 324:406fd2029f23 561 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 562 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 563 * true: enables clock out.\n
mbed_official 324:406fd2029f23 564 * false: disables clock out.
mbed_official 324:406fd2029f23 565 */
mbed_official 324:406fd2029f23 566 static inline void RTC_HAL_SetClockOutCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 567 {
mbed_official 324:406fd2029f23 568 BW_RTC_CR_CLKO(rtcBaseAddr, !enable);
mbed_official 324:406fd2029f23 569 }
mbed_official 324:406fd2029f23 570
mbed_official 324:406fd2029f23 571 /*!
mbed_official 324:406fd2029f23 572 * @brief Reads the RTC_CR CLKO bit.
mbed_official 324:406fd2029f23 573 *
mbed_official 324:406fd2029f23 574 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 575 *
mbed_official 324:406fd2029f23 576 * @return true: 32 kHz clock is not output to other peripherals.\n
mbed_official 324:406fd2029f23 577 * false: 32 kHz clock is output to other peripherals.
mbed_official 146:f64d43ff0c18 578 */
mbed_official 324:406fd2029f23 579 static inline bool RTC_HAL_GetClockOutCmd(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 580 {
mbed_official 324:406fd2029f23 581 return (bool)BR_RTC_CR_CLKO(rtcBaseAddr);
mbed_official 324:406fd2029f23 582 }
mbed_official 324:406fd2029f23 583
mbed_official 324:406fd2029f23 584 /*!
mbed_official 324:406fd2029f23 585 * @brief Enables/disables the oscillator.
mbed_official 324:406fd2029f23 586 *
mbed_official 324:406fd2029f23 587 * After enabling, waits for the oscillator startup time before enabling the
mbed_official 324:406fd2029f23 588 * time counter to allow the 32.768 kHz clock time to stabilize.
mbed_official 324:406fd2029f23 589 *
mbed_official 324:406fd2029f23 590 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 591 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 592 * true: enables oscillator.\n
mbed_official 324:406fd2029f23 593 * false: disables oscillator.
mbed_official 324:406fd2029f23 594 */
mbed_official 324:406fd2029f23 595 static inline void RTC_HAL_SetOscillatorCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 146:f64d43ff0c18 596 {
mbed_official 324:406fd2029f23 597 BW_RTC_CR_OSCE(rtcBaseAddr, enable);
mbed_official 324:406fd2029f23 598 /* TODO: Wait for oscillator startup period if enabling the oscillator
mbed_official 324:406fd2029f23 599 if (enable)
mbed_official 324:406fd2029f23 600 */
mbed_official 324:406fd2029f23 601
mbed_official 324:406fd2029f23 602 }
mbed_official 324:406fd2029f23 603
mbed_official 324:406fd2029f23 604 /*!
mbed_official 324:406fd2029f23 605 * @brief Reads the RTC_CR OSCE bit.
mbed_official 324:406fd2029f23 606 *
mbed_official 324:406fd2029f23 607 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 608 *
mbed_official 324:406fd2029f23 609 * @return true: 32.768 kHz oscillator is enabled
mbed_official 324:406fd2029f23 610 * false: 32.768 kHz oscillator is disabled.
mbed_official 324:406fd2029f23 611 */
mbed_official 324:406fd2029f23 612 static inline bool RTC_HAL_IsOscillatorEnabled(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 613 {
mbed_official 324:406fd2029f23 614 return (bool)BR_RTC_CR_OSCE(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 615 }
mbed_official 146:f64d43ff0c18 616
mbed_official 324:406fd2029f23 617 /*!
mbed_official 324:406fd2029f23 618 * @brief Enables/disables the update mode.
mbed_official 324:406fd2029f23 619 *
mbed_official 324:406fd2029f23 620 * This mode allows the time counter enable bit in the SR to be written
mbed_official 324:406fd2029f23 621 * even when the status register is locked.
mbed_official 324:406fd2029f23 622 * When set, the time counter enable, can always be written if the
mbed_official 324:406fd2029f23 623 * TIF (Time Invalid Flag) or TOF (Time Overflow Flag) are set or
mbed_official 324:406fd2029f23 624 * if the time counter enable is clear. For devices with the
mbed_official 324:406fd2029f23 625 * monotonic counter it allows the monotonic enable to be written
mbed_official 324:406fd2029f23 626 * when it is locked. When set, the monotonic enable can always be
mbed_official 324:406fd2029f23 627 * written if the TIF (Time Invalid Flag) or TOF (Time Overflow Flag)
mbed_official 324:406fd2029f23 628 * are set or if the montonic counter enable is clear.
mbed_official 324:406fd2029f23 629 * For devices with tamper detect it allows the it to be written
mbed_official 324:406fd2029f23 630 * when it is locked. When set, the tamper detect can always be
mbed_official 324:406fd2029f23 631 * written if the TIF (Time Invalid Flag) is clear.
mbed_official 324:406fd2029f23 632 * Note: Tamper and Monotonic features are not available in all MCUs.
mbed_official 324:406fd2029f23 633 *
mbed_official 324:406fd2029f23 634 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 635 * @param lock can be true or false\n
mbed_official 324:406fd2029f23 636 * true: registers can be written when locked under limited conditions\n
mbed_official 324:406fd2029f23 637 * false: registers cannot be written when locked
mbed_official 146:f64d43ff0c18 638 */
mbed_official 324:406fd2029f23 639 static inline void RTC_HAL_SetUpdateModeCmd(uint32_t rtcBaseAddr, bool lock)
mbed_official 146:f64d43ff0c18 640 {
mbed_official 324:406fd2029f23 641 BW_RTC_CR_UM(rtcBaseAddr, lock);
mbed_official 146:f64d43ff0c18 642 }
mbed_official 146:f64d43ff0c18 643
mbed_official 324:406fd2029f23 644 /*!
mbed_official 324:406fd2029f23 645 * @brief Reads the RTC_CR update mode bit.
mbed_official 324:406fd2029f23 646 *
mbed_official 324:406fd2029f23 647 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 648 *
mbed_official 324:406fd2029f23 649 * @return true: Registers can be written when locked under limited conditions.
mbed_official 324:406fd2029f23 650 * false: Registers cannot be written when locked.
mbed_official 146:f64d43ff0c18 651 */
mbed_official 324:406fd2029f23 652 static inline bool RTC_HAL_GetUpdateMode(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 653 {
mbed_official 324:406fd2029f23 654 return (bool)BR_RTC_CR_UM(rtcBaseAddr);
mbed_official 324:406fd2029f23 655 }
mbed_official 324:406fd2029f23 656
mbed_official 324:406fd2029f23 657 /*!
mbed_official 324:406fd2029f23 658 * @brief Enables/disables the supervisor access.
mbed_official 324:406fd2029f23 659 *
mbed_official 324:406fd2029f23 660 * This configures non-supervisor mode write access to all RTC registers and
mbed_official 324:406fd2029f23 661 * non-supervisor mode read access to RTC tamper/monotonic registers.
mbed_official 324:406fd2029f23 662 * Note: Tamper and Monotonic features are NOT available in all MCUs.
mbed_official 324:406fd2029f23 663 *
mbed_official 324:406fd2029f23 664 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 665 * @param enableRegWrite can be true or false\n
mbed_official 324:406fd2029f23 666 * true: non-supervisor mode write accesses are supported.\n
mbed_official 324:406fd2029f23 667 * false: non-supervisor mode write accesses are not supported and generate a bus error.
mbed_official 324:406fd2029f23 668 */
mbed_official 324:406fd2029f23 669 static inline void RTC_HAL_SetSupervisorAccessCmd(uint32_t rtcBaseAddr, bool enableRegWrite)
mbed_official 324:406fd2029f23 670 {
mbed_official 324:406fd2029f23 671 BW_RTC_CR_SUP(rtcBaseAddr, enableRegWrite);
mbed_official 324:406fd2029f23 672 }
mbed_official 324:406fd2029f23 673
mbed_official 324:406fd2029f23 674 /*!
mbed_official 324:406fd2029f23 675 * @brief Reads the RTC_CR SUP bit.
mbed_official 324:406fd2029f23 676 *
mbed_official 324:406fd2029f23 677 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 678 *
mbed_official 324:406fd2029f23 679 * @return true: Non-supervisor mode write accesses are supported
mbed_official 324:406fd2029f23 680 * false: Non-supervisor mode write accesses are not supported.
mbed_official 324:406fd2029f23 681 */
mbed_official 324:406fd2029f23 682 static inline bool RTC_HAL_GetSupervisorAccess(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 683 {
mbed_official 324:406fd2029f23 684 return (bool)BR_RTC_CR_SUP(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 685 }
mbed_official 146:f64d43ff0c18 686
mbed_official 146:f64d43ff0c18 687 #if FSL_FEATURE_RTC_HAS_WAKEUP_PIN
mbed_official 324:406fd2029f23 688 /*!
mbed_official 324:406fd2029f23 689 * @brief Enables/disables the wakeup pin.
mbed_official 324:406fd2029f23 690 *
mbed_official 324:406fd2029f23 691 * Note: The wakeup pin is optional and not available on all devices.
mbed_official 324:406fd2029f23 692 *
mbed_official 324:406fd2029f23 693 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 694 * @param enable_wp can be true or false\n
mbed_official 324:406fd2029f23 695 * true: enables wakeup-pin, wakeup pin asserts if the
mbed_official 324:406fd2029f23 696 * RTC interrupt asserts and the chip is powered down.\n
mbed_official 324:406fd2029f23 697 * false: disables wakeup-pin.
mbed_official 146:f64d43ff0c18 698 */
mbed_official 324:406fd2029f23 699 static inline void RTC_HAL_SetWakeupPinCmd(uint32_t rtcBaseAddr, bool enableWp)
mbed_official 146:f64d43ff0c18 700 {
mbed_official 324:406fd2029f23 701 BW_RTC_CR_WPE(rtcBaseAddr, enableWp);
mbed_official 324:406fd2029f23 702 }
mbed_official 324:406fd2029f23 703
mbed_official 324:406fd2029f23 704 /*!
mbed_official 324:406fd2029f23 705 * @brief Reads the RTC_CR WPE bit.
mbed_official 324:406fd2029f23 706 *
mbed_official 324:406fd2029f23 707 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 708 *
mbed_official 324:406fd2029f23 709 * @return true: Wakeup pin is enabled.
mbed_official 324:406fd2029f23 710 * false: Wakeup pin is disabled.
mbed_official 324:406fd2029f23 711 */
mbed_official 324:406fd2029f23 712 static inline bool RTC_HAL_GetWakeupPin(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 713 {
mbed_official 324:406fd2029f23 714 return (bool)BR_RTC_CR_WPE(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 715 }
mbed_official 146:f64d43ff0c18 716 #endif
mbed_official 146:f64d43ff0c18 717
mbed_official 324:406fd2029f23 718 /*!
mbed_official 324:406fd2029f23 719 * @brief Performs a software reset on the RTC module.
mbed_official 324:406fd2029f23 720 *
mbed_official 324:406fd2029f23 721 * This resets all RTC registers except for the SWR bit and the RTC_WAR and RTC_RAR
mbed_official 324:406fd2029f23 722 * registers. The SWR bit is cleared after VBAT POR and by software
mbed_official 324:406fd2029f23 723 * explicitly clearing it.
mbed_official 324:406fd2029f23 724 * Note: access control features (RTC_WAR and RTC_RAR registers)
mbed_official 324:406fd2029f23 725 * are not available in all MCUs.
mbed_official 324:406fd2029f23 726 *
mbed_official 324:406fd2029f23 727 * @param rtcBaseAddr The RTC base address
mbed_official 146:f64d43ff0c18 728 */
mbed_official 324:406fd2029f23 729 static inline void RTC_HAL_SoftwareReset(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 730 {
mbed_official 324:406fd2029f23 731 BW_RTC_CR_SWR(rtcBaseAddr, 1u);
mbed_official 146:f64d43ff0c18 732 }
mbed_official 146:f64d43ff0c18 733
mbed_official 324:406fd2029f23 734 /*!
mbed_official 324:406fd2029f23 735 * @brief Clears the software reset flag.
mbed_official 324:406fd2029f23 736 *
mbed_official 324:406fd2029f23 737 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 738 */
mbed_official 324:406fd2029f23 739 static inline void RTC_HAL_SoftwareResetFlagClear(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 740 {
mbed_official 324:406fd2029f23 741 BW_RTC_CR_SWR(rtcBaseAddr, 0u);
mbed_official 324:406fd2029f23 742 }
mbed_official 324:406fd2029f23 743
mbed_official 324:406fd2029f23 744 /*!
mbed_official 324:406fd2029f23 745 * @brief Reads the RTC_CR SWR bit.
mbed_official 324:406fd2029f23 746 *
mbed_official 324:406fd2029f23 747 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 748 *
mbed_official 324:406fd2029f23 749 * @return true: SWR is set.
mbed_official 324:406fd2029f23 750 * false: SWR is cleared.
mbed_official 324:406fd2029f23 751 */
mbed_official 324:406fd2029f23 752 static inline bool RTC_HAL_ReadSoftwareResetStatus(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 753 {
mbed_official 324:406fd2029f23 754 return (bool)BR_RTC_CR_SWR(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 755 }
mbed_official 146:f64d43ff0c18 756
mbed_official 146:f64d43ff0c18 757 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 758 /* RTC Status*/
mbed_official 146:f64d43ff0c18 759 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 760
mbed_official 324:406fd2029f23 761 /*!
mbed_official 324:406fd2029f23 762 * @brief Reads the time counter status (enabled/disabled).
mbed_official 324:406fd2029f23 763 *
mbed_official 324:406fd2029f23 764 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 765 *
mbed_official 324:406fd2029f23 766 * @return true: time counter is enabled, time seconds register and time
mbed_official 324:406fd2029f23 767 * prescaler register are not writeable, but increment.\n
mbed_official 324:406fd2029f23 768 * false: time counter is disabled, time seconds register and
mbed_official 324:406fd2029f23 769 * time prescaler register are writeable, but do not increment.
mbed_official 324:406fd2029f23 770 */
mbed_official 324:406fd2029f23 771 static inline bool RTC_HAL_IsCounterEnabled(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 772 {
mbed_official 324:406fd2029f23 773 return (bool)BR_RTC_SR_TCE(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 774 }
mbed_official 146:f64d43ff0c18 775
mbed_official 324:406fd2029f23 776 /*!
mbed_official 324:406fd2029f23 777 * @brief Changes the time counter status.
mbed_official 324:406fd2029f23 778 *
mbed_official 324:406fd2029f23 779 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 780 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 781 * true: enables the time counter\n
mbed_official 324:406fd2029f23 782 * false: disables the time counter.
mbed_official 146:f64d43ff0c18 783 */
mbed_official 324:406fd2029f23 784 static inline void RTC_HAL_EnableCounter(uint32_t rtcBaseAddr, bool enable)
mbed_official 146:f64d43ff0c18 785 {
mbed_official 324:406fd2029f23 786 BW_RTC_SR_TCE(rtcBaseAddr, enable);
mbed_official 146:f64d43ff0c18 787 }
mbed_official 146:f64d43ff0c18 788
mbed_official 324:406fd2029f23 789 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 324:406fd2029f23 790 /*!
mbed_official 324:406fd2029f23 791 * @brief Reads the value of the Monotonic Overflow Flag (MOF).
mbed_official 324:406fd2029f23 792 *
mbed_official 324:406fd2029f23 793 * This flag is set when the monotonic counter is enabled and the monotonic
mbed_official 324:406fd2029f23 794 * counter high overflows. The monotonic counter does not increment and
mbed_official 324:406fd2029f23 795 * reads as zero when this bit is set. This bit is cleared by writing the monotonic
mbed_official 324:406fd2029f23 796 * counter high register when the monotonic counter is disabled.
mbed_official 324:406fd2029f23 797 *
mbed_official 324:406fd2029f23 798 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 799 *
mbed_official 324:406fd2029f23 800 * @return true: monotonic counter overflow has occurred and monotonic
mbed_official 324:406fd2029f23 801 * counter is read as zero.\n
mbed_official 324:406fd2029f23 802 * false: No monotonic counter overflow has occurred.
mbed_official 146:f64d43ff0c18 803 */
mbed_official 324:406fd2029f23 804 static inline bool RTC_HAL_IsMonotonicCounterOverflow(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 805 {
mbed_official 324:406fd2029f23 806 return (bool)BR_RTC_SR_MOF(rtcBaseAddr);
mbed_official 324:406fd2029f23 807 }
mbed_official 324:406fd2029f23 808 #endif
mbed_official 324:406fd2029f23 809
mbed_official 324:406fd2029f23 810 /*!
mbed_official 324:406fd2029f23 811 * @brief Checks whether the configured time alarm has occurred.
mbed_official 324:406fd2029f23 812 *
mbed_official 324:406fd2029f23 813 * Reads time alarm flag (TAF). This flag is set when the time
mbed_official 324:406fd2029f23 814 * alarm register (TAR) equals the time seconds register (TSR) and
mbed_official 324:406fd2029f23 815 * the TSR increments. This flag is cleared by writing the TAR register.
mbed_official 324:406fd2029f23 816 *
mbed_official 324:406fd2029f23 817 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 818 *
mbed_official 324:406fd2029f23 819 * @return true: time alarm has occurred.\n
mbed_official 324:406fd2029f23 820 * false: no time alarm occurred.
mbed_official 324:406fd2029f23 821 */
mbed_official 324:406fd2029f23 822 static inline bool RTC_HAL_HasAlarmOccured(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 823 {
mbed_official 324:406fd2029f23 824 return (bool)BR_RTC_SR_TAF(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 825 }
mbed_official 146:f64d43ff0c18 826
mbed_official 324:406fd2029f23 827 /*!
mbed_official 324:406fd2029f23 828 * @brief Checks whether a counter overflow has occurred.
mbed_official 324:406fd2029f23 829 *
mbed_official 324:406fd2029f23 830 * Reads the value of RTC Status Register (RTC_SR), field Time
mbed_official 324:406fd2029f23 831 * Overflow Flag (TOF). This flag is set when the time counter is
mbed_official 324:406fd2029f23 832 * enabled and overflows. The TSR and TPR do not increment and read
mbed_official 324:406fd2029f23 833 * as zero when this bit is set. This flag is cleared by writing the
mbed_official 324:406fd2029f23 834 * TSR register when the time counter is disabled.
mbed_official 324:406fd2029f23 835 *
mbed_official 324:406fd2029f23 836 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 837 *
mbed_official 324:406fd2029f23 838 * @return true: time overflow occurred and time counter is zero.\n
mbed_official 324:406fd2029f23 839 * false: no time overflow occurred.
mbed_official 146:f64d43ff0c18 840 */
mbed_official 324:406fd2029f23 841 static inline bool RTC_HAL_HasCounterOverflowed(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 842 {
mbed_official 324:406fd2029f23 843 return (bool)BR_RTC_SR_TOF(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 844 }
mbed_official 146:f64d43ff0c18 845
mbed_official 324:406fd2029f23 846 /*!
mbed_official 324:406fd2029f23 847 * @brief Checks whether the time has been marked as invalid.
mbed_official 324:406fd2029f23 848 *
mbed_official 324:406fd2029f23 849 * Reads the value of RTC Status Register (RTC_SR), field Time
mbed_official 324:406fd2029f23 850 * Invalid Flag (TIF). This flag is set on VBAT POR or software
mbed_official 324:406fd2029f23 851 * reset. The TSR and TPR do not increment and read as zero when
mbed_official 324:406fd2029f23 852 * this bit is set. This flag is cleared by writing the TSR
mbed_official 324:406fd2029f23 853 * register when the time counter is disabled.
mbed_official 324:406fd2029f23 854 *
mbed_official 324:406fd2029f23 855 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 856 *
mbed_official 324:406fd2029f23 857 * @return true: time is INVALID and time counter is zero.\n
mbed_official 324:406fd2029f23 858 * false: time is valid.
mbed_official 146:f64d43ff0c18 859 */
mbed_official 324:406fd2029f23 860 static inline bool RTC_HAL_IsTimeInvalid(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 861 {
mbed_official 324:406fd2029f23 862 return (bool)BR_RTC_SR_TIF(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 863 }
mbed_official 146:f64d43ff0c18 864
mbed_official 146:f64d43ff0c18 865 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 866 /* RTC Lock*/
mbed_official 146:f64d43ff0c18 867 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 868
mbed_official 324:406fd2029f23 869 /*!
mbed_official 324:406fd2029f23 870 * @brief Configures the register lock to other module fields.
mbed_official 324:406fd2029f23 871 *
mbed_official 324:406fd2029f23 872 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 873 * @param bitfields [in] configuration flags:\n
mbed_official 146:f64d43ff0c18 874 * Valid bitfields:\n
mbed_official 146:f64d43ff0c18 875 * LRL: Lock Register Lock \n
mbed_official 146:f64d43ff0c18 876 * SRL: Status Register Lock \n
mbed_official 146:f64d43ff0c18 877 * CRL: Control Register Lock \n
mbed_official 146:f64d43ff0c18 878 * TCL: Time Compensation Lock \n
mbed_official 146:f64d43ff0c18 879 *
mbed_official 146:f64d43ff0c18 880 * For MCUs that have the Tamper Detect only: \n
mbed_official 146:f64d43ff0c18 881 * TIL: Tamper Interrupt Lock \n
mbed_official 146:f64d43ff0c18 882 * TTL: Tamper Trim Lock \n
mbed_official 146:f64d43ff0c18 883 * TDL: Tamper Detect Lock \n
mbed_official 146:f64d43ff0c18 884 * TEL: Tamper Enable Lock \n
mbed_official 146:f64d43ff0c18 885 * TTSL: Tamper Time Seconds Lock \n
mbed_official 146:f64d43ff0c18 886 *
mbed_official 146:f64d43ff0c18 887 * For MCUs that have the Monotonic Counter only: \n
mbed_official 146:f64d43ff0c18 888 * MCHL: Monotonic Counter High Lock \n
mbed_official 146:f64d43ff0c18 889 * MCLL: Monotonic Counter Low Lock \n
mbed_official 146:f64d43ff0c18 890 * MEL: Monotonic Enable Lock \n
mbed_official 146:f64d43ff0c18 891 */
mbed_official 324:406fd2029f23 892 static inline void RTC_HAL_SetLockRegistersCmd(uint32_t rtcBaseAddr, hw_rtc_lr_t bitfields)
mbed_official 146:f64d43ff0c18 893 {
mbed_official 324:406fd2029f23 894 uint32_t valid_flags = 0;
mbed_official 146:f64d43ff0c18 895
mbed_official 324:406fd2029f23 896 valid_flags |= (BM_RTC_LR_LRL | BM_RTC_LR_SRL | BM_RTC_LR_CRL |
mbed_official 324:406fd2029f23 897 BM_RTC_LR_TCL);
mbed_official 146:f64d43ff0c18 898
mbed_official 146:f64d43ff0c18 899 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 324:406fd2029f23 900 valid_flags |= (BM_RTC_LR_MCHL | BM_RTC_LR_MCLL | BM_RTC_LR_MEL);
mbed_official 146:f64d43ff0c18 901 #endif
mbed_official 324:406fd2029f23 902 HW_RTC_LR_WR(rtcBaseAddr, (bitfields.U) & valid_flags);
mbed_official 324:406fd2029f23 903 }
mbed_official 324:406fd2029f23 904
mbed_official 324:406fd2029f23 905 /*!
mbed_official 324:406fd2029f23 906 * @brief Obtains the lock status of the lock register.
mbed_official 324:406fd2029f23 907 *
mbed_official 324:406fd2029f23 908 * Reads the value of the field Lock Register Lock (LRL) of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 909 *
mbed_official 324:406fd2029f23 910 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 911 *
mbed_official 324:406fd2029f23 912 * @return true: lock register is not locked and writes complete as normal.\n
mbed_official 324:406fd2029f23 913 * false: lock register is locked and writes are ignored.
mbed_official 324:406fd2029f23 914 */
mbed_official 324:406fd2029f23 915 static inline bool RTC_HAL_GetLockRegLock(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 916 {
mbed_official 324:406fd2029f23 917 return (bool)BR_RTC_LR_LRL(rtcBaseAddr);
mbed_official 324:406fd2029f23 918 }
mbed_official 324:406fd2029f23 919
mbed_official 324:406fd2029f23 920 /*!
mbed_official 324:406fd2029f23 921 * @brief Changes the lock status of the lock register.
mbed_official 324:406fd2029f23 922 *
mbed_official 324:406fd2029f23 923 * Writes to the field Lock Register Lock (LRL) of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 924 * Once cleared, this can only be set by VBAT POR or software reset.
mbed_official 324:406fd2029f23 925 *
mbed_official 324:406fd2029f23 926 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 927 * @param lock can be true or false\n
mbed_official 324:406fd2029f23 928 * true: Lock register is not locked and writes complete as normal.\n
mbed_official 324:406fd2029f23 929 * false: Lock register is locked and writes are ignored.
mbed_official 324:406fd2029f23 930 */
mbed_official 324:406fd2029f23 931 static inline void RTC_HAL_SetLockRegLock(uint32_t rtcBaseAddr, bool lock)
mbed_official 324:406fd2029f23 932 {
mbed_official 324:406fd2029f23 933 BW_RTC_LR_LRL(rtcBaseAddr, (uint32_t) lock);
mbed_official 146:f64d43ff0c18 934 }
mbed_official 146:f64d43ff0c18 935
mbed_official 324:406fd2029f23 936 /*!
mbed_official 324:406fd2029f23 937 * @brief Obtains the state of the status register lock.
mbed_official 324:406fd2029f23 938 *
mbed_official 324:406fd2029f23 939 * Reads the value of field Status Register Lock (SRL) of the RTC Lock Register (RTC_LR), which is the field Status Register.
mbed_official 324:406fd2029f23 940 *
mbed_official 324:406fd2029f23 941 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 942 *
mbed_official 324:406fd2029f23 943 * @return true: Status register is not locked and writes complete as
mbed_official 324:406fd2029f23 944 * normal.\n
mbed_official 324:406fd2029f23 945 * false: Status register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 946 */
mbed_official 324:406fd2029f23 947 static inline bool RTC_HAL_GetStatusRegLock(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 948 {
mbed_official 324:406fd2029f23 949 return (bool)BR_RTC_LR_SRL(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 950 }
mbed_official 146:f64d43ff0c18 951
mbed_official 324:406fd2029f23 952 /*!
mbed_official 324:406fd2029f23 953 * @brief Changes the state of the status register lock.
mbed_official 324:406fd2029f23 954 *
mbed_official 324:406fd2029f23 955 * Writes to the field Status Register Lock (SRL) of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 956 * Once cleared, this can only be set by VBAT POR or software reset.
mbed_official 324:406fd2029f23 957 *
mbed_official 324:406fd2029f23 958 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 959 * @param lock can be true or false\n
mbed_official 324:406fd2029f23 960 * true: Status register is not locked and writes complete as
mbed_official 324:406fd2029f23 961 * normal.\n
mbed_official 324:406fd2029f23 962 * false: Status register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 963 */
mbed_official 324:406fd2029f23 964 static inline void RTC_HAL_SetStatusRegLock(uint32_t rtcBaseAddr, bool lock)
mbed_official 146:f64d43ff0c18 965 {
mbed_official 324:406fd2029f23 966 BW_RTC_LR_SRL(rtcBaseAddr, (uint32_t) lock);
mbed_official 146:f64d43ff0c18 967 }
mbed_official 146:f64d43ff0c18 968
mbed_official 324:406fd2029f23 969 /*!
mbed_official 324:406fd2029f23 970 * @brief Obtains the state of the control register lock.
mbed_official 324:406fd2029f23 971 *
mbed_official 324:406fd2029f23 972 * Reads the field Control Register Lock (CRL)value of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 973 *
mbed_official 324:406fd2029f23 974 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 975 *
mbed_official 324:406fd2029f23 976 * @return true: Control register is not locked and writes complete as
mbed_official 324:406fd2029f23 977 * normal.\n
mbed_official 324:406fd2029f23 978 * false: Control register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 979 */
mbed_official 324:406fd2029f23 980 static inline bool RTC_HAL_GetControlRegLock(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 981 {
mbed_official 324:406fd2029f23 982 return (bool)BR_RTC_LR_CRL(rtcBaseAddr);
mbed_official 324:406fd2029f23 983 }
mbed_official 324:406fd2029f23 984
mbed_official 324:406fd2029f23 985 /*!
mbed_official 324:406fd2029f23 986 * @brief Changes the state of the control register lock.
mbed_official 324:406fd2029f23 987 *
mbed_official 324:406fd2029f23 988 * Writes to the field Control Register Lock (CRL) of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 989 * Once cleared, this can only be set by VBAT POR or software reset.
mbed_official 324:406fd2029f23 990 *
mbed_official 324:406fd2029f23 991 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 992 * @param lock can be true or false\n
mbed_official 324:406fd2029f23 993 * true: Control register is not locked and writes complete
mbed_official 324:406fd2029f23 994 * as normal.\n
mbed_official 324:406fd2029f23 995 * false: Control register is locked and writes are ignored.
mbed_official 324:406fd2029f23 996 */
mbed_official 324:406fd2029f23 997 static inline void RTC_HAL_SetControlRegLock(uint32_t rtcBaseAddr, bool lock)
mbed_official 324:406fd2029f23 998 {
mbed_official 324:406fd2029f23 999 BW_RTC_LR_CRL(rtcBaseAddr, (uint32_t) lock);
mbed_official 146:f64d43ff0c18 1000 }
mbed_official 146:f64d43ff0c18 1001
mbed_official 324:406fd2029f23 1002 /*!
mbed_official 324:406fd2029f23 1003 * @brief Obtains the state of the time compensation lock.
mbed_official 324:406fd2029f23 1004 *
mbed_official 324:406fd2029f23 1005 * Reads the field Time Compensation Lock (TCL) value of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 1006 *
mbed_official 324:406fd2029f23 1007 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1008 *
mbed_official 324:406fd2029f23 1009 * @return true: Time compensation register is not locked and writes
mbed_official 324:406fd2029f23 1010 * complete as normal.\n
mbed_official 324:406fd2029f23 1011 * false: Time compensation register is locked and writes are
mbed_official 324:406fd2029f23 1012 * ignored.
mbed_official 146:f64d43ff0c18 1013 */
mbed_official 324:406fd2029f23 1014 static inline bool RTC_HAL_GetTimeCompLock(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1015 {
mbed_official 324:406fd2029f23 1016 return (bool)BR_RTC_LR_TCL(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 1017 }
mbed_official 146:f64d43ff0c18 1018
mbed_official 324:406fd2029f23 1019 /*!
mbed_official 324:406fd2029f23 1020 * @brief Changes the state of the time compensation lock.
mbed_official 324:406fd2029f23 1021 *
mbed_official 324:406fd2029f23 1022 * Writes to the field Time Compensation Lock (TCL) of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 1023 * Once cleared, this can only be set by VBAT POR or software reset.
mbed_official 324:406fd2029f23 1024 *
mbed_official 324:406fd2029f23 1025 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1026 * @param lock can be true or false\n
mbed_official 324:406fd2029f23 1027 * true: Time compensation register is not locked and writes
mbed_official 324:406fd2029f23 1028 * complete as normal.\n
mbed_official 324:406fd2029f23 1029 * false: Time compensation register is locked and writes are
mbed_official 324:406fd2029f23 1030 * ignored.
mbed_official 146:f64d43ff0c18 1031 */
mbed_official 324:406fd2029f23 1032 static inline void RTC_HAL_SetTimeCompLock(uint32_t rtcBaseAddr, bool lock)
mbed_official 146:f64d43ff0c18 1033 {
mbed_official 324:406fd2029f23 1034 BW_RTC_LR_TCL(rtcBaseAddr, (uint32_t) lock);
mbed_official 324:406fd2029f23 1035 }
mbed_official 324:406fd2029f23 1036
mbed_official 324:406fd2029f23 1037 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 324:406fd2029f23 1038 /*!
mbed_official 324:406fd2029f23 1039 * @brief Reads the value of the Monotonic Counter High Lock.
mbed_official 324:406fd2029f23 1040 *
mbed_official 324:406fd2029f23 1041 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1042 *
mbed_official 324:406fd2029f23 1043 * @return true: Monotonic counter high register is not locked and writes
mbed_official 324:406fd2029f23 1044 * complete as normal.\n
mbed_official 324:406fd2029f23 1045 * false: Monotonic counter high register is locked and writes are
mbed_official 324:406fd2029f23 1046 * ignored.
mbed_official 324:406fd2029f23 1047 */
mbed_official 324:406fd2029f23 1048 static inline bool RTC_HAL_ReadMonotonicHcounterLock(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1049 {
mbed_official 324:406fd2029f23 1050 return (bool)BR_RTC_LR_MCHL(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 1051 }
mbed_official 146:f64d43ff0c18 1052
mbed_official 324:406fd2029f23 1053 /*!
mbed_official 324:406fd2029f23 1054 * @brief Writes 0 to the field Monotonic Counter High Lock (MCHL) of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 1055 *
mbed_official 324:406fd2029f23 1056 * Once done, this flag can only be set by VBAT POR or software reset.
mbed_official 324:406fd2029f23 1057 *
mbed_official 324:406fd2029f23 1058 * @param rtcBaseAddr The RTC base address
mbed_official 146:f64d43ff0c18 1059 */
mbed_official 324:406fd2029f23 1060 static inline void RTC_HAL_ClearMonotonicHcounterLock(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1061 {
mbed_official 324:406fd2029f23 1062 BW_RTC_LR_MCHL(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1063 }
mbed_official 324:406fd2029f23 1064
mbed_official 324:406fd2029f23 1065 /*!
mbed_official 324:406fd2029f23 1066 * @brief Reads the value of the Monotonic Counter Low Lock.
mbed_official 324:406fd2029f23 1067 *
mbed_official 324:406fd2029f23 1068 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1069 *
mbed_official 324:406fd2029f23 1070 * @return true: Monotonic counter low register is not locked and writes
mbed_official 324:406fd2029f23 1071 * complete as normal.\n
mbed_official 324:406fd2029f23 1072 * false: Monotonic counter low register is locked and writes are
mbed_official 324:406fd2029f23 1073 * ignored.
mbed_official 324:406fd2029f23 1074 */
mbed_official 324:406fd2029f23 1075 static inline bool RTC_HAL_ReadMonotonicLcounterLock(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1076 {
mbed_official 324:406fd2029f23 1077 return (bool)BR_RTC_LR_MCLL(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 1078 }
mbed_official 146:f64d43ff0c18 1079
mbed_official 324:406fd2029f23 1080 /*!
mbed_official 324:406fd2029f23 1081 * @brief Writes 0 to the field Monotonic Counter Low Lock (MCLL) of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 1082 *
mbed_official 324:406fd2029f23 1083 * Once done, this flag can only be set by VBAT POR or software reset.
mbed_official 324:406fd2029f23 1084 *
mbed_official 324:406fd2029f23 1085 * @param rtcBaseAddr The RTC base address
mbed_official 146:f64d43ff0c18 1086 */
mbed_official 324:406fd2029f23 1087 static inline void RTC_HAL_ClearMonotonicLcounterLock(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1088 {
mbed_official 324:406fd2029f23 1089 BW_RTC_LR_MCLL(rtcBaseAddr, 0U);
mbed_official 146:f64d43ff0c18 1090 }
mbed_official 146:f64d43ff0c18 1091
mbed_official 324:406fd2029f23 1092 /*!
mbed_official 324:406fd2029f23 1093 * @brief Reads the value of the Monotonic Enable Lock.
mbed_official 324:406fd2029f23 1094 *
mbed_official 324:406fd2029f23 1095 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1096 *
mbed_official 324:406fd2029f23 1097 * @return true: Monotonic enable register is not locked and writes
mbed_official 324:406fd2029f23 1098 * complete as normal.\n
mbed_official 324:406fd2029f23 1099 * false: Monotonic enable register is locked and writes are
mbed_official 324:406fd2029f23 1100 * ignored.
mbed_official 146:f64d43ff0c18 1101 */
mbed_official 324:406fd2029f23 1102 static inline bool RTC_HAL_ReadMonotonicEnableLock(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1103 {
mbed_official 324:406fd2029f23 1104 return (bool)BR_RTC_LR_MEL(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 1105 }
mbed_official 146:f64d43ff0c18 1106
mbed_official 324:406fd2029f23 1107 /*!
mbed_official 324:406fd2029f23 1108 * @brief Writes 0 to the Monotonic Enable Lock field of the RTC Lock Register (RTC_LR).
mbed_official 324:406fd2029f23 1109 *
mbed_official 324:406fd2029f23 1110 * Once done, this flag can only be set by VBAT POR or software reset.
mbed_official 324:406fd2029f23 1111 *
mbed_official 324:406fd2029f23 1112 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1113 */
mbed_official 324:406fd2029f23 1114 static inline void RTC_HAL_ClearMonotonicEnableLock(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1115 {
mbed_official 324:406fd2029f23 1116 BW_RTC_LR_MEL(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1117 }
mbed_official 324:406fd2029f23 1118 #endif
mbed_official 324:406fd2029f23 1119
mbed_official 146:f64d43ff0c18 1120 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 1121 /* RTC Interrupt Enable*/
mbed_official 146:f64d43ff0c18 1122 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 1123
mbed_official 324:406fd2029f23 1124 /*!
mbed_official 324:406fd2029f23 1125 * @brief Checks whether the Time Seconds Interrupt is enabled/disabled.
mbed_official 324:406fd2029f23 1126 *
mbed_official 324:406fd2029f23 1127 * Reads the value of field Time Seconds Interrupt Enable (TSIE)of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1128 * The seconds interrupt is an edge-sensitive
mbed_official 324:406fd2029f23 1129 * interrupt with a dedicated interrupt vector. It is generated once a second
mbed_official 324:406fd2029f23 1130 * and requires no software overhead (there is no corresponding status flag to
mbed_official 324:406fd2029f23 1131 * clear).
mbed_official 324:406fd2029f23 1132 *
mbed_official 324:406fd2029f23 1133 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1134 *
mbed_official 324:406fd2029f23 1135 * @return true: Seconds interrupt is enabled.\n
mbed_official 324:406fd2029f23 1136 * false: Seconds interrupt is disabled.
mbed_official 324:406fd2029f23 1137 */
mbed_official 324:406fd2029f23 1138 static inline bool RTC_HAL_IsSecsIntEnabled(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1139 {
mbed_official 324:406fd2029f23 1140 return (bool)BR_RTC_IER_TSIE(rtcBaseAddr);
mbed_official 324:406fd2029f23 1141 }
mbed_official 324:406fd2029f23 1142
mbed_official 324:406fd2029f23 1143 /*!
mbed_official 324:406fd2029f23 1144 * @brief Enables/disables the Time Seconds Interrupt.
mbed_official 324:406fd2029f23 1145 *
mbed_official 324:406fd2029f23 1146 * Writes to the field Time Seconds
mbed_official 324:406fd2029f23 1147 * Interrupt Enable (TSIE) of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1148 * Note: The seconds interrupt is an edge-sensitive interrupt with a
mbed_official 324:406fd2029f23 1149 * dedicated interrupt vector. It is generated once a second and
mbed_official 324:406fd2029f23 1150 * requires no software overhead (there is no corresponding status
mbed_official 324:406fd2029f23 1151 * flag to clear).
mbed_official 324:406fd2029f23 1152 *
mbed_official 324:406fd2029f23 1153 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1154 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 1155 * true: Seconds interrupt is enabled.\n
mbed_official 324:406fd2029f23 1156 * false: Seconds interrupt is disabled.
mbed_official 146:f64d43ff0c18 1157 */
mbed_official 324:406fd2029f23 1158 static inline void RTC_HAL_SetSecsIntCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 146:f64d43ff0c18 1159 {
mbed_official 324:406fd2029f23 1160 BW_RTC_IER_TSIE(rtcBaseAddr, (uint32_t) enable);
mbed_official 324:406fd2029f23 1161 }
mbed_official 324:406fd2029f23 1162
mbed_official 324:406fd2029f23 1163 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 146:f64d43ff0c18 1164
mbed_official 324:406fd2029f23 1165 /*!
mbed_official 324:406fd2029f23 1166 * @brief Checks whether the Monotonic Overflow Interrupt is enabled/disabled.
mbed_official 324:406fd2029f23 1167 *
mbed_official 324:406fd2029f23 1168 * Reads the value of the RTC Interrupt Enable Register (RTC_IER), field
mbed_official 324:406fd2029f23 1169 * Monotonic Overflow Interrupt Enable (MOIE).
mbed_official 324:406fd2029f23 1170 *
mbed_official 324:406fd2029f23 1171 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1172 *
mbed_official 324:406fd2029f23 1173 * @return true: Monotonic overflow flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1174 * false: Monotonic overflow flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1175 */
mbed_official 324:406fd2029f23 1176 static inline bool RTC_HAL_ReadMonotonicOverflowInt(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1177 {
mbed_official 324:406fd2029f23 1178 return (bool)BR_RTC_IER_MOIE(rtcBaseAddr);
mbed_official 324:406fd2029f23 1179 }
mbed_official 324:406fd2029f23 1180
mbed_official 324:406fd2029f23 1181 /*!
mbed_official 324:406fd2029f23 1182 * @brief Enables/disables the Monotonic Overflow Interrupt Enable.
mbed_official 324:406fd2029f23 1183 *
mbed_official 324:406fd2029f23 1184 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1185 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 1186 * true: Monotonic overflow flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1187 * false: Monotonic overflow flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1188 */
mbed_official 324:406fd2029f23 1189 static inline void RTC_HAL_SetMonotonicOverflowIntCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 1190 {
mbed_official 324:406fd2029f23 1191 BW_RTC_IER_MOIE(rtcBaseAddr, (uint32_t)enable);
mbed_official 324:406fd2029f23 1192 }
mbed_official 324:406fd2029f23 1193
mbed_official 146:f64d43ff0c18 1194 #endif
mbed_official 146:f64d43ff0c18 1195
mbed_official 324:406fd2029f23 1196 /*!
mbed_official 324:406fd2029f23 1197 * @brief Checks whether the Time Alarm Interrupt is enabled/disabled.
mbed_official 324:406fd2029f23 1198 *
mbed_official 324:406fd2029f23 1199 * Reads the field Time Alarm Interrupt Enable (TAIE) value of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1200 *
mbed_official 324:406fd2029f23 1201 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1202 *
mbed_official 324:406fd2029f23 1203 * @return true: Time alarm flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1204 * false: Time alarm flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1205 */
mbed_official 324:406fd2029f23 1206 static inline bool RTC_HAL_ReadAlarmInt(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1207 {
mbed_official 324:406fd2029f23 1208 return (bool)BR_RTC_IER_TAIE(rtcBaseAddr);
mbed_official 324:406fd2029f23 1209 }
mbed_official 324:406fd2029f23 1210
mbed_official 324:406fd2029f23 1211 /*!
mbed_official 324:406fd2029f23 1212 * @brief Enables/disables the Time Alarm Interrupt.
mbed_official 324:406fd2029f23 1213 *
mbed_official 324:406fd2029f23 1214 * Writes to the field Time Alarm
mbed_official 324:406fd2029f23 1215 * Interrupt Enable (TAIE) of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1216 *
mbed_official 324:406fd2029f23 1217 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1218 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 1219 * true: Time alarm flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1220 * false: Time alarm flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1221 */
mbed_official 324:406fd2029f23 1222 static inline void RTC_HAL_SetAlarmIntCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 1223 {
mbed_official 324:406fd2029f23 1224 BW_RTC_IER_TAIE(rtcBaseAddr, (uint32_t) enable);
mbed_official 324:406fd2029f23 1225 }
mbed_official 324:406fd2029f23 1226
mbed_official 324:406fd2029f23 1227 /*!
mbed_official 324:406fd2029f23 1228 * @brief Checks whether the Time Overflow Interrupt is enabled/disabled.
mbed_official 324:406fd2029f23 1229 *
mbed_official 324:406fd2029f23 1230 * Reads the field
mbed_official 324:406fd2029f23 1231 * Time Overflow Interrupt Enable (TOIE) of the value of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1232 *
mbed_official 324:406fd2029f23 1233 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 1234 *
mbed_official 324:406fd2029f23 1235 * @return true: Time overflow flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1236 * false: Time overflow flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1237 */
mbed_official 324:406fd2029f23 1238 static inline bool RTC_HAL_ReadTimeOverflowInt(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1239 {
mbed_official 324:406fd2029f23 1240 return (bool)BR_RTC_IER_TOIE(rtcBaseAddr);
mbed_official 324:406fd2029f23 1241 }
mbed_official 324:406fd2029f23 1242
mbed_official 324:406fd2029f23 1243 /*!
mbed_official 324:406fd2029f23 1244 * @brief Enables/disables the Time Overflow Interrupt.
mbed_official 324:406fd2029f23 1245 *
mbed_official 324:406fd2029f23 1246 * Writes to the field Time Overflow Interrupt Enable (TOIE) of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1247 *
mbed_official 324:406fd2029f23 1248 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1249 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 1250 * true: Time overflow flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1251 * false: Time overflow flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1252 */
mbed_official 324:406fd2029f23 1253 static inline void RTC_HAL_SetTimeOverflowIntCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 1254 {
mbed_official 324:406fd2029f23 1255 BW_RTC_IER_TOIE(rtcBaseAddr, (uint32_t) enable);
mbed_official 324:406fd2029f23 1256 }
mbed_official 324:406fd2029f23 1257
mbed_official 324:406fd2029f23 1258 /*!
mbed_official 324:406fd2029f23 1259 * @brief Checks whether the Time Invalid Interrupt is enabled/disabled.
mbed_official 324:406fd2029f23 1260 *
mbed_official 324:406fd2029f23 1261 * Reads the value of the field Time
mbed_official 324:406fd2029f23 1262 * Invalid Interrupt Enable (TIIE)of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1263 *
mbed_official 324:406fd2029f23 1264 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1265 *
mbed_official 324:406fd2029f23 1266 * @return true: Time invalid flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1267 * false: Time invalid flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1268 */
mbed_official 324:406fd2029f23 1269 static inline bool RTC_HAL_ReadTimeInvalidInt(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1270 {
mbed_official 324:406fd2029f23 1271 return (bool)BR_RTC_IER_TIIE(rtcBaseAddr);
mbed_official 324:406fd2029f23 1272 }
mbed_official 324:406fd2029f23 1273
mbed_official 324:406fd2029f23 1274 /*!
mbed_official 324:406fd2029f23 1275 * @brief Enables/disables the Time Invalid Interrupt.
mbed_official 324:406fd2029f23 1276 *
mbed_official 324:406fd2029f23 1277 * Writes to the field Time Invalid
mbed_official 324:406fd2029f23 1278 * Interrupt Enable (TIIE) of the RTC Interrupt Enable Register (RTC_IER).
mbed_official 324:406fd2029f23 1279 *
mbed_official 324:406fd2029f23 1280 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1281 * @param enable can be true or false\n
mbed_official 324:406fd2029f23 1282 * true: Time invalid flag does generate an interrupt.\n
mbed_official 324:406fd2029f23 1283 * false: Time invalid flag does not generate an interrupt.
mbed_official 324:406fd2029f23 1284 */
mbed_official 324:406fd2029f23 1285 static inline void RTC_HAL_SetTimeInvalidIntCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 1286 {
mbed_official 324:406fd2029f23 1287 BW_RTC_IER_TIIE(rtcBaseAddr, (uint32_t) enable);
mbed_official 324:406fd2029f23 1288 }
mbed_official 324:406fd2029f23 1289
mbed_official 324:406fd2029f23 1290 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 324:406fd2029f23 1291
mbed_official 324:406fd2029f23 1292 /*-------------------------------------------------------------------------------------------*/
mbed_official 324:406fd2029f23 1293 /* RTC Monotonic Enable*/
mbed_official 324:406fd2029f23 1294 /*-------------------------------------------------------------------------------------------*/
mbed_official 324:406fd2029f23 1295
mbed_official 324:406fd2029f23 1296 /*!
mbed_official 324:406fd2029f23 1297 * @brief Reads the Monotonic Counter Enable bit.
mbed_official 324:406fd2029f23 1298 *
mbed_official 324:406fd2029f23 1299 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1300 *
mbed_official 324:406fd2029f23 1301 * @return true: This means writing to the monotonic counter increments the counter by one and
mbed_official 324:406fd2029f23 1302 * the value written is ignored.\n
mbed_official 324:406fd2029f23 1303 * false: This means writing to the monotonic counter loads the counter with the
mbed_official 324:406fd2029f23 1304 * value written.
mbed_official 324:406fd2029f23 1305 */
mbed_official 324:406fd2029f23 1306 static inline bool RTC_HAL_ReadMonotonicEnable(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1307 {
mbed_official 324:406fd2029f23 1308 /* Reads value of the RTC_MER register, field Monotonic Counter Enable (MCE). */
mbed_official 324:406fd2029f23 1309 return (bool)BR_RTC_MER_MCE(rtcBaseAddr);
mbed_official 324:406fd2029f23 1310 }
mbed_official 324:406fd2029f23 1311
mbed_official 324:406fd2029f23 1312 /*!
mbed_official 324:406fd2029f23 1313 * @brief Changes the state of Monotonic Counter Enable bit.
mbed_official 324:406fd2029f23 1314 *
mbed_official 324:406fd2029f23 1315 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1316 * @param enable value to be written to the MER[MCE] bit\n
mbed_official 324:406fd2029f23 1317 * true: Set the bit to 1 which means writing to the monotonic counter will increment
mbed_official 324:406fd2029f23 1318 * the counter by one and the value written will be ignored.\n
mbed_official 324:406fd2029f23 1319 * false: Set the bit to 0 which means writing to the monotonic counter loads the counter
mbed_official 324:406fd2029f23 1320 * with the value written.
mbed_official 324:406fd2029f23 1321 */
mbed_official 324:406fd2029f23 1322 static inline void RTC_HAL_SetMonotonicEnableCmd(uint32_t rtcBaseAddr, bool enable)
mbed_official 324:406fd2029f23 1323 {
mbed_official 324:406fd2029f23 1324 /* Writes to the RTC_MER registers Monotonic Counter Enable (MCE) bit.*/
mbed_official 324:406fd2029f23 1325 BW_RTC_MER_MCE(rtcBaseAddr, (uint32_t) enable);
mbed_official 146:f64d43ff0c18 1326 }
mbed_official 146:f64d43ff0c18 1327
mbed_official 324:406fd2029f23 1328 /*!
mbed_official 324:406fd2029f23 1329 * @brief Reads the values of the Monotonic Counter Low register.
mbed_official 324:406fd2029f23 1330 *
mbed_official 324:406fd2029f23 1331 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1332 *
mbed_official 324:406fd2029f23 1333 * @return Monotonic Counter Low value.
mbed_official 324:406fd2029f23 1334 */
mbed_official 324:406fd2029f23 1335 static inline uint32_t RTC_HAL_GetMonotonicCounterLow(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1336 {
mbed_official 324:406fd2029f23 1337 return BR_RTC_MCLR_MCL(rtcBaseAddr);
mbed_official 324:406fd2029f23 1338 }
mbed_official 324:406fd2029f23 1339
mbed_official 324:406fd2029f23 1340 /*!
mbed_official 324:406fd2029f23 1341 * @brief Reads the values of the Monotonic Counter High register.
mbed_official 324:406fd2029f23 1342 *
mbed_official 324:406fd2029f23 1343 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1344 *
mbed_official 324:406fd2029f23 1345 * @return Monotonic Counter High value.
mbed_official 146:f64d43ff0c18 1346 */
mbed_official 324:406fd2029f23 1347 static inline uint32_t RTC_HAL_GetMonotonicCounterHigh(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1348 {
mbed_official 324:406fd2029f23 1349 return BR_RTC_MCHR_MCH(rtcBaseAddr);
mbed_official 324:406fd2029f23 1350 }
mbed_official 324:406fd2029f23 1351
mbed_official 324:406fd2029f23 1352 /*!
mbed_official 324:406fd2029f23 1353 * @brief Writes values of the Monotonic Counter Low register.
mbed_official 324:406fd2029f23 1354 *
mbed_official 324:406fd2029f23 1355 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1356 * @param counter [in] Monotonic Counter Low value to be stored.
mbed_official 324:406fd2029f23 1357 */
mbed_official 324:406fd2029f23 1358 static inline void RTC_HAL_SetMonotonicCounterLow(uint32_t rtcBaseAddr, const uint32_t counter)
mbed_official 324:406fd2029f23 1359 {
mbed_official 324:406fd2029f23 1360 /* enable writing to the counter*/
mbed_official 324:406fd2029f23 1361 BW_RTC_MER_MCE(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1362 BW_RTC_MCLR_MCL(rtcBaseAddr, counter);
mbed_official 324:406fd2029f23 1363 }
mbed_official 324:406fd2029f23 1364
mbed_official 324:406fd2029f23 1365 /*!
mbed_official 324:406fd2029f23 1366 * @brief Writes values of the Monotonic Counter High register.
mbed_official 324:406fd2029f23 1367 *
mbed_official 324:406fd2029f23 1368 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1369 * @param counter [in] Monotonic Counter High value to be stored.
mbed_official 324:406fd2029f23 1370 */
mbed_official 324:406fd2029f23 1371 static inline void RTC_HAL_SetMonotonicCounterHigh(uint32_t rtcBaseAddr, const uint32_t counter)
mbed_official 146:f64d43ff0c18 1372 {
mbed_official 324:406fd2029f23 1373 /* enable writing to the counter*/
mbed_official 324:406fd2029f23 1374 BW_RTC_MER_MCE(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1375 BW_RTC_MCHR_MCH(rtcBaseAddr, counter);
mbed_official 324:406fd2029f23 1376 }
mbed_official 324:406fd2029f23 1377
mbed_official 324:406fd2029f23 1378 #endif /* FSL_FEATURE_RTC_HAS_MONOTONIC */
mbed_official 324:406fd2029f23 1379
mbed_official 324:406fd2029f23 1380 #if FSL_FEATURE_RTC_HAS_ACCESS_CONTROL
mbed_official 324:406fd2029f23 1381
mbed_official 324:406fd2029f23 1382 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 324:406fd2029f23 1383 /*!
mbed_official 324:406fd2029f23 1384 * @brief Reads the field Monotonic Counter High Write (MCHW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1385 *
mbed_official 324:406fd2029f23 1386 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1387 *
mbed_official 324:406fd2029f23 1388 * @return true: Writes to the monotonic counter high register will complete as normal.\n
mbed_official 324:406fd2029f23 1389 * false: Writes to the monotonic counter high register are ignored.
mbed_official 324:406fd2029f23 1390 */
mbed_official 324:406fd2029f23 1391 static inline bool RTC_HAL_GetMonotonicHcountWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1392 {
mbed_official 324:406fd2029f23 1393 return (bool)BR_RTC_WAR_MCHW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1394 }
mbed_official 324:406fd2029f23 1395
mbed_official 324:406fd2029f23 1396 /*!
mbed_official 324:406fd2029f23 1397 * @brief Writes 0 to the field Monotonic Counter High Write (MCHW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1398 *
mbed_official 324:406fd2029f23 1399 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1400 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1401 *
mbed_official 324:406fd2029f23 1402 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1403 */
mbed_official 324:406fd2029f23 1404 static inline void RTC_HAL_ClearMonotonicHcountWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1405 {
mbed_official 324:406fd2029f23 1406 BW_RTC_WAR_MCHW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1407 }
mbed_official 324:406fd2029f23 1408
mbed_official 324:406fd2029f23 1409 /*!
mbed_official 324:406fd2029f23 1410 * @brief Reads the field Monotonic Counter Low Write (MCLW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1411 *
mbed_official 324:406fd2029f23 1412 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1413 *
mbed_official 324:406fd2029f23 1414 * @return true: Writes to the monotonic counter low register will complete as normal.\n
mbed_official 324:406fd2029f23 1415 * false: Writes to the monotonic counter low register are ignored.
mbed_official 324:406fd2029f23 1416 */
mbed_official 324:406fd2029f23 1417 static inline bool RTC_HAL_GetMonotonicLcountWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1418 {
mbed_official 324:406fd2029f23 1419 return (bool)BR_RTC_WAR_MCLW(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 1420 }
mbed_official 146:f64d43ff0c18 1421
mbed_official 324:406fd2029f23 1422 /*!
mbed_official 324:406fd2029f23 1423 * @brief Writes 0 to the field Monotonic Counter High Write (MCLW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1424 *
mbed_official 324:406fd2029f23 1425 * Once cleared, this bit is only set by the system reset. It is not affected by
mbed_official 324:406fd2029f23 1426 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1427 *
mbed_official 324:406fd2029f23 1428 * @param rtcBaseAddr The RTC base address..
mbed_official 324:406fd2029f23 1429 */
mbed_official 324:406fd2029f23 1430 static inline void RTC_HAL_ClearMonotonicLcountWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1431 {
mbed_official 324:406fd2029f23 1432 BW_RTC_WAR_MCLW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1433 }
mbed_official 324:406fd2029f23 1434
mbed_official 324:406fd2029f23 1435 /*!
mbed_official 324:406fd2029f23 1436 * @brief Reads the field Monotonic Enable Register Write (MERW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1437 *
mbed_official 324:406fd2029f23 1438 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1439 *
mbed_official 324:406fd2029f23 1440 * @return true: Writes to the monotonic enable register will complete as normal.\n
mbed_official 324:406fd2029f23 1441 * false: Writes to the monotonic enable register are ignored.
mbed_official 324:406fd2029f23 1442 */
mbed_official 324:406fd2029f23 1443 static inline bool RTC_HAL_GetMonotonicEnableWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1444 {
mbed_official 324:406fd2029f23 1445 return (bool)BR_RTC_WAR_MERW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1446 }
mbed_official 324:406fd2029f23 1447
mbed_official 324:406fd2029f23 1448 /*!
mbed_official 324:406fd2029f23 1449 * @brief Writes 0 to the field Monotonic Counter High Write (MERW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1450 *
mbed_official 324:406fd2029f23 1451 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1452 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1453 *
mbed_official 324:406fd2029f23 1454 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1455 */
mbed_official 324:406fd2029f23 1456 static inline void RTC_HAL_ClearMonotonicEnableWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1457 {
mbed_official 324:406fd2029f23 1458 BW_RTC_WAR_MERW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1459 }
mbed_official 324:406fd2029f23 1460 #endif
mbed_official 324:406fd2029f23 1461
mbed_official 324:406fd2029f23 1462 /*!
mbed_official 324:406fd2029f23 1463 * @brief Reads the field Interrupt Enable Register Write (IERW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1464 *
mbed_official 324:406fd2029f23 1465 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1466 *
mbed_official 324:406fd2029f23 1467 * @return true: Writes to the interrupt enable register will complete as normal.\n
mbed_official 324:406fd2029f23 1468 * false: Writes to the interrupt enable register are ignored.
mbed_official 146:f64d43ff0c18 1469 */
mbed_official 324:406fd2029f23 1470 static inline bool RTC_HAL_GetIntEnableWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1471 {
mbed_official 324:406fd2029f23 1472 return (bool)BR_RTC_WAR_IERW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1473 }
mbed_official 324:406fd2029f23 1474
mbed_official 324:406fd2029f23 1475 /*!
mbed_official 324:406fd2029f23 1476 * @brief Writes 0 to the field Interrupt Enable Register Write (IERW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1477 *
mbed_official 324:406fd2029f23 1478 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1479 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1480 *
mbed_official 324:406fd2029f23 1481 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1482 */
mbed_official 324:406fd2029f23 1483 static inline void RTC_HAL_ClearIntEnableWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1484 {
mbed_official 324:406fd2029f23 1485 BW_RTC_WAR_IERW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1486 }
mbed_official 324:406fd2029f23 1487
mbed_official 324:406fd2029f23 1488 /*!
mbed_official 324:406fd2029f23 1489 * @brief Reads the field Lock Register Write (LRW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1490 *
mbed_official 324:406fd2029f23 1491 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1492 *
mbed_official 324:406fd2029f23 1493 * @return true: Writes to the lock register will complete as normal.\n
mbed_official 324:406fd2029f23 1494 * false: Writes to the lock register are ignored.
mbed_official 324:406fd2029f23 1495 */
mbed_official 324:406fd2029f23 1496 static inline bool RTC_HAL_GetLockWreg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1497 {
mbed_official 324:406fd2029f23 1498 return (bool)BR_RTC_WAR_LRW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1499 }
mbed_official 324:406fd2029f23 1500
mbed_official 324:406fd2029f23 1501 /*!
mbed_official 324:406fd2029f23 1502 * @brief Writes 0 to the field Lock Register Write (LRW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1503 *
mbed_official 324:406fd2029f23 1504 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1505 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1506 *
mbed_official 324:406fd2029f23 1507 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1508 */
mbed_official 324:406fd2029f23 1509 static inline void RTC_HAL_ClearLockWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1510 {
mbed_official 324:406fd2029f23 1511 BW_RTC_WAR_LRW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1512 }
mbed_official 324:406fd2029f23 1513
mbed_official 324:406fd2029f23 1514 /*!
mbed_official 324:406fd2029f23 1515 * @brief Reads the field Status Register Write (SRW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1516 *
mbed_official 324:406fd2029f23 1517 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1518 *
mbed_official 324:406fd2029f23 1519 * @return true: Writes to the status register completes as normal.\n
mbed_official 324:406fd2029f23 1520 * false: Writes to the status register are ignored.
mbed_official 324:406fd2029f23 1521 */
mbed_official 324:406fd2029f23 1522 static inline bool RTC_HAL_GetStatusWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1523 {
mbed_official 324:406fd2029f23 1524 return (bool)BR_RTC_WAR_SRW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1525 }
mbed_official 324:406fd2029f23 1526
mbed_official 324:406fd2029f23 1527 /*!
mbed_official 324:406fd2029f23 1528 * @brief Writes 0 to the field Status Register Write (SRW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1529 *
mbed_official 324:406fd2029f23 1530 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1531 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1532 *
mbed_official 324:406fd2029f23 1533 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1534 */
mbed_official 324:406fd2029f23 1535 static inline void RTC_HAL_ClearStatusWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1536 {
mbed_official 324:406fd2029f23 1537 BW_RTC_WAR_SRW(rtcBaseAddr, 0U);
mbed_official 146:f64d43ff0c18 1538 }
mbed_official 146:f64d43ff0c18 1539
mbed_official 324:406fd2029f23 1540 /*!
mbed_official 324:406fd2029f23 1541 * @brief Reads the field Control Register Write (CRW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1542 *
mbed_official 324:406fd2029f23 1543 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1544 *
mbed_official 324:406fd2029f23 1545 * @return true: Writes to the control register will complete as normal.\n
mbed_official 324:406fd2029f23 1546 * false: Writes to the control register are ignored.
mbed_official 324:406fd2029f23 1547 */
mbed_official 324:406fd2029f23 1548 static inline bool RTC_HAL_GetControlWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1549 {
mbed_official 324:406fd2029f23 1550 return (bool)BR_RTC_WAR_CRW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1551 }
mbed_official 324:406fd2029f23 1552
mbed_official 324:406fd2029f23 1553 /*!
mbed_official 324:406fd2029f23 1554 * @brief Writes 0 to the field Control Register Write (CRW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1555 *
mbed_official 324:406fd2029f23 1556 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1557 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1558 *
mbed_official 324:406fd2029f23 1559 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1560 */
mbed_official 324:406fd2029f23 1561 static inline void RTC_HAL_ClearControlWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1562 {
mbed_official 324:406fd2029f23 1563 BW_RTC_WAR_CRW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1564 }
mbed_official 324:406fd2029f23 1565
mbed_official 324:406fd2029f23 1566 /*!
mbed_official 324:406fd2029f23 1567 * @brief Reads the field Time Compensation Register Write (TCRW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1568 *
mbed_official 324:406fd2029f23 1569 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1570 *
mbed_official 324:406fd2029f23 1571 * @return true: Writes to the time compensation register will complete as normal.\n
mbed_official 324:406fd2029f23 1572 * false: Writes to the time compensation register are ignored.
mbed_official 324:406fd2029f23 1573 */
mbed_official 324:406fd2029f23 1574 static inline bool RTC_HAL_GetCompensationWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1575 {
mbed_official 324:406fd2029f23 1576 return (bool)BR_RTC_WAR_TCRW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1577 }
mbed_official 324:406fd2029f23 1578
mbed_official 324:406fd2029f23 1579 /*!
mbed_official 324:406fd2029f23 1580 * @brief Writes 0 to the field Time Compensation Register Write (TCRW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1581 *
mbed_official 324:406fd2029f23 1582 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1583 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1584 *
mbed_official 324:406fd2029f23 1585 * @param rtcBaseAddr The RTC base address
mbed_official 146:f64d43ff0c18 1586 */
mbed_official 324:406fd2029f23 1587 static inline void RTC_HAL_ClearCompensationWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1588 {
mbed_official 324:406fd2029f23 1589 BW_RTC_WAR_TCRW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1590 }
mbed_official 324:406fd2029f23 1591
mbed_official 324:406fd2029f23 1592 /*!
mbed_official 324:406fd2029f23 1593 * @brief Reads the field Time Alarm Register Write (TARW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1594 *
mbed_official 324:406fd2029f23 1595 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1596 *
mbed_official 324:406fd2029f23 1597 * @return true: Writes to the time alarm register will complete as normal.\n
mbed_official 324:406fd2029f23 1598 * false: Writes to the time alarm register are ignored.
mbed_official 324:406fd2029f23 1599 */
mbed_official 324:406fd2029f23 1600 static inline bool RTC_HAL_GetAlarmWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1601 {
mbed_official 324:406fd2029f23 1602 return (bool)BR_RTC_WAR_TARW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1603 }
mbed_official 324:406fd2029f23 1604
mbed_official 324:406fd2029f23 1605 /*!
mbed_official 324:406fd2029f23 1606 * @brief Writes 0 to the field Time Alarm Register Write (TARW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1607 *
mbed_official 324:406fd2029f23 1608 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1609 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1610 *
mbed_official 324:406fd2029f23 1611 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1612 */
mbed_official 324:406fd2029f23 1613 static inline void RTC_HAL_ClearAlarmWreg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1614 {
mbed_official 324:406fd2029f23 1615 BW_RTC_WAR_TARW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1616 }
mbed_official 324:406fd2029f23 1617
mbed_official 324:406fd2029f23 1618 /*!
mbed_official 324:406fd2029f23 1619 * @brief Reads the field Time Prescaler Register Write (TPRW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1620 *
mbed_official 324:406fd2029f23 1621 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1622 *
mbed_official 324:406fd2029f23 1623 * @return true: Writes to the time prescaler register will complete as normal.\n
mbed_official 324:406fd2029f23 1624 * false: Writes to the time prescaler register are ignored.
mbed_official 324:406fd2029f23 1625 */
mbed_official 324:406fd2029f23 1626 static inline bool RTC_HAL_GetPrescalerWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1627 {
mbed_official 324:406fd2029f23 1628 return (bool)BR_RTC_WAR_TPRW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1629 }
mbed_official 324:406fd2029f23 1630
mbed_official 324:406fd2029f23 1631 /*!
mbed_official 324:406fd2029f23 1632 * @brief Writes 0 to the field Time Prescaler Register Write (TPRW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1633 *
mbed_official 324:406fd2029f23 1634 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1635 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1636 *
mbed_official 324:406fd2029f23 1637 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1638 */
mbed_official 324:406fd2029f23 1639 static inline void RTC_HAL_ClearPrescalerWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1640 {
mbed_official 324:406fd2029f23 1641 BW_RTC_WAR_TPRW(rtcBaseAddr, 0U);
mbed_official 146:f64d43ff0c18 1642 }
mbed_official 146:f64d43ff0c18 1643
mbed_official 324:406fd2029f23 1644 /*!
mbed_official 324:406fd2029f23 1645 * @brief Reads the field Time Seconds Register Write (TSRW) value of the register RTC_WAR.
mbed_official 324:406fd2029f23 1646 *
mbed_official 324:406fd2029f23 1647 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1648 *
mbed_official 324:406fd2029f23 1649 * @return true: Writes to the time seconds register will complete as normal.\n
mbed_official 324:406fd2029f23 1650 * false: Writes to the time seconds register are ignored.
mbed_official 146:f64d43ff0c18 1651 */
mbed_official 324:406fd2029f23 1652 static inline bool RTC_HAL_GetSecsWreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1653 {
mbed_official 324:406fd2029f23 1654 return (bool)BR_RTC_WAR_TSRW(rtcBaseAddr);
mbed_official 324:406fd2029f23 1655 }
mbed_official 324:406fd2029f23 1656
mbed_official 324:406fd2029f23 1657 /*!
mbed_official 324:406fd2029f23 1658 * @brief Writes 0 to the field Time Seconds Register Write (TSRW) of the RTC_WAR register.
mbed_official 324:406fd2029f23 1659 *
mbed_official 324:406fd2029f23 1660 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1661 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1662 *
mbed_official 324:406fd2029f23 1663 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1664 */
mbed_official 324:406fd2029f23 1665 static inline void RTC_HAL_ClearSecsWreg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1666 {
mbed_official 324:406fd2029f23 1667 BW_RTC_WAR_TSRW(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1668 }
mbed_official 324:406fd2029f23 1669
mbed_official 324:406fd2029f23 1670 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 324:406fd2029f23 1671
mbed_official 324:406fd2029f23 1672 /*!
mbed_official 324:406fd2029f23 1673 * @brief Reads the field Monotonic Counter High Read (MCHR) value of the register RTC_RAR.
mbed_official 324:406fd2029f23 1674 *
mbed_official 324:406fd2029f23 1675 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1676 *
mbed_official 324:406fd2029f23 1677 * @return true: Reads to the monotonic counter high register completes as normal.\n
mbed_official 324:406fd2029f23 1678 * false: Reads to the monotonic counter high register are ignored.
mbed_official 324:406fd2029f23 1679 */
mbed_official 324:406fd2029f23 1680 static inline bool RTC_HAL_GetMonotonicHcountRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1681 {
mbed_official 324:406fd2029f23 1682 return (bool)BR_RTC_RAR_MCHR(rtcBaseAddr);
mbed_official 146:f64d43ff0c18 1683 }
mbed_official 146:f64d43ff0c18 1684
mbed_official 324:406fd2029f23 1685 /*!
mbed_official 324:406fd2029f23 1686 * @brief Writes 0 to the field Monotonic Counter High Read (MCHR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1687 *
mbed_official 324:406fd2029f23 1688 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1689 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1690 *
mbed_official 324:406fd2029f23 1691 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1692 */
mbed_official 324:406fd2029f23 1693 static inline void RTC_HAL_ClearMonotonicHcountRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1694 {
mbed_official 324:406fd2029f23 1695 BW_RTC_RAR_MCHR(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1696 }
mbed_official 324:406fd2029f23 1697
mbed_official 324:406fd2029f23 1698 /*!
mbed_official 324:406fd2029f23 1699 * @brief Reads the field Monotonic Counter Low Read (MCLR) value of the register RTC_RAR.
mbed_official 324:406fd2029f23 1700 *
mbed_official 324:406fd2029f23 1701 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1702 *
mbed_official 324:406fd2029f23 1703 * @return true: Reads to the monotonic counter low register will complete as normal.\n
mbed_official 324:406fd2029f23 1704 * false: Reads to the monotonic counter low register are ignored.
mbed_official 146:f64d43ff0c18 1705 */
mbed_official 324:406fd2029f23 1706 static inline bool RTC_HAL_GetMonotonicLcountRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1707 {
mbed_official 324:406fd2029f23 1708 return (bool)BR_RTC_RAR_MCLR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1709 }
mbed_official 324:406fd2029f23 1710
mbed_official 324:406fd2029f23 1711 /*!
mbed_official 324:406fd2029f23 1712 * @brief Writes 0 to the field Monotonic Counter Low Read (MCLR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1713 *
mbed_official 324:406fd2029f23 1714 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1715 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1716 *
mbed_official 324:406fd2029f23 1717 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1718 */
mbed_official 324:406fd2029f23 1719 static inline void RTC_HAL_ClearMonotonicLcountRreg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1720 {
mbed_official 324:406fd2029f23 1721 BW_RTC_RAR_MCLR(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1722 }
mbed_official 324:406fd2029f23 1723
mbed_official 324:406fd2029f23 1724 /*!
mbed_official 324:406fd2029f23 1725 * @brief Reads the field Monotonic Enable Register Read (MERR) value of the register RTC_RAR.
mbed_official 324:406fd2029f23 1726 *
mbed_official 324:406fd2029f23 1727 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1728 *
mbed_official 324:406fd2029f23 1729 * @return true: Reads to the monotonic enable register completes as normal.\n
mbed_official 324:406fd2029f23 1730 * false: Reads to the monotonic enable register are ignored.
mbed_official 324:406fd2029f23 1731 */
mbed_official 324:406fd2029f23 1732 static inline bool RTC_HAL_GetMonotonicEnableRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1733 {
mbed_official 324:406fd2029f23 1734 return (bool)BR_RTC_RAR_MERR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1735 }
mbed_official 324:406fd2029f23 1736
mbed_official 324:406fd2029f23 1737 /*!
mbed_official 324:406fd2029f23 1738 * @brief Writes 0 to the field Monotonic Enable Register Read (MERR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1739 *
mbed_official 324:406fd2029f23 1740 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1741 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1742 *
mbed_official 324:406fd2029f23 1743 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1744 */
mbed_official 324:406fd2029f23 1745 static inline void RTC_HAL_ClearMonotonicEnableRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1746 {
mbed_official 324:406fd2029f23 1747 BW_RTC_RAR_MERR(rtcBaseAddr, 0U);
mbed_official 146:f64d43ff0c18 1748 }
mbed_official 146:f64d43ff0c18 1749
mbed_official 324:406fd2029f23 1750 #endif
mbed_official 324:406fd2029f23 1751
mbed_official 324:406fd2029f23 1752 /*!
mbed_official 324:406fd2029f23 1753 * @brief Reads the field Interrupt Enable Register Read (IERR) value of the register RTC_RAR.
mbed_official 324:406fd2029f23 1754 *
mbed_official 324:406fd2029f23 1755 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1756 *
mbed_official 324:406fd2029f23 1757 * @return true: Reads to the interrupt enable register completes as normal.\n
mbed_official 324:406fd2029f23 1758 * false: Reads to the interrupt enable register are ignored.
mbed_official 324:406fd2029f23 1759 */
mbed_official 324:406fd2029f23 1760 static inline bool RTC_HAL_GetIntEnableRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1761 {
mbed_official 324:406fd2029f23 1762 return (bool)BR_RTC_RAR_IERR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1763 }
mbed_official 324:406fd2029f23 1764
mbed_official 324:406fd2029f23 1765 /*!
mbed_official 324:406fd2029f23 1766 * @brief Writes 0 to the field Interrupt Enable Register Read (IERR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1767 *
mbed_official 324:406fd2029f23 1768 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1769 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1770 *
mbed_official 324:406fd2029f23 1771 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1772 */
mbed_official 324:406fd2029f23 1773 static inline void RTC_HAL_ClearIntEnableRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1774 {
mbed_official 324:406fd2029f23 1775 BW_RTC_RAR_IERR(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1776 }
mbed_official 324:406fd2029f23 1777
mbed_official 324:406fd2029f23 1778 /*!
mbed_official 324:406fd2029f23 1779 * @brief Reads the field Lock Register Read (LRR) value of the RTC_RAR register.
mbed_official 324:406fd2029f23 1780 *
mbed_official 324:406fd2029f23 1781 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1782 *
mbed_official 324:406fd2029f23 1783 * @return true: Reads to the lock register will complete as normal.\n
mbed_official 324:406fd2029f23 1784 * false: Reads to the lock register are ignored.
mbed_official 324:406fd2029f23 1785 */
mbed_official 324:406fd2029f23 1786 static inline bool RTC_HAL_GetLockRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1787 {
mbed_official 324:406fd2029f23 1788 return (bool)BR_RTC_RAR_LRR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1789 }
mbed_official 324:406fd2029f23 1790
mbed_official 324:406fd2029f23 1791 /*!
mbed_official 324:406fd2029f23 1792 * @brief Writes 0 to the field Lock Register Read (LRR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1793 *
mbed_official 324:406fd2029f23 1794 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1795 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1796 *
mbed_official 324:406fd2029f23 1797 * @param rtcBaseAddr The RTC base address
mbed_official 146:f64d43ff0c18 1798 */
mbed_official 324:406fd2029f23 1799 static inline void RTC_HAL_ClearLockRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1800 {
mbed_official 324:406fd2029f23 1801 BW_RTC_RAR_LRR(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1802 }
mbed_official 324:406fd2029f23 1803
mbed_official 324:406fd2029f23 1804 /*!
mbed_official 324:406fd2029f23 1805 * @brief Reads the field Status Register Read (SRR) value of the RTC_RAR register.
mbed_official 324:406fd2029f23 1806 *
mbed_official 324:406fd2029f23 1807 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1808 *
mbed_official 324:406fd2029f23 1809 * @return true: Reads to the status register completes as normal.\n
mbed_official 324:406fd2029f23 1810 * false: Reads to the status register are ignored.
mbed_official 324:406fd2029f23 1811 */
mbed_official 324:406fd2029f23 1812 static inline bool RTC_HAL_GetStatusRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1813 {
mbed_official 324:406fd2029f23 1814 return (bool)BR_RTC_RAR_SRR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1815 }
mbed_official 324:406fd2029f23 1816
mbed_official 324:406fd2029f23 1817 /*!
mbed_official 324:406fd2029f23 1818 * @brief Writes 0 to the field Status Register Read (SRR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1819 *
mbed_official 324:406fd2029f23 1820 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1821 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1822 *
mbed_official 324:406fd2029f23 1823 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1824 */
mbed_official 324:406fd2029f23 1825 static inline void RTC_HAL_ClearStatusRreg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1826 {
mbed_official 324:406fd2029f23 1827 BW_RTC_RAR_SRR(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1828 }
mbed_official 324:406fd2029f23 1829
mbed_official 324:406fd2029f23 1830 /*!
mbed_official 324:406fd2029f23 1831 * @brief Reads the field Control Register Read (CRR) value of the RTC_RAR register.
mbed_official 324:406fd2029f23 1832 *
mbed_official 324:406fd2029f23 1833 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1834 *
mbed_official 324:406fd2029f23 1835 * @return true: Reads to the control register completes as normal.\n
mbed_official 324:406fd2029f23 1836 * false: Reads to the control register are ignored.
mbed_official 324:406fd2029f23 1837 */
mbed_official 324:406fd2029f23 1838 static inline bool RTC_HAL_GetControlRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1839 {
mbed_official 324:406fd2029f23 1840 return (bool)BR_RTC_RAR_CRR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1841 }
mbed_official 324:406fd2029f23 1842
mbed_official 324:406fd2029f23 1843 /*!
mbed_official 324:406fd2029f23 1844 * @brief Writes 0 to the field Control Register Read (CRR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1845 *
mbed_official 324:406fd2029f23 1846 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1847 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1848 *
mbed_official 324:406fd2029f23 1849 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1850 */
mbed_official 324:406fd2029f23 1851 static inline void RTC_HAL_ClearControlRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1852 {
mbed_official 324:406fd2029f23 1853 BW_RTC_RAR_CRR(rtcBaseAddr, 0U);
mbed_official 146:f64d43ff0c18 1854 }
mbed_official 146:f64d43ff0c18 1855
mbed_official 324:406fd2029f23 1856 /*!
mbed_official 324:406fd2029f23 1857 * @brief Reads the field Time Compensation Register Read (TCRR) value of the RTC_RAR register.
mbed_official 324:406fd2029f23 1858 *
mbed_official 324:406fd2029f23 1859 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1860 *
mbed_official 324:406fd2029f23 1861 * @return true: Reads to the time compensation register completes as normal.\n
mbed_official 324:406fd2029f23 1862 * false: Reads to the time compensation register are ignored.
mbed_official 324:406fd2029f23 1863 */
mbed_official 324:406fd2029f23 1864 static inline bool RTC_HAL_GetCompensationRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1865 {
mbed_official 324:406fd2029f23 1866 return (bool)BR_RTC_RAR_TCRR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1867 }
mbed_official 324:406fd2029f23 1868
mbed_official 324:406fd2029f23 1869 /*!
mbed_official 324:406fd2029f23 1870 * @brief Writes 0 to the field Time Compensation Register Read (TCRR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1871 *
mbed_official 324:406fd2029f23 1872 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1873 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1874 *
mbed_official 324:406fd2029f23 1875 * @param rtcBaseAddr The RTC base address
mbed_official 146:f64d43ff0c18 1876 */
mbed_official 324:406fd2029f23 1877 static inline void RTC_HAL_ClearCompensationRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1878 {
mbed_official 324:406fd2029f23 1879 BW_RTC_RAR_TCRR(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1880 }
mbed_official 324:406fd2029f23 1881
mbed_official 324:406fd2029f23 1882 /*!
mbed_official 324:406fd2029f23 1883 * @brief Reads the field Time Alarm Register Read (TARR) value of the RTC_RAR register.
mbed_official 324:406fd2029f23 1884 *
mbed_official 324:406fd2029f23 1885 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1886 *
mbed_official 324:406fd2029f23 1887 * @return true: Reads to the time alarm register completes as normal.\n
mbed_official 324:406fd2029f23 1888 * false: Reads to the time alarm register are ignored.
mbed_official 324:406fd2029f23 1889 */
mbed_official 324:406fd2029f23 1890 static inline bool RTC_HAL_GetAlarmRreg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1891 {
mbed_official 324:406fd2029f23 1892 return (bool)BR_RTC_RAR_TARR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1893 }
mbed_official 324:406fd2029f23 1894
mbed_official 324:406fd2029f23 1895 /*!
mbed_official 324:406fd2029f23 1896 * @brief Writes 0 to the field Time Alarm Register Read (TARR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1897 *
mbed_official 324:406fd2029f23 1898 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1899 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1900 *
mbed_official 324:406fd2029f23 1901 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1902 */
mbed_official 324:406fd2029f23 1903 static inline void RTC_HAL_ClearAlarmRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1904 {
mbed_official 324:406fd2029f23 1905 BW_RTC_RAR_TARR(rtcBaseAddr, 0U);
mbed_official 146:f64d43ff0c18 1906 }
mbed_official 146:f64d43ff0c18 1907
mbed_official 324:406fd2029f23 1908 /*!
mbed_official 324:406fd2029f23 1909 * @brief Reads the field Time Prescaler Register Read (TPRR) value of the RTC_RAR register.
mbed_official 324:406fd2029f23 1910 *
mbed_official 324:406fd2029f23 1911 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1912 *
mbed_official 324:406fd2029f23 1913 * @return true: Reads to the time prescaler register completes as normal.\n
mbed_official 324:406fd2029f23 1914 * false: Reads to the time prescaler register are ignored.
mbed_official 146:f64d43ff0c18 1915 */
mbed_official 324:406fd2029f23 1916 static inline bool RTC_HAL_GetPrescalerRreg(uint32_t rtcBaseAddr)
mbed_official 146:f64d43ff0c18 1917 {
mbed_official 324:406fd2029f23 1918 return (bool)BR_RTC_RAR_TPRR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1919 }
mbed_official 324:406fd2029f23 1920
mbed_official 324:406fd2029f23 1921 /*!
mbed_official 324:406fd2029f23 1922 * @brief Writes 0 to the field Time Prescaler Register Read (TPRR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1923 *
mbed_official 324:406fd2029f23 1924 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1925 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1926 *
mbed_official 324:406fd2029f23 1927 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1928 */
mbed_official 324:406fd2029f23 1929 static inline void RTC_HAL_ClearPrescalerRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1930 {
mbed_official 324:406fd2029f23 1931 BW_RTC_RAR_TPRR(rtcBaseAddr, 0U);
mbed_official 146:f64d43ff0c18 1932 }
mbed_official 146:f64d43ff0c18 1933
mbed_official 324:406fd2029f23 1934 /*!
mbed_official 324:406fd2029f23 1935 * @brief Reads the field Time Seconds Register Read (TSRR) value of the RTC_RAR register.
mbed_official 324:406fd2029f23 1936 *
mbed_official 324:406fd2029f23 1937 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1938 *
mbed_official 324:406fd2029f23 1939 * @return true: Reads to the time seconds register completes as normal.\n
mbed_official 324:406fd2029f23 1940 * false: Reads to the time seconds register are ignored.
mbed_official 324:406fd2029f23 1941 */
mbed_official 324:406fd2029f23 1942 static inline bool RTC_HAL_GetSecsRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1943 {
mbed_official 324:406fd2029f23 1944 return (bool)BR_RTC_RAR_TSRR(rtcBaseAddr);
mbed_official 324:406fd2029f23 1945 }
mbed_official 324:406fd2029f23 1946
mbed_official 324:406fd2029f23 1947 /*!
mbed_official 324:406fd2029f23 1948 * @brief Writes 0 to the field Time Seconds Register Read (TSRR) of the RTC_RAR register.
mbed_official 324:406fd2029f23 1949 *
mbed_official 324:406fd2029f23 1950 * Once cleared, this bit is only set by system reset. It is not affected by
mbed_official 324:406fd2029f23 1951 * VBAT POR or software reset.
mbed_official 324:406fd2029f23 1952 *
mbed_official 324:406fd2029f23 1953 * @param rtcBaseAddr The RTC base address
mbed_official 324:406fd2029f23 1954 */
mbed_official 324:406fd2029f23 1955 static inline void RTC_HAL_ClearSecsRreg(uint32_t rtcBaseAddr)
mbed_official 324:406fd2029f23 1956 {
mbed_official 324:406fd2029f23 1957 BW_RTC_RAR_TSRR(rtcBaseAddr, 0U);
mbed_official 324:406fd2029f23 1958 }
mbed_official 324:406fd2029f23 1959
mbed_official 324:406fd2029f23 1960 #endif /* FSL_FEATURE_RTC_HAS_ACCESS_CONTROL */
mbed_official 324:406fd2029f23 1961
mbed_official 324:406fd2029f23 1962 /*! @}*/
mbed_official 146:f64d43ff0c18 1963
mbed_official 146:f64d43ff0c18 1964 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 1965 }
mbed_official 146:f64d43ff0c18 1966 #endif
mbed_official 324:406fd2029f23 1967
mbed_official 146:f64d43ff0c18 1968
mbed_official 146:f64d43ff0c18 1969 /*! @}*/
mbed_official 146:f64d43ff0c18 1970
mbed_official 146:f64d43ff0c18 1971 #endif /* __FSL_RTC_HAL_H__*/
mbed_official 146:f64d43ff0c18 1972
mbed_official 146:f64d43ff0c18 1973 /*******************************************************************************
mbed_official 146:f64d43ff0c18 1974 * EOF
mbed_official 146:f64d43ff0c18 1975 ******************************************************************************/
mbed_official 146:f64d43ff0c18 1976