mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
mbed_official
Date:
Thu Apr 03 11:45:06 2014 +0100
Revision:
149:1fb5f62b92bd
Parent:
targets/hal/TARGET_Freescale/TARGET_KSDK_MCUS/TARGET_KSDK_CODE/hal/rtc/fsl_rtc_hal.h@146:f64d43ff0c18
Child:
324:406fd2029f23
Synchronized with git revision 220c0bb39ceee40016e1e86350c058963d01ed42

Full URL: https://github.com/mbedmicro/mbed/commit/220c0bb39ceee40016e1e86350c058963d01ed42/

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 146:f64d43ff0c18 1 /*
mbed_official 146:f64d43ff0c18 2 * Copyright (c) 2013 - 2014, Freescale Semiconductor, Inc.
mbed_official 146:f64d43ff0c18 3 * All rights reserved.
mbed_official 146:f64d43ff0c18 4 *
mbed_official 146:f64d43ff0c18 5 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 146:f64d43ff0c18 6 * are permitted provided that the following conditions are met:
mbed_official 146:f64d43ff0c18 7 *
mbed_official 146:f64d43ff0c18 8 * o Redistributions of source code must retain the above copyright notice, this list
mbed_official 146:f64d43ff0c18 9 * of conditions and the following disclaimer.
mbed_official 146:f64d43ff0c18 10 *
mbed_official 146:f64d43ff0c18 11 * o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 146:f64d43ff0c18 12 * list of conditions and the following disclaimer in the documentation and/or
mbed_official 146:f64d43ff0c18 13 * other materials provided with the distribution.
mbed_official 146:f64d43ff0c18 14 *
mbed_official 146:f64d43ff0c18 15 * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 146:f64d43ff0c18 16 * contributors may be used to endorse or promote products derived from this
mbed_official 146:f64d43ff0c18 17 * software without specific prior written permission.
mbed_official 146:f64d43ff0c18 18 *
mbed_official 146:f64d43ff0c18 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 146:f64d43ff0c18 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 146:f64d43ff0c18 21 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 146:f64d43ff0c18 22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 146:f64d43ff0c18 23 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 146:f64d43ff0c18 24 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 146:f64d43ff0c18 25 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 146:f64d43ff0c18 26 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 146:f64d43ff0c18 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 146:f64d43ff0c18 28 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 146:f64d43ff0c18 29 */
mbed_official 146:f64d43ff0c18 30 #if !defined(__FSL_RTC_HAL_H__)
mbed_official 146:f64d43ff0c18 31 #define __FSL_RTC_HAL_H__
mbed_official 146:f64d43ff0c18 32
mbed_official 146:f64d43ff0c18 33
mbed_official 146:f64d43ff0c18 34 #include "fsl_rtc_features.h"
mbed_official 146:f64d43ff0c18 35 #include "fsl_device_registers.h"
mbed_official 146:f64d43ff0c18 36
mbed_official 146:f64d43ff0c18 37 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 146:f64d43ff0c18 38 #include "fsl_rtc_hal_monotonic.h"
mbed_official 146:f64d43ff0c18 39 #endif
mbed_official 146:f64d43ff0c18 40 #if FSL_FEATURE_RTC_HAS_ACCESS_CONTROL
mbed_official 146:f64d43ff0c18 41 #include "fsl_rtc_hal_access_control.h"
mbed_official 146:f64d43ff0c18 42 #endif
mbed_official 146:f64d43ff0c18 43
mbed_official 146:f64d43ff0c18 44 #include <stdint.h>
mbed_official 146:f64d43ff0c18 45 #include <stdbool.h>
mbed_official 146:f64d43ff0c18 46
mbed_official 146:f64d43ff0c18 47 /*!
mbed_official 146:f64d43ff0c18 48 * @addtogroup rtc_hal
mbed_official 146:f64d43ff0c18 49 * @{
mbed_official 146:f64d43ff0c18 50 */
mbed_official 146:f64d43ff0c18 51
mbed_official 146:f64d43ff0c18 52 /*******************************************************************************
mbed_official 146:f64d43ff0c18 53 * Definitions
mbed_official 146:f64d43ff0c18 54 ******************************************************************************/
mbed_official 146:f64d43ff0c18 55
mbed_official 146:f64d43ff0c18 56 typedef struct rtc_hal_init_config
mbed_official 146:f64d43ff0c18 57 {
mbed_official 146:f64d43ff0c18 58
mbed_official 146:f64d43ff0c18 59 /*! Configures the oscillator load in pF. \n
mbed_official 146:f64d43ff0c18 60 * Example:\n
mbed_official 146:f64d43ff0c18 61 * value 0 => to be configured: 0pF \n
mbed_official 146:f64d43ff0c18 62 * value 2 => to be configured: 2pF \n
mbed_official 146:f64d43ff0c18 63 * value 4 => to be configured: 4pF \n
mbed_official 146:f64d43ff0c18 64 * value 8 => to be configured: 8pF \n
mbed_official 146:f64d43ff0c18 65 * value 16 => to be configured: 16pF \n
mbed_official 146:f64d43ff0c18 66 * Any other value is ignored.
mbed_official 146:f64d43ff0c18 67 */
mbed_official 146:f64d43ff0c18 68 uint8_t enableOscillatorLoadConfg;
mbed_official 146:f64d43ff0c18 69
mbed_official 146:f64d43ff0c18 70 bool disableClockOutToPeripheral; /*!< at register field CR[CLKO]*/
mbed_official 146:f64d43ff0c18 71
mbed_official 146:f64d43ff0c18 72 /*! After enabling this, waits the oscillator startup time before enabling
mbed_official 146:f64d43ff0c18 73 * the time counter TSR[TSR] to allow the 32.768 kHz clock time to stabilize.
mbed_official 146:f64d43ff0c18 74 */
mbed_official 146:f64d43ff0c18 75 bool enable32kOscillator; /*!< at register field CR[OSCE]*/
mbed_official 146:f64d43ff0c18 76
mbed_official 146:f64d43ff0c18 77 #if FSL_FEATURE_RTC_HAS_WAKEUP_PIN
mbed_official 146:f64d43ff0c18 78 /*! For devices that have the wakeup pin, this variable indicates whether it is
mbed_official 146:f64d43ff0c18 79 * to be enabled (set to 'true') or not (set to 'false') at the initialization
mbed_official 146:f64d43ff0c18 80 * function.\n
mbed_official 146:f64d43ff0c18 81 * See the device's user manual for details depending on each device
mbed_official 146:f64d43ff0c18 82 * specific wakeup pin feature implementation.
mbed_official 146:f64d43ff0c18 83 */
mbed_official 146:f64d43ff0c18 84 bool enableWakeupPin;
mbed_official 146:f64d43ff0c18 85 #endif
mbed_official 146:f64d43ff0c18 86
mbed_official 146:f64d43ff0c18 87 /*! Sets the register field TSR[TSR]. Set to zero to skip this configuration.*/
mbed_official 146:f64d43ff0c18 88 uint32_t startSecondsCounterAt;
mbed_official 146:f64d43ff0c18 89
mbed_official 146:f64d43ff0c18 90 /*! Sets the register field TPR[TPR]. Set to zero to skip this configuration.*/
mbed_official 146:f64d43ff0c18 91 uint16_t prescalerAt;
mbed_official 146:f64d43ff0c18 92
mbed_official 146:f64d43ff0c18 93 /*! Sets the register field TAR[TAR]. Set to zero to skip this configuration.*/
mbed_official 146:f64d43ff0c18 94 uint32_t alarmCounterAt;
mbed_official 146:f64d43ff0c18 95
mbed_official 146:f64d43ff0c18 96 /*! Configures the compensation interval in seconds from 1 to 256 to control
mbed_official 146:f64d43ff0c18 97 * how frequently the TCR should adjusts the number of 32.768 kHz cycles in
mbed_official 146:f64d43ff0c18 98 * each second. The value written should be one less than the number of
mbed_official 146:f64d43ff0c18 99 * seconds (for example, write zero to configure for a compensation interval
mbed_official 146:f64d43ff0c18 100 * of one second). This register is double-buffered and writes do not take
mbed_official 146:f64d43ff0c18 101 * affect until the end of the current compensation interval.\n
mbed_official 146:f64d43ff0c18 102 * Set to zero to skip this configuration.
mbed_official 146:f64d43ff0c18 103 */
mbed_official 146:f64d43ff0c18 104 uint8_t compensationInterval;
mbed_official 146:f64d43ff0c18 105
mbed_official 146:f64d43ff0c18 106 /*! Configures the number of 32.768 kHz clock cycles in each second. This
mbed_official 146:f64d43ff0c18 107 * register is double-buffered and writes do not take affect until the end
mbed_official 146:f64d43ff0c18 108 * of the current compensation interval.\n
mbed_official 146:f64d43ff0c18 109 * \n
mbed_official 146:f64d43ff0c18 110 * 80h Time prescaler register overflows every 32896 clock cycles.\n
mbed_official 146:f64d43ff0c18 111 * ... ...\n
mbed_official 146:f64d43ff0c18 112 * FFh Time prescaler register overflows every 32769 clock cycles.\n
mbed_official 146:f64d43ff0c18 113 * 00h Time prescaler register overflows every 32768 clock cycles.\n
mbed_official 146:f64d43ff0c18 114 * 01h Time prescaler register overflows every 32767 clock cycles.\n
mbed_official 146:f64d43ff0c18 115 * ... ...\n
mbed_official 146:f64d43ff0c18 116 * 7Fh Time prescaler register overflows every 32641 clock cycles.\n
mbed_official 146:f64d43ff0c18 117 */
mbed_official 146:f64d43ff0c18 118 uint8_t timeCompensation;
mbed_official 146:f64d43ff0c18 119
mbed_official 146:f64d43ff0c18 120 /*! Sets/clears any of the following bitfields to enable/disable the
mbed_official 146:f64d43ff0c18 121 * respective interrupts.\n
mbed_official 146:f64d43ff0c18 122 * TSIE: Time Seconds Interrupt Enable \n
mbed_official 146:f64d43ff0c18 123 * TAIE: Time Alarm Interrupt Enable \n
mbed_official 146:f64d43ff0c18 124 * TOIE: Time Overflow Interrupt Enable \n
mbed_official 146:f64d43ff0c18 125 * TIIE: Time Invalid Interrupt Enable \n
mbed_official 146:f64d43ff0c18 126 * \n
mbed_official 146:f64d43ff0c18 127 * For MCUs that have the Wakeup Pin only: \n
mbed_official 146:f64d43ff0c18 128 * WPON: Wakeup Pin On (see the corresponding MCU's reference manual)\n
mbed_official 146:f64d43ff0c18 129 * \n
mbed_official 146:f64d43ff0c18 130 * For MCUs that have the Monotonic Counter only: \n
mbed_official 146:f64d43ff0c18 131 * MOIE: Monotonic Overflow Interrupt Enable \n
mbed_official 146:f64d43ff0c18 132 */
mbed_official 146:f64d43ff0c18 133 hw_rtc_ier_t enableInterrupts;
mbed_official 146:f64d43ff0c18 134
mbed_official 146:f64d43ff0c18 135 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 146:f64d43ff0c18 136 /*! Sets the Monotonic Counter to the pointed variable's value.
mbed_official 146:f64d43ff0c18 137 * To skip setting a value or if does not apply set pointer to NULL.
mbed_official 146:f64d43ff0c18 138 */
mbed_official 146:f64d43ff0c18 139 uint64_t * monotonicCounterAt;
mbed_official 146:f64d43ff0c18 140 #endif
mbed_official 146:f64d43ff0c18 141
mbed_official 146:f64d43ff0c18 142 } rtc_hal_init_config_t;
mbed_official 146:f64d43ff0c18 143
mbed_official 146:f64d43ff0c18 144 /*******************************************************************************
mbed_official 146:f64d43ff0c18 145 * API
mbed_official 146:f64d43ff0c18 146 ******************************************************************************/
mbed_official 146:f64d43ff0c18 147
mbed_official 146:f64d43ff0c18 148 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 149 extern "C" {
mbed_official 146:f64d43ff0c18 150 #endif
mbed_official 146:f64d43ff0c18 151
mbed_official 146:f64d43ff0c18 152 /*! @brief Initializes the RTC module.
mbed_official 146:f64d43ff0c18 153 *
mbed_official 146:f64d43ff0c18 154 * @param configs Pointer to a structure where the configuration details are
mbed_official 146:f64d43ff0c18 155 * stored at. The structure values that do NOT apply to the
mbed_official 146:f64d43ff0c18 156 * MCU in use are ignored.
mbed_official 146:f64d43ff0c18 157 */
mbed_official 146:f64d43ff0c18 158 void rtc_hal_init(rtc_hal_init_config_t * configs);
mbed_official 146:f64d43ff0c18 159
mbed_official 146:f64d43ff0c18 160
mbed_official 146:f64d43ff0c18 161 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 162 /* RTC Register Reset Functions*/
mbed_official 146:f64d43ff0c18 163 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 164
mbed_official 146:f64d43ff0c18 165 /*! @brief Resets the RTC Time Seconds Register (RTC_TSR).*/
mbed_official 146:f64d43ff0c18 166 static inline void rtc_hal_reset_reg_TSR(void)
mbed_official 146:f64d43ff0c18 167 {
mbed_official 146:f64d43ff0c18 168 HW_RTC_TSR_WR((uint32_t)0x00000000U);
mbed_official 146:f64d43ff0c18 169 }
mbed_official 146:f64d43ff0c18 170
mbed_official 146:f64d43ff0c18 171 /*! @brief Resets the RTC Time Prescaler Register (RTC_TPR).*/
mbed_official 146:f64d43ff0c18 172 static inline void rtc_hal_reset_reg_TPR(void)
mbed_official 146:f64d43ff0c18 173 {
mbed_official 146:f64d43ff0c18 174 HW_RTC_TPR_WR((uint32_t)0x00000000U);
mbed_official 146:f64d43ff0c18 175 }
mbed_official 146:f64d43ff0c18 176
mbed_official 146:f64d43ff0c18 177 /*! @brief Resets the RTC Time Alarm Register (RTC_TAR).*/
mbed_official 146:f64d43ff0c18 178 static inline void rtc_hal_reset_reg_TAR(void)
mbed_official 146:f64d43ff0c18 179 {
mbed_official 146:f64d43ff0c18 180 HW_RTC_TAR_WR((uint32_t)0x00000000U);
mbed_official 146:f64d43ff0c18 181 }
mbed_official 146:f64d43ff0c18 182
mbed_official 146:f64d43ff0c18 183 /*! @brief Resets the RTC Time Compensation Register (RTC_TCR).*/
mbed_official 146:f64d43ff0c18 184 static inline void rtc_hal_reset_reg_TCR(void)
mbed_official 146:f64d43ff0c18 185 {
mbed_official 146:f64d43ff0c18 186 HW_RTC_TCR_WR((uint32_t)0x00000000U);
mbed_official 146:f64d43ff0c18 187 }
mbed_official 146:f64d43ff0c18 188
mbed_official 146:f64d43ff0c18 189 /*! @brief Resets the RTC Control Register (RTC_CR).*/
mbed_official 146:f64d43ff0c18 190 static inline void rtc_hal_reset_reg_CR(void)
mbed_official 146:f64d43ff0c18 191 {
mbed_official 146:f64d43ff0c18 192 HW_RTC_CR_WR((uint32_t)0x00000000U);
mbed_official 146:f64d43ff0c18 193 }
mbed_official 146:f64d43ff0c18 194
mbed_official 146:f64d43ff0c18 195 /*! @brief Resets the RTC Status Register (RTC_SR).*/
mbed_official 146:f64d43ff0c18 196 static inline void rtc_hal_reset_reg_SR(void)
mbed_official 146:f64d43ff0c18 197 {
mbed_official 146:f64d43ff0c18 198 HW_RTC_SR_WR((uint32_t)0x00000001U);
mbed_official 146:f64d43ff0c18 199 }
mbed_official 146:f64d43ff0c18 200
mbed_official 146:f64d43ff0c18 201 /*! @brief Resets the RTC Lock Register (RTC_LR).*/
mbed_official 146:f64d43ff0c18 202 static inline void rtc_hal_reset_reg_LR(void)
mbed_official 146:f64d43ff0c18 203 {
mbed_official 146:f64d43ff0c18 204 #if (defined(CPU_MKL25Z32VFM4) || defined(CPU_MKL25Z64VFM4) || defined(CPU_MKL25Z128VFM4) || \
mbed_official 146:f64d43ff0c18 205 defined(CPU_MKL25Z32VFT4) || defined(CPU_MKL25Z64VFT4) || defined(CPU_MKL25Z128VFT4) || \
mbed_official 146:f64d43ff0c18 206 defined(CPU_MKL25Z32VLH4) || defined(CPU_MKL25Z64VLH4) || defined(CPU_MKL25Z128VLH4) || \
mbed_official 146:f64d43ff0c18 207 defined(CPU_MKL25Z32VLK4) || defined(CPU_MKL25Z64VLK4) || defined(CPU_MKL25Z128VLK4) || \
mbed_official 146:f64d43ff0c18 208 defined(CPU_MK22FN512VDC12))
mbed_official 146:f64d43ff0c18 209
mbed_official 146:f64d43ff0c18 210 HW_RTC_LR_WR((uint32_t)0x000000FFU);
mbed_official 146:f64d43ff0c18 211
mbed_official 146:f64d43ff0c18 212 #elif (defined(CPU_MK70FX512VMJ12) || defined(CPU_MK70FN1M0VMJ12) || \
mbed_official 146:f64d43ff0c18 213 defined(CPU_MK70FX512VMJ15) || defined(CPU_MK70FN1M0VMJ15) || \
mbed_official 146:f64d43ff0c18 214 defined(CPU_MK63FN1M0VMD12) || defined(CPU_MK63FN1M0VMD12WS) || \
mbed_official 146:f64d43ff0c18 215 defined(CPU_MK64FN1M0VMD12) || defined(CPU_MK64FX512VMD12))
mbed_official 146:f64d43ff0c18 216
mbed_official 146:f64d43ff0c18 217 HW_RTC_LR_WR((uint32_t)0x0000FFFFU);
mbed_official 146:f64d43ff0c18 218
mbed_official 146:f64d43ff0c18 219 #else
mbed_official 146:f64d43ff0c18 220 #error "No valid CPU defined"
mbed_official 146:f64d43ff0c18 221 #endif
mbed_official 146:f64d43ff0c18 222 }
mbed_official 146:f64d43ff0c18 223
mbed_official 146:f64d43ff0c18 224 /*! @brief Resets the RTC Interrupt Enable Register (RTC_IER).*/
mbed_official 146:f64d43ff0c18 225 static inline void rtc_hal_reset_reg_IER(void)
mbed_official 146:f64d43ff0c18 226 {
mbed_official 146:f64d43ff0c18 227 HW_RTC_IER_WR((uint32_t)0x00000007U);
mbed_official 146:f64d43ff0c18 228 }
mbed_official 146:f64d43ff0c18 229
mbed_official 146:f64d43ff0c18 230 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 231 /* RTC Time Seconds*/
mbed_official 146:f64d43ff0c18 232 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 233
mbed_official 146:f64d43ff0c18 234 /*! @brief Reads the value of the time seconds counter.
mbed_official 146:f64d43ff0c18 235 * @param Seconds [out] pointer to variable where the seconds are stored.
mbed_official 146:f64d43ff0c18 236 */
mbed_official 146:f64d43ff0c18 237 static inline void rtc_hal_get_seconds(uint32_t * seconds)
mbed_official 146:f64d43ff0c18 238 {
mbed_official 146:f64d43ff0c18 239 /* When the time counter is enabled, the TSR is read only and increments
mbed_official 146:f64d43ff0c18 240 * once a second provided SR[TOF] and SR[TIF] are not set. The time counter
mbed_official 146:f64d43ff0c18 241 * reads as zero when SR[TOF] or SR[TIF] are set. When the time counter
mbed_official 146:f64d43ff0c18 242 * is disabled, the TSR can be read or written. */
mbed_official 146:f64d43ff0c18 243 *seconds = BR_RTC_TSR_TSR;
mbed_official 146:f64d43ff0c18 244
mbed_official 146:f64d43ff0c18 245 }
mbed_official 146:f64d43ff0c18 246
mbed_official 146:f64d43ff0c18 247 /*! @brief Writes to the time seconds counter.
mbed_official 146:f64d43ff0c18 248 * @param seconds [in] pointer to a variable from where to write the seconds.
mbed_official 146:f64d43ff0c18 249 * @return true: write success since time counter is disabled.
mbed_official 146:f64d43ff0c18 250 * false: write error since time counter is enabled.
mbed_official 146:f64d43ff0c18 251 */
mbed_official 146:f64d43ff0c18 252 static inline bool rtc_hal_set_seconds(const uint32_t * seconds)
mbed_official 146:f64d43ff0c18 253 {
mbed_official 146:f64d43ff0c18 254 /* When the time counter is enabled, the TSR is read only and increments
mbed_official 146:f64d43ff0c18 255 * once a second provided SR[TOF] or SR[TIF] are not set. The time counter
mbed_official 146:f64d43ff0c18 256 * reads as zero when SR[TOF] or SR[TIF] are set. When the time counter
mbed_official 146:f64d43ff0c18 257 * is disabled, the TSR can be read or written. Writing to the TSR when the
mbed_official 146:f64d43ff0c18 258 * time counter is disabled clears the SR[TOF] and/or the SR[TIF]. Writing
mbed_official 146:f64d43ff0c18 259 * to the TSR register with zero is supported, but not recommended since TSR
mbed_official 146:f64d43ff0c18 260 * reads as zero when SR[TIF] or SR[TOF] are set (indicating the time is
mbed_official 146:f64d43ff0c18 261 * invalid). */
mbed_official 146:f64d43ff0c18 262
mbed_official 146:f64d43ff0c18 263 bool result = false;
mbed_official 146:f64d43ff0c18 264
mbed_official 146:f64d43ff0c18 265 if(!(BR_RTC_SR_TCE))
mbed_official 146:f64d43ff0c18 266 {
mbed_official 146:f64d43ff0c18 267 BW_RTC_TSR_TSR(*seconds); /* jgsp: add write to prescaler with 0x00 before writing to TSR.*/
mbed_official 146:f64d43ff0c18 268 result = true;
mbed_official 146:f64d43ff0c18 269 }
mbed_official 146:f64d43ff0c18 270
mbed_official 146:f64d43ff0c18 271 return result;
mbed_official 146:f64d43ff0c18 272 }
mbed_official 146:f64d43ff0c18 273
mbed_official 146:f64d43ff0c18 274 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 275 /* RTC Time Prescaler*/
mbed_official 146:f64d43ff0c18 276 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 277
mbed_official 146:f64d43ff0c18 278 /*! @brief Reads the value of the time prescaler.
mbed_official 146:f64d43ff0c18 279 * @param prescale [out] pointer to variable where the prescaler's value
mbed_official 146:f64d43ff0c18 280 * is stored.
mbed_official 146:f64d43ff0c18 281 */
mbed_official 146:f64d43ff0c18 282 static inline void rtc_hal_get_prescaler(uint16_t * prescale)
mbed_official 146:f64d43ff0c18 283 {
mbed_official 146:f64d43ff0c18 284 /* When the time counter is enabled, the TPR is read only and increments
mbed_official 146:f64d43ff0c18 285 * every 32.768 kHz clock cycle. The time counter reads as zero when
mbed_official 146:f64d43ff0c18 286 * SR[TOF] or SR[TIF] are set. When the time counter is disabled, the TPR
mbed_official 146:f64d43ff0c18 287 * can be read or written. The TSR[TSR] increments when bit 14 of the TPR
mbed_official 146:f64d43ff0c18 288 * transitions from a logic one to a logic zero. */
mbed_official 146:f64d43ff0c18 289 *prescale = BR_RTC_TPR_TPR;
mbed_official 146:f64d43ff0c18 290
mbed_official 146:f64d43ff0c18 291 }
mbed_official 146:f64d43ff0c18 292
mbed_official 146:f64d43ff0c18 293 /*! @brief Sets the time prescaler.
mbed_official 146:f64d43ff0c18 294 * @param prescale [in] pointer to variable from where to write the
mbed_official 146:f64d43ff0c18 295 * seconds.
mbed_official 146:f64d43ff0c18 296 * @return true: set successfull; false: error, unable to set prescaler
mbed_official 146:f64d43ff0c18 297 * since the the time counter is enabled.
mbed_official 146:f64d43ff0c18 298 */
mbed_official 146:f64d43ff0c18 299 static inline bool rtc_hal_set_prescaler(const uint16_t * prescale)
mbed_official 146:f64d43ff0c18 300 {
mbed_official 146:f64d43ff0c18 301 /* When the time counter is enabled, the TPR is read only and increments
mbed_official 146:f64d43ff0c18 302 * every 32.768 kHz clock cycle. The time counter reads as zero when the
mbed_official 146:f64d43ff0c18 303 * SR[TOF] or SR[TIF] are set. When the time counter is disabled, the TPR
mbed_official 146:f64d43ff0c18 304 * can be read or written. The TSR[TSR] increments when bit 14 of the TPR
mbed_official 146:f64d43ff0c18 305 * transitions from a logic one to a logic zero. */
mbed_official 146:f64d43ff0c18 306 bool result = false;
mbed_official 146:f64d43ff0c18 307
mbed_official 146:f64d43ff0c18 308 if(!(BR_RTC_SR_TCE))
mbed_official 146:f64d43ff0c18 309 {
mbed_official 146:f64d43ff0c18 310 BW_RTC_TPR_TPR(*prescale);
mbed_official 146:f64d43ff0c18 311 result = true;
mbed_official 146:f64d43ff0c18 312 }
mbed_official 146:f64d43ff0c18 313
mbed_official 146:f64d43ff0c18 314 return result;
mbed_official 146:f64d43ff0c18 315
mbed_official 146:f64d43ff0c18 316 }
mbed_official 146:f64d43ff0c18 317
mbed_official 146:f64d43ff0c18 318 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 319 /* RTC Time Alarm*/
mbed_official 146:f64d43ff0c18 320 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 321
mbed_official 146:f64d43ff0c18 322 /*! @brief Reads the value of the time alarm.
mbed_official 146:f64d43ff0c18 323 * @param seconds [out] pointer to a variable where the alarm value in seconds
mbed_official 146:f64d43ff0c18 324 * will be stored.
mbed_official 146:f64d43ff0c18 325 */
mbed_official 146:f64d43ff0c18 326 static inline void rtc_hal_get_alarm(uint32_t * seconds)
mbed_official 146:f64d43ff0c18 327 {
mbed_official 146:f64d43ff0c18 328 *seconds = BR_RTC_TAR_TAR;
mbed_official 146:f64d43ff0c18 329 }
mbed_official 146:f64d43ff0c18 330
mbed_official 146:f64d43ff0c18 331 /*! @brief Sets the time alarm, this clears the time alarm flag.
mbed_official 146:f64d43ff0c18 332 * @param seconds [in] pointer to variable from where to write alarm value
mbed_official 146:f64d43ff0c18 333 * in seconds.
mbed_official 146:f64d43ff0c18 334 */
mbed_official 146:f64d43ff0c18 335 static inline void rtc_hal_set_alarm(const uint32_t * seconds)
mbed_official 146:f64d43ff0c18 336 {
mbed_official 146:f64d43ff0c18 337 /* When the time counter is enabled, the SR[TAF] is set whenever the TAR[TAR]
mbed_official 146:f64d43ff0c18 338 * equals the TSR[TSR] and the TSR[TSR] increments. Writing to the TAR
mbed_official 146:f64d43ff0c18 339 * clears the SR[TAF]. */
mbed_official 146:f64d43ff0c18 340 BW_RTC_TAR_TAR(*seconds);
mbed_official 146:f64d43ff0c18 341 }
mbed_official 146:f64d43ff0c18 342
mbed_official 146:f64d43ff0c18 343 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 344 /* RTC Time Compensation*/
mbed_official 146:f64d43ff0c18 345 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 346
mbed_official 146:f64d43ff0c18 347 /*! @brief Reads the compensation interval counter value.*/
mbed_official 146:f64d43ff0c18 348 /*! @param counter [out] pointer to variable where the value is stored.*/
mbed_official 146:f64d43ff0c18 349 static inline void rtc_hal_get_comp_intrvl_counter(uint8_t * counter)
mbed_official 146:f64d43ff0c18 350 {
mbed_official 146:f64d43ff0c18 351 *counter = BR_RTC_TCR_CIC;
mbed_official 146:f64d43ff0c18 352 }
mbed_official 146:f64d43ff0c18 353
mbed_official 146:f64d43ff0c18 354 /*! @brief Reads the current time compensation interval counter value.
mbed_official 146:f64d43ff0c18 355 * @param tcValue [out] pointer to variable where the value is stored.
mbed_official 146:f64d43ff0c18 356 */
mbed_official 146:f64d43ff0c18 357 static inline void rtc_hal_get_current_time_compensation(uint8_t * tcValue)
mbed_official 146:f64d43ff0c18 358 {
mbed_official 146:f64d43ff0c18 359 *tcValue = BR_RTC_TCR_TCV;
mbed_official 146:f64d43ff0c18 360 }
mbed_official 146:f64d43ff0c18 361
mbed_official 146:f64d43ff0c18 362 /*! @brief Reads the compensation interval. The value is the configured
mbed_official 146:f64d43ff0c18 363 * compensation interval in seconds from 1 to 256 to control
mbed_official 146:f64d43ff0c18 364 * how frequently the time compensation register should adjust the
mbed_official 146:f64d43ff0c18 365 * number of 32.768 kHz cycles in each second. The value is one
mbed_official 146:f64d43ff0c18 366 * less than the number of seconds (for example. Zero means a
mbed_official 146:f64d43ff0c18 367 * configuration for a compensation interval of one second).
mbed_official 146:f64d43ff0c18 368 * @param value [out] pointer to variable where the value is stored.
mbed_official 146:f64d43ff0c18 369 */
mbed_official 146:f64d43ff0c18 370 static inline void rtc_hal_get_compensation_interval(uint8_t * value)
mbed_official 146:f64d43ff0c18 371 {
mbed_official 146:f64d43ff0c18 372 *value = BR_RTC_TCR_CIR;
mbed_official 146:f64d43ff0c18 373 }
mbed_official 146:f64d43ff0c18 374
mbed_official 146:f64d43ff0c18 375 /*! @brief Writes the compensation interval. This configures the
mbed_official 146:f64d43ff0c18 376 * compensation interval in seconds from 1 to 256 to control
mbed_official 146:f64d43ff0c18 377 * how frequently the TCR should adjust the number of 32.768 kHz
mbed_official 146:f64d43ff0c18 378 * cycles in each second. The value written should be one less than
mbed_official 146:f64d43ff0c18 379 * the number of seconds (for example, write zero to configure for
mbed_official 146:f64d43ff0c18 380 * a compensation interval of one second). This register is double
mbed_official 146:f64d43ff0c18 381 * buffered and writes do not take affect until the end of the
mbed_official 146:f64d43ff0c18 382 * current compensation interval.
mbed_official 146:f64d43ff0c18 383 * @param value [in] pointer to a variable from where to write the value.
mbed_official 146:f64d43ff0c18 384 */
mbed_official 146:f64d43ff0c18 385 static inline void rtc_hal_set_compensation_interval(const uint8_t * value)
mbed_official 146:f64d43ff0c18 386 {
mbed_official 146:f64d43ff0c18 387 BW_RTC_TCR_CIR(*value);
mbed_official 146:f64d43ff0c18 388 }
mbed_official 146:f64d43ff0c18 389
mbed_official 146:f64d43ff0c18 390 /*! @brief Reads the time compensation value which is the configured number
mbed_official 146:f64d43ff0c18 391 * of the 32.768 kHz clock cycles in each second.
mbed_official 146:f64d43ff0c18 392 * @param value [out] pointer to variable where the value is stored.
mbed_official 146:f64d43ff0c18 393 */
mbed_official 146:f64d43ff0c18 394 static inline void rtc_hal_get_time_compensation(uint8_t * value)
mbed_official 146:f64d43ff0c18 395 {
mbed_official 146:f64d43ff0c18 396 *value = BR_RTC_TCR_TCR;
mbed_official 146:f64d43ff0c18 397 }
mbed_official 146:f64d43ff0c18 398
mbed_official 146:f64d43ff0c18 399 /*! @brief Writes to the RTC Time Compensation Register (RTC_TCR), field
mbed_official 146:f64d43ff0c18 400 * Time Compensation Register (TCR). Configuring the number of
mbed_official 146:f64d43ff0c18 401 * 32.768 kHz clock cycles in each second. This register is double
mbed_official 146:f64d43ff0c18 402 * buffered and writes do not take affect until the end of the
mbed_official 146:f64d43ff0c18 403 * current compensation interval.\n
mbed_official 146:f64d43ff0c18 404 * 80h Time prescaler register overflows every 32896 clock cycles.\n
mbed_official 146:f64d43ff0c18 405 * ... ...\n
mbed_official 146:f64d43ff0c18 406 * FFh Time prescaler register overflows every 32769 clock cycles.\n
mbed_official 146:f64d43ff0c18 407 * 00h Time prescaler register overflows every 32768 clock cycles.\n
mbed_official 146:f64d43ff0c18 408 * 01h Time prescaler register overflows every 32767 clock cycles.\n
mbed_official 146:f64d43ff0c18 409 * ... ...\n
mbed_official 146:f64d43ff0c18 410 * 7Fh Time prescaler register overflows every 32641 clock cycles.\n
mbed_official 146:f64d43ff0c18 411 * @param enable [in] pointer to variable from where to write the value.
mbed_official 146:f64d43ff0c18 412 */
mbed_official 146:f64d43ff0c18 413 static inline void rtc_hal_set_time_compensation(const uint8_t * enable)
mbed_official 146:f64d43ff0c18 414 {
mbed_official 146:f64d43ff0c18 415 BW_RTC_TCR_TCR(*enable);
mbed_official 146:f64d43ff0c18 416 }
mbed_official 146:f64d43ff0c18 417
mbed_official 146:f64d43ff0c18 418 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 419 /* RTC Control*/
mbed_official 146:f64d43ff0c18 420 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 421
mbed_official 146:f64d43ff0c18 422 /*! @brief Enables/disables oscillator configuration for 2pF load.*/
mbed_official 146:f64d43ff0c18 423 /*! @param enable true: enables load; false: disables load.*/
mbed_official 146:f64d43ff0c18 424 static inline void rtc_hal_config_osc_2pf_load(bool enable)
mbed_official 146:f64d43ff0c18 425 {
mbed_official 146:f64d43ff0c18 426 BW_RTC_CR_SC2P(enable);
mbed_official 146:f64d43ff0c18 427 }
mbed_official 146:f64d43ff0c18 428
mbed_official 146:f64d43ff0c18 429 /*! @brief Enables/disables oscillator configuration for 4pF load.*/
mbed_official 146:f64d43ff0c18 430 /*! @param enable true: enables load; false: disables load.*/
mbed_official 146:f64d43ff0c18 431 static inline void rtc_hal_config_osc_4pf_load(bool enable)
mbed_official 146:f64d43ff0c18 432 {
mbed_official 146:f64d43ff0c18 433 BW_RTC_CR_SC4P(enable);
mbed_official 146:f64d43ff0c18 434 }
mbed_official 146:f64d43ff0c18 435
mbed_official 146:f64d43ff0c18 436 /*! @brief Enables/disables oscillator configuration for 8pF load.*/
mbed_official 146:f64d43ff0c18 437 /*! @param enable true: enables load; false: disables load.*/
mbed_official 146:f64d43ff0c18 438 static inline void rtc_hal_config_osc_8pf_load(bool enable)
mbed_official 146:f64d43ff0c18 439 {
mbed_official 146:f64d43ff0c18 440 BW_RTC_CR_SC8P(enable);
mbed_official 146:f64d43ff0c18 441 }
mbed_official 146:f64d43ff0c18 442
mbed_official 146:f64d43ff0c18 443 /*! @brief Enables/disables oscillator configuration for 16pF load.*/
mbed_official 146:f64d43ff0c18 444 /*! @param enable true: enables load; false: disables load.*/
mbed_official 146:f64d43ff0c18 445 static inline void rtc_hal_config_osc_16pf_load(bool enable)
mbed_official 146:f64d43ff0c18 446 {
mbed_official 146:f64d43ff0c18 447 BW_RTC_CR_SC16P(enable);
mbed_official 146:f64d43ff0c18 448 }
mbed_official 146:f64d43ff0c18 449
mbed_official 146:f64d43ff0c18 450 /*! @brief Enables/disables the 32kHz clock output to other peripherals.*/
mbed_official 146:f64d43ff0c18 451 /*! @param enable true: enables clock out; false: disables clock out.*/
mbed_official 146:f64d43ff0c18 452 static inline void rtc_hal_config_clock_out(bool enable)
mbed_official 146:f64d43ff0c18 453 {
mbed_official 146:f64d43ff0c18 454 BW_RTC_CR_CLKO(!enable);
mbed_official 146:f64d43ff0c18 455 }
mbed_official 146:f64d43ff0c18 456
mbed_official 146:f64d43ff0c18 457 /*! @brief Enables/disables the oscillator. After enablement, wait the
mbed_official 146:f64d43ff0c18 458 * oscillator startup time before enabling the time counter to
mbed_official 146:f64d43ff0c18 459 * allow the 32.768 kHz clock time to stabilize.
mbed_official 146:f64d43ff0c18 460 * @param enable true: enables oscillator; false: disables oscillator.
mbed_official 146:f64d43ff0c18 461 */
mbed_official 146:f64d43ff0c18 462 static inline void rtc_hal_config_oscillator(bool enable)
mbed_official 146:f64d43ff0c18 463 {
mbed_official 146:f64d43ff0c18 464 BW_RTC_CR_OSCE(enable);
mbed_official 146:f64d43ff0c18 465 }
mbed_official 146:f64d43ff0c18 466
mbed_official 146:f64d43ff0c18 467 /*! @brief Enables/disables the update mode. This mode allows the time counter
mbed_official 146:f64d43ff0c18 468 * enabled to be written even when the status register is locked.
mbed_official 146:f64d43ff0c18 469 * When set, the time counter enable, can always be written if the
mbed_official 146:f64d43ff0c18 470 * TIF (Time Invalid Flag) or TOF (Time Overflow Flag) are set or
mbed_official 146:f64d43ff0c18 471 * if the time counter enable is clear. For devices with the
mbed_official 146:f64d43ff0c18 472 * monotonic counter, it allows the monotonic enable to be written
mbed_official 146:f64d43ff0c18 473 * when it is locked. When set, the monotonic enable can always be
mbed_official 146:f64d43ff0c18 474 * written if the TIF (Time Invalid Flag) or TOF (Time Overflow Flag)
mbed_official 146:f64d43ff0c18 475 * are set or if the monotonic counter enable is clear.
mbed_official 146:f64d43ff0c18 476 * For devices with tamper detect, it allows the it to be written
mbed_official 146:f64d43ff0c18 477 * when it is locked. When set, the tamper detect can always be
mbed_official 146:f64d43ff0c18 478 * written if the TIF (Time Invalid Flag) is clear.
mbed_official 146:f64d43ff0c18 479 * Note: Tamper and Monotonic features are not available in all MCUs.
mbed_official 146:f64d43ff0c18 480 * @param lock true: enables register lock, registers cannot be written
mbed_official 146:f64d43ff0c18 481 * when locked; False: disables register lock, registers
mbed_official 146:f64d43ff0c18 482 * can be written when locked under limited conditions.
mbed_official 146:f64d43ff0c18 483 */
mbed_official 146:f64d43ff0c18 484 static inline void rtc_hal_configure_update_mode(bool lock)
mbed_official 146:f64d43ff0c18 485 {
mbed_official 146:f64d43ff0c18 486 BW_RTC_CR_UM(lock);
mbed_official 146:f64d43ff0c18 487 }
mbed_official 146:f64d43ff0c18 488
mbed_official 146:f64d43ff0c18 489 /*! @brief Enables/disables the supervisor access, which configures
mbed_official 146:f64d43ff0c18 490 * non-supervisor mode write access to all RTC registers and
mbed_official 146:f64d43ff0c18 491 * non-supervisor mode read access to RTC tamper/monotonic registers.
mbed_official 146:f64d43ff0c18 492 * Note: Tamper and Monotonic features are NOT available in all MCUs.
mbed_official 146:f64d43ff0c18 493 * @param enable_reg_write true: enables register lock, Non-supervisor
mbed_official 146:f64d43ff0c18 494 * mode write accesses are supported; false: disables register
mbed_official 146:f64d43ff0c18 495 * lock, non-supervisor mode write accesses are not supported and
mbed_official 146:f64d43ff0c18 496 * generate a bus error.
mbed_official 146:f64d43ff0c18 497 */
mbed_official 146:f64d43ff0c18 498 static inline void rtc_hal_configure_supervisor_access(bool enable_reg_write)
mbed_official 146:f64d43ff0c18 499 {
mbed_official 146:f64d43ff0c18 500 BW_RTC_CR_SUP(enable_reg_write);
mbed_official 146:f64d43ff0c18 501 }
mbed_official 146:f64d43ff0c18 502
mbed_official 146:f64d43ff0c18 503 #if FSL_FEATURE_RTC_HAS_WAKEUP_PIN
mbed_official 146:f64d43ff0c18 504 /*! @brief Enables/disables the wakeup pin.
mbed_official 146:f64d43ff0c18 505 * Note: The wakeup pin is optional and not available on all devices.
mbed_official 146:f64d43ff0c18 506 * @param enable_wp true: enables wakeup-pin, wakeup pin asserts if the
mbed_official 146:f64d43ff0c18 507 * RTC interrupt asserts and the chip is powered down;
mbed_official 146:f64d43ff0c18 508 * false: disables wakeup-pin.
mbed_official 146:f64d43ff0c18 509 */
mbed_official 146:f64d43ff0c18 510 static inline void rtc_hal_config_wakeup_pin(bool enable_wp)
mbed_official 146:f64d43ff0c18 511 {
mbed_official 146:f64d43ff0c18 512 BW_RTC_CR_WPE(enable_wp);
mbed_official 146:f64d43ff0c18 513 }
mbed_official 146:f64d43ff0c18 514 #endif
mbed_official 146:f64d43ff0c18 515
mbed_official 146:f64d43ff0c18 516 /*! @brief Performs a software reset on the RTC module. This resets all
mbed_official 146:f64d43ff0c18 517 * RTC registers except for the SWR bit and the RTC_WAR and RTC_RAR
mbed_official 146:f64d43ff0c18 518 * registers. The SWR bit is cleared after VBAT POR and by software
mbed_official 146:f64d43ff0c18 519 * explicitly clearing it.
mbed_official 146:f64d43ff0c18 520 * Note: access control features (RTC_WAR and RTC_RAR registers)
mbed_official 146:f64d43ff0c18 521 * are not available in all MCUs.
mbed_official 146:f64d43ff0c18 522 */
mbed_official 146:f64d43ff0c18 523 static inline void rtc_hal_software_reset(void)
mbed_official 146:f64d43ff0c18 524 {
mbed_official 146:f64d43ff0c18 525 BW_RTC_CR_SWR(1u);
mbed_official 146:f64d43ff0c18 526 }
mbed_official 146:f64d43ff0c18 527
mbed_official 146:f64d43ff0c18 528 /*! @brief Clears the software reset flag.*/
mbed_official 146:f64d43ff0c18 529 static inline void rtc_hal_software_reset_flag_clear(void)
mbed_official 146:f64d43ff0c18 530 {
mbed_official 146:f64d43ff0c18 531 BW_RTC_CR_SWR(0u);
mbed_official 146:f64d43ff0c18 532 }
mbed_official 146:f64d43ff0c18 533
mbed_official 146:f64d43ff0c18 534 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 535 /* RTC Status*/
mbed_official 146:f64d43ff0c18 536 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 537
mbed_official 146:f64d43ff0c18 538 /*! @brief Reads the time counter enabled/disabled status.
mbed_official 146:f64d43ff0c18 539 * @return true: time counter is enabled, time seconds register and time
mbed_official 146:f64d43ff0c18 540 * prescaler register are not writeable, but increment; false: time
mbed_official 146:f64d43ff0c18 541 * counter is disabled, time seconds register and time prescaler
mbed_official 146:f64d43ff0c18 542 * register are writeable, but do not increment. */
mbed_official 146:f64d43ff0c18 543 static inline bool rtc_hal_is_counter_enabled(void)
mbed_official 146:f64d43ff0c18 544 {
mbed_official 146:f64d43ff0c18 545 return (bool)BR_RTC_SR_TCE;
mbed_official 146:f64d43ff0c18 546 }
mbed_official 146:f64d43ff0c18 547
mbed_official 146:f64d43ff0c18 548 /*! @brief Changes the time counter enabled/disabled status.
mbed_official 146:f64d43ff0c18 549 * @param enable true: enables the time counter;
mbed_official 146:f64d43ff0c18 550 * false: disables the time counter.
mbed_official 146:f64d43ff0c18 551 */
mbed_official 146:f64d43ff0c18 552 static inline void rtc_hal_counter_enable(bool enable)
mbed_official 146:f64d43ff0c18 553 {
mbed_official 146:f64d43ff0c18 554 BW_RTC_SR_TCE(enable);
mbed_official 146:f64d43ff0c18 555 }
mbed_official 146:f64d43ff0c18 556
mbed_official 146:f64d43ff0c18 557 /*! @brief Checks if the configured time alarm occurred.
mbed_official 146:f64d43ff0c18 558 * @return true: time alarm has occurred.
mbed_official 146:f64d43ff0c18 559 * false: NO time alarm occurred.
mbed_official 146:f64d43ff0c18 560 */
mbed_official 146:f64d43ff0c18 561 static inline bool rtc_hal_is_alarm_occured(void)
mbed_official 146:f64d43ff0c18 562 {
mbed_official 146:f64d43ff0c18 563 /* Reads time alarm flag (TAF). This flag is set when the time
mbed_official 146:f64d43ff0c18 564 * alarm register (TAR) equals the time seconds register (TSR) and
mbed_official 146:f64d43ff0c18 565 * the TSR increments. This flag is cleared by writing the TAR register. */
mbed_official 146:f64d43ff0c18 566 return (bool)BR_RTC_SR_TAF;
mbed_official 146:f64d43ff0c18 567 }
mbed_official 146:f64d43ff0c18 568
mbed_official 146:f64d43ff0c18 569 /*! @brief Checks whether a counter overflow happened.
mbed_official 146:f64d43ff0c18 570 * @return true: time overflow occurred and time counter is zero.
mbed_official 146:f64d43ff0c18 571 * false: NO time overflow occurred.
mbed_official 146:f64d43ff0c18 572 */
mbed_official 146:f64d43ff0c18 573 static inline bool rtc_hal_is_counter_overflow(void)
mbed_official 146:f64d43ff0c18 574 {
mbed_official 146:f64d43ff0c18 575 /* Reads the value of RTC Status Register (RTC_SR), field Time
mbed_official 146:f64d43ff0c18 576 * Overflow Flag (TOF). This flag is set when the time counter is
mbed_official 146:f64d43ff0c18 577 * enabled and overflows. The TSR and TPR do not increment and read
mbed_official 146:f64d43ff0c18 578 * as zero when this bit is set. This flag is cleared by writing the
mbed_official 146:f64d43ff0c18 579 * TSR register when the time counter is disabled. */
mbed_official 146:f64d43ff0c18 580 return (bool)BR_RTC_SR_TOF;
mbed_official 146:f64d43ff0c18 581 }
mbed_official 146:f64d43ff0c18 582
mbed_official 146:f64d43ff0c18 583 /*! @brief Checks whether the time is marked as invalid.
mbed_official 146:f64d43ff0c18 584 * @return true: time is INVALID and time counter is zero.
mbed_official 146:f64d43ff0c18 585 * false: time is valid.
mbed_official 146:f64d43ff0c18 586 */
mbed_official 146:f64d43ff0c18 587 static inline bool rtc_hal_is_time_invalid(void)
mbed_official 146:f64d43ff0c18 588 {
mbed_official 146:f64d43ff0c18 589 /*! Reads the value of the RTC Status Register (RTC_SR), field Time
mbed_official 146:f64d43ff0c18 590 * Invalid Flag (TIF). This flag is set on the VBAT POR or the software
mbed_official 146:f64d43ff0c18 591 * reset. The TSR and TPR do not increment and read as zero when
mbed_official 146:f64d43ff0c18 592 * this bit is set. This flag is cleared by writing the TSR
mbed_official 146:f64d43ff0c18 593 * register when the time counter is disabled. */
mbed_official 146:f64d43ff0c18 594 return (bool)BR_RTC_SR_TIF;
mbed_official 146:f64d43ff0c18 595 }
mbed_official 146:f64d43ff0c18 596
mbed_official 146:f64d43ff0c18 597 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 598 /* RTC Lock*/
mbed_official 146:f64d43ff0c18 599 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 600
mbed_official 146:f64d43ff0c18 601 /*! @brief Configures the register lock to other module fields.
mbed_official 146:f64d43ff0c18 602 * @param bitfields [in] configuration flags:\n
mbed_official 146:f64d43ff0c18 603 * Valid bitfields:\n
mbed_official 146:f64d43ff0c18 604 * LRL: Lock Register Lock \n
mbed_official 146:f64d43ff0c18 605 * SRL: Status Register Lock \n
mbed_official 146:f64d43ff0c18 606 * CRL: Control Register Lock \n
mbed_official 146:f64d43ff0c18 607 * TCL: Time Compensation Lock \n
mbed_official 146:f64d43ff0c18 608 *
mbed_official 146:f64d43ff0c18 609 * For MCUs that have the Tamper Detect only: \n
mbed_official 146:f64d43ff0c18 610 * TIL: Tamper Interrupt Lock \n
mbed_official 146:f64d43ff0c18 611 * TTL: Tamper Trim Lock \n
mbed_official 146:f64d43ff0c18 612 * TDL: Tamper Detect Lock \n
mbed_official 146:f64d43ff0c18 613 * TEL: Tamper Enable Lock \n
mbed_official 146:f64d43ff0c18 614 * TTSL: Tamper Time Seconds Lock \n
mbed_official 146:f64d43ff0c18 615 *
mbed_official 146:f64d43ff0c18 616 * For MCUs that have the Monotonic Counter only: \n
mbed_official 146:f64d43ff0c18 617 * MCHL: Monotonic Counter High Lock \n
mbed_official 146:f64d43ff0c18 618 * MCLL: Monotonic Counter Low Lock \n
mbed_official 146:f64d43ff0c18 619 * MEL: Monotonic Enable Lock \n
mbed_official 146:f64d43ff0c18 620 */
mbed_official 146:f64d43ff0c18 621 static inline void rtc_hal_config_lock_registers(hw_rtc_lr_t bitfields)
mbed_official 146:f64d43ff0c18 622 {
mbed_official 146:f64d43ff0c18 623 uint32_t valid_flags = 0;
mbed_official 146:f64d43ff0c18 624
mbed_official 146:f64d43ff0c18 625 valid_flags |= (BM_RTC_LR_LRL | BM_RTC_LR_SRL | BM_RTC_LR_CRL |
mbed_official 146:f64d43ff0c18 626 BM_RTC_LR_TCL);
mbed_official 146:f64d43ff0c18 627
mbed_official 146:f64d43ff0c18 628 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 146:f64d43ff0c18 629 valid_flags |= (BM_RTC_LR_MCHL | BM_RTC_LR_MCLL | BM_RTC_LR_MEL);
mbed_official 146:f64d43ff0c18 630 #endif
mbed_official 146:f64d43ff0c18 631 HW_RTC_LR_WR((bitfields.U) & valid_flags);
mbed_official 146:f64d43ff0c18 632
mbed_official 146:f64d43ff0c18 633 }
mbed_official 146:f64d43ff0c18 634
mbed_official 146:f64d43ff0c18 635 /*! @brief Obtains the lock status of the lock register.
mbed_official 146:f64d43ff0c18 636 * @return true: lock register is not locked and writes complete normally.
mbed_official 146:f64d43ff0c18 637 * false: lock register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 638 */
mbed_official 146:f64d43ff0c18 639 static inline bool rtc_hal_get_lock_reg_lock(void)
mbed_official 146:f64d43ff0c18 640 {
mbed_official 146:f64d43ff0c18 641 /* Reads the value of the RTC Lock Register (RTC_LR),
mbed_official 146:f64d43ff0c18 642 * field Lock Register Lock (LRL). Once cleared, this flag can
mbed_official 146:f64d43ff0c18 643 * only be set by VBAT POR or software reset. */
mbed_official 146:f64d43ff0c18 644 return (bool)BR_RTC_LR_LRL;
mbed_official 146:f64d43ff0c18 645 }
mbed_official 146:f64d43ff0c18 646
mbed_official 146:f64d43ff0c18 647 /*! @brief Changes the lock status of the lock register. Once cleared,
mbed_official 146:f64d43ff0c18 648 * this can only be set by the VBAT POR or the software reset.
mbed_official 146:f64d43ff0c18 649 * @param set_to true: Lock register is not locked and writes complete normally.
mbed_official 146:f64d43ff0c18 650 * false: Lock register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 651 */
mbed_official 146:f64d43ff0c18 652 static inline void rtc_hal_set_lock_reg_lock(bool set_to)
mbed_official 146:f64d43ff0c18 653 {
mbed_official 146:f64d43ff0c18 654 /* Writes to the RTC Lock Register (RTC_LR), field Lock Register Lock (LRL).
mbed_official 146:f64d43ff0c18 655 * Once cleared, this flag can only be set by VBAT POR or software reset. */
mbed_official 146:f64d43ff0c18 656 BW_RTC_LR_LRL((uint32_t) set_to);
mbed_official 146:f64d43ff0c18 657 }
mbed_official 146:f64d43ff0c18 658
mbed_official 146:f64d43ff0c18 659 /*! @brief Obtains the state of the status register lock.
mbed_official 146:f64d43ff0c18 660 * @return true: Status register is not locked and writes complete
mbed_official 146:f64d43ff0c18 661 * normally.
mbed_official 146:f64d43ff0c18 662 * false: Status register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 663 */
mbed_official 146:f64d43ff0c18 664 static inline bool rtc_hal_get_status_reg_lock(void)
mbed_official 146:f64d43ff0c18 665 {
mbed_official 146:f64d43ff0c18 666 /* Reads the value of the RTC Lock Register (RTC_LR), field Status Register
mbed_official 146:f64d43ff0c18 667 * Lock (SRL). Once cleared, this flag can only be set by VBAT POR or software
mbed_official 146:f64d43ff0c18 668 * reset. */
mbed_official 146:f64d43ff0c18 669 return (bool)BR_RTC_LR_SRL;
mbed_official 146:f64d43ff0c18 670 }
mbed_official 146:f64d43ff0c18 671
mbed_official 146:f64d43ff0c18 672 /*! @brief Changes the state of the status register lock. Once cleared,
mbed_official 146:f64d43ff0c18 673 * this can only be set by the VBAT POR or the software reset.
mbed_official 146:f64d43ff0c18 674 * @param set_to true: Status register is not locked and writes complete
mbed_official 146:f64d43ff0c18 675 * normally.
mbed_official 146:f64d43ff0c18 676 * false: Status register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 677 */
mbed_official 146:f64d43ff0c18 678 static inline void rtc_hal_set_status_reg_lock(bool set_to)
mbed_official 146:f64d43ff0c18 679 {
mbed_official 146:f64d43ff0c18 680 BW_RTC_LR_SRL((uint32_t) set_to);
mbed_official 146:f64d43ff0c18 681 }
mbed_official 146:f64d43ff0c18 682
mbed_official 146:f64d43ff0c18 683 /*! @brief Obtains the state of the control register lock
mbed_official 146:f64d43ff0c18 684 * @return true: Control register is not locked and writes complete
mbed_official 146:f64d43ff0c18 685 * normally.
mbed_official 146:f64d43ff0c18 686 * false: Control register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 687 */
mbed_official 146:f64d43ff0c18 688 static inline bool rtc_hal_get_control_reg_lock(void)
mbed_official 146:f64d43ff0c18 689 {
mbed_official 146:f64d43ff0c18 690 /* Reads the value of the RTC Lock Register (RTC_LR), field Control Register
mbed_official 146:f64d43ff0c18 691 * Lock (CRL). Once cleared, this flag can only be set by the VBAT POR or the software
mbed_official 146:f64d43ff0c18 692 * reset. */
mbed_official 146:f64d43ff0c18 693 return (bool)BR_RTC_LR_CRL;
mbed_official 146:f64d43ff0c18 694 }
mbed_official 146:f64d43ff0c18 695
mbed_official 146:f64d43ff0c18 696 /*! @brief Changes the state of the control register lock. Once cleared,
mbed_official 146:f64d43ff0c18 697 * this can only be set by the VBAT POR or the software reset.
mbed_official 146:f64d43ff0c18 698 * @param set_to true: Control register is not locked and writes complete
mbed_official 146:f64d43ff0c18 699 * normally.
mbed_official 146:f64d43ff0c18 700 * false: Control register is locked and writes are ignored.
mbed_official 146:f64d43ff0c18 701 */
mbed_official 146:f64d43ff0c18 702 static inline void rtc_hal_set_control_reg_lock(bool set_to)
mbed_official 146:f64d43ff0c18 703 {
mbed_official 146:f64d43ff0c18 704 /* Writes to the RTC Lock Register (RTC_LR), field Control Register Lock (CRL).
mbed_official 146:f64d43ff0c18 705 * Once cleared, this flag can only be set by VBAT POR or software reset. */
mbed_official 146:f64d43ff0c18 706 BW_RTC_LR_CRL((uint32_t) set_to);
mbed_official 146:f64d43ff0c18 707 }
mbed_official 146:f64d43ff0c18 708
mbed_official 146:f64d43ff0c18 709 /*! @brief Obtains the state of the time compensation lock.
mbed_official 146:f64d43ff0c18 710 * @return true: Time compensation register is not locked and writes
mbed_official 146:f64d43ff0c18 711 * complete normally.
mbed_official 146:f64d43ff0c18 712 * false: Time compensation register is locked and writes are
mbed_official 146:f64d43ff0c18 713 * ignored.
mbed_official 146:f64d43ff0c18 714 */
mbed_official 146:f64d43ff0c18 715 static inline bool rtc_hal_get_time_comp_lock(void)
mbed_official 146:f64d43ff0c18 716 {
mbed_official 146:f64d43ff0c18 717 /* Reads the value of the RTC Lock Register (RTC_LR), field Time Compensation
mbed_official 146:f64d43ff0c18 718 * Lock (TCL). Once cleared, this flag can only be set by VBAT POR or software
mbed_official 146:f64d43ff0c18 719 * reset. */
mbed_official 146:f64d43ff0c18 720 return (bool)BR_RTC_LR_TCL;
mbed_official 146:f64d43ff0c18 721 }
mbed_official 146:f64d43ff0c18 722
mbed_official 146:f64d43ff0c18 723 /*! @brief Changes the state of the time compensation lock. Once cleared,
mbed_official 146:f64d43ff0c18 724 * this can only be set by the VBAT POR or the software reset.
mbed_official 146:f64d43ff0c18 725 * @param set_to true: Time compensation register is not locked and writes
mbed_official 146:f64d43ff0c18 726 * complete normally.
mbed_official 146:f64d43ff0c18 727 * false: Time compensation register is locked and writes are
mbed_official 146:f64d43ff0c18 728 * ignored.
mbed_official 146:f64d43ff0c18 729 */
mbed_official 146:f64d43ff0c18 730 static inline void rtc_hal_set_time_comp_lock(bool set_to)
mbed_official 146:f64d43ff0c18 731 {
mbed_official 146:f64d43ff0c18 732 /* Writes to the RTC Lock Register (RTC_LR), field Time Compensation Lock (TCL).
mbed_official 146:f64d43ff0c18 733 * Once cleared, this flag can only be set by VBAT POR or software reset. */
mbed_official 146:f64d43ff0c18 734 BW_RTC_LR_TCL((uint32_t) set_to);
mbed_official 146:f64d43ff0c18 735 }
mbed_official 146:f64d43ff0c18 736
mbed_official 146:f64d43ff0c18 737 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 738 /* RTC Interrupt Enable*/
mbed_official 146:f64d43ff0c18 739 /*-------------------------------------------------------------------------------------------*/
mbed_official 146:f64d43ff0c18 740
mbed_official 146:f64d43ff0c18 741 /*! @brief Enables/disables RTC interrupts.
mbed_official 146:f64d43ff0c18 742 * @param bitfields [in] set/clear respective bitfields to enabled/disabled
mbed_official 146:f64d43ff0c18 743 * interrupts. \n
mbed_official 146:f64d43ff0c18 744 * [out] resulting interrupt enable state. \n
mbed_official 146:f64d43ff0c18 745 * Valid bitfields: \n
mbed_official 146:f64d43ff0c18 746 * TSIE: Time Seconds Interrupt Enable \n
mbed_official 146:f64d43ff0c18 747 * TAIE: Time Alarm Interrupt Enable \n
mbed_official 146:f64d43ff0c18 748 * TOIE: Time Overflow Interrupt Enable \n
mbed_official 146:f64d43ff0c18 749 * TIIE: Time Invalid Interrupt Enable \n
mbed_official 146:f64d43ff0c18 750 * \n
mbed_official 146:f64d43ff0c18 751 * For MCUs that have the Wakeup Pin only: \n
mbed_official 146:f64d43ff0c18 752 * WPON: Wakeup Pin On (see the corresponding MCU's reference manual)\n
mbed_official 146:f64d43ff0c18 753 * \n
mbed_official 146:f64d43ff0c18 754 * For MCUs that have the Monotonic Counter only: \n
mbed_official 146:f64d43ff0c18 755 * MOIE: Monotonic Overflow Interrupt Enable \n
mbed_official 146:f64d43ff0c18 756 */
mbed_official 146:f64d43ff0c18 757 static inline void rtc_hal_config_interrupts(hw_rtc_ier_t * bitfields)
mbed_official 146:f64d43ff0c18 758 {
mbed_official 146:f64d43ff0c18 759 HW_RTC_IER_WR((bitfields->U) & ( BM_RTC_IER_TSIE | BM_RTC_IER_TAIE | BM_RTC_IER_TOIE |
mbed_official 146:f64d43ff0c18 760 BM_RTC_IER_TIIE));
mbed_official 146:f64d43ff0c18 761
mbed_official 146:f64d43ff0c18 762 #if FSL_FEATURE_RTC_HAS_WAKEUP_PIN
mbed_official 146:f64d43ff0c18 763 BW_RTC_IER_WPON(bitfields->B.WPON);
mbed_official 146:f64d43ff0c18 764 #endif
mbed_official 146:f64d43ff0c18 765 #if FSL_FEATURE_RTC_HAS_MONOTONIC
mbed_official 146:f64d43ff0c18 766 BW_RTC_IER_MOIE(bitfields->B.MOIE);
mbed_official 146:f64d43ff0c18 767 #endif
mbed_official 146:f64d43ff0c18 768
mbed_official 146:f64d43ff0c18 769 bitfields->U = HW_RTC_IER_RD();
mbed_official 146:f64d43ff0c18 770 }
mbed_official 146:f64d43ff0c18 771
mbed_official 146:f64d43ff0c18 772 /*! @brief Checks whether the Time Seconds Interrupt is enabled/disabled.
mbed_official 146:f64d43ff0c18 773 * @return true: Seconds interrupt is enabled.
mbed_official 146:f64d43ff0c18 774 * false: Seconds interrupt is disabled.
mbed_official 146:f64d43ff0c18 775 */
mbed_official 146:f64d43ff0c18 776 static inline bool rtc_hal_read_seconds_int_enable(void)
mbed_official 146:f64d43ff0c18 777 {
mbed_official 146:f64d43ff0c18 778 /* Reads the value of the RTC Interrupt Enable Register (RTC_IER), field Time
mbed_official 146:f64d43ff0c18 779 * Seconds Interrupt Enable (TSIE). The seconds interrupt is an edge-sensitive
mbed_official 146:f64d43ff0c18 780 * interrupt with a dedicated interrupt vector. It is generated once a second
mbed_official 146:f64d43ff0c18 781 * and requires no software overhead (there is no corresponding status flag to
mbed_official 146:f64d43ff0c18 782 * clear). */
mbed_official 146:f64d43ff0c18 783 return (bool)BR_RTC_IER_TSIE;
mbed_official 146:f64d43ff0c18 784 }
mbed_official 146:f64d43ff0c18 785
mbed_official 146:f64d43ff0c18 786 /*! @brief Enables/disables the Time Seconds Interrupt.
mbed_official 146:f64d43ff0c18 787 * Note: The seconds interrupt is an edge-sensitive interrupt with a
mbed_official 146:f64d43ff0c18 788 * dedicated interrupt vector. It is generated once a second and
mbed_official 146:f64d43ff0c18 789 * requires no software overhead (there is no corresponding status
mbed_official 146:f64d43ff0c18 790 * flag to clear).
mbed_official 146:f64d43ff0c18 791 * @param enable true: Seconds interrupt is enabled.
mbed_official 146:f64d43ff0c18 792 * false: Seconds interrupt is disabled.
mbed_official 146:f64d43ff0c18 793 */
mbed_official 146:f64d43ff0c18 794 static inline void rtc_hal_config_seconds_int(bool enable)
mbed_official 146:f64d43ff0c18 795 {
mbed_official 146:f64d43ff0c18 796 /* Writes to the RTC Interrupt Enable Register (RTC_IER), field Time Seconds
mbed_official 146:f64d43ff0c18 797 * Interrupt Enable (TSIE). The seconds interrupt is an edge-sensitive
mbed_official 146:f64d43ff0c18 798 * interrupt with a dedicated interrupt vector. It is generated once a second
mbed_official 146:f64d43ff0c18 799 * and requires no software overhead (there is no corresponding status flag to
mbed_official 146:f64d43ff0c18 800 * clear). */
mbed_official 146:f64d43ff0c18 801 BW_RTC_IER_TSIE((uint32_t) enable);
mbed_official 146:f64d43ff0c18 802 }
mbed_official 146:f64d43ff0c18 803
mbed_official 146:f64d43ff0c18 804 /*! @brief Checks whether the Time Alarm Interrupt is enabled/disabled.
mbed_official 146:f64d43ff0c18 805 * @return true: Time alarm flag does generate an interrupt.
mbed_official 146:f64d43ff0c18 806 * false: Time alarm flag does not generate an interrupt.
mbed_official 146:f64d43ff0c18 807 */
mbed_official 146:f64d43ff0c18 808 static inline bool rtc_hal_read_alarm_int_enable(void)
mbed_official 146:f64d43ff0c18 809 {
mbed_official 146:f64d43ff0c18 810 /* Reads the value of the RTC Interrupt Enable Register (RTC_IER),
mbed_official 146:f64d43ff0c18 811 * field Time Alarm Interrupt Enable (TAIE). */
mbed_official 146:f64d43ff0c18 812 return (bool)BR_RTC_IER_TAIE;
mbed_official 146:f64d43ff0c18 813 }
mbed_official 146:f64d43ff0c18 814
mbed_official 146:f64d43ff0c18 815 /*! @brief Enables/disables the Time Alarm Interrupt.
mbed_official 146:f64d43ff0c18 816 * @param enable true: Time alarm flag does generate an interrupt.
mbed_official 146:f64d43ff0c18 817 * false: Time alarm flag does not generate an interrupt.
mbed_official 146:f64d43ff0c18 818 */
mbed_official 146:f64d43ff0c18 819 static inline void rtc_hal_config_alarm_int_enable(bool enable)
mbed_official 146:f64d43ff0c18 820 {
mbed_official 146:f64d43ff0c18 821 /* Writes to the RTC Interrupt Enable Register (RTC_IER), field Time Alarm
mbed_official 146:f64d43ff0c18 822 * Interrupt Enable (TAIE). */
mbed_official 146:f64d43ff0c18 823 BW_RTC_IER_TAIE((uint32_t) enable);
mbed_official 146:f64d43ff0c18 824 }
mbed_official 146:f64d43ff0c18 825
mbed_official 146:f64d43ff0c18 826 /*! @brief Checks whether the Time Overflow Interrupt is enabled/disabled .
mbed_official 146:f64d43ff0c18 827 * @return true: Time overflow flag does generate an interrupt.
mbed_official 146:f64d43ff0c18 828 * false: Time overflow flag does not generate an interrupt.
mbed_official 146:f64d43ff0c18 829 */
mbed_official 146:f64d43ff0c18 830 static inline bool rtc_hal_read_time_overflow_int_enable(void)
mbed_official 146:f64d43ff0c18 831 {
mbed_official 146:f64d43ff0c18 832 /* Reads the value of the RTC Interrupt Enable Register (RTC_IER), field
mbed_official 146:f64d43ff0c18 833 * Time Overflow Interrupt Enable (TOIE). */
mbed_official 146:f64d43ff0c18 834 return (bool)BR_RTC_IER_TOIE;
mbed_official 146:f64d43ff0c18 835 }
mbed_official 146:f64d43ff0c18 836
mbed_official 146:f64d43ff0c18 837 /*! @brief Enables/disables the Time Overflow Interrupt.
mbed_official 146:f64d43ff0c18 838 * @param enable true: Time overflow flag does generate an interrupt.
mbed_official 146:f64d43ff0c18 839 * false: Time overflow flag does not generate an interrupt.
mbed_official 146:f64d43ff0c18 840 */
mbed_official 146:f64d43ff0c18 841 static inline void rtc_hal_config_time_overflow_int_enable(bool enable)
mbed_official 146:f64d43ff0c18 842 {
mbed_official 146:f64d43ff0c18 843 /* Writes to the RTC Interrupt Enable Register (RTC_IER),
mbed_official 146:f64d43ff0c18 844 * field Time Overflow Interrupt Enable (TOIE). */
mbed_official 146:f64d43ff0c18 845 BW_RTC_IER_TOIE((uint32_t) enable);
mbed_official 146:f64d43ff0c18 846 }
mbed_official 146:f64d43ff0c18 847
mbed_official 146:f64d43ff0c18 848 /*! @brief Checks whether the Time Invalid Interrupt is enabled/disabled.
mbed_official 146:f64d43ff0c18 849 * @return true: Time invalid flag does generate an interrupt.
mbed_official 146:f64d43ff0c18 850 * false: Time invalid flag does not generate an interrupt.
mbed_official 146:f64d43ff0c18 851 */
mbed_official 146:f64d43ff0c18 852 static inline bool rtc_hal_read_time_interval_int_enable(void)
mbed_official 146:f64d43ff0c18 853 {
mbed_official 146:f64d43ff0c18 854 /* Reads the value of the RTC Interrupt Enable Register (RTC_IER), field Time
mbed_official 146:f64d43ff0c18 855 * Invalid Interrupt Enable (TIIE). */
mbed_official 146:f64d43ff0c18 856 return (bool)BR_RTC_IER_TIIE;
mbed_official 146:f64d43ff0c18 857 }
mbed_official 146:f64d43ff0c18 858
mbed_official 146:f64d43ff0c18 859 /*! @brief Enables/disables the Time Invalid Interrupt.
mbed_official 146:f64d43ff0c18 860 * @param enable true: Time invalid flag does generate an interrupt.
mbed_official 146:f64d43ff0c18 861 * false: Time invalid flag does not generate an interrupt.
mbed_official 146:f64d43ff0c18 862 */
mbed_official 146:f64d43ff0c18 863 static inline void rtc_hal_config_time_interval_int(bool enable)
mbed_official 146:f64d43ff0c18 864 {
mbed_official 146:f64d43ff0c18 865 /* writes to the RTC Interrupt Enable Register (RTC_IER), field Time Invalid
mbed_official 146:f64d43ff0c18 866 * Interrupt Enable (TIIE). */
mbed_official 146:f64d43ff0c18 867 BW_RTC_IER_TIIE((uint32_t) enable);
mbed_official 146:f64d43ff0c18 868 }
mbed_official 146:f64d43ff0c18 869
mbed_official 146:f64d43ff0c18 870
mbed_official 146:f64d43ff0c18 871 #if defined(__cplusplus)
mbed_official 146:f64d43ff0c18 872 }
mbed_official 146:f64d43ff0c18 873 #endif
mbed_official 146:f64d43ff0c18 874
mbed_official 146:f64d43ff0c18 875
mbed_official 146:f64d43ff0c18 876 /*! @}*/
mbed_official 146:f64d43ff0c18 877
mbed_official 146:f64d43ff0c18 878 #endif /* __FSL_RTC_HAL_H__*/
mbed_official 146:f64d43ff0c18 879
mbed_official 146:f64d43ff0c18 880 /*******************************************************************************
mbed_official 146:f64d43ff0c18 881 * EOF
mbed_official 146:f64d43ff0c18 882 ******************************************************************************/
mbed_official 146:f64d43ff0c18 883