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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_NXP/TARGET_LPC81X/i2c_api.c@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* mbed Microcontroller Library
bogdanm 13:0645d8841f51 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 13:0645d8841f51 3 *
bogdanm 13:0645d8841f51 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 13:0645d8841f51 5 * you may not use this file except in compliance with the License.
bogdanm 13:0645d8841f51 6 * You may obtain a copy of the License at
bogdanm 13:0645d8841f51 7 *
bogdanm 13:0645d8841f51 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 13:0645d8841f51 9 *
bogdanm 13:0645d8841f51 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 13:0645d8841f51 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 13:0645d8841f51 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 13:0645d8841f51 13 * See the License for the specific language governing permissions and
bogdanm 13:0645d8841f51 14 * limitations under the License.
bogdanm 13:0645d8841f51 15 */
bogdanm 13:0645d8841f51 16 #include "i2c_api.h"
bogdanm 13:0645d8841f51 17 #include "cmsis.h"
bogdanm 13:0645d8841f51 18 #include "pinmap.h"
bogdanm 13:0645d8841f51 19 #include "error.h"
bogdanm 13:0645d8841f51 20
bogdanm 13:0645d8841f51 21 static const SWM_Map SWM_I2C_SDA[] = {
bogdanm 13:0645d8841f51 22 {7, 24},
bogdanm 13:0645d8841f51 23 };
bogdanm 13:0645d8841f51 24
bogdanm 13:0645d8841f51 25 static const SWM_Map SWM_I2C_SCL[] = {
bogdanm 13:0645d8841f51 26 {8, 0},
bogdanm 13:0645d8841f51 27 };
bogdanm 13:0645d8841f51 28
bogdanm 13:0645d8841f51 29 static uint8_t repeated_start = 0;
bogdanm 13:0645d8841f51 30
bogdanm 13:0645d8841f51 31 #define I2C_DAT(x) (x->i2c->MSTDAT)
bogdanm 13:0645d8841f51 32 #define I2C_STAT(x) ((x->i2c->STAT >> 1) & (0x07))
bogdanm 13:0645d8841f51 33
bogdanm 13:0645d8841f51 34 static inline int i2c_status(i2c_t *obj) {
bogdanm 13:0645d8841f51 35 return I2C_STAT(obj);
bogdanm 13:0645d8841f51 36 }
bogdanm 13:0645d8841f51 37
bogdanm 13:0645d8841f51 38 // Wait until the Serial Interrupt (SI) is set
bogdanm 13:0645d8841f51 39 static int i2c_wait_SI(i2c_t *obj) {
bogdanm 13:0645d8841f51 40 int timeout = 0;
bogdanm 13:0645d8841f51 41 while (!(obj->i2c->STAT & (1 << 0))) {
bogdanm 13:0645d8841f51 42 timeout++;
bogdanm 13:0645d8841f51 43 if (timeout > 100000) return -1;
bogdanm 13:0645d8841f51 44 }
bogdanm 13:0645d8841f51 45 return 0;
bogdanm 13:0645d8841f51 46 }
bogdanm 13:0645d8841f51 47
bogdanm 13:0645d8841f51 48 static inline void i2c_interface_enable(i2c_t *obj) {
bogdanm 13:0645d8841f51 49 obj->i2c->CFG |= (1 << 0);
bogdanm 13:0645d8841f51 50 }
bogdanm 13:0645d8841f51 51
bogdanm 13:0645d8841f51 52 static inline void i2c_power_enable(i2c_t *obj) {
bogdanm 13:0645d8841f51 53 LPC_SYSCON->SYSAHBCLKCTRL |= (1<<5);
bogdanm 13:0645d8841f51 54 LPC_SYSCON->PRESETCTRL &= ~(0x1<<6);
bogdanm 13:0645d8841f51 55 LPC_SYSCON->PRESETCTRL |= (0x1<<6);
bogdanm 13:0645d8841f51 56 }
bogdanm 13:0645d8841f51 57
bogdanm 13:0645d8841f51 58 void i2c_init(i2c_t *obj, PinName sda, PinName scl) {
bogdanm 13:0645d8841f51 59 obj->i2c = (LPC_I2C_TypeDef *)LPC_I2C;
bogdanm 13:0645d8841f51 60
bogdanm 13:0645d8841f51 61 const SWM_Map *swm;
bogdanm 13:0645d8841f51 62 uint32_t regVal;
bogdanm 13:0645d8841f51 63
bogdanm 13:0645d8841f51 64 swm = &SWM_I2C_SDA[0];
bogdanm 13:0645d8841f51 65 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 13:0645d8841f51 66 LPC_SWM->PINASSIGN[swm->n] = regVal | (sda << swm->offset);
bogdanm 13:0645d8841f51 67
bogdanm 13:0645d8841f51 68 swm = &SWM_I2C_SCL[0];
bogdanm 13:0645d8841f51 69 regVal = LPC_SWM->PINASSIGN[swm->n] & ~(0xFF << swm->offset);
bogdanm 13:0645d8841f51 70 LPC_SWM->PINASSIGN[swm->n] = regVal | (scl << swm->offset);
bogdanm 13:0645d8841f51 71
bogdanm 13:0645d8841f51 72 // enable power
bogdanm 13:0645d8841f51 73 i2c_power_enable(obj);
bogdanm 13:0645d8841f51 74 // set default frequency at 100k
bogdanm 13:0645d8841f51 75 i2c_frequency(obj, 100000);
bogdanm 13:0645d8841f51 76 i2c_interface_enable(obj);
bogdanm 13:0645d8841f51 77 }
bogdanm 13:0645d8841f51 78
bogdanm 13:0645d8841f51 79 inline int i2c_start(i2c_t *obj) {
bogdanm 13:0645d8841f51 80 int status = 0;
bogdanm 13:0645d8841f51 81 if (repeated_start) {
bogdanm 13:0645d8841f51 82 obj->i2c->MSTCTL = (1 << 1) | (1 << 0);
bogdanm 13:0645d8841f51 83 repeated_start = 0;
bogdanm 13:0645d8841f51 84 } else {
bogdanm 13:0645d8841f51 85 obj->i2c->MSTCTL = (1 << 1);
bogdanm 13:0645d8841f51 86 }
bogdanm 13:0645d8841f51 87 return status;
bogdanm 13:0645d8841f51 88 }
bogdanm 13:0645d8841f51 89
bogdanm 13:0645d8841f51 90 inline int i2c_stop(i2c_t *obj) {
bogdanm 13:0645d8841f51 91 int timeout = 0;
bogdanm 13:0645d8841f51 92
bogdanm 13:0645d8841f51 93 obj->i2c->MSTCTL = (1 << 2) | (1 << 0);
bogdanm 13:0645d8841f51 94 while ((obj->i2c->STAT & ((1 << 0) | (7 << 1))) != ((1 << 0) | (0 << 1))) {
bogdanm 13:0645d8841f51 95 timeout ++;
bogdanm 13:0645d8841f51 96 if (timeout > 100000) return 1;
bogdanm 13:0645d8841f51 97 }
bogdanm 13:0645d8841f51 98
bogdanm 13:0645d8841f51 99 return 0;
bogdanm 13:0645d8841f51 100 }
bogdanm 13:0645d8841f51 101
bogdanm 13:0645d8841f51 102
bogdanm 13:0645d8841f51 103 static inline int i2c_do_write(i2c_t *obj, int value, uint8_t addr) {
bogdanm 13:0645d8841f51 104 // write the data
bogdanm 13:0645d8841f51 105 I2C_DAT(obj) = value;
bogdanm 13:0645d8841f51 106
bogdanm 13:0645d8841f51 107 if (!addr)
bogdanm 13:0645d8841f51 108 obj->i2c->MSTCTL = (1 << 0);
bogdanm 13:0645d8841f51 109
bogdanm 13:0645d8841f51 110 // wait and return status
bogdanm 13:0645d8841f51 111 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 112 return i2c_status(obj);
bogdanm 13:0645d8841f51 113 }
bogdanm 13:0645d8841f51 114
bogdanm 13:0645d8841f51 115 static inline int i2c_do_read(i2c_t *obj, int last) {
bogdanm 13:0645d8841f51 116 // wait for it to arrive
bogdanm 13:0645d8841f51 117 i2c_wait_SI(obj);
bogdanm 13:0645d8841f51 118 if (!last)
bogdanm 13:0645d8841f51 119 obj->i2c->MSTCTL = (1 << 0);
bogdanm 13:0645d8841f51 120
bogdanm 13:0645d8841f51 121 // return the data
bogdanm 13:0645d8841f51 122 return (I2C_DAT(obj) & 0xFF);
bogdanm 13:0645d8841f51 123 }
bogdanm 13:0645d8841f51 124
bogdanm 13:0645d8841f51 125 void i2c_frequency(i2c_t *obj, int hz) {
bogdanm 13:0645d8841f51 126 // No peripheral clock divider on the M0
bogdanm 13:0645d8841f51 127 uint32_t PCLK = SystemCoreClock;
bogdanm 13:0645d8841f51 128
bogdanm 13:0645d8841f51 129 uint32_t clkdiv = PCLK / (hz * 4) - 1;
bogdanm 13:0645d8841f51 130
bogdanm 13:0645d8841f51 131 obj->i2c->DIV = clkdiv;
bogdanm 13:0645d8841f51 132 obj->i2c->MSTTIME = 0;
bogdanm 13:0645d8841f51 133 }
bogdanm 13:0645d8841f51 134
bogdanm 13:0645d8841f51 135 // The I2C does a read or a write as a whole operation
bogdanm 13:0645d8841f51 136 // There are two types of error conditions it can encounter
bogdanm 13:0645d8841f51 137 // 1) it can not obtain the bus
bogdanm 13:0645d8841f51 138 // 2) it gets error responses at part of the transmission
bogdanm 13:0645d8841f51 139 //
bogdanm 13:0645d8841f51 140 // We tackle them as follows:
bogdanm 13:0645d8841f51 141 // 1) we retry until we get the bus. we could have a "timeout" if we can not get it
bogdanm 13:0645d8841f51 142 // which basically turns it in to a 2)
bogdanm 13:0645d8841f51 143 // 2) on error, we use the standard error mechanisms to report/debug
bogdanm 13:0645d8841f51 144 //
bogdanm 13:0645d8841f51 145 // Therefore an I2C transaction should always complete. If it doesn't it is usually
bogdanm 13:0645d8841f51 146 // because something is setup wrong (e.g. wiring), and we don't need to programatically
bogdanm 13:0645d8841f51 147 // check for that
bogdanm 13:0645d8841f51 148
bogdanm 13:0645d8841f51 149 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) {
bogdanm 13:0645d8841f51 150 int count, status;
bogdanm 13:0645d8841f51 151
bogdanm 13:0645d8841f51 152 i2c_start(obj);
bogdanm 13:0645d8841f51 153
bogdanm 13:0645d8841f51 154 status = i2c_do_write(obj, (address | 0x01), 1);
bogdanm 13:0645d8841f51 155 if (status != 0x01) {
bogdanm 13:0645d8841f51 156 i2c_stop(obj);
bogdanm 13:0645d8841f51 157 return I2C_ERROR_NO_SLAVE;
bogdanm 13:0645d8841f51 158 }
bogdanm 13:0645d8841f51 159
bogdanm 13:0645d8841f51 160 // Read in all except last byte
bogdanm 13:0645d8841f51 161 for (count = 0; count < (length - 1); count++) {
bogdanm 13:0645d8841f51 162 int value = i2c_do_read(obj, 0);
bogdanm 13:0645d8841f51 163 status = i2c_status(obj);
bogdanm 13:0645d8841f51 164 if (status != 0x00) {
bogdanm 13:0645d8841f51 165 i2c_stop(obj);
bogdanm 13:0645d8841f51 166 return count;
bogdanm 13:0645d8841f51 167 }
bogdanm 13:0645d8841f51 168 data[count] = (char) value;
bogdanm 13:0645d8841f51 169 }
bogdanm 13:0645d8841f51 170
bogdanm 13:0645d8841f51 171 // read in last byte
bogdanm 13:0645d8841f51 172 int value = i2c_do_read(obj, 1);
bogdanm 13:0645d8841f51 173 status = i2c_status(obj);
bogdanm 13:0645d8841f51 174 if (status != 0x01) {
bogdanm 13:0645d8841f51 175 i2c_stop(obj);
bogdanm 13:0645d8841f51 176 return length - 1;
bogdanm 13:0645d8841f51 177 }
bogdanm 13:0645d8841f51 178
bogdanm 13:0645d8841f51 179 data[count] = (char) value;
bogdanm 13:0645d8841f51 180
bogdanm 13:0645d8841f51 181 // If not repeated start, send stop.
bogdanm 13:0645d8841f51 182 if (stop) {
bogdanm 13:0645d8841f51 183 i2c_stop(obj);
bogdanm 13:0645d8841f51 184 } else {
bogdanm 13:0645d8841f51 185 repeated_start = 1;
bogdanm 13:0645d8841f51 186 }
bogdanm 13:0645d8841f51 187
bogdanm 13:0645d8841f51 188 return length;
bogdanm 13:0645d8841f51 189 }
bogdanm 13:0645d8841f51 190
bogdanm 13:0645d8841f51 191 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) {
bogdanm 13:0645d8841f51 192 int i, status;
bogdanm 13:0645d8841f51 193
bogdanm 13:0645d8841f51 194 i2c_start(obj);
bogdanm 13:0645d8841f51 195
bogdanm 13:0645d8841f51 196 status = i2c_do_write(obj, (address & 0xFE), 1);
bogdanm 13:0645d8841f51 197 if (status != 0x02) {
bogdanm 13:0645d8841f51 198 i2c_stop(obj);
bogdanm 13:0645d8841f51 199 return I2C_ERROR_NO_SLAVE;
bogdanm 13:0645d8841f51 200 }
bogdanm 13:0645d8841f51 201
bogdanm 13:0645d8841f51 202 for (i=0; i<length; i++) {
bogdanm 13:0645d8841f51 203 status = i2c_do_write(obj, data[i], 0);
bogdanm 13:0645d8841f51 204 if (status != 0x02) {
bogdanm 13:0645d8841f51 205 i2c_stop(obj);
bogdanm 13:0645d8841f51 206 return i;
bogdanm 13:0645d8841f51 207 }
bogdanm 13:0645d8841f51 208 }
bogdanm 13:0645d8841f51 209
bogdanm 13:0645d8841f51 210 // If not repeated start, send stop.
bogdanm 13:0645d8841f51 211 if (stop) {
bogdanm 13:0645d8841f51 212 i2c_stop(obj);
bogdanm 13:0645d8841f51 213 } else {
bogdanm 13:0645d8841f51 214 repeated_start = 1;
bogdanm 13:0645d8841f51 215 }
bogdanm 13:0645d8841f51 216
bogdanm 13:0645d8841f51 217 return length;
bogdanm 13:0645d8841f51 218 }
bogdanm 13:0645d8841f51 219
bogdanm 13:0645d8841f51 220 void i2c_reset(i2c_t *obj) {
bogdanm 13:0645d8841f51 221 i2c_stop(obj);
bogdanm 13:0645d8841f51 222 }
bogdanm 13:0645d8841f51 223
bogdanm 13:0645d8841f51 224 int i2c_byte_read(i2c_t *obj, int last) {
bogdanm 13:0645d8841f51 225 return (i2c_do_read(obj, last) & 0xFF);
bogdanm 13:0645d8841f51 226 }
bogdanm 13:0645d8841f51 227
bogdanm 13:0645d8841f51 228 int i2c_byte_write(i2c_t *obj, int data) {
bogdanm 13:0645d8841f51 229 int ack;
bogdanm 13:0645d8841f51 230 int status = i2c_do_write(obj, (data & 0xFF), 0);
bogdanm 13:0645d8841f51 231
bogdanm 13:0645d8841f51 232 switch(status) {
bogdanm 13:0645d8841f51 233 case 2:
bogdanm 13:0645d8841f51 234 ack = 1;
bogdanm 13:0645d8841f51 235 break;
bogdanm 13:0645d8841f51 236 default:
bogdanm 13:0645d8841f51 237 ack = 0;
bogdanm 13:0645d8841f51 238 break;
bogdanm 13:0645d8841f51 239 }
bogdanm 13:0645d8841f51 240
bogdanm 13:0645d8841f51 241 return ack;
bogdanm 13:0645d8841f51 242 }