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Last commit 20 Feb 2019 by mbed official

targets/hal/TARGET_Freescale/TARGET_KL25Z/rtc_api.c@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 13:0645d8841f51 1 /* mbed Microcontroller Library
bogdanm 13:0645d8841f51 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 13:0645d8841f51 3 *
bogdanm 13:0645d8841f51 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 13:0645d8841f51 5 * you may not use this file except in compliance with the License.
bogdanm 13:0645d8841f51 6 * You may obtain a copy of the License at
bogdanm 13:0645d8841f51 7 *
bogdanm 13:0645d8841f51 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 13:0645d8841f51 9 *
bogdanm 13:0645d8841f51 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 13:0645d8841f51 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 13:0645d8841f51 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 13:0645d8841f51 13 * See the License for the specific language governing permissions and
bogdanm 13:0645d8841f51 14 * limitations under the License.
bogdanm 13:0645d8841f51 15 */
bogdanm 13:0645d8841f51 16 #include "rtc_api.h"
bogdanm 13:0645d8841f51 17
bogdanm 13:0645d8841f51 18 static void init(void) {
bogdanm 13:0645d8841f51 19 // enable PORTC clock
bogdanm 13:0645d8841f51 20 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
bogdanm 13:0645d8841f51 21
bogdanm 13:0645d8841f51 22 // enable RTC clock
bogdanm 13:0645d8841f51 23 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
bogdanm 13:0645d8841f51 24
bogdanm 13:0645d8841f51 25 /*
bogdanm 13:0645d8841f51 26 * configure PTC1 with alternate function 1: RTC_CLKIN
bogdanm 13:0645d8841f51 27 * As the kl25z board does not have a 32kHz osc,
bogdanm 13:0645d8841f51 28 * we use an external clock generated by the
bogdanm 13:0645d8841f51 29 * interface chip
bogdanm 13:0645d8841f51 30 */
bogdanm 13:0645d8841f51 31 PORTC->PCR[1] &= ~PORT_PCR_MUX_MASK;
bogdanm 13:0645d8841f51 32 PORTC->PCR[1] = PORT_PCR_MUX(1);
bogdanm 13:0645d8841f51 33
bogdanm 13:0645d8841f51 34 // select RTC_CLKIN as RTC clock source
bogdanm 13:0645d8841f51 35 SIM->SOPT1 &= ~SIM_SOPT1_OSC32KSEL_MASK;
bogdanm 13:0645d8841f51 36 SIM->SOPT1 |= SIM_SOPT1_OSC32KSEL(2);
bogdanm 13:0645d8841f51 37 }
bogdanm 13:0645d8841f51 38
bogdanm 13:0645d8841f51 39 void rtc_init(void) {
bogdanm 13:0645d8841f51 40 init();
bogdanm 13:0645d8841f51 41
bogdanm 13:0645d8841f51 42 //Configure the TSR. default value: 1
bogdanm 13:0645d8841f51 43 RTC->TSR = 1;
bogdanm 13:0645d8841f51 44
bogdanm 13:0645d8841f51 45 // enable counter
bogdanm 13:0645d8841f51 46 RTC->SR |= RTC_SR_TCE_MASK;
bogdanm 13:0645d8841f51 47 }
bogdanm 13:0645d8841f51 48
bogdanm 13:0645d8841f51 49 void rtc_free(void) {
bogdanm 13:0645d8841f51 50 // [TODO]
bogdanm 13:0645d8841f51 51 }
bogdanm 13:0645d8841f51 52
bogdanm 13:0645d8841f51 53 /*
bogdanm 13:0645d8841f51 54 * Little check routine to see if the RTC has been enabled
bogdanm 13:0645d8841f51 55 * 0 = Disabled, 1 = Enabled
bogdanm 13:0645d8841f51 56 */
bogdanm 13:0645d8841f51 57 int rtc_isenabled(void) {
bogdanm 13:0645d8841f51 58 // even if the RTC module is enabled,
bogdanm 13:0645d8841f51 59 // as we use RTC_CLKIN and an external clock,
bogdanm 13:0645d8841f51 60 // we need to reconfigure the pins. That is why we
bogdanm 13:0645d8841f51 61 // call init() if the rtc is enabled
bogdanm 13:0645d8841f51 62
bogdanm 13:0645d8841f51 63 // if RTC not enabled return 0
bogdanm 13:0645d8841f51 64 SIM->SCGC5 |= SIM_SCGC5_PORTC_MASK;
bogdanm 13:0645d8841f51 65 SIM->SCGC6 |= SIM_SCGC6_RTC_MASK;
bogdanm 13:0645d8841f51 66 if ((RTC->SR & RTC_SR_TCE_MASK) == 0)
bogdanm 13:0645d8841f51 67 return 0;
bogdanm 13:0645d8841f51 68
bogdanm 13:0645d8841f51 69 init();
bogdanm 13:0645d8841f51 70 return 1;
bogdanm 13:0645d8841f51 71 }
bogdanm 13:0645d8841f51 72
bogdanm 13:0645d8841f51 73 time_t rtc_read(void) {
bogdanm 13:0645d8841f51 74 return RTC->TSR;
bogdanm 13:0645d8841f51 75 }
bogdanm 13:0645d8841f51 76
bogdanm 13:0645d8841f51 77 void rtc_write(time_t t) {
bogdanm 13:0645d8841f51 78 // disable counter
bogdanm 13:0645d8841f51 79 RTC->SR &= ~RTC_SR_TCE_MASK;
bogdanm 13:0645d8841f51 80
bogdanm 13:0645d8841f51 81 // we do not write 0 into TSR
bogdanm 13:0645d8841f51 82 // to avoid invalid time
bogdanm 13:0645d8841f51 83 if (t == 0)
bogdanm 13:0645d8841f51 84 t = 1;
bogdanm 13:0645d8841f51 85
bogdanm 13:0645d8841f51 86 // write seconds
bogdanm 13:0645d8841f51 87 RTC->TSR = t;
bogdanm 13:0645d8841f51 88
bogdanm 13:0645d8841f51 89 // re-enable counter
bogdanm 13:0645d8841f51 90 RTC->SR |= RTC_SR_TCE_MASK;
bogdanm 13:0645d8841f51 91 }