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Last commit 20 Feb 2019 by 
mbed official
targets/cmsis/TARGET_NXP/TARGET_LPC81X/system_LPC8xx.h@13:0645d8841f51, 2013-08-05 (annotated)
- Committer:
- bogdanm
- Date:
- Mon Aug 05 14:12:34 2013 +0300
- Revision:
- 13:0645d8841f51
- Parent:
- vendor/NXP/LPC812/cmsis/system_LPC8xx.h@10:3bc89ef62ce7
Update mbed sources to revision 64
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| emilmont | 10:3bc89ef62ce7 | 1 | /****************************************************************************** |
| emilmont | 10:3bc89ef62ce7 | 2 | * @file: system_LPC8xx.h |
| emilmont | 10:3bc89ef62ce7 | 3 | * @purpose: CMSIS Cortex-M0+ Device Peripheral Access Layer Header File |
| emilmont | 10:3bc89ef62ce7 | 4 | * for the NXP LPC8xx Device Series |
| emilmont | 10:3bc89ef62ce7 | 5 | * @version: V1.0 |
| emilmont | 10:3bc89ef62ce7 | 6 | * @date: 16. Aug. 2012 |
| emilmont | 10:3bc89ef62ce7 | 7 | *---------------------------------------------------------------------------- |
| emilmont | 10:3bc89ef62ce7 | 8 | * |
| emilmont | 10:3bc89ef62ce7 | 9 | * Copyright (C) 2012 ARM Limited. All rights reserved. |
| emilmont | 10:3bc89ef62ce7 | 10 | * |
| emilmont | 10:3bc89ef62ce7 | 11 | * ARM Limited (ARM) is supplying this software for use with Cortex-M0+ |
| emilmont | 10:3bc89ef62ce7 | 12 | * processor based microcontrollers. This file can be freely distributed |
| emilmont | 10:3bc89ef62ce7 | 13 | * within development tools that are supporting such ARM based processors. |
| emilmont | 10:3bc89ef62ce7 | 14 | * |
| emilmont | 10:3bc89ef62ce7 | 15 | * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED |
| emilmont | 10:3bc89ef62ce7 | 16 | * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF |
| emilmont | 10:3bc89ef62ce7 | 17 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. |
| emilmont | 10:3bc89ef62ce7 | 18 | * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR |
| emilmont | 10:3bc89ef62ce7 | 19 | * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. |
| emilmont | 10:3bc89ef62ce7 | 20 | * |
| emilmont | 10:3bc89ef62ce7 | 21 | ******************************************************************************/ |
| emilmont | 10:3bc89ef62ce7 | 22 | |
| emilmont | 10:3bc89ef62ce7 | 23 | |
| emilmont | 10:3bc89ef62ce7 | 24 | #ifndef __SYSTEM_LPC8xx_H |
| emilmont | 10:3bc89ef62ce7 | 25 | #define __SYSTEM_LPC8xx_H |
| emilmont | 10:3bc89ef62ce7 | 26 | |
| emilmont | 10:3bc89ef62ce7 | 27 | #ifdef __cplusplus |
| emilmont | 10:3bc89ef62ce7 | 28 | extern "C" { |
| emilmont | 10:3bc89ef62ce7 | 29 | #endif |
| emilmont | 10:3bc89ef62ce7 | 30 | |
| emilmont | 10:3bc89ef62ce7 | 31 | #include <stdint.h> |
| emilmont | 10:3bc89ef62ce7 | 32 | |
| emilmont | 10:3bc89ef62ce7 | 33 | extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */ |
| emilmont | 10:3bc89ef62ce7 | 34 | |
| emilmont | 10:3bc89ef62ce7 | 35 | |
| emilmont | 10:3bc89ef62ce7 | 36 | /** |
| emilmont | 10:3bc89ef62ce7 | 37 | * Initialize the system |
| emilmont | 10:3bc89ef62ce7 | 38 | * |
| emilmont | 10:3bc89ef62ce7 | 39 | * @param none |
| emilmont | 10:3bc89ef62ce7 | 40 | * @return none |
| emilmont | 10:3bc89ef62ce7 | 41 | * |
| emilmont | 10:3bc89ef62ce7 | 42 | * @brief Setup the microcontroller system. |
| emilmont | 10:3bc89ef62ce7 | 43 | * Initialize the System and update the SystemCoreClock variable. |
| emilmont | 10:3bc89ef62ce7 | 44 | */ |
| emilmont | 10:3bc89ef62ce7 | 45 | extern void SystemInit (void); |
| emilmont | 10:3bc89ef62ce7 | 46 | |
| emilmont | 10:3bc89ef62ce7 | 47 | /** |
| emilmont | 10:3bc89ef62ce7 | 48 | * Update SystemCoreClock variable |
| emilmont | 10:3bc89ef62ce7 | 49 | * |
| emilmont | 10:3bc89ef62ce7 | 50 | * @param none |
| emilmont | 10:3bc89ef62ce7 | 51 | * @return none |
| emilmont | 10:3bc89ef62ce7 | 52 | * |
| emilmont | 10:3bc89ef62ce7 | 53 | * @brief Updates the SystemCoreClock with current core Clock |
| emilmont | 10:3bc89ef62ce7 | 54 | * retrieved from cpu registers. |
| emilmont | 10:3bc89ef62ce7 | 55 | */ |
| emilmont | 10:3bc89ef62ce7 | 56 | extern void SystemCoreClockUpdate (void); |
| emilmont | 10:3bc89ef62ce7 | 57 | |
| emilmont | 10:3bc89ef62ce7 | 58 | #ifdef __cplusplus |
| emilmont | 10:3bc89ef62ce7 | 59 | } |
| emilmont | 10:3bc89ef62ce7 | 60 | #endif |
| emilmont | 10:3bc89ef62ce7 | 61 | |
| emilmont | 10:3bc89ef62ce7 | 62 | #endif /* __SYSTEM_LPC8xx_H */ |
