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mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Last commit 20 Feb 2019 by mbed official

targets/cmsis/TARGET_NXP/TARGET_LPC176X/TOOLCHAIN_GCC_CR/LPC1768.ld@13:0645d8841f51, 2013-08-05 (annotated)

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Parent:
vendor/NXP/LPC1768/cmsis/GCC_CR/LPC1768.ld@10:3bc89ef62ce7
Child:
67:78dfdb5b4d9e
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 /* mbed - LPC1768 linker script
emilmont 10:3bc89ef62ce7 2 * Based linker script generated by Code Red Technologies Red Suite 4.1
emilmont 10:3bc89ef62ce7 3 */
emilmont 10:3bc89ef62ce7 4 GROUP(libgcc.a libc.a libstdc++.a libm.a libcr_newlib_nohost.a crti.o crtn.o crtbegin.o crtend.o)
emilmont 10:3bc89ef62ce7 5
emilmont 10:3bc89ef62ce7 6 MEMORY
emilmont 10:3bc89ef62ce7 7 {
emilmont 10:3bc89ef62ce7 8 /* Define each memory region */
emilmont 10:3bc89ef62ce7 9 MFlash512 (rx) : ORIGIN = 0x0, LENGTH = 0x80000 /* 512k */
emilmont 10:3bc89ef62ce7 10 RamLoc32 (rwx) : ORIGIN = 0x100000C8, LENGTH = 0x7F38 /* 32k */
emilmont 10:3bc89ef62ce7 11 RamAHB32 (rwx) : ORIGIN = 0x2007c000, LENGTH = 0x8000 /* 32k */
emilmont 10:3bc89ef62ce7 12
emilmont 10:3bc89ef62ce7 13 }
emilmont 10:3bc89ef62ce7 14 /* Define a symbol for the top of each memory region */
emilmont 10:3bc89ef62ce7 15 __top_MFlash512 = 0x0 + 0x80000;
emilmont 10:3bc89ef62ce7 16 __top_RamLoc32 = 0x10000000 + 0x8000;
emilmont 10:3bc89ef62ce7 17 __top_RamAHB32 = 0x2007c000 + 0x8000;
emilmont 10:3bc89ef62ce7 18
emilmont 10:3bc89ef62ce7 19 ENTRY(ResetISR)
emilmont 10:3bc89ef62ce7 20
emilmont 10:3bc89ef62ce7 21 SECTIONS
emilmont 10:3bc89ef62ce7 22 {
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 /* MAIN TEXT SECTION */
emilmont 10:3bc89ef62ce7 25 .text : ALIGN(4)
emilmont 10:3bc89ef62ce7 26 {
emilmont 10:3bc89ef62ce7 27 FILL(0xff)
emilmont 10:3bc89ef62ce7 28 KEEP(*(.isr_vector))
emilmont 10:3bc89ef62ce7 29
emilmont 10:3bc89ef62ce7 30 /* Global Section Table */
emilmont 10:3bc89ef62ce7 31 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 32 __section_table_start = .;
emilmont 10:3bc89ef62ce7 33 __data_section_table = .;
emilmont 10:3bc89ef62ce7 34 LONG(LOADADDR(.data));
emilmont 10:3bc89ef62ce7 35 LONG( ADDR(.data)) ;
emilmont 10:3bc89ef62ce7 36 LONG( SIZEOF(.data));
emilmont 10:3bc89ef62ce7 37 LONG(LOADADDR(.data_RAM2));
emilmont 10:3bc89ef62ce7 38 LONG( ADDR(.data_RAM2)) ;
emilmont 10:3bc89ef62ce7 39 LONG( SIZEOF(.data_RAM2));
emilmont 10:3bc89ef62ce7 40 __data_section_table_end = .;
emilmont 10:3bc89ef62ce7 41 __bss_section_table = .;
emilmont 10:3bc89ef62ce7 42 LONG( ADDR(.bss));
emilmont 10:3bc89ef62ce7 43 LONG( SIZEOF(.bss));
emilmont 10:3bc89ef62ce7 44 LONG( ADDR(.bss_RAM2));
emilmont 10:3bc89ef62ce7 45 LONG( SIZEOF(.bss_RAM2));
emilmont 10:3bc89ef62ce7 46 __bss_section_table_end = .;
emilmont 10:3bc89ef62ce7 47 __section_table_end = . ;
emilmont 10:3bc89ef62ce7 48 /* End of Global Section Table */
emilmont 10:3bc89ef62ce7 49
emilmont 10:3bc89ef62ce7 50
emilmont 10:3bc89ef62ce7 51 *(.after_vectors*)
emilmont 10:3bc89ef62ce7 52
emilmont 10:3bc89ef62ce7 53 *(.text*)
emilmont 10:3bc89ef62ce7 54 *(.rodata .rodata.*)
emilmont 10:3bc89ef62ce7 55 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 56
emilmont 10:3bc89ef62ce7 57 /* C++ constructors etc */
emilmont 10:3bc89ef62ce7 58 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 59 KEEP(*(.init))
emilmont 10:3bc89ef62ce7 60
emilmont 10:3bc89ef62ce7 61 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 62 __preinit_array_start = .;
emilmont 10:3bc89ef62ce7 63 KEEP (*(.preinit_array))
emilmont 10:3bc89ef62ce7 64 __preinit_array_end = .;
emilmont 10:3bc89ef62ce7 65
emilmont 10:3bc89ef62ce7 66 . = ALIGN(4);
emilmont 10:3bc89ef62ce7 67 __init_array_start = .;
emilmont 10:3bc89ef62ce7 68 KEEP (*(SORT(.init_array.*)))
emilmont 10:3bc89ef62ce7 69 KEEP (*(.init_array))
emilmont 10:3bc89ef62ce7 70 __init_array_end = .;
emilmont 10:3bc89ef62ce7 71
emilmont 10:3bc89ef62ce7 72 KEEP(*(.fini));
emilmont 10:3bc89ef62ce7 73
emilmont 10:3bc89ef62ce7 74 . = ALIGN(0x4);
emilmont 10:3bc89ef62ce7 75 KEEP (*crtbegin.o(.ctors))
emilmont 10:3bc89ef62ce7 76 KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
emilmont 10:3bc89ef62ce7 77 KEEP (*(SORT(.ctors.*)))
emilmont 10:3bc89ef62ce7 78 KEEP (*crtend.o(.ctors))
emilmont 10:3bc89ef62ce7 79
emilmont 10:3bc89ef62ce7 80 . = ALIGN(0x4);
emilmont 10:3bc89ef62ce7 81 KEEP (*crtbegin.o(.dtors))
emilmont 10:3bc89ef62ce7 82 KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
emilmont 10:3bc89ef62ce7 83 KEEP (*(SORT(.dtors.*)))
emilmont 10:3bc89ef62ce7 84 KEEP (*crtend.o(.dtors))
emilmont 10:3bc89ef62ce7 85 /* End C++ */
emilmont 10:3bc89ef62ce7 86 } > MFlash512
emilmont 10:3bc89ef62ce7 87
emilmont 10:3bc89ef62ce7 88 /*
emilmont 10:3bc89ef62ce7 89 * for exception handling/unwind - some Newlib functions (in common
emilmont 10:3bc89ef62ce7 90 * with C++ and STDC++) use this.
emilmont 10:3bc89ef62ce7 91 */
emilmont 10:3bc89ef62ce7 92 .ARM.extab : ALIGN(4)
emilmont 10:3bc89ef62ce7 93 {
emilmont 10:3bc89ef62ce7 94 *(.ARM.extab* .gnu.linkonce.armextab.*)
emilmont 10:3bc89ef62ce7 95 } > MFlash512
emilmont 10:3bc89ef62ce7 96 __exidx_start = .;
emilmont 10:3bc89ef62ce7 97
emilmont 10:3bc89ef62ce7 98 .ARM.exidx : ALIGN(4)
emilmont 10:3bc89ef62ce7 99 {
emilmont 10:3bc89ef62ce7 100 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
emilmont 10:3bc89ef62ce7 101 } > MFlash512
emilmont 10:3bc89ef62ce7 102 __exidx_end = .;
emilmont 10:3bc89ef62ce7 103
emilmont 10:3bc89ef62ce7 104 _etext = .;
emilmont 10:3bc89ef62ce7 105
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107 .data_RAM2 : ALIGN(4)
emilmont 10:3bc89ef62ce7 108 {
emilmont 10:3bc89ef62ce7 109 FILL(0xff)
emilmont 10:3bc89ef62ce7 110 *(.data.$RAM2*)
emilmont 10:3bc89ef62ce7 111 *(.data.$RamAHB32*)
emilmont 10:3bc89ef62ce7 112 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 113 } > RamAHB32 AT>MFlash512
emilmont 10:3bc89ef62ce7 114
emilmont 10:3bc89ef62ce7 115 /* MAIN DATA SECTION */
emilmont 10:3bc89ef62ce7 116
emilmont 10:3bc89ef62ce7 117 .uninit_RESERVED : ALIGN(4)
emilmont 10:3bc89ef62ce7 118 {
emilmont 10:3bc89ef62ce7 119 KEEP(*(.bss.$RESERVED*))
emilmont 10:3bc89ef62ce7 120 } > RamLoc32
emilmont 10:3bc89ef62ce7 121
emilmont 10:3bc89ef62ce7 122 .data : ALIGN(4)
emilmont 10:3bc89ef62ce7 123 {
emilmont 10:3bc89ef62ce7 124 FILL(0xff)
emilmont 10:3bc89ef62ce7 125 _data = .;
emilmont 10:3bc89ef62ce7 126 *(vtable)
emilmont 10:3bc89ef62ce7 127 *(.data*)
emilmont 10:3bc89ef62ce7 128 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 129 _edata = .;
emilmont 10:3bc89ef62ce7 130 } > RamLoc32 AT>MFlash512
emilmont 10:3bc89ef62ce7 131
emilmont 10:3bc89ef62ce7 132
emilmont 10:3bc89ef62ce7 133 .bss_RAM2 : ALIGN(4)
emilmont 10:3bc89ef62ce7 134 {
emilmont 10:3bc89ef62ce7 135 *(.bss.$RAM2*)
emilmont 10:3bc89ef62ce7 136 *(.bss.$RamAHB32*)
emilmont 10:3bc89ef62ce7 137 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 138 } > RamAHB32
emilmont 10:3bc89ef62ce7 139
emilmont 10:3bc89ef62ce7 140 /* MAIN BSS SECTION */
emilmont 10:3bc89ef62ce7 141 .bss : ALIGN(4)
emilmont 10:3bc89ef62ce7 142 {
emilmont 10:3bc89ef62ce7 143 _bss = .;
emilmont 10:3bc89ef62ce7 144 *(.bss*)
emilmont 10:3bc89ef62ce7 145 *(COMMON)
emilmont 10:3bc89ef62ce7 146 . = ALIGN(4) ;
emilmont 10:3bc89ef62ce7 147 _ebss = .;
emilmont 10:3bc89ef62ce7 148 PROVIDE(end = .);
emilmont 10:3bc89ef62ce7 149 } > RamLoc32
emilmont 10:3bc89ef62ce7 150
emilmont 10:3bc89ef62ce7 151 PROVIDE(_pvHeapStart = .);
emilmont 10:3bc89ef62ce7 152 PROVIDE(_vStackTop = __top_RamLoc32 - 0);
emilmont 10:3bc89ef62ce7 153 }