mbed library sources

Dependents:   Encrypted my_mbed lklk CyaSSL_DTLS_Cellular ... more

Superseded

This library was superseded by mbed-dev - https://os.mbed.com/users/mbed_official/code/mbed-dev/.

Development branch of the mbed library sources. This library is kept in synch with the latest changes from the mbed SDK and it is not guaranteed to work.

If you are looking for a stable and tested release, please import one of the official mbed library releases:

Import librarymbed

The official Mbed 2 C/C++ SDK provides the software platform and libraries to build your applications.

Committer:
bogdanm
Date:
Mon Aug 05 14:12:34 2013 +0300
Revision:
13:0645d8841f51
Parent:
vendor/NXP/LPC1768/cmsis/ARM/startup_LPC17xx.s@10:3bc89ef62ce7
Update mbed sources to revision 64

Who changed what in which revision?

UserRevisionLine numberNew contents of line
emilmont 10:3bc89ef62ce7 1 ;/*****************************************************************************
emilmont 10:3bc89ef62ce7 2 ; * @file: startup_LPC17xx.s
emilmont 10:3bc89ef62ce7 3 ; * @purpose: CMSIS Cortex-M3 Core Device Startup File
emilmont 10:3bc89ef62ce7 4 ; * for the NXP LPC17xx Device Series
emilmont 10:3bc89ef62ce7 5 ; * @version: V1.02, modified for mbed
emilmont 10:3bc89ef62ce7 6 ; * @date: 27. July 2009, modified 3rd Aug 2009
emilmont 10:3bc89ef62ce7 7 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
emilmont 10:3bc89ef62ce7 8 ; *
emilmont 10:3bc89ef62ce7 9 ; * Copyright (C) 2009 ARM Limited. All rights reserved.
emilmont 10:3bc89ef62ce7 10 ; * ARM Limited (ARM) is supplying this software for use with Cortex-M3
emilmont 10:3bc89ef62ce7 11 ; * processor based microcontrollers. This file can be freely distributed
emilmont 10:3bc89ef62ce7 12 ; * within development tools that are supporting such ARM based processors.
emilmont 10:3bc89ef62ce7 13 ; *
emilmont 10:3bc89ef62ce7 14 ; * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
emilmont 10:3bc89ef62ce7 15 ; * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
emilmont 10:3bc89ef62ce7 16 ; * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
emilmont 10:3bc89ef62ce7 17 ; * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
emilmont 10:3bc89ef62ce7 18 ; * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
emilmont 10:3bc89ef62ce7 19 ; *
emilmont 10:3bc89ef62ce7 20 ; *****************************************************************************/
emilmont 10:3bc89ef62ce7 21
emilmont 10:3bc89ef62ce7 22 __initial_sp EQU 0x10008000 ; Top of RAM from LPC1768
emilmont 10:3bc89ef62ce7 23
emilmont 10:3bc89ef62ce7 24 PRESERVE8
emilmont 10:3bc89ef62ce7 25 THUMB
emilmont 10:3bc89ef62ce7 26
emilmont 10:3bc89ef62ce7 27 ; Vector Table Mapped to Address 0 at Reset
emilmont 10:3bc89ef62ce7 28
emilmont 10:3bc89ef62ce7 29 AREA RESET, DATA, READONLY
emilmont 10:3bc89ef62ce7 30 EXPORT __Vectors
emilmont 10:3bc89ef62ce7 31
emilmont 10:3bc89ef62ce7 32 __Vectors DCD __initial_sp ; Top of Stack
emilmont 10:3bc89ef62ce7 33 DCD Reset_Handler ; Reset Handler
emilmont 10:3bc89ef62ce7 34 DCD NMI_Handler ; NMI Handler
emilmont 10:3bc89ef62ce7 35 DCD HardFault_Handler ; Hard Fault Handler
emilmont 10:3bc89ef62ce7 36 DCD MemManage_Handler ; MPU Fault Handler
emilmont 10:3bc89ef62ce7 37 DCD BusFault_Handler ; Bus Fault Handler
emilmont 10:3bc89ef62ce7 38 DCD UsageFault_Handler ; Usage Fault Handler
emilmont 10:3bc89ef62ce7 39 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 40 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 41 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 42 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 43 DCD SVC_Handler ; SVCall Handler
emilmont 10:3bc89ef62ce7 44 DCD DebugMon_Handler ; Debug Monitor Handler
emilmont 10:3bc89ef62ce7 45 DCD 0 ; Reserved
emilmont 10:3bc89ef62ce7 46 DCD PendSV_Handler ; PendSV Handler
emilmont 10:3bc89ef62ce7 47 DCD SysTick_Handler ; SysTick Handler
emilmont 10:3bc89ef62ce7 48
emilmont 10:3bc89ef62ce7 49 ; External Interrupts
emilmont 10:3bc89ef62ce7 50 DCD WDT_IRQHandler ; 16: Watchdog Timer
emilmont 10:3bc89ef62ce7 51 DCD TIMER0_IRQHandler ; 17: Timer0
emilmont 10:3bc89ef62ce7 52 DCD TIMER1_IRQHandler ; 18: Timer1
emilmont 10:3bc89ef62ce7 53 DCD TIMER2_IRQHandler ; 19: Timer2
emilmont 10:3bc89ef62ce7 54 DCD TIMER3_IRQHandler ; 20: Timer3
emilmont 10:3bc89ef62ce7 55 DCD UART0_IRQHandler ; 21: UART0
emilmont 10:3bc89ef62ce7 56 DCD UART1_IRQHandler ; 22: UART1
emilmont 10:3bc89ef62ce7 57 DCD UART2_IRQHandler ; 23: UART2
emilmont 10:3bc89ef62ce7 58 DCD UART3_IRQHandler ; 24: UART3
emilmont 10:3bc89ef62ce7 59 DCD PWM1_IRQHandler ; 25: PWM1
emilmont 10:3bc89ef62ce7 60 DCD I2C0_IRQHandler ; 26: I2C0
emilmont 10:3bc89ef62ce7 61 DCD I2C1_IRQHandler ; 27: I2C1
emilmont 10:3bc89ef62ce7 62 DCD I2C2_IRQHandler ; 28: I2C2
emilmont 10:3bc89ef62ce7 63 DCD SPI_IRQHandler ; 29: SPI
emilmont 10:3bc89ef62ce7 64 DCD SSP0_IRQHandler ; 30: SSP0
emilmont 10:3bc89ef62ce7 65 DCD SSP1_IRQHandler ; 31: SSP1
emilmont 10:3bc89ef62ce7 66 DCD PLL0_IRQHandler ; 32: PLL0 Lock (Main PLL)
emilmont 10:3bc89ef62ce7 67 DCD RTC_IRQHandler ; 33: Real Time Clock
emilmont 10:3bc89ef62ce7 68 DCD EINT0_IRQHandler ; 34: External Interrupt 0
emilmont 10:3bc89ef62ce7 69 DCD EINT1_IRQHandler ; 35: External Interrupt 1
emilmont 10:3bc89ef62ce7 70 DCD EINT2_IRQHandler ; 36: External Interrupt 2
emilmont 10:3bc89ef62ce7 71 DCD EINT3_IRQHandler ; 37: External Interrupt 3
emilmont 10:3bc89ef62ce7 72 DCD ADC_IRQHandler ; 38: A/D Converter
emilmont 10:3bc89ef62ce7 73 DCD BOD_IRQHandler ; 39: Brown-Out Detect
emilmont 10:3bc89ef62ce7 74 DCD USB_IRQHandler ; 40: USB
emilmont 10:3bc89ef62ce7 75 DCD CAN_IRQHandler ; 41: CAN
emilmont 10:3bc89ef62ce7 76 DCD DMA_IRQHandler ; 42: General Purpose DMA
emilmont 10:3bc89ef62ce7 77 DCD I2S_IRQHandler ; 43: I2S
emilmont 10:3bc89ef62ce7 78 DCD ENET_IRQHandler ; 44: Ethernet
emilmont 10:3bc89ef62ce7 79 DCD RIT_IRQHandler ; 45: Repetitive Interrupt Timer
emilmont 10:3bc89ef62ce7 80 DCD MCPWM_IRQHandler ; 46: Motor Control PWM
emilmont 10:3bc89ef62ce7 81 DCD QEI_IRQHandler ; 47: Quadrature Encoder Interface
emilmont 10:3bc89ef62ce7 82 DCD PLL1_IRQHandler ; 48: PLL1 Lock (USB PLL)
emilmont 10:3bc89ef62ce7 83
emilmont 10:3bc89ef62ce7 84
emilmont 10:3bc89ef62ce7 85 IF :LNOT::DEF:NO_CRP
emilmont 10:3bc89ef62ce7 86 AREA |.ARM.__at_0x02FC|, CODE, READONLY
emilmont 10:3bc89ef62ce7 87 CRP_Key DCD 0xFFFFFFFF
emilmont 10:3bc89ef62ce7 88 ENDIF
emilmont 10:3bc89ef62ce7 89
emilmont 10:3bc89ef62ce7 90
emilmont 10:3bc89ef62ce7 91 AREA |.text|, CODE, READONLY
emilmont 10:3bc89ef62ce7 92
emilmont 10:3bc89ef62ce7 93
emilmont 10:3bc89ef62ce7 94 ; Reset Handler
emilmont 10:3bc89ef62ce7 95
emilmont 10:3bc89ef62ce7 96 Reset_Handler PROC
emilmont 10:3bc89ef62ce7 97 EXPORT Reset_Handler [WEAK]
emilmont 10:3bc89ef62ce7 98 IMPORT SystemInit
emilmont 10:3bc89ef62ce7 99 IMPORT __main
emilmont 10:3bc89ef62ce7 100 LDR R0, =SystemInit
emilmont 10:3bc89ef62ce7 101 BLX R0
emilmont 10:3bc89ef62ce7 102 LDR R0, =__main
emilmont 10:3bc89ef62ce7 103 BX R0
emilmont 10:3bc89ef62ce7 104 ENDP
emilmont 10:3bc89ef62ce7 105
emilmont 10:3bc89ef62ce7 106
emilmont 10:3bc89ef62ce7 107 ; Dummy Exception Handlers (infinite loops which can be modified)
emilmont 10:3bc89ef62ce7 108
emilmont 10:3bc89ef62ce7 109 NMI_Handler PROC
emilmont 10:3bc89ef62ce7 110 EXPORT NMI_Handler [WEAK]
emilmont 10:3bc89ef62ce7 111 B .
emilmont 10:3bc89ef62ce7 112 ENDP
emilmont 10:3bc89ef62ce7 113 HardFault_Handler\
emilmont 10:3bc89ef62ce7 114 PROC
emilmont 10:3bc89ef62ce7 115 EXPORT HardFault_Handler [WEAK]
emilmont 10:3bc89ef62ce7 116 B .
emilmont 10:3bc89ef62ce7 117 ENDP
emilmont 10:3bc89ef62ce7 118 MemManage_Handler\
emilmont 10:3bc89ef62ce7 119 PROC
emilmont 10:3bc89ef62ce7 120 EXPORT MemManage_Handler [WEAK]
emilmont 10:3bc89ef62ce7 121 B .
emilmont 10:3bc89ef62ce7 122 ENDP
emilmont 10:3bc89ef62ce7 123 BusFault_Handler\
emilmont 10:3bc89ef62ce7 124 PROC
emilmont 10:3bc89ef62ce7 125 EXPORT BusFault_Handler [WEAK]
emilmont 10:3bc89ef62ce7 126 B .
emilmont 10:3bc89ef62ce7 127 ENDP
emilmont 10:3bc89ef62ce7 128 UsageFault_Handler\
emilmont 10:3bc89ef62ce7 129 PROC
emilmont 10:3bc89ef62ce7 130 EXPORT UsageFault_Handler [WEAK]
emilmont 10:3bc89ef62ce7 131 B .
emilmont 10:3bc89ef62ce7 132 ENDP
emilmont 10:3bc89ef62ce7 133 SVC_Handler PROC
emilmont 10:3bc89ef62ce7 134 EXPORT SVC_Handler [WEAK]
emilmont 10:3bc89ef62ce7 135 B .
emilmont 10:3bc89ef62ce7 136 ENDP
emilmont 10:3bc89ef62ce7 137 DebugMon_Handler\
emilmont 10:3bc89ef62ce7 138 PROC
emilmont 10:3bc89ef62ce7 139 EXPORT DebugMon_Handler [WEAK]
emilmont 10:3bc89ef62ce7 140 B .
emilmont 10:3bc89ef62ce7 141 ENDP
emilmont 10:3bc89ef62ce7 142 PendSV_Handler PROC
emilmont 10:3bc89ef62ce7 143 EXPORT PendSV_Handler [WEAK]
emilmont 10:3bc89ef62ce7 144 B .
emilmont 10:3bc89ef62ce7 145 ENDP
emilmont 10:3bc89ef62ce7 146 SysTick_Handler PROC
emilmont 10:3bc89ef62ce7 147 EXPORT SysTick_Handler [WEAK]
emilmont 10:3bc89ef62ce7 148 B .
emilmont 10:3bc89ef62ce7 149 ENDP
emilmont 10:3bc89ef62ce7 150
emilmont 10:3bc89ef62ce7 151 Default_Handler PROC
emilmont 10:3bc89ef62ce7 152
emilmont 10:3bc89ef62ce7 153 EXPORT WDT_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 154 EXPORT TIMER0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 155 EXPORT TIMER1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 156 EXPORT TIMER2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 157 EXPORT TIMER3_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 158 EXPORT UART0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 159 EXPORT UART1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 160 EXPORT UART2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 161 EXPORT UART3_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 162 EXPORT PWM1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 163 EXPORT I2C0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 164 EXPORT I2C1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 165 EXPORT I2C2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 166 EXPORT SPI_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 167 EXPORT SSP0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 168 EXPORT SSP1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 169 EXPORT PLL0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 170 EXPORT RTC_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 171 EXPORT EINT0_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 172 EXPORT EINT1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 173 EXPORT EINT2_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 174 EXPORT EINT3_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 175 EXPORT ADC_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 176 EXPORT BOD_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 177 EXPORT USB_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 178 EXPORT CAN_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 179 EXPORT DMA_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 180 EXPORT I2S_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 181 EXPORT ENET_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 182 EXPORT RIT_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 183 EXPORT MCPWM_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 184 EXPORT QEI_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 185 EXPORT PLL1_IRQHandler [WEAK]
emilmont 10:3bc89ef62ce7 186
emilmont 10:3bc89ef62ce7 187 WDT_IRQHandler
emilmont 10:3bc89ef62ce7 188 TIMER0_IRQHandler
emilmont 10:3bc89ef62ce7 189 TIMER1_IRQHandler
emilmont 10:3bc89ef62ce7 190 TIMER2_IRQHandler
emilmont 10:3bc89ef62ce7 191 TIMER3_IRQHandler
emilmont 10:3bc89ef62ce7 192 UART0_IRQHandler
emilmont 10:3bc89ef62ce7 193 UART1_IRQHandler
emilmont 10:3bc89ef62ce7 194 UART2_IRQHandler
emilmont 10:3bc89ef62ce7 195 UART3_IRQHandler
emilmont 10:3bc89ef62ce7 196 PWM1_IRQHandler
emilmont 10:3bc89ef62ce7 197 I2C0_IRQHandler
emilmont 10:3bc89ef62ce7 198 I2C1_IRQHandler
emilmont 10:3bc89ef62ce7 199 I2C2_IRQHandler
emilmont 10:3bc89ef62ce7 200 SPI_IRQHandler
emilmont 10:3bc89ef62ce7 201 SSP0_IRQHandler
emilmont 10:3bc89ef62ce7 202 SSP1_IRQHandler
emilmont 10:3bc89ef62ce7 203 PLL0_IRQHandler
emilmont 10:3bc89ef62ce7 204 RTC_IRQHandler
emilmont 10:3bc89ef62ce7 205 EINT0_IRQHandler
emilmont 10:3bc89ef62ce7 206 EINT1_IRQHandler
emilmont 10:3bc89ef62ce7 207 EINT2_IRQHandler
emilmont 10:3bc89ef62ce7 208 EINT3_IRQHandler
emilmont 10:3bc89ef62ce7 209 ADC_IRQHandler
emilmont 10:3bc89ef62ce7 210 BOD_IRQHandler
emilmont 10:3bc89ef62ce7 211 USB_IRQHandler
emilmont 10:3bc89ef62ce7 212 CAN_IRQHandler
emilmont 10:3bc89ef62ce7 213 DMA_IRQHandler
emilmont 10:3bc89ef62ce7 214 I2S_IRQHandler
emilmont 10:3bc89ef62ce7 215 ENET_IRQHandler
emilmont 10:3bc89ef62ce7 216 RIT_IRQHandler
emilmont 10:3bc89ef62ce7 217 MCPWM_IRQHandler
emilmont 10:3bc89ef62ce7 218 QEI_IRQHandler
emilmont 10:3bc89ef62ce7 219 PLL1_IRQHandler
emilmont 10:3bc89ef62ce7 220
emilmont 10:3bc89ef62ce7 221 B .
emilmont 10:3bc89ef62ce7 222
emilmont 10:3bc89ef62ce7 223 ENDP
emilmont 10:3bc89ef62ce7 224
emilmont 10:3bc89ef62ce7 225 ALIGN
emilmont 10:3bc89ef62ce7 226 END