mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_NUVOTON/TARGET_NUC472/device/startup_NUC472_442.c@174:b96e65c34a4d, 2017-10-02 (annotated)
- Committer:
- AnnaBridge
- Date:
- Mon Oct 02 15:33:19 2017 +0100
- Revision:
- 174:b96e65c34a4d
- Parent:
- 172:7d866c31b3c5
- Child:
- 188:bcfe06ba3d64
This updates the lib to the mbed lib v 152
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /****************************************************************************** |
<> | 149:156823d33999 | 2 | * @file startup_NUC472_442.c |
<> | 149:156823d33999 | 3 | * @version V0.10 |
<> | 149:156823d33999 | 4 | * $Revision: 11 $ |
<> | 149:156823d33999 | 5 | * $Date: 15/09/02 10:02a $ |
<> | 149:156823d33999 | 6 | * @brief CMSIS Cortex-M4 Core Peripheral Access Layer Source File for NUC472/442 MCU |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * @note |
<> | 149:156823d33999 | 9 | * Copyright (C) 2013~2015 Nuvoton Technology Corp. All rights reserved. |
<> | 149:156823d33999 | 10 | *****************************************************************************/ |
<> | 149:156823d33999 | 11 | |
<> | 149:156823d33999 | 12 | #include "NUC472_442.h" |
<> | 149:156823d33999 | 13 | |
<> | 149:156823d33999 | 14 | /* Suppress warning messages */ |
<> | 149:156823d33999 | 15 | #if defined(__CC_ARM) |
<> | 149:156823d33999 | 16 | // Suppress warning message: extended constant initialiser used |
<> | 149:156823d33999 | 17 | #pragma diag_suppress 1296 |
<> | 149:156823d33999 | 18 | #elif defined(__ICCARM__) |
<> | 149:156823d33999 | 19 | #elif defined(__GNUC__) |
<> | 149:156823d33999 | 20 | #endif |
<> | 149:156823d33999 | 21 | |
<> | 149:156823d33999 | 22 | /* Macro Definitions */ |
<> | 149:156823d33999 | 23 | #if defined(__CC_ARM) |
<> | 149:156823d33999 | 24 | #define WEAK __attribute__ ((weak)) |
<> | 149:156823d33999 | 25 | #define ALIAS(f) __attribute__ ((weak, alias(#f))) |
<> | 149:156823d33999 | 26 | |
<> | 149:156823d33999 | 27 | #define WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) \ |
<> | 149:156823d33999 | 28 | void FUN(void) __attribute__ ((weak, alias(#FUN_ALIAS))); |
<> | 149:156823d33999 | 29 | |
<> | 149:156823d33999 | 30 | #elif defined(__ICCARM__) |
<> | 149:156823d33999 | 31 | //#define STRINGIFY(x) #x |
<> | 149:156823d33999 | 32 | //#define _STRINGIFY(x) STRINGIFY(x) |
<> | 149:156823d33999 | 33 | #define WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) \ |
<> | 149:156823d33999 | 34 | void FUN(void); \ |
<> | 149:156823d33999 | 35 | _Pragma(_STRINGIFY(_WEAK_ALIAS_FUNC(FUN, FUN_ALIAS))) |
<> | 149:156823d33999 | 36 | #define _WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) weak __WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) |
<> | 149:156823d33999 | 37 | #define __WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) FUN##=##FUN_ALIAS |
<> | 149:156823d33999 | 38 | |
<> | 149:156823d33999 | 39 | #elif defined(__GNUC__) |
<> | 149:156823d33999 | 40 | #define WEAK __attribute__ ((weak)) |
<> | 149:156823d33999 | 41 | #define ALIAS(f) __attribute__ ((weak, alias(#f))) |
<> | 149:156823d33999 | 42 | |
<> | 149:156823d33999 | 43 | #define WEAK_ALIAS_FUNC(FUN, FUN_ALIAS) \ |
<> | 149:156823d33999 | 44 | void FUN(void) __attribute__ ((weak, alias(#FUN_ALIAS))); |
<> | 149:156823d33999 | 45 | |
<> | 149:156823d33999 | 46 | #endif |
<> | 149:156823d33999 | 47 | |
<> | 149:156823d33999 | 48 | |
<> | 149:156823d33999 | 49 | /* Initialize segments */ |
AnnaBridge | 174:b96e65c34a4d | 50 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
<> | 149:156823d33999 | 51 | extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit; |
<> | 149:156823d33999 | 52 | extern void __main(void); |
<> | 149:156823d33999 | 53 | #elif defined(__ICCARM__) |
<> | 149:156823d33999 | 54 | void __iar_program_start(void); |
<> | 149:156823d33999 | 55 | #elif defined(__GNUC__) |
<> | 149:156823d33999 | 56 | extern uint32_t __StackTop; |
<> | 149:156823d33999 | 57 | extern uint32_t __etext; |
<> | 149:156823d33999 | 58 | extern uint32_t __data_start__; |
<> | 149:156823d33999 | 59 | extern uint32_t __data_end__; |
<> | 149:156823d33999 | 60 | extern uint32_t __bss_start__; |
<> | 149:156823d33999 | 61 | extern uint32_t __bss_end__; |
<> | 149:156823d33999 | 62 | extern uint32_t __bss_extern_start__ WEAK; |
<> | 149:156823d33999 | 63 | extern uint32_t __bss_extern_end__ WEAK; |
<> | 149:156823d33999 | 64 | |
<> | 149:156823d33999 | 65 | extern void uvisor_init(void); |
AnnaBridge | 172:7d866c31b3c5 | 66 | #if defined(TOOLCHAIN_GCC_ARM) |
AnnaBridge | 172:7d866c31b3c5 | 67 | extern void _start(void); |
AnnaBridge | 172:7d866c31b3c5 | 68 | #else |
AnnaBridge | 172:7d866c31b3c5 | 69 | #error("For GCC toolchain, only support GNU ARM Embedded") |
AnnaBridge | 172:7d866c31b3c5 | 70 | #endif |
<> | 149:156823d33999 | 71 | #endif |
<> | 149:156823d33999 | 72 | |
<> | 149:156823d33999 | 73 | /* Default empty handler */ |
<> | 149:156823d33999 | 74 | void Default_Handler(void); |
<> | 149:156823d33999 | 75 | |
<> | 149:156823d33999 | 76 | /* Reset handler */ |
<> | 149:156823d33999 | 77 | void Reset_Handler(void); |
<> | 149:156823d33999 | 78 | |
<> | 149:156823d33999 | 79 | /* Cortex-M4 core handlers */ |
<> | 149:156823d33999 | 80 | WEAK_ALIAS_FUNC(NMI_Handler, Default_Handler) |
<> | 149:156823d33999 | 81 | WEAK_ALIAS_FUNC(HardFault_Handler, Default_Handler) |
<> | 149:156823d33999 | 82 | WEAK_ALIAS_FUNC(MemManage_Handler, Default_Handler) |
<> | 149:156823d33999 | 83 | WEAK_ALIAS_FUNC(BusFault_Handler , Default_Handler) |
<> | 149:156823d33999 | 84 | WEAK_ALIAS_FUNC(UsageFault_Handler, Default_Handler) |
<> | 149:156823d33999 | 85 | WEAK_ALIAS_FUNC(SVC_Handler, Default_Handler) |
<> | 149:156823d33999 | 86 | WEAK_ALIAS_FUNC(DebugMon_Handler, Default_Handler) |
<> | 149:156823d33999 | 87 | WEAK_ALIAS_FUNC(PendSV_Handler, Default_Handler) |
<> | 149:156823d33999 | 88 | WEAK_ALIAS_FUNC(SysTick_Handler, Default_Handler) |
<> | 149:156823d33999 | 89 | |
<> | 149:156823d33999 | 90 | /* Peripherals handlers */ |
<> | 149:156823d33999 | 91 | WEAK_ALIAS_FUNC(BOD_IRQHandler, Default_Handler) // 0: Brown Out detection |
<> | 149:156823d33999 | 92 | WEAK_ALIAS_FUNC(IRC_IRQHandler, Default_Handler) // 1: Internal RC |
<> | 149:156823d33999 | 93 | WEAK_ALIAS_FUNC(PWRWU_IRQHandler, Default_Handler) // 2: Power Down Wake Up |
<> | 149:156823d33999 | 94 | WEAK_ALIAS_FUNC(SRAMF_IRQHandler, Default_Handler) // 3: Reserved. |
<> | 149:156823d33999 | 95 | WEAK_ALIAS_FUNC(CLKF_IRQHandler, Default_Handler) // 4: CLKF |
<> | 149:156823d33999 | 96 | // 5: Reserved. |
<> | 149:156823d33999 | 97 | WEAK_ALIAS_FUNC(RTC_IRQHandler, Default_Handler) // 6: Real Time Clock |
<> | 149:156823d33999 | 98 | WEAK_ALIAS_FUNC(TAMPER_IRQHandler, Default_Handler) // 7: Tamper detection |
<> | 149:156823d33999 | 99 | WEAK_ALIAS_FUNC(EINT0_IRQHandler, Default_Handler) // 8: External Input 0 |
<> | 149:156823d33999 | 100 | WEAK_ALIAS_FUNC(EINT1_IRQHandler, Default_Handler) // 9: External Input 1 |
<> | 149:156823d33999 | 101 | WEAK_ALIAS_FUNC(EINT2_IRQHandler, Default_Handler) // 10: External Input 2 |
<> | 149:156823d33999 | 102 | WEAK_ALIAS_FUNC(EINT3_IRQHandler, Default_Handler) // 11: External Input 3 |
<> | 149:156823d33999 | 103 | WEAK_ALIAS_FUNC(EINT4_IRQHandler, Default_Handler) // 12: External Input 4 |
<> | 149:156823d33999 | 104 | WEAK_ALIAS_FUNC(EINT5_IRQHandler, Default_Handler) // 13: External Input 5 |
<> | 149:156823d33999 | 105 | WEAK_ALIAS_FUNC(EINT6_IRQHandler, Default_Handler) // 14: External Input 6 |
<> | 149:156823d33999 | 106 | WEAK_ALIAS_FUNC(EINT7_IRQHandler, Default_Handler) // 15: External Input 7 |
<> | 149:156823d33999 | 107 | WEAK_ALIAS_FUNC(GPA_IRQHandler, Default_Handler) // 16: GPIO Port A |
<> | 149:156823d33999 | 108 | WEAK_ALIAS_FUNC(GPB_IRQHandler, Default_Handler) // 17: GPIO Port B |
<> | 149:156823d33999 | 109 | WEAK_ALIAS_FUNC(GPC_IRQHandler, Default_Handler) // 18: GPIO Port C |
<> | 149:156823d33999 | 110 | WEAK_ALIAS_FUNC(GPD_IRQHandler, Default_Handler) // 19: GPIO Port D |
<> | 149:156823d33999 | 111 | WEAK_ALIAS_FUNC(GPE_IRQHandler, Default_Handler) // 20: GPIO Port E |
<> | 149:156823d33999 | 112 | WEAK_ALIAS_FUNC(GPF_IRQHandler, Default_Handler) // 21: GPIO Port F |
<> | 149:156823d33999 | 113 | WEAK_ALIAS_FUNC(GPG_IRQHandler, Default_Handler) // 22: GPIO Port G |
<> | 149:156823d33999 | 114 | WEAK_ALIAS_FUNC(GPH_IRQHandler, Default_Handler) // 23: GPIO Port H |
<> | 149:156823d33999 | 115 | WEAK_ALIAS_FUNC(GPI_IRQHandler, Default_Handler) // 24: GPIO Port I |
<> | 149:156823d33999 | 116 | // 25: Reserved. |
<> | 149:156823d33999 | 117 | // 26: Reserved. |
<> | 149:156823d33999 | 118 | // 27: Reserved. |
<> | 149:156823d33999 | 119 | // 28: Reserved. |
<> | 149:156823d33999 | 120 | // 29: Reserved. |
<> | 149:156823d33999 | 121 | // 30: Reserved. |
<> | 149:156823d33999 | 122 | // 31: Reserved. |
<> | 149:156823d33999 | 123 | WEAK_ALIAS_FUNC(TMR0_IRQHandler, Default_Handler) // 32: Timer 0 |
<> | 149:156823d33999 | 124 | WEAK_ALIAS_FUNC(TMR1_IRQHandler, Default_Handler) // 33: Timer 1 |
<> | 149:156823d33999 | 125 | WEAK_ALIAS_FUNC(TMR2_IRQHandler, Default_Handler) // 34: Timer 2 |
<> | 149:156823d33999 | 126 | WEAK_ALIAS_FUNC(TMR3_IRQHandler, Default_Handler) // 35: Timer 3 |
<> | 149:156823d33999 | 127 | // 36: Reserved. |
<> | 149:156823d33999 | 128 | // 37: Reserved. |
<> | 149:156823d33999 | 129 | // 38: Reserved. |
<> | 149:156823d33999 | 130 | // 39: Reserved. |
<> | 149:156823d33999 | 131 | WEAK_ALIAS_FUNC(PDMA_IRQHandler, Default_Handler) // 40: Peripheral DMA |
<> | 149:156823d33999 | 132 | // 41: Reserved. |
<> | 149:156823d33999 | 133 | WEAK_ALIAS_FUNC(ADC_IRQHandler, Default_Handler) // 42: ADC |
<> | 149:156823d33999 | 134 | // 43: Reserved. |
<> | 149:156823d33999 | 135 | // 44: Reserved. |
<> | 149:156823d33999 | 136 | // 45: Reserved. |
<> | 149:156823d33999 | 137 | WEAK_ALIAS_FUNC(WDT_IRQHandler, Default_Handler) // 46: Watch Dog Timer |
<> | 149:156823d33999 | 138 | WEAK_ALIAS_FUNC(WWDT_IRQHandler, Default_Handler) // 47: Window Watch Dog Timer |
<> | 149:156823d33999 | 139 | WEAK_ALIAS_FUNC(EADC0_IRQHandler, Default_Handler) // 48: EDAC 0 |
<> | 149:156823d33999 | 140 | WEAK_ALIAS_FUNC(EADC1_IRQHandler, Default_Handler) // 49: EDAC 1 |
<> | 149:156823d33999 | 141 | WEAK_ALIAS_FUNC(EADC2_IRQHandler, Default_Handler) // 50: EDAC 2 |
<> | 149:156823d33999 | 142 | WEAK_ALIAS_FUNC(EADC3_IRQHandler, Default_Handler) // 51: EDAC 3 |
<> | 149:156823d33999 | 143 | // 52: Reserved. |
<> | 149:156823d33999 | 144 | // 53: Reserved. |
<> | 149:156823d33999 | 145 | // 54: Reserved. |
<> | 149:156823d33999 | 146 | // 55: Reserved. |
<> | 149:156823d33999 | 147 | WEAK_ALIAS_FUNC(ACMP_IRQHandler, Default_Handler) // 56: Analog Comparator |
<> | 149:156823d33999 | 148 | // 57: Reserved. |
<> | 149:156823d33999 | 149 | // 58: Reserved. |
<> | 149:156823d33999 | 150 | // 59: Reserved. |
<> | 149:156823d33999 | 151 | WEAK_ALIAS_FUNC(OPA0_IRQHandler, Default_Handler) // 60: OPA 0 |
<> | 149:156823d33999 | 152 | WEAK_ALIAS_FUNC(OPA1_IRQHandler, Default_Handler) // 61: OPA 1 |
<> | 149:156823d33999 | 153 | WEAK_ALIAS_FUNC(ICAP0_IRQHandler, Default_Handler) // 62: ICAP 0 |
<> | 149:156823d33999 | 154 | WEAK_ALIAS_FUNC(ICAP1_IRQHandler, Default_Handler) // 63: ICAP 1 |
<> | 149:156823d33999 | 155 | WEAK_ALIAS_FUNC(PWM0CH0_IRQHandler, Default_Handler) // 64: PWM0 CH0 |
<> | 149:156823d33999 | 156 | WEAK_ALIAS_FUNC(PWM0CH1_IRQHandler, Default_Handler) // 65: PWM0 CH1 |
<> | 149:156823d33999 | 157 | WEAK_ALIAS_FUNC(PWM0CH2_IRQHandler, Default_Handler) // 66: PWM0 CH2 |
<> | 149:156823d33999 | 158 | WEAK_ALIAS_FUNC(PWM0CH3_IRQHandler, Default_Handler) // 67: PWM0 CH3 |
<> | 149:156823d33999 | 159 | WEAK_ALIAS_FUNC(PWM0CH4_IRQHandler, Default_Handler) // 68: PWM0 CH4 |
<> | 149:156823d33999 | 160 | WEAK_ALIAS_FUNC(PWM0CH5_IRQHandler, Default_Handler) // 69: PWM0 CH5 |
<> | 149:156823d33999 | 161 | WEAK_ALIAS_FUNC(PWM0_BRK_IRQHandler, Default_Handler) // 70: PWM0 Break |
<> | 149:156823d33999 | 162 | WEAK_ALIAS_FUNC(QEI0_IRQHandler, Default_Handler) // 71: QEI 0 |
<> | 149:156823d33999 | 163 | WEAK_ALIAS_FUNC(PWM1CH0_IRQHandler, Default_Handler) // 72: PWM1 CH0 |
<> | 149:156823d33999 | 164 | WEAK_ALIAS_FUNC(PWM1CH1_IRQHandler, Default_Handler) // 73: PWM1 CH1 |
<> | 149:156823d33999 | 165 | WEAK_ALIAS_FUNC(PWM1CH2_IRQHandler, Default_Handler) // 74: PWM1 CH2 |
<> | 149:156823d33999 | 166 | WEAK_ALIAS_FUNC(PWM1CH3_IRQHandler, Default_Handler) // 75: PWM1 CH3 |
<> | 149:156823d33999 | 167 | WEAK_ALIAS_FUNC(PWM1CH4_IRQHandler, Default_Handler) // 76: PWM1 CH4 |
<> | 149:156823d33999 | 168 | WEAK_ALIAS_FUNC(PWM1CH5_IRQHandler, Default_Handler) // 77: PWM1 CH5 |
<> | 149:156823d33999 | 169 | WEAK_ALIAS_FUNC(PWM1_BRK_IRQHandler, Default_Handler) // 78: PWM1 Break |
<> | 149:156823d33999 | 170 | WEAK_ALIAS_FUNC(QEI1_IRQHandler, Default_Handler) // 79: QEI 1 |
<> | 149:156823d33999 | 171 | WEAK_ALIAS_FUNC(EPWM0_IRQHandler, Default_Handler) // 80: EPWM0 |
<> | 149:156823d33999 | 172 | WEAK_ALIAS_FUNC(EPWM0BRK_IRQHandler, Default_Handler) // 81: EPWM0 Break |
<> | 149:156823d33999 | 173 | WEAK_ALIAS_FUNC(EPWM1_IRQHandler, Default_Handler) // 82: EPWM1 |
<> | 149:156823d33999 | 174 | WEAK_ALIAS_FUNC(EPWM1BRK_IRQHandler, Default_Handler) // 83: EPWM1 Break |
<> | 149:156823d33999 | 175 | // 84: Reserved. |
<> | 149:156823d33999 | 176 | // 85: Reserved. |
<> | 149:156823d33999 | 177 | // 86: Reserved. |
<> | 149:156823d33999 | 178 | // 87: Reserved. |
<> | 149:156823d33999 | 179 | WEAK_ALIAS_FUNC(USBD_IRQHandler, Default_Handler) // 88: USB Device |
<> | 149:156823d33999 | 180 | WEAK_ALIAS_FUNC(USBH_IRQHandler, Default_Handler) // 89: USB Host |
<> | 149:156823d33999 | 181 | WEAK_ALIAS_FUNC(USB_OTG_IRQHandler, Default_Handler) // 90: USB OTG |
<> | 149:156823d33999 | 182 | // 91: Reserved. |
<> | 149:156823d33999 | 183 | WEAK_ALIAS_FUNC(EMAC_TX_IRQHandler, Default_Handler) // 92: Ethernet MAC TX |
<> | 149:156823d33999 | 184 | WEAK_ALIAS_FUNC(EMAC_RX_IRQHandler, Default_Handler) // 93: Ethernet MAC RX |
<> | 149:156823d33999 | 185 | // 94: Reserved. |
<> | 149:156823d33999 | 186 | // 95: Reserved. |
<> | 149:156823d33999 | 187 | WEAK_ALIAS_FUNC(SPI0_IRQHandler, Default_Handler) // 96: SPI 0 |
<> | 149:156823d33999 | 188 | WEAK_ALIAS_FUNC(SPI1_IRQHandler, Default_Handler) // 97: SPI 1 |
<> | 149:156823d33999 | 189 | WEAK_ALIAS_FUNC(SPI2_IRQHandler, Default_Handler) // 98: SPI 2 |
<> | 149:156823d33999 | 190 | WEAK_ALIAS_FUNC(SPI3_IRQHandler, Default_Handler) // 99: SPI 3 |
<> | 149:156823d33999 | 191 | // 100: Reserved. |
<> | 149:156823d33999 | 192 | // 101: Reserved. |
<> | 149:156823d33999 | 193 | // 102: Reserved. |
<> | 149:156823d33999 | 194 | // 103: Reserved. |
<> | 149:156823d33999 | 195 | WEAK_ALIAS_FUNC(UART0_IRQHandler, Default_Handler) // 104: UART 0 |
<> | 149:156823d33999 | 196 | WEAK_ALIAS_FUNC(UART1_IRQHandler, Default_Handler) // 105: UART 1 |
<> | 149:156823d33999 | 197 | WEAK_ALIAS_FUNC(UART2_IRQHandler, Default_Handler) // 106: UART 2 |
<> | 149:156823d33999 | 198 | WEAK_ALIAS_FUNC(UART3_IRQHandler, Default_Handler) // 107: UART 3 |
<> | 149:156823d33999 | 199 | WEAK_ALIAS_FUNC(UART4_IRQHandler, Default_Handler) // 108: UART 4 |
<> | 149:156823d33999 | 200 | WEAK_ALIAS_FUNC(UART5_IRQHandler, Default_Handler) // 109: UART 5 |
<> | 149:156823d33999 | 201 | // 110: Reserved. |
<> | 149:156823d33999 | 202 | // 111: Reserved. |
<> | 149:156823d33999 | 203 | WEAK_ALIAS_FUNC(I2C0_IRQHandler, Default_Handler) // 112: I2C 0 |
<> | 149:156823d33999 | 204 | WEAK_ALIAS_FUNC(I2C1_IRQHandler, Default_Handler) // 113: I2C 1 |
<> | 149:156823d33999 | 205 | WEAK_ALIAS_FUNC(I2C2_IRQHandler, Default_Handler) // 114: I2C 2 |
<> | 149:156823d33999 | 206 | WEAK_ALIAS_FUNC(I2C3_IRQHandler, Default_Handler) // 115: I2C 3 |
<> | 149:156823d33999 | 207 | WEAK_ALIAS_FUNC(I2C4_IRQHandler, Default_Handler) // 116: I2C 4 |
<> | 149:156823d33999 | 208 | // 117: Reserved. |
<> | 149:156823d33999 | 209 | // 118: Reserved. |
<> | 149:156823d33999 | 210 | // 119: Reserved. |
<> | 149:156823d33999 | 211 | WEAK_ALIAS_FUNC(SC0_IRQHandler, Default_Handler) // 120: Smart Card 0 |
<> | 149:156823d33999 | 212 | WEAK_ALIAS_FUNC(SC1_IRQHandler, Default_Handler) // 121: Smart Card 1 |
<> | 149:156823d33999 | 213 | WEAK_ALIAS_FUNC(SC2_IRQHandler, Default_Handler) // 122: Smart Card 2 |
<> | 149:156823d33999 | 214 | WEAK_ALIAS_FUNC(SC3_IRQHandler, Default_Handler) // 123: Smart Card 3 |
<> | 149:156823d33999 | 215 | WEAK_ALIAS_FUNC(SC4_IRQHandler, Default_Handler) // 124: Smart Card 4 |
<> | 149:156823d33999 | 216 | WEAK_ALIAS_FUNC(SC5_IRQHandler, Default_Handler) // 125: Smart Card 5 |
<> | 149:156823d33999 | 217 | // 126: Reserved. |
<> | 149:156823d33999 | 218 | // 127: Reserved. |
<> | 149:156823d33999 | 219 | WEAK_ALIAS_FUNC(CAN0_IRQHandler, Default_Handler) // 128: CAN 0 |
<> | 149:156823d33999 | 220 | WEAK_ALIAS_FUNC(CAN1_IRQHandler, Default_Handler) // 129: CAN 1 |
<> | 149:156823d33999 | 221 | // 130: Reserved. |
<> | 149:156823d33999 | 222 | // 131: Reserved. |
<> | 149:156823d33999 | 223 | WEAK_ALIAS_FUNC(I2S0_IRQHandler, Default_Handler) // 132: I2S 0 |
<> | 149:156823d33999 | 224 | WEAK_ALIAS_FUNC(I2S1_IRQHandler, Default_Handler) // 133: I2S 1 |
<> | 149:156823d33999 | 225 | // 134: Reserved. |
<> | 149:156823d33999 | 226 | // 135: Reserved. |
<> | 149:156823d33999 | 227 | WEAK_ALIAS_FUNC(SD_IRQHandler, Default_Handler) // 136: SD card |
<> | 149:156823d33999 | 228 | // 137: Reserved. |
<> | 149:156823d33999 | 229 | WEAK_ALIAS_FUNC(PS2D_IRQHandler, Default_Handler) // 138: PS/2 device |
<> | 149:156823d33999 | 230 | WEAK_ALIAS_FUNC(CAP_IRQHandler, Default_Handler) // 139: VIN |
<> | 149:156823d33999 | 231 | WEAK_ALIAS_FUNC(CRYPTO_IRQHandler, Default_Handler) // 140: CRYPTO |
<> | 149:156823d33999 | 232 | WEAK_ALIAS_FUNC(CRC_IRQHandler, Default_Handler) // 141: CRC |
<> | 149:156823d33999 | 233 | |
<> | 149:156823d33999 | 234 | /* Vector table */ |
AnnaBridge | 174:b96e65c34a4d | 235 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
<> | 149:156823d33999 | 236 | __attribute__ ((section("RESET"))) |
<> | 149:156823d33999 | 237 | const uint32_t __vector_handlers[] = { |
<> | 149:156823d33999 | 238 | #elif defined(__ICCARM__) |
<> | 149:156823d33999 | 239 | extern uint32_t CSTACK$$Limit; |
<> | 149:156823d33999 | 240 | const uint32_t __vector_table[] @ ".intvec" = { |
<> | 149:156823d33999 | 241 | #elif defined(__GNUC__) |
<> | 149:156823d33999 | 242 | __attribute__ ((section(".vector_table"))) |
<> | 149:156823d33999 | 243 | const uint32_t __vector_handlers[] = { |
<> | 149:156823d33999 | 244 | #endif |
<> | 149:156823d33999 | 245 | |
<> | 149:156823d33999 | 246 | /* Configure Initial Stack Pointer, using linker-generated symbols */ |
AnnaBridge | 174:b96e65c34a4d | 247 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
<> | 149:156823d33999 | 248 | (uint32_t) &Image$$ARM_LIB_STACK$$ZI$$Limit, |
<> | 149:156823d33999 | 249 | #elif defined(__ICCARM__) |
<> | 149:156823d33999 | 250 | //(uint32_t) __sfe("CSTACK"), |
<> | 149:156823d33999 | 251 | (uint32_t) &CSTACK$$Limit, |
<> | 149:156823d33999 | 252 | #elif defined(__GNUC__) |
<> | 149:156823d33999 | 253 | (uint32_t) &__StackTop, |
<> | 149:156823d33999 | 254 | #endif |
<> | 149:156823d33999 | 255 | |
<> | 149:156823d33999 | 256 | (uint32_t) Reset_Handler, // Reset Handler |
<> | 149:156823d33999 | 257 | (uint32_t) NMI_Handler, // NMI Handler |
<> | 149:156823d33999 | 258 | (uint32_t) HardFault_Handler, // Hard Fault Handler |
<> | 149:156823d33999 | 259 | (uint32_t) MemManage_Handler, // MPU Fault Handler |
<> | 149:156823d33999 | 260 | (uint32_t) BusFault_Handler, // Bus Fault Handler |
<> | 149:156823d33999 | 261 | (uint32_t) UsageFault_Handler, // Usage Fault Handler |
<> | 149:156823d33999 | 262 | 0, // Reserved |
<> | 149:156823d33999 | 263 | 0, // Reserved |
<> | 149:156823d33999 | 264 | 0, // Reserved |
<> | 149:156823d33999 | 265 | 0, // Reserved |
<> | 149:156823d33999 | 266 | (uint32_t) SVC_Handler, // SVCall Handler |
<> | 149:156823d33999 | 267 | (uint32_t) DebugMon_Handler, // Debug Monitor Handler |
<> | 149:156823d33999 | 268 | 0, // Reserved |
<> | 149:156823d33999 | 269 | (uint32_t) PendSV_Handler, // PendSV Handler |
<> | 149:156823d33999 | 270 | (uint32_t) SysTick_Handler, // SysTick Handler |
<> | 149:156823d33999 | 271 | |
<> | 149:156823d33999 | 272 | /* External Interrupts */ |
<> | 149:156823d33999 | 273 | (uint32_t) BOD_IRQHandler, // 0: Brown Out detection |
<> | 149:156823d33999 | 274 | (uint32_t) IRC_IRQHandler, // 1: Internal RC |
<> | 149:156823d33999 | 275 | (uint32_t) PWRWU_IRQHandler, // 2: Power Down Wake Up |
<> | 149:156823d33999 | 276 | (uint32_t) SRAMF_IRQHandler, // 3: Reserved. |
<> | 149:156823d33999 | 277 | (uint32_t) CLKF_IRQHandler, // 4: CLKF |
<> | 149:156823d33999 | 278 | (uint32_t) Default_Handler, // 5: Reserved. |
<> | 149:156823d33999 | 279 | (uint32_t) RTC_IRQHandler, // 6: Real Time Clock |
<> | 149:156823d33999 | 280 | (uint32_t) TAMPER_IRQHandler, // 7: Tamper detection |
<> | 149:156823d33999 | 281 | (uint32_t) EINT0_IRQHandler, // 8: External Input 0 |
<> | 149:156823d33999 | 282 | (uint32_t) EINT1_IRQHandler, // 9: External Input 1 |
<> | 149:156823d33999 | 283 | (uint32_t) EINT2_IRQHandler, // 10: External Input 2 |
<> | 149:156823d33999 | 284 | (uint32_t) EINT3_IRQHandler, // 11: External Input 3 |
<> | 149:156823d33999 | 285 | (uint32_t) EINT4_IRQHandler, // 12: External Input 4 |
<> | 149:156823d33999 | 286 | (uint32_t) EINT5_IRQHandler, // 13: External Input 5 |
<> | 149:156823d33999 | 287 | (uint32_t) EINT6_IRQHandler, // 14: External Input 6 |
<> | 149:156823d33999 | 288 | (uint32_t) EINT7_IRQHandler, // 15: External Input 7 |
<> | 149:156823d33999 | 289 | (uint32_t) GPA_IRQHandler, // 16: GPIO Port A |
<> | 149:156823d33999 | 290 | (uint32_t) GPB_IRQHandler, // 17: GPIO Port B |
<> | 149:156823d33999 | 291 | (uint32_t) GPC_IRQHandler, // 18: GPIO Port C |
<> | 149:156823d33999 | 292 | (uint32_t) GPD_IRQHandler, // 19: GPIO Port D |
<> | 149:156823d33999 | 293 | (uint32_t) GPE_IRQHandler, // 20: GPIO Port E |
<> | 149:156823d33999 | 294 | (uint32_t) GPF_IRQHandler, // 21: GPIO Port F |
<> | 149:156823d33999 | 295 | (uint32_t) GPG_IRQHandler, // 22: GPIO Port G |
<> | 149:156823d33999 | 296 | (uint32_t) GPH_IRQHandler, // 23: GPIO Port H |
<> | 149:156823d33999 | 297 | (uint32_t) GPI_IRQHandler, // 24: GPIO Port I |
<> | 149:156823d33999 | 298 | (uint32_t) Default_Handler, // 25: Reserved. |
<> | 149:156823d33999 | 299 | (uint32_t) Default_Handler, // 26: Reserved. |
<> | 149:156823d33999 | 300 | (uint32_t) Default_Handler, // 27: Reserved. |
<> | 149:156823d33999 | 301 | (uint32_t) Default_Handler, // 28: Reserved. |
<> | 149:156823d33999 | 302 | (uint32_t) Default_Handler, // 29: Reserved. |
<> | 149:156823d33999 | 303 | (uint32_t) Default_Handler, // 30: Reserved. |
<> | 149:156823d33999 | 304 | (uint32_t) Default_Handler, // 31: Reserved. |
<> | 149:156823d33999 | 305 | (uint32_t) TMR0_IRQHandler, // 32: Timer 0 |
<> | 149:156823d33999 | 306 | (uint32_t) TMR1_IRQHandler, // 33: Timer 1 |
<> | 149:156823d33999 | 307 | (uint32_t) TMR2_IRQHandler, // 34: Timer 2 |
<> | 149:156823d33999 | 308 | (uint32_t) TMR3_IRQHandler, // 35: Timer 3 |
<> | 149:156823d33999 | 309 | (uint32_t) Default_Handler, // 36: Reserved. |
<> | 149:156823d33999 | 310 | (uint32_t) Default_Handler, // 37: Reserved. |
<> | 149:156823d33999 | 311 | (uint32_t) Default_Handler, // 38: Reserved. |
<> | 149:156823d33999 | 312 | (uint32_t) Default_Handler, // 39: Reserved. |
<> | 149:156823d33999 | 313 | (uint32_t) PDMA_IRQHandler, // 40: Peripheral DMA |
<> | 149:156823d33999 | 314 | (uint32_t) Default_Handler, // 41: Reserved. |
<> | 149:156823d33999 | 315 | (uint32_t) ADC_IRQHandler, // 42: ADC |
<> | 149:156823d33999 | 316 | (uint32_t) Default_Handler, // 43: Reserved. |
<> | 149:156823d33999 | 317 | (uint32_t) Default_Handler, // 44: Reserved. |
<> | 149:156823d33999 | 318 | (uint32_t) Default_Handler, // 45: Reserved. |
<> | 149:156823d33999 | 319 | (uint32_t) WDT_IRQHandler, // 46: Watch Dog Timer |
<> | 149:156823d33999 | 320 | (uint32_t) WWDT_IRQHandler, // 47: Window Watch Dog Timer |
<> | 149:156823d33999 | 321 | (uint32_t) EADC0_IRQHandler, // 48: EDAC 0 |
<> | 149:156823d33999 | 322 | (uint32_t) EADC1_IRQHandler, // 49: EDAC 1 |
<> | 149:156823d33999 | 323 | (uint32_t) EADC2_IRQHandler, // 50: EDAC 2 |
<> | 149:156823d33999 | 324 | (uint32_t) EADC3_IRQHandler, // 51: EDAC 3 |
<> | 149:156823d33999 | 325 | (uint32_t) Default_Handler, // 52: Reserved. |
<> | 149:156823d33999 | 326 | (uint32_t) Default_Handler, // 53: Reserved. |
<> | 149:156823d33999 | 327 | (uint32_t) Default_Handler, // 54: Reserved. |
<> | 149:156823d33999 | 328 | (uint32_t) Default_Handler, // 55: Reserved. |
<> | 149:156823d33999 | 329 | (uint32_t) ACMP_IRQHandler, // 56: Analog Comparator |
<> | 149:156823d33999 | 330 | (uint32_t) Default_Handler, // 57: Reserved. |
<> | 149:156823d33999 | 331 | (uint32_t) Default_Handler, // 58: Reserved. |
<> | 149:156823d33999 | 332 | (uint32_t) Default_Handler, // 59: Reserved. |
<> | 149:156823d33999 | 333 | (uint32_t) OPA0_IRQHandler, // 60: OPA 0 |
<> | 149:156823d33999 | 334 | (uint32_t) OPA1_IRQHandler, // 61: OPA 1 |
<> | 149:156823d33999 | 335 | (uint32_t) ICAP0_IRQHandler, // 62: ICAP 0 |
<> | 149:156823d33999 | 336 | (uint32_t) ICAP1_IRQHandler, // 63: ICAP 1 |
<> | 149:156823d33999 | 337 | (uint32_t) PWM0CH0_IRQHandler, // 64: PWM0 CH0 |
<> | 149:156823d33999 | 338 | (uint32_t) PWM0CH1_IRQHandler, // 65: PWM0 CH1 |
<> | 149:156823d33999 | 339 | (uint32_t) PWM0CH2_IRQHandler, // 66: PWM0 CH2 |
<> | 149:156823d33999 | 340 | (uint32_t) PWM0CH3_IRQHandler, // 67: PWM0 CH3 |
<> | 149:156823d33999 | 341 | (uint32_t) PWM0CH4_IRQHandler, // 68: PWM0 CH4 |
<> | 149:156823d33999 | 342 | (uint32_t) PWM0CH5_IRQHandler, // 69: PWM0 CH5 |
<> | 149:156823d33999 | 343 | (uint32_t) PWM0_BRK_IRQHandler, // 70: PWM0 Break |
<> | 149:156823d33999 | 344 | (uint32_t) QEI0_IRQHandler, // 71: QEI 0 |
<> | 149:156823d33999 | 345 | (uint32_t) PWM1CH0_IRQHandler, // 72: PWM1 CH0 |
<> | 149:156823d33999 | 346 | (uint32_t) PWM1CH1_IRQHandler, // 73: PWM1 CH1 |
<> | 149:156823d33999 | 347 | (uint32_t) PWM1CH2_IRQHandler, // 74: PWM1 CH2 |
<> | 149:156823d33999 | 348 | (uint32_t) PWM1CH3_IRQHandler, // 75: PWM1 CH3 |
<> | 149:156823d33999 | 349 | (uint32_t) PWM1CH4_IRQHandler, // 76: PWM1 CH4 |
<> | 149:156823d33999 | 350 | (uint32_t) PWM1CH5_IRQHandler, // 77: PWM1 CH5 |
<> | 149:156823d33999 | 351 | (uint32_t) PWM1_BRK_IRQHandler, // 78: PWM1 Break |
<> | 149:156823d33999 | 352 | (uint32_t) QEI1_IRQHandler, // 79: QEI 1 |
<> | 149:156823d33999 | 353 | (uint32_t) EPWM0_IRQHandler, // 80: EPWM0 |
<> | 149:156823d33999 | 354 | (uint32_t) EPWM0BRK_IRQHandler, // 81: EPWM0 Break |
<> | 149:156823d33999 | 355 | (uint32_t) EPWM1_IRQHandler, // 82: EPWM1 |
<> | 149:156823d33999 | 356 | (uint32_t) EPWM1BRK_IRQHandler, // 83: EPWM1 Break |
<> | 149:156823d33999 | 357 | (uint32_t) Default_Handler, // 84: Reserved. |
<> | 149:156823d33999 | 358 | (uint32_t) Default_Handler, // 85: Reserved. |
<> | 149:156823d33999 | 359 | (uint32_t) Default_Handler, // 86: Reserved. |
<> | 149:156823d33999 | 360 | (uint32_t) Default_Handler, // 87: Reserved. |
<> | 149:156823d33999 | 361 | (uint32_t) USBD_IRQHandler, // 88: USB Device |
<> | 149:156823d33999 | 362 | (uint32_t) USBH_IRQHandler, // 89: USB Host |
<> | 149:156823d33999 | 363 | (uint32_t) USB_OTG_IRQHandler, // 90: USB OTG |
<> | 149:156823d33999 | 364 | (uint32_t) Default_Handler, // 91: Reserved. |
<> | 149:156823d33999 | 365 | (uint32_t) EMAC_TX_IRQHandler, // 92: Ethernet MAC TX |
<> | 149:156823d33999 | 366 | (uint32_t) EMAC_RX_IRQHandler, // 93: Ethernet MAC RX |
<> | 149:156823d33999 | 367 | (uint32_t) Default_Handler, // 94: Reserved. |
<> | 149:156823d33999 | 368 | (uint32_t) Default_Handler, // 95: Reserved. |
<> | 149:156823d33999 | 369 | (uint32_t) SPI0_IRQHandler, // 96: SPI 0 |
<> | 149:156823d33999 | 370 | (uint32_t) SPI1_IRQHandler, // 97: SPI 1 |
<> | 149:156823d33999 | 371 | (uint32_t) SPI2_IRQHandler, // 98: SPI 2 |
<> | 149:156823d33999 | 372 | (uint32_t) SPI3_IRQHandler, // 99: SPI 3 |
<> | 149:156823d33999 | 373 | (uint32_t) Default_Handler, // 100: Reserved. |
<> | 149:156823d33999 | 374 | (uint32_t) Default_Handler, // 101: Reserved. |
<> | 149:156823d33999 | 375 | (uint32_t) Default_Handler, // 102: Reserved. |
<> | 149:156823d33999 | 376 | (uint32_t) Default_Handler, // 103: Reserved. |
<> | 149:156823d33999 | 377 | (uint32_t) UART0_IRQHandler, // 104: UART 0 |
<> | 149:156823d33999 | 378 | (uint32_t) UART1_IRQHandler, // 105: UART 1 |
<> | 149:156823d33999 | 379 | (uint32_t) UART2_IRQHandler, // 106: UART 2 |
<> | 149:156823d33999 | 380 | (uint32_t) UART3_IRQHandler, // 107: UART 3 |
<> | 149:156823d33999 | 381 | (uint32_t) UART4_IRQHandler, // 108: UART 4 |
<> | 149:156823d33999 | 382 | (uint32_t) UART5_IRQHandler, // 109: UART 5 |
<> | 149:156823d33999 | 383 | (uint32_t) Default_Handler, // 110: Reserved. |
<> | 149:156823d33999 | 384 | (uint32_t) Default_Handler, // 111: Reserved. |
<> | 149:156823d33999 | 385 | (uint32_t) I2C0_IRQHandler, // 112: I2C 0 |
<> | 149:156823d33999 | 386 | (uint32_t) I2C1_IRQHandler, // 113: I2C 1 |
<> | 149:156823d33999 | 387 | (uint32_t) I2C2_IRQHandler, // 114: I2C 2 |
<> | 149:156823d33999 | 388 | (uint32_t) I2C3_IRQHandler, // 115: I2C 3 |
<> | 149:156823d33999 | 389 | (uint32_t) I2C4_IRQHandler, // 116: I2C 4 |
<> | 149:156823d33999 | 390 | (uint32_t) Default_Handler, // 117: Reserved. |
<> | 149:156823d33999 | 391 | (uint32_t) Default_Handler, // 118: Reserved. |
<> | 149:156823d33999 | 392 | (uint32_t) Default_Handler, // 119: Reserved. |
<> | 149:156823d33999 | 393 | (uint32_t) SC0_IRQHandler, // 120: Smart Card 0 |
<> | 149:156823d33999 | 394 | (uint32_t) SC1_IRQHandler, // 121: Smart Card 1 |
<> | 149:156823d33999 | 395 | (uint32_t) SC2_IRQHandler, // 122: Smart Card 2 |
<> | 149:156823d33999 | 396 | (uint32_t) SC3_IRQHandler, // 123: Smart Card 3 |
<> | 149:156823d33999 | 397 | (uint32_t) SC4_IRQHandler, // 124: Smart Card 4 |
<> | 149:156823d33999 | 398 | (uint32_t) SC5_IRQHandler, // 125: Smart Card 5 |
<> | 149:156823d33999 | 399 | (uint32_t) Default_Handler, // 126: Reserved. |
<> | 149:156823d33999 | 400 | (uint32_t) Default_Handler, // 127: Reserved. |
<> | 149:156823d33999 | 401 | (uint32_t) CAN0_IRQHandler, // 128: CAN 0 |
<> | 149:156823d33999 | 402 | (uint32_t) CAN1_IRQHandler, // 129: CAN 1 |
<> | 149:156823d33999 | 403 | (uint32_t) Default_Handler, // 130: Reserved. |
<> | 149:156823d33999 | 404 | (uint32_t) Default_Handler, // 131: Reserved. |
<> | 149:156823d33999 | 405 | (uint32_t) I2S0_IRQHandler, // 132: I2S 0 |
<> | 149:156823d33999 | 406 | (uint32_t) I2S1_IRQHandler, // 133: I2S 1 |
<> | 149:156823d33999 | 407 | (uint32_t) Default_Handler, // 134: Reserved. |
<> | 149:156823d33999 | 408 | (uint32_t) Default_Handler, // 135: Reserved. |
<> | 149:156823d33999 | 409 | (uint32_t) SD_IRQHandler, // 136: SD card |
<> | 149:156823d33999 | 410 | (uint32_t) Default_Handler, // 137: Reserved. |
<> | 149:156823d33999 | 411 | (uint32_t) PS2D_IRQHandler, // 138: PS/2 device |
<> | 149:156823d33999 | 412 | (uint32_t) CAP_IRQHandler, // 139: VIN |
<> | 149:156823d33999 | 413 | (uint32_t) CRYPTO_IRQHandler, // 140: CRYPTO |
<> | 149:156823d33999 | 414 | (uint32_t) CRC_IRQHandler, // 141: CRC |
<> | 149:156823d33999 | 415 | }; |
<> | 149:156823d33999 | 416 | |
<> | 149:156823d33999 | 417 | /** |
<> | 149:156823d33999 | 418 | * \brief This is the code that gets called on processor reset. |
<> | 149:156823d33999 | 419 | */ |
<> | 149:156823d33999 | 420 | void Reset_Handler(void) |
<> | 149:156823d33999 | 421 | { |
<> | 149:156823d33999 | 422 | /* Disable register write-protection function */ |
<> | 149:156823d33999 | 423 | SYS_UnlockReg(); |
<> | 149:156823d33999 | 424 | |
<> | 149:156823d33999 | 425 | /* Disable branch buffer if VCID is 0 */ |
<> | 149:156823d33999 | 426 | if (SYS->VCID == 0) { |
<> | 149:156823d33999 | 427 | FMC->FTCTL |= 0x80; |
<> | 149:156823d33999 | 428 | } |
<> | 149:156823d33999 | 429 | |
<> | 149:156823d33999 | 430 | /* Disable Power-on Reset function */ |
<> | 149:156823d33999 | 431 | SYS_DISABLE_POR(); |
<> | 149:156823d33999 | 432 | |
<> | 149:156823d33999 | 433 | /** |
AnnaBridge | 172:7d866c31b3c5 | 434 | * NOTE 1: Unlock is required for perhaps some register access in SystemInit(). |
AnnaBridge | 172:7d866c31b3c5 | 435 | * NOTE 2: Because EBI (external SRAM) init is done in SystemInit(), SystemInit() must be called at the very start. |
<> | 149:156823d33999 | 436 | */ |
<> | 149:156823d33999 | 437 | SystemInit(); |
<> | 149:156823d33999 | 438 | |
AnnaBridge | 172:7d866c31b3c5 | 439 | /* Enable register write-protection function */ |
AnnaBridge | 172:7d866c31b3c5 | 440 | SYS_LockReg(); |
AnnaBridge | 172:7d866c31b3c5 | 441 | |
AnnaBridge | 174:b96e65c34a4d | 442 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
<> | 149:156823d33999 | 443 | __main(); |
<> | 149:156823d33999 | 444 | |
<> | 149:156823d33999 | 445 | #elif defined(__ICCARM__) |
<> | 149:156823d33999 | 446 | __iar_program_start(); |
<> | 149:156823d33999 | 447 | |
<> | 149:156823d33999 | 448 | #elif defined(__GNUC__) |
<> | 149:156823d33999 | 449 | uint32_t *src_ind = (uint32_t *) &__etext; |
<> | 149:156823d33999 | 450 | uint32_t *dst_ind = (uint32_t *) &__data_start__; |
<> | 149:156823d33999 | 451 | uint32_t *dst_end = (uint32_t *) &__data_end__; |
<> | 149:156823d33999 | 452 | |
<> | 149:156823d33999 | 453 | /* Move .data section from ROM to RAM */ |
<> | 149:156823d33999 | 454 | if (src_ind != dst_ind) { |
<> | 149:156823d33999 | 455 | for (; dst_ind < dst_end;) { |
<> | 149:156823d33999 | 456 | *dst_ind ++ = *src_ind ++; |
<> | 149:156823d33999 | 457 | } |
<> | 149:156823d33999 | 458 | } |
<> | 149:156823d33999 | 459 | |
<> | 149:156823d33999 | 460 | /* Initialize .bss section to zero */ |
<> | 149:156823d33999 | 461 | dst_ind = (uint32_t *) &__bss_start__; |
<> | 149:156823d33999 | 462 | dst_end = (uint32_t *) &__bss_end__; |
<> | 149:156823d33999 | 463 | if (dst_ind != dst_end) { |
<> | 149:156823d33999 | 464 | for (; dst_ind < dst_end;) { |
<> | 149:156823d33999 | 465 | *dst_ind ++ = 0; |
<> | 149:156823d33999 | 466 | } |
<> | 149:156823d33999 | 467 | } |
<> | 149:156823d33999 | 468 | |
<> | 149:156823d33999 | 469 | /* Initialize .bss.extern section to zero */ |
<> | 149:156823d33999 | 470 | dst_ind = (uint32_t *) &__bss_extern_start__; |
<> | 149:156823d33999 | 471 | dst_end = (uint32_t *) &__bss_extern_end__; |
<> | 149:156823d33999 | 472 | if (dst_ind != dst_end) { |
<> | 149:156823d33999 | 473 | for (; dst_ind < dst_end;) { |
<> | 149:156823d33999 | 474 | *dst_ind ++ = 0; |
<> | 149:156823d33999 | 475 | } |
<> | 149:156823d33999 | 476 | } |
<> | 149:156823d33999 | 477 | |
AnnaBridge | 172:7d866c31b3c5 | 478 | _start(); |
<> | 149:156823d33999 | 479 | |
<> | 149:156823d33999 | 480 | #endif |
<> | 149:156823d33999 | 481 | /* Infinite loop */ |
<> | 149:156823d33999 | 482 | while (1); |
<> | 149:156823d33999 | 483 | } |
<> | 149:156823d33999 | 484 | |
<> | 149:156823d33999 | 485 | /** |
<> | 149:156823d33999 | 486 | * \brief Default interrupt handler for unused IRQs. |
<> | 149:156823d33999 | 487 | */ |
<> | 149:156823d33999 | 488 | void Default_Handler(void) |
<> | 149:156823d33999 | 489 | { |
<> | 149:156823d33999 | 490 | while (1); |
<> | 149:156823d33999 | 491 | } |