mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NUVOTON/TARGET_NANO100/device/StdDriver/nano100_i2s.h@174:b96e65c34a4d, 2017-10-02 (annotated)

Committer:
AnnaBridge
Date:
Mon Oct 02 15:33:19 2017 +0100
Revision:
174:b96e65c34a4d
This updates the lib to the mbed lib v 152

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 174:b96e65c34a4d 1 /**************************************************************************//**
AnnaBridge 174:b96e65c34a4d 2 * @file i2s.h
AnnaBridge 174:b96e65c34a4d 3 * @version V1.00
AnnaBridge 174:b96e65c34a4d 4 * $Revision: 5 $
AnnaBridge 174:b96e65c34a4d 5 * $Date: 15/06/08 4:59p $
AnnaBridge 174:b96e65c34a4d 6 * @brief Nano100 series I2S driver header file
AnnaBridge 174:b96e65c34a4d 7 *
AnnaBridge 174:b96e65c34a4d 8 * @note
AnnaBridge 174:b96e65c34a4d 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 174:b96e65c34a4d 10 *****************************************************************************/
AnnaBridge 174:b96e65c34a4d 11 #ifndef __I2S_H__
AnnaBridge 174:b96e65c34a4d 12 #define __I2S_H__
AnnaBridge 174:b96e65c34a4d 13
AnnaBridge 174:b96e65c34a4d 14 #ifdef __cplusplus
AnnaBridge 174:b96e65c34a4d 15 extern "C"
AnnaBridge 174:b96e65c34a4d 16 {
AnnaBridge 174:b96e65c34a4d 17 #endif
AnnaBridge 174:b96e65c34a4d 18
AnnaBridge 174:b96e65c34a4d 19 /** @addtogroup NANO100_Device_Driver NANO100 Device Driver
AnnaBridge 174:b96e65c34a4d 20 @{
AnnaBridge 174:b96e65c34a4d 21 */
AnnaBridge 174:b96e65c34a4d 22
AnnaBridge 174:b96e65c34a4d 23 /** @addtogroup NANO100_I2S_Driver I2S Driver
AnnaBridge 174:b96e65c34a4d 24 @{
AnnaBridge 174:b96e65c34a4d 25 */
AnnaBridge 174:b96e65c34a4d 26
AnnaBridge 174:b96e65c34a4d 27 /** @addtogroup NANO100_I2S_EXPORTED_CONSTANTS I2S Exported Constants
AnnaBridge 174:b96e65c34a4d 28 @{
AnnaBridge 174:b96e65c34a4d 29 */
AnnaBridge 174:b96e65c34a4d 30 #define I2S_DATABIT_8 (0 << I2S_CTRL_WORDWIDTH_Pos) /*!< I2S data width is 8-bit */
AnnaBridge 174:b96e65c34a4d 31 #define I2S_DATABIT_16 (1 << I2S_CTRL_WORDWIDTH_Pos) /*!< I2S data width is 16-bit */
AnnaBridge 174:b96e65c34a4d 32 #define I2S_DATABIT_24 (2 << I2S_CTRL_WORDWIDTH_Pos) /*!< I2S data width is 24-bit */
AnnaBridge 174:b96e65c34a4d 33 #define I2S_DATABIT_32 (3 << I2S_CTRL_WORDWIDTH_Pos) /*!< I2S data width is 32-bit */
AnnaBridge 174:b96e65c34a4d 34
AnnaBridge 174:b96e65c34a4d 35 /* Audio Format */
AnnaBridge 174:b96e65c34a4d 36 #define I2S_MONO I2S_CTRL_MONO_Msk /*!< Mono channel */
AnnaBridge 174:b96e65c34a4d 37 #define I2S_STEREO 0 /*!< Stereo channel */
AnnaBridge 174:b96e65c34a4d 38
AnnaBridge 174:b96e65c34a4d 39 /* I2S Data Format */
AnnaBridge 174:b96e65c34a4d 40 #define I2S_FORMAT_MSB I2S_CTRL_FORMAT_Msk /*!< MSB data format */
AnnaBridge 174:b96e65c34a4d 41 #define I2S_FORMAT_I2S 0 /*!< I2S data format */
AnnaBridge 174:b96e65c34a4d 42
AnnaBridge 174:b96e65c34a4d 43 /* I2S Interface */
AnnaBridge 174:b96e65c34a4d 44 #define I2S_I2S 0 /*!< I2S interface is selected */
AnnaBridge 174:b96e65c34a4d 45
AnnaBridge 174:b96e65c34a4d 46 /* I2S Operation mode */
AnnaBridge 174:b96e65c34a4d 47 #define I2S_MODE_SLAVE I2S_CTRL_SLAVE_Msk /*!< As slave mode */
AnnaBridge 174:b96e65c34a4d 48 #define I2S_MODE_MASTER 0 /*!< As master mode */
AnnaBridge 174:b96e65c34a4d 49
AnnaBridge 174:b96e65c34a4d 50 /* I2S FIFO Threshold */
AnnaBridge 174:b96e65c34a4d 51 #define I2S_FIFO_TX_LEVEL_WORD_0 0 /*!< TX threshold is 0 word */
AnnaBridge 174:b96e65c34a4d 52 #define I2S_FIFO_TX_LEVEL_WORD_1 (1 << I2S_CTRL_TXTH_Pos) /*!< TX threshold is 1 word */
AnnaBridge 174:b96e65c34a4d 53 #define I2S_FIFO_TX_LEVEL_WORD_2 (2 << I2S_CTRL_TXTH_Pos) /*!< TX threshold is 2 words */
AnnaBridge 174:b96e65c34a4d 54 #define I2S_FIFO_TX_LEVEL_WORD_3 (3 << I2S_CTRL_TXTH_Pos) /*!< TX threshold is 3 words */
AnnaBridge 174:b96e65c34a4d 55 #define I2S_FIFO_TX_LEVEL_WORD_4 (4 << I2S_CTRL_TXTH_Pos) /*!< TX threshold is 4 words */
AnnaBridge 174:b96e65c34a4d 56 #define I2S_FIFO_TX_LEVEL_WORD_5 (5 << I2S_CTRL_TXTH_Pos) /*!< TX threshold is 5 words */
AnnaBridge 174:b96e65c34a4d 57 #define I2S_FIFO_TX_LEVEL_WORD_6 (6 << I2S_CTRL_TXTH_Pos) /*!< TX threshold is 6 words */
AnnaBridge 174:b96e65c34a4d 58 #define I2S_FIFO_TX_LEVEL_WORD_7 (7 << I2S_CTRL_TXTH_Pos) /*!< TX threshold is 7 words */
AnnaBridge 174:b96e65c34a4d 59
AnnaBridge 174:b96e65c34a4d 60 #define I2S_FIFO_RX_LEVEL_WORD_1 0 /*!< RX threshold is 1 word */
AnnaBridge 174:b96e65c34a4d 61 #define I2S_FIFO_RX_LEVEL_WORD_2 (1 << I2S_CTRL_RXTH_Pos) /*!< RX threshold is 2 words */
AnnaBridge 174:b96e65c34a4d 62 #define I2S_FIFO_RX_LEVEL_WORD_3 (2 << I2S_CTRL_RXTH_Pos) /*!< RX threshold is 3 words */
AnnaBridge 174:b96e65c34a4d 63 #define I2S_FIFO_RX_LEVEL_WORD_4 (3 << I2S_CTRL_RXTH_Pos) /*!< RX threshold is 4 words */
AnnaBridge 174:b96e65c34a4d 64 #define I2S_FIFO_RX_LEVEL_WORD_5 (4 << I2S_CTRL_RXTH_Pos) /*!< RX threshold is 5 words */
AnnaBridge 174:b96e65c34a4d 65 #define I2S_FIFO_RX_LEVEL_WORD_6 (5 << I2S_CTRL_RXTH_Pos) /*!< RX threshold is 6 words */
AnnaBridge 174:b96e65c34a4d 66 #define I2S_FIFO_RX_LEVEL_WORD_7 (6 << I2S_CTRL_RXTH_Pos) /*!< RX threshold is 7 words */
AnnaBridge 174:b96e65c34a4d 67 #define I2S_FIFO_RX_LEVEL_WORD_8 (7 << I2S_CTRL_RXTH_Pos) /*!< RX threshold is 8 words */
AnnaBridge 174:b96e65c34a4d 68
AnnaBridge 174:b96e65c34a4d 69 /* I2S Record Channel */
AnnaBridge 174:b96e65c34a4d 70 #define I2S_MONO_RIGHT 0 /*!< Record mono right channel */
AnnaBridge 174:b96e65c34a4d 71 #define I2S_MONO_LEFT I2S_CTRL_RXLCH_Msk /*!< Record mono left channel */
AnnaBridge 174:b96e65c34a4d 72
AnnaBridge 174:b96e65c34a4d 73 /* I2S Channel */
AnnaBridge 174:b96e65c34a4d 74 #define I2S_RIGHT 0 /*!< Select right channel */
AnnaBridge 174:b96e65c34a4d 75 #define I2S_LEFT 1 /*!< Select left channel */
AnnaBridge 174:b96e65c34a4d 76
AnnaBridge 174:b96e65c34a4d 77 /*@}*/ /* end of group NANO100_I2S_EXPORTED_CONSTANTS */
AnnaBridge 174:b96e65c34a4d 78
AnnaBridge 174:b96e65c34a4d 79 /** @addtogroup NANO100_I2S_EXPORTED_FUNCTIONS I2S Exported Functions
AnnaBridge 174:b96e65c34a4d 80 @{
AnnaBridge 174:b96e65c34a4d 81 */
AnnaBridge 174:b96e65c34a4d 82 /**
AnnaBridge 174:b96e65c34a4d 83 * @brief Enable zero cross detect function.
AnnaBridge 174:b96e65c34a4d 84 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 85 * @param[in] u32ChMask is the mask for left or right channel. Valid values are:
AnnaBridge 174:b96e65c34a4d 86 * - \ref I2S_RIGHT
AnnaBridge 174:b96e65c34a4d 87 * - \ref I2S_LEFT
AnnaBridge 174:b96e65c34a4d 88 * @return none
AnnaBridge 174:b96e65c34a4d 89 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 90 */
AnnaBridge 174:b96e65c34a4d 91 static __INLINE void I2S_ENABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
AnnaBridge 174:b96e65c34a4d 92 {
AnnaBridge 174:b96e65c34a4d 93 if(u32ChMask == I2S_RIGHT)
AnnaBridge 174:b96e65c34a4d 94 i2s->CTRL |= I2S_CTRL_RCHZCEN_Msk;
AnnaBridge 174:b96e65c34a4d 95 else
AnnaBridge 174:b96e65c34a4d 96 i2s->CTRL |= I2S_CTRL_LCHZCEN_Msk;
AnnaBridge 174:b96e65c34a4d 97 }
AnnaBridge 174:b96e65c34a4d 98
AnnaBridge 174:b96e65c34a4d 99 /**
AnnaBridge 174:b96e65c34a4d 100 * @brief Disable zero cross detect function.
AnnaBridge 174:b96e65c34a4d 101 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 102 * @param[in] u32ChMask is the mask for left or right channel. Valid values are:
AnnaBridge 174:b96e65c34a4d 103 * - \ref I2S_RIGHT
AnnaBridge 174:b96e65c34a4d 104 * - \ref I2S_LEFT
AnnaBridge 174:b96e65c34a4d 105 * @return none
AnnaBridge 174:b96e65c34a4d 106 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 107 */
AnnaBridge 174:b96e65c34a4d 108 static __INLINE void I2S_DISABLE_TX_ZCD(I2S_T *i2s, uint32_t u32ChMask)
AnnaBridge 174:b96e65c34a4d 109 {
AnnaBridge 174:b96e65c34a4d 110 if(u32ChMask == I2S_RIGHT)
AnnaBridge 174:b96e65c34a4d 111 i2s->CTRL &= ~I2S_CTRL_RCHZCEN_Msk;
AnnaBridge 174:b96e65c34a4d 112 else
AnnaBridge 174:b96e65c34a4d 113 i2s->CTRL &= ~I2S_CTRL_LCHZCEN_Msk;
AnnaBridge 174:b96e65c34a4d 114 }
AnnaBridge 174:b96e65c34a4d 115
AnnaBridge 174:b96e65c34a4d 116 /**
AnnaBridge 174:b96e65c34a4d 117 * @brief Enable I2S Tx DMA function. I2S requests DMA to transfer data to Tx FIFO.
AnnaBridge 174:b96e65c34a4d 118 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 119 * @return none
AnnaBridge 174:b96e65c34a4d 120 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 121 */
AnnaBridge 174:b96e65c34a4d 122 #define I2S_ENABLE_TXDMA(i2s) ( (i2s)->CTRL |= I2S_CTRL_TXDMA_Msk )
AnnaBridge 174:b96e65c34a4d 123
AnnaBridge 174:b96e65c34a4d 124 /**
AnnaBridge 174:b96e65c34a4d 125 * @brief Disable I2S Tx DMA function. I2S requests DMA to transfer data to Tx FIFO.
AnnaBridge 174:b96e65c34a4d 126 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 127 * @return none
AnnaBridge 174:b96e65c34a4d 128 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 129 */
AnnaBridge 174:b96e65c34a4d 130 #define I2S_DISABLE_TXDMA(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_TXDMA_Msk )
AnnaBridge 174:b96e65c34a4d 131
AnnaBridge 174:b96e65c34a4d 132 /**
AnnaBridge 174:b96e65c34a4d 133 * @brief Enable I2S Rx DMA function. I2S requests DMA to transfer data from Rx FIFO.
AnnaBridge 174:b96e65c34a4d 134 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 135 * @return none
AnnaBridge 174:b96e65c34a4d 136 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 137 */
AnnaBridge 174:b96e65c34a4d 138 #define I2S_ENABLE_RXDMA(i2s) ( (i2s)->CTRL |= I2S_CTRL_RXDMA_Msk )
AnnaBridge 174:b96e65c34a4d 139
AnnaBridge 174:b96e65c34a4d 140 /**
AnnaBridge 174:b96e65c34a4d 141 * @brief Disable I2S Rx DMA function. I2S requests DMA to transfer data from Rx FIFO.
AnnaBridge 174:b96e65c34a4d 142 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 143 * @return none
AnnaBridge 174:b96e65c34a4d 144 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 145 */
AnnaBridge 174:b96e65c34a4d 146 #define I2S_DISABLE_RXDMA(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_RXDMA_Msk )
AnnaBridge 174:b96e65c34a4d 147
AnnaBridge 174:b96e65c34a4d 148 /**
AnnaBridge 174:b96e65c34a4d 149 * @brief Enable I2S Tx function .
AnnaBridge 174:b96e65c34a4d 150 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 151 * @return none
AnnaBridge 174:b96e65c34a4d 152 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 153 */
AnnaBridge 174:b96e65c34a4d 154 #define I2S_ENABLE_TX(i2s) ( (i2s)->CTRL |= I2S_CTRL_TXEN_Msk )
AnnaBridge 174:b96e65c34a4d 155
AnnaBridge 174:b96e65c34a4d 156 /**
AnnaBridge 174:b96e65c34a4d 157 * @brief Disable I2S Tx function .
AnnaBridge 174:b96e65c34a4d 158 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 159 * @return none
AnnaBridge 174:b96e65c34a4d 160 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 161 */
AnnaBridge 174:b96e65c34a4d 162 #define I2S_DISABLE_TX(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_TXEN_Msk )
AnnaBridge 174:b96e65c34a4d 163
AnnaBridge 174:b96e65c34a4d 164 /**
AnnaBridge 174:b96e65c34a4d 165 * @brief Enable I2S Rx function .
AnnaBridge 174:b96e65c34a4d 166 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 167 * @return none
AnnaBridge 174:b96e65c34a4d 168 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 169 */
AnnaBridge 174:b96e65c34a4d 170 #define I2S_ENABLE_RX(i2s) ( (i2s)->CTRL |= I2S_CTRL_RXEN_Msk )
AnnaBridge 174:b96e65c34a4d 171
AnnaBridge 174:b96e65c34a4d 172 /**
AnnaBridge 174:b96e65c34a4d 173 * @brief Disable I2S Rx function .
AnnaBridge 174:b96e65c34a4d 174 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 175 * @return none
AnnaBridge 174:b96e65c34a4d 176 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 177 */
AnnaBridge 174:b96e65c34a4d 178 #define I2S_DISABLE_RX(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_RXEN_Msk )
AnnaBridge 174:b96e65c34a4d 179
AnnaBridge 174:b96e65c34a4d 180 /**
AnnaBridge 174:b96e65c34a4d 181 * @brief Enable Tx Mute function .
AnnaBridge 174:b96e65c34a4d 182 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 183 * @return none
AnnaBridge 174:b96e65c34a4d 184 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 185 */
AnnaBridge 174:b96e65c34a4d 186 #define I2S_ENABLE_TX_MUTE(i2s) ( (i2s)->CTRL |= I2S_CTRL_MUTE_Msk )
AnnaBridge 174:b96e65c34a4d 187
AnnaBridge 174:b96e65c34a4d 188 /**
AnnaBridge 174:b96e65c34a4d 189 * @brief Disable Tx Mute function .
AnnaBridge 174:b96e65c34a4d 190 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 191 * @return none
AnnaBridge 174:b96e65c34a4d 192 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 193 */
AnnaBridge 174:b96e65c34a4d 194 #define I2S_DISABLE_TX_MUTE(i2s) ( (i2s)->CTRL &= ~I2S_CTRL_MUTE_Msk )
AnnaBridge 174:b96e65c34a4d 195
AnnaBridge 174:b96e65c34a4d 196 /**
AnnaBridge 174:b96e65c34a4d 197 * @brief Clear Tx FIFO. Internal pointer is reset to FIFO start point.
AnnaBridge 174:b96e65c34a4d 198 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 199 * @return none
AnnaBridge 174:b96e65c34a4d 200 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 201 */
AnnaBridge 174:b96e65c34a4d 202 #define I2S_CLR_TX_FIFO(i2s) ( (i2s)->CTRL |= I2S_CTRL_CLR_TXFIFO_Msk )
AnnaBridge 174:b96e65c34a4d 203
AnnaBridge 174:b96e65c34a4d 204 /**
AnnaBridge 174:b96e65c34a4d 205 * @brief Clear Rx FIFO. Internal pointer is reset to FIFO start point.
AnnaBridge 174:b96e65c34a4d 206 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 207 * @return none
AnnaBridge 174:b96e65c34a4d 208 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 209 */
AnnaBridge 174:b96e65c34a4d 210 #define I2S_CLR_RX_FIFO(i2s) ( (i2s)->CTRL |= I2S_CTRL_CLR_RXFIFO_Msk )
AnnaBridge 174:b96e65c34a4d 211
AnnaBridge 174:b96e65c34a4d 212 /**
AnnaBridge 174:b96e65c34a4d 213 * @brief This function sets the recording source channel when mono mode is used.
AnnaBridge 174:b96e65c34a4d 214 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 215 * @param[in] u32Ch left or right channel. Valid values are:
AnnaBridge 174:b96e65c34a4d 216 * - \ref I2S_MONO_LEFT
AnnaBridge 174:b96e65c34a4d 217 * - \ref I2S_MONO_RIGHT
AnnaBridge 174:b96e65c34a4d 218 * @return none
AnnaBridge 174:b96e65c34a4d 219 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 220 */
AnnaBridge 174:b96e65c34a4d 221 #define I2S_SET_MONO_RX_CHANNEL(i2s, u32Ch) ( u32Ch == I2S_MONO_LEFT ? ((i2s)->CTRL |= I2S_CTRL_RXLCH_Msk) : ((i2s)->CTRL &= ~I2S_CTRL_RXLCH_Msk) )
AnnaBridge 174:b96e65c34a4d 222
AnnaBridge 174:b96e65c34a4d 223 /**
AnnaBridge 174:b96e65c34a4d 224 * @brief Write data to I2S Tx FIFO.
AnnaBridge 174:b96e65c34a4d 225 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 226 * @param[in] u32Data The data written to FIFO.
AnnaBridge 174:b96e65c34a4d 227 * @return none
AnnaBridge 174:b96e65c34a4d 228 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 229 */
AnnaBridge 174:b96e65c34a4d 230 #define I2S_WRITE_TX_FIFO(i2s, u32Data) ( (i2s)->TXFIFO = u32Data )
AnnaBridge 174:b96e65c34a4d 231
AnnaBridge 174:b96e65c34a4d 232 /**
AnnaBridge 174:b96e65c34a4d 233 * @brief Read Rx FIFO.
AnnaBridge 174:b96e65c34a4d 234 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 235 * @return Data in Rx FIFO.
AnnaBridge 174:b96e65c34a4d 236 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 237 */
AnnaBridge 174:b96e65c34a4d 238 #define I2S_READ_RX_FIFO(i2s) ( (i2s)->RXFIFO )
AnnaBridge 174:b96e65c34a4d 239
AnnaBridge 174:b96e65c34a4d 240 /**
AnnaBridge 174:b96e65c34a4d 241 * @brief This function gets the interrupt flag according to the mask parameter.
AnnaBridge 174:b96e65c34a4d 242 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 243 * @param[in] u32Mask is the mask for the all interrupt flags.
AnnaBridge 174:b96e65c34a4d 244 * @return The masked bit value of interrupt flag.
AnnaBridge 174:b96e65c34a4d 245 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 246 */
AnnaBridge 174:b96e65c34a4d 247 #define I2S_GET_INT_FLAG(i2s, u32Mask) ((i2s)->STATUS & (u32Mask))
AnnaBridge 174:b96e65c34a4d 248
AnnaBridge 174:b96e65c34a4d 249 /**
AnnaBridge 174:b96e65c34a4d 250 * @brief This function clears the interrupt flag according to the mask parameter.
AnnaBridge 174:b96e65c34a4d 251 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 252 * @param[in] u32Mask is the mask for the all interrupt flags.
AnnaBridge 174:b96e65c34a4d 253 * @return none
AnnaBridge 174:b96e65c34a4d 254 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 255 */
AnnaBridge 174:b96e65c34a4d 256 #define I2S_CLR_INT_FLAG(i2s, u32Mask) ( (i2s)->STATUS |= (u32Mask) )
AnnaBridge 174:b96e65c34a4d 257
AnnaBridge 174:b96e65c34a4d 258 /**
AnnaBridge 174:b96e65c34a4d 259 * @brief Get transmit FIFO level
AnnaBridge 174:b96e65c34a4d 260 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 261 * @return FIFO level
AnnaBridge 174:b96e65c34a4d 262 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 263 */
AnnaBridge 174:b96e65c34a4d 264 #define I2S_GET_TX_FIFO_LEVEL(i2s) ((((i2s)->STATUS & I2S_STATUS_TX_LEVEL_Msk) >> I2S_STATUS_TX_LEVEL_Pos) & 0xF)
AnnaBridge 174:b96e65c34a4d 265
AnnaBridge 174:b96e65c34a4d 266 /**
AnnaBridge 174:b96e65c34a4d 267 * @brief Get receive FIFO level
AnnaBridge 174:b96e65c34a4d 268 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 269 * @return FIFO level
AnnaBridge 174:b96e65c34a4d 270 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 271 */
AnnaBridge 174:b96e65c34a4d 272 #define I2S_GET_RX_FIFO_LEVEL(i2s) ((((i2s)->STATUS & I2S_STATUS_RX_LEVEL_Msk) >> I2S_STATUS_RX_LEVEL_Pos) & 0xF)
AnnaBridge 174:b96e65c34a4d 273
AnnaBridge 174:b96e65c34a4d 274 uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface);
AnnaBridge 174:b96e65c34a4d 275 void I2S_Close(I2S_T *i2s);
AnnaBridge 174:b96e65c34a4d 276 void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask);
AnnaBridge 174:b96e65c34a4d 277 void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask);
AnnaBridge 174:b96e65c34a4d 278 uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock);
AnnaBridge 174:b96e65c34a4d 279 void I2S_DisableMCLK(I2S_T *i2s);
AnnaBridge 174:b96e65c34a4d 280 void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold);
AnnaBridge 174:b96e65c34a4d 281
AnnaBridge 174:b96e65c34a4d 282 /*@}*/ /* end of group NANO100_I2S_EXPORTED_FUNCTIONS */
AnnaBridge 174:b96e65c34a4d 283
AnnaBridge 174:b96e65c34a4d 284
AnnaBridge 174:b96e65c34a4d 285 /*@}*/ /* end of group NANO100_I2S_Driver */
AnnaBridge 174:b96e65c34a4d 286
AnnaBridge 174:b96e65c34a4d 287 /*@}*/ /* end of group NANO100_Device_Driver */
AnnaBridge 174:b96e65c34a4d 288
AnnaBridge 174:b96e65c34a4d 289 #ifdef __cplusplus
AnnaBridge 174:b96e65c34a4d 290 }
AnnaBridge 174:b96e65c34a4d 291 #endif
AnnaBridge 174:b96e65c34a4d 292
AnnaBridge 174:b96e65c34a4d 293 #endif //__I2S_H__
AnnaBridge 174:b96e65c34a4d 294
AnnaBridge 174:b96e65c34a4d 295 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
AnnaBridge 174:b96e65c34a4d 296