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mbed library sources. Supersedes mbed-src.

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targets/TARGET_NUVOTON/TARGET_NANO100/device/StdDriver/nano100_i2s.c@174:b96e65c34a4d, 2017-10-02 (annotated)

Committer:
AnnaBridge
Date:
Mon Oct 02 15:33:19 2017 +0100
Revision:
174:b96e65c34a4d
This updates the lib to the mbed lib v 152

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 174:b96e65c34a4d 1 /**************************************************************************//**
AnnaBridge 174:b96e65c34a4d 2 * @file i2s.c
AnnaBridge 174:b96e65c34a4d 3 * @version V1.00
AnnaBridge 174:b96e65c34a4d 4 * $Revision: 4 $
AnnaBridge 174:b96e65c34a4d 5 * $Date: 15/06/08 4:58p $
AnnaBridge 174:b96e65c34a4d 6 * @brief Nano100 series I2S driver header file
AnnaBridge 174:b96e65c34a4d 7 *
AnnaBridge 174:b96e65c34a4d 8 * @note
AnnaBridge 174:b96e65c34a4d 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 174:b96e65c34a4d 10 *****************************************************************************/
AnnaBridge 174:b96e65c34a4d 11
AnnaBridge 174:b96e65c34a4d 12 #include <stdio.h>
AnnaBridge 174:b96e65c34a4d 13 #include "Nano100Series.h"
AnnaBridge 174:b96e65c34a4d 14
AnnaBridge 174:b96e65c34a4d 15 /** @addtogroup NANO100_Device_Driver NANO100 Device Driver
AnnaBridge 174:b96e65c34a4d 16 @{
AnnaBridge 174:b96e65c34a4d 17 */
AnnaBridge 174:b96e65c34a4d 18
AnnaBridge 174:b96e65c34a4d 19 /** @addtogroup NANO100_I2S_Driver I2S Driver
AnnaBridge 174:b96e65c34a4d 20 @{
AnnaBridge 174:b96e65c34a4d 21 */
AnnaBridge 174:b96e65c34a4d 22
AnnaBridge 174:b96e65c34a4d 23 /** @addtogroup NANO100_I2S_EXPORTED_FUNCTIONS I2S Exported Functions
AnnaBridge 174:b96e65c34a4d 24 @{
AnnaBridge 174:b96e65c34a4d 25 */
AnnaBridge 174:b96e65c34a4d 26
AnnaBridge 174:b96e65c34a4d 27 /// @cond HIDDEN_SYMBOLS
AnnaBridge 174:b96e65c34a4d 28 /**
AnnaBridge 174:b96e65c34a4d 29 * @brief This function is used to get I2S source clock frequency.
AnnaBridge 174:b96e65c34a4d 30 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 31 * @return I2S source clock frequency (Hz).
AnnaBridge 174:b96e65c34a4d 32 */
AnnaBridge 174:b96e65c34a4d 33 static uint32_t I2S_GetSourceClockFreq(I2S_T *i2s)
AnnaBridge 174:b96e65c34a4d 34 {
AnnaBridge 174:b96e65c34a4d 35 uint32_t u32Freq, u32ClkSrcSel;
AnnaBridge 174:b96e65c34a4d 36
AnnaBridge 174:b96e65c34a4d 37 // get I2S selection clock source
AnnaBridge 174:b96e65c34a4d 38 u32ClkSrcSel = CLK->CLKSEL2 & CLK_CLKSEL2_I2S_S_Msk;
AnnaBridge 174:b96e65c34a4d 39
AnnaBridge 174:b96e65c34a4d 40 switch (u32ClkSrcSel) {
AnnaBridge 174:b96e65c34a4d 41 case CLK_CLKSEL2_I2S_S_HXT:
AnnaBridge 174:b96e65c34a4d 42 u32Freq = __HXT;
AnnaBridge 174:b96e65c34a4d 43 break;
AnnaBridge 174:b96e65c34a4d 44
AnnaBridge 174:b96e65c34a4d 45 case CLK_CLKSEL2_I2S_S_PLL:
AnnaBridge 174:b96e65c34a4d 46 u32Freq = CLK_GetPLLClockFreq();
AnnaBridge 174:b96e65c34a4d 47 break;
AnnaBridge 174:b96e65c34a4d 48
AnnaBridge 174:b96e65c34a4d 49 case CLK_CLKSEL2_I2S_S_HIRC:
AnnaBridge 174:b96e65c34a4d 50 u32Freq = __HIRC;
AnnaBridge 174:b96e65c34a4d 51 break;
AnnaBridge 174:b96e65c34a4d 52
AnnaBridge 174:b96e65c34a4d 53 default:
AnnaBridge 174:b96e65c34a4d 54 u32Freq = __HIRC;
AnnaBridge 174:b96e65c34a4d 55 break;
AnnaBridge 174:b96e65c34a4d 56 }
AnnaBridge 174:b96e65c34a4d 57
AnnaBridge 174:b96e65c34a4d 58 return u32Freq;
AnnaBridge 174:b96e65c34a4d 59 }
AnnaBridge 174:b96e65c34a4d 60 /// @endcond /* HIDDEN_SYMBOLS */
AnnaBridge 174:b96e65c34a4d 61
AnnaBridge 174:b96e65c34a4d 62 /**
AnnaBridge 174:b96e65c34a4d 63 * @brief This function configures some parameters of I2S interface for general purpose use.
AnnaBridge 174:b96e65c34a4d 64 * The sample rate may not be used from the parameter, it depends on system's clock settings,
AnnaBridge 174:b96e65c34a4d 65 * but real sample rate used by system will be returned for reference.
AnnaBridge 174:b96e65c34a4d 66 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 67 * @param[in] u32MasterSlave I2S operation mode. Valid values are:
AnnaBridge 174:b96e65c34a4d 68 * - \ref I2S_MODE_MASTER
AnnaBridge 174:b96e65c34a4d 69 * - \ref I2S_MODE_SLAVE
AnnaBridge 174:b96e65c34a4d 70 * @param[in] u32SampleRate Sample rate
AnnaBridge 174:b96e65c34a4d 71 * @param[in] u32WordWidth Data length. Valid values are:
AnnaBridge 174:b96e65c34a4d 72 * - \ref I2S_DATABIT_8
AnnaBridge 174:b96e65c34a4d 73 * - \ref I2S_DATABIT_16
AnnaBridge 174:b96e65c34a4d 74 * - \ref I2S_DATABIT_24
AnnaBridge 174:b96e65c34a4d 75 * - \ref I2S_DATABIT_32
AnnaBridge 174:b96e65c34a4d 76 * @param[in] u32Channels: Audio format. Valid values are:
AnnaBridge 174:b96e65c34a4d 77 * - \ref I2S_MONO
AnnaBridge 174:b96e65c34a4d 78 * - \ref I2S_STEREO
AnnaBridge 174:b96e65c34a4d 79 * @param[in] u32DataFormat: Data format. Valid values are:
AnnaBridge 174:b96e65c34a4d 80 * - \ref I2S_FORMAT_I2S
AnnaBridge 174:b96e65c34a4d 81 * - \ref I2S_FORMAT_MSB
AnnaBridge 174:b96e65c34a4d 82 * @param[in] u32AudioInterface: Audio interface. Valid values are:
AnnaBridge 174:b96e65c34a4d 83 * - \ref I2S_I2S
AnnaBridge 174:b96e65c34a4d 84 * @return Real sample rate.
AnnaBridge 174:b96e65c34a4d 85 */
AnnaBridge 174:b96e65c34a4d 86 uint32_t I2S_Open(I2S_T *i2s, uint32_t u32MasterSlave, uint32_t u32SampleRate, uint32_t u32WordWidth, uint32_t u32Channels, uint32_t u32DataFormat, uint32_t u32AudioInterface)
AnnaBridge 174:b96e65c34a4d 87 {
AnnaBridge 174:b96e65c34a4d 88 uint8_t u8Divider;
AnnaBridge 174:b96e65c34a4d 89 uint32_t u32BitRate, u32SrcClk;
AnnaBridge 174:b96e65c34a4d 90
AnnaBridge 174:b96e65c34a4d 91 SYS->IPRST_CTL2 |= SYS_IPRST_CTL2_I2S_RST_Msk;
AnnaBridge 174:b96e65c34a4d 92 SYS->IPRST_CTL2 &= ~SYS_IPRST_CTL2_I2S_RST_Msk;
AnnaBridge 174:b96e65c34a4d 93
AnnaBridge 174:b96e65c34a4d 94 i2s->CTRL = u32MasterSlave | u32WordWidth | u32Channels | u32DataFormat | u32AudioInterface | I2S_FIFO_TX_LEVEL_WORD_4 | I2S_FIFO_RX_LEVEL_WORD_4;
AnnaBridge 174:b96e65c34a4d 95
AnnaBridge 174:b96e65c34a4d 96 u32SrcClk = I2S_GetSourceClockFreq(i2s);
AnnaBridge 174:b96e65c34a4d 97
AnnaBridge 174:b96e65c34a4d 98 u32BitRate = u32SampleRate * (((u32WordWidth>>4) & 0x3) + 1) * 16;
AnnaBridge 174:b96e65c34a4d 99 u8Divider = ((u32SrcClk/u32BitRate) >> 1) - 1;
AnnaBridge 174:b96e65c34a4d 100 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_BCLK_DIV_Msk) | (u8Divider << 8);
AnnaBridge 174:b96e65c34a4d 101
AnnaBridge 174:b96e65c34a4d 102 //calculate real sample rate
AnnaBridge 174:b96e65c34a4d 103 u32BitRate = u32SrcClk / (2*(u8Divider+1));
AnnaBridge 174:b96e65c34a4d 104 u32SampleRate = u32BitRate / ((((u32WordWidth>>4) & 0x3) + 1) * 16);
AnnaBridge 174:b96e65c34a4d 105
AnnaBridge 174:b96e65c34a4d 106 i2s->CTRL |= I2S_CTRL_I2SEN_Msk;
AnnaBridge 174:b96e65c34a4d 107
AnnaBridge 174:b96e65c34a4d 108 return u32SampleRate;
AnnaBridge 174:b96e65c34a4d 109 }
AnnaBridge 174:b96e65c34a4d 110
AnnaBridge 174:b96e65c34a4d 111 /**
AnnaBridge 174:b96e65c34a4d 112 * @brief Disable I2S function and I2S clock.
AnnaBridge 174:b96e65c34a4d 113 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 114 * @return none
AnnaBridge 174:b96e65c34a4d 115 */
AnnaBridge 174:b96e65c34a4d 116 void I2S_Close(I2S_T *i2s)
AnnaBridge 174:b96e65c34a4d 117 {
AnnaBridge 174:b96e65c34a4d 118 i2s->CTRL &= ~I2S_CTRL_I2SEN_Msk;
AnnaBridge 174:b96e65c34a4d 119 }
AnnaBridge 174:b96e65c34a4d 120
AnnaBridge 174:b96e65c34a4d 121 /**
AnnaBridge 174:b96e65c34a4d 122 * @brief This function enables the interrupt according to the mask parameter.
AnnaBridge 174:b96e65c34a4d 123 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 124 * @param[in] u32Mask is the combination of all related interrupt enable bits.
AnnaBridge 174:b96e65c34a4d 125 * Each bit corresponds to a interrupt bit.
AnnaBridge 174:b96e65c34a4d 126 * @return none
AnnaBridge 174:b96e65c34a4d 127 */
AnnaBridge 174:b96e65c34a4d 128 void I2S_EnableInt(I2S_T *i2s, uint32_t u32Mask)
AnnaBridge 174:b96e65c34a4d 129 {
AnnaBridge 174:b96e65c34a4d 130 i2s->INTEN |= u32Mask;
AnnaBridge 174:b96e65c34a4d 131 }
AnnaBridge 174:b96e65c34a4d 132
AnnaBridge 174:b96e65c34a4d 133 /**
AnnaBridge 174:b96e65c34a4d 134 * @brief This function disables the interrupt according to the mask parameter.
AnnaBridge 174:b96e65c34a4d 135 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 136 * @param[in] u32Mask is the combination of all related interrupt enable bits.
AnnaBridge 174:b96e65c34a4d 137 * Each bit corresponds to a interrupt bit.
AnnaBridge 174:b96e65c34a4d 138 * @return none
AnnaBridge 174:b96e65c34a4d 139 */
AnnaBridge 174:b96e65c34a4d 140 void I2S_DisableInt(I2S_T *i2s, uint32_t u32Mask)
AnnaBridge 174:b96e65c34a4d 141 {
AnnaBridge 174:b96e65c34a4d 142 i2s->INTEN &= ~u32Mask;
AnnaBridge 174:b96e65c34a4d 143 }
AnnaBridge 174:b96e65c34a4d 144
AnnaBridge 174:b96e65c34a4d 145 /**
AnnaBridge 174:b96e65c34a4d 146 * @brief Enable MCLK .
AnnaBridge 174:b96e65c34a4d 147 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 148 * @param[in] u32BusClock is the target MCLK clock
AnnaBridge 174:b96e65c34a4d 149 * @return Actual MCLK clock
AnnaBridge 174:b96e65c34a4d 150 */
AnnaBridge 174:b96e65c34a4d 151 uint32_t I2S_EnableMCLK(I2S_T *i2s, uint32_t u32BusClock)
AnnaBridge 174:b96e65c34a4d 152 {
AnnaBridge 174:b96e65c34a4d 153 uint8_t u8Divider;
AnnaBridge 174:b96e65c34a4d 154 uint32_t u32SrcClk, u32Reg;
AnnaBridge 174:b96e65c34a4d 155
AnnaBridge 174:b96e65c34a4d 156 u32SrcClk = I2S_GetSourceClockFreq(i2s);
AnnaBridge 174:b96e65c34a4d 157 if (u32BusClock == u32SrcClk)
AnnaBridge 174:b96e65c34a4d 158 u8Divider = 0;
AnnaBridge 174:b96e65c34a4d 159 else
AnnaBridge 174:b96e65c34a4d 160 u8Divider = (u32SrcClk/u32BusClock) >> 1;
AnnaBridge 174:b96e65c34a4d 161
AnnaBridge 174:b96e65c34a4d 162 i2s->CLKDIV = (i2s->CLKDIV & ~I2S_CLKDIV_MCLK_DIV_Msk) | u8Divider;
AnnaBridge 174:b96e65c34a4d 163
AnnaBridge 174:b96e65c34a4d 164 i2s->CTRL |= I2S_CTRL_MCLKEN_Msk;
AnnaBridge 174:b96e65c34a4d 165
AnnaBridge 174:b96e65c34a4d 166 u32Reg = i2s->CLKDIV & I2S_CLKDIV_MCLK_DIV_Msk;
AnnaBridge 174:b96e65c34a4d 167
AnnaBridge 174:b96e65c34a4d 168 if (u32Reg == 0)
AnnaBridge 174:b96e65c34a4d 169 return u32SrcClk;
AnnaBridge 174:b96e65c34a4d 170 else
AnnaBridge 174:b96e65c34a4d 171 return ((u32SrcClk >> 1) / u32Reg);
AnnaBridge 174:b96e65c34a4d 172 }
AnnaBridge 174:b96e65c34a4d 173
AnnaBridge 174:b96e65c34a4d 174 /**
AnnaBridge 174:b96e65c34a4d 175 * @brief Disable MCLK .
AnnaBridge 174:b96e65c34a4d 176 * @param[in] i2s is the base address of I2S module.
AnnaBridge 174:b96e65c34a4d 177 * @return none
AnnaBridge 174:b96e65c34a4d 178 */
AnnaBridge 174:b96e65c34a4d 179 void I2S_DisableMCLK(I2S_T *i2s)
AnnaBridge 174:b96e65c34a4d 180 {
AnnaBridge 174:b96e65c34a4d 181 i2s->CTRL &= ~I2S_CTRL_MCLKEN_Msk;
AnnaBridge 174:b96e65c34a4d 182 }
AnnaBridge 174:b96e65c34a4d 183
AnnaBridge 174:b96e65c34a4d 184 /**
AnnaBridge 174:b96e65c34a4d 185 * @brief Configure FIFO threshold setting.
AnnaBridge 174:b96e65c34a4d 186 * @param[in] i2s The pointer of the specified I2S module.
AnnaBridge 174:b96e65c34a4d 187 * @param[in] u32TxThreshold Decides the TX FIFO threshold. It could be 0 ~ 7.
AnnaBridge 174:b96e65c34a4d 188 * @param[in] u32RxThreshold Decides the RX FIFO threshold. It could be 0 ~ 7.
AnnaBridge 174:b96e65c34a4d 189 * @return None
AnnaBridge 174:b96e65c34a4d 190 * @details Set TX FIFO threshold and RX FIFO threshold configurations.
AnnaBridge 174:b96e65c34a4d 191 */
AnnaBridge 174:b96e65c34a4d 192 void I2S_SetFIFO(I2S_T *i2s, uint32_t u32TxThreshold, uint32_t u32RxThreshold)
AnnaBridge 174:b96e65c34a4d 193 {
AnnaBridge 174:b96e65c34a4d 194 i2s->CTRL = (i2s->CTRL & ~(I2S_CTRL_TXTH_Msk | I2S_CTRL_RXTH_Msk) |
AnnaBridge 174:b96e65c34a4d 195 (u32TxThreshold << I2S_CTRL_TXTH_Pos) |
AnnaBridge 174:b96e65c34a4d 196 (u32RxThreshold << I2S_CTRL_RXTH_Pos));
AnnaBridge 174:b96e65c34a4d 197 }
AnnaBridge 174:b96e65c34a4d 198 /*@}*/ /* end of group NANO100_I2S_EXPORTED_FUNCTIONS */
AnnaBridge 174:b96e65c34a4d 199
AnnaBridge 174:b96e65c34a4d 200 /*@}*/ /* end of group NANO100_I2S_Driver */
AnnaBridge 174:b96e65c34a4d 201
AnnaBridge 174:b96e65c34a4d 202 /*@}*/ /* end of group NANO100_Device_Driver */
AnnaBridge 174:b96e65c34a4d 203
AnnaBridge 174:b96e65c34a4d 204 /*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/