mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NUVOTON/TARGET_NANO100/device/StdDriver/nano100_dac.h@174:b96e65c34a4d, 2017-10-02 (annotated)

Committer:
AnnaBridge
Date:
Mon Oct 02 15:33:19 2017 +0100
Revision:
174:b96e65c34a4d
This updates the lib to the mbed lib v 152

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 174:b96e65c34a4d 1 /******************************************************************************
AnnaBridge 174:b96e65c34a4d 2 * @file dac.h
AnnaBridge 174:b96e65c34a4d 3 * @version V1.00
AnnaBridge 174:b96e65c34a4d 4 * $Revision: 4 $
AnnaBridge 174:b96e65c34a4d 5 * $Date: 14/09/08 12:31p $
AnnaBridge 174:b96e65c34a4d 6 * @brief NANO100 series DAC driver header file
AnnaBridge 174:b96e65c34a4d 7 *
AnnaBridge 174:b96e65c34a4d 8 * @note
AnnaBridge 174:b96e65c34a4d 9 * Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
AnnaBridge 174:b96e65c34a4d 10 *****************************************************************************/
AnnaBridge 174:b96e65c34a4d 11 #ifndef __DAC_H__
AnnaBridge 174:b96e65c34a4d 12 #define __DAC_H__
AnnaBridge 174:b96e65c34a4d 13
AnnaBridge 174:b96e65c34a4d 14 #ifdef __cplusplus
AnnaBridge 174:b96e65c34a4d 15 extern "C"
AnnaBridge 174:b96e65c34a4d 16 {
AnnaBridge 174:b96e65c34a4d 17 #endif
AnnaBridge 174:b96e65c34a4d 18
AnnaBridge 174:b96e65c34a4d 19
AnnaBridge 174:b96e65c34a4d 20 /** @addtogroup NANO100_Device_Driver NANO100 Device Driver
AnnaBridge 174:b96e65c34a4d 21 @{
AnnaBridge 174:b96e65c34a4d 22 */
AnnaBridge 174:b96e65c34a4d 23
AnnaBridge 174:b96e65c34a4d 24 /** @addtogroup NANO100_DAC_Driver DAC Driver
AnnaBridge 174:b96e65c34a4d 25 @{
AnnaBridge 174:b96e65c34a4d 26 */
AnnaBridge 174:b96e65c34a4d 27
AnnaBridge 174:b96e65c34a4d 28
AnnaBridge 174:b96e65c34a4d 29 /** @addtogroup NANO100_DAC_EXPORTED_CONSTANTS DAC Exported Constants
AnnaBridge 174:b96e65c34a4d 30 @{
AnnaBridge 174:b96e65c34a4d 31 */
AnnaBridge 174:b96e65c34a4d 32 #define DAC_WRITE_DAT_TRIGGER (0UL << DAC_CTL_DACLSEL_Pos) ///< Write DACx_DAT trigger \hideinitializer
AnnaBridge 174:b96e65c34a4d 33 #define DAC_PDMA_TRIGGER (1UL << DAC_CTL_DACLSEL_Pos) ///< PDMA trigger \hideinitializer
AnnaBridge 174:b96e65c34a4d 34 #define DAC_TIMER0_TRIGGER (2UL << DAC_CTL_DACLSEL_Pos) ///< Timer 0 trigger \hideinitializer
AnnaBridge 174:b96e65c34a4d 35 #define DAC_TIMER1_TRIGGER (3UL << DAC_CTL_DACLSEL_Pos) ///< Timer 1 trigger \hideinitializer
AnnaBridge 174:b96e65c34a4d 36 #define DAC_TIMER2_TRIGGER (4UL << DAC_CTL_DACLSEL_Pos) ///< Timer 2 trigger \hideinitializer
AnnaBridge 174:b96e65c34a4d 37 #define DAC_TIMER3_TRIGGER (5UL << DAC_CTL_DACLSEL_Pos) ///< Timer 3 trigger \hideinitializer
AnnaBridge 174:b96e65c34a4d 38
AnnaBridge 174:b96e65c34a4d 39 #define DAC_REFSEL_POWER (0UL << DAC_COMCTL_REFSEL_Pos) ///< DAC reference voltage source selection set to power \hideinitializer
AnnaBridge 174:b96e65c34a4d 40 #define DAC_REFSEL_INT_VREF (1UL << DAC_COMCTL_REFSEL_Pos) ///< DAC reference voltage source selection set to Int_VREF \hideinitializer
AnnaBridge 174:b96e65c34a4d 41 #define DAC_REFSEL_VREF (2UL << DAC_COMCTL_REFSEL_Pos) ///< DAC reference voltage source selection set to VREF \hideinitializer
AnnaBridge 174:b96e65c34a4d 42
AnnaBridge 174:b96e65c34a4d 43 /*@}*/ /* end of group NANO100_DAC_EXPORTED_CONSTANTS */
AnnaBridge 174:b96e65c34a4d 44
AnnaBridge 174:b96e65c34a4d 45
AnnaBridge 174:b96e65c34a4d 46
AnnaBridge 174:b96e65c34a4d 47 /** @addtogroup NANO100_DAC_EXPORTED_FUNCTIONS DAC Exported Functions
AnnaBridge 174:b96e65c34a4d 48 @{
AnnaBridge 174:b96e65c34a4d 49 */
AnnaBridge 174:b96e65c34a4d 50
AnnaBridge 174:b96e65c34a4d 51 /**
AnnaBridge 174:b96e65c34a4d 52 * @brief Write data for conversion.
AnnaBridge 174:b96e65c34a4d 53 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 54 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 55 * @param[in] u32Data Decides the data for conversion, valid range are between 0~0xFFF.
AnnaBridge 174:b96e65c34a4d 56 * @return None
AnnaBridge 174:b96e65c34a4d 57 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 58 */
AnnaBridge 174:b96e65c34a4d 59 #define DAC_WRITE_DATA(dac, u32Ch, u32Data) do {\
AnnaBridge 174:b96e65c34a4d 60 if(u32Ch) {\
AnnaBridge 174:b96e65c34a4d 61 DAC->DATA1 = u32Data;\
AnnaBridge 174:b96e65c34a4d 62 } else {\
AnnaBridge 174:b96e65c34a4d 63 DAC->DATA0 = u32Data;\
AnnaBridge 174:b96e65c34a4d 64 }\
AnnaBridge 174:b96e65c34a4d 65 }while(0)
AnnaBridge 174:b96e65c34a4d 66
AnnaBridge 174:b96e65c34a4d 67
AnnaBridge 174:b96e65c34a4d 68 /**
AnnaBridge 174:b96e65c34a4d 69 * @brief Enable DAC group mode
AnnaBridge 174:b96e65c34a4d 70 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 71 * @return None
AnnaBridge 174:b96e65c34a4d 72 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 73 */
AnnaBridge 174:b96e65c34a4d 74 #define DAC_ENABLE_GROUP_MODE(dac) (DAC->COMCTL |= DAC_COMCTL_DAC01GRP_Msk)
AnnaBridge 174:b96e65c34a4d 75
AnnaBridge 174:b96e65c34a4d 76 /**
AnnaBridge 174:b96e65c34a4d 77 * @brief Disable DAC group mode
AnnaBridge 174:b96e65c34a4d 78 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 79 * @return None
AnnaBridge 174:b96e65c34a4d 80 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 81 */
AnnaBridge 174:b96e65c34a4d 82 #define DAC_DISABLE_GROUP_MODE(dac) (DAC->COMCTL &= ~DAC_COMCTL_DAC01GRP_Msk)
AnnaBridge 174:b96e65c34a4d 83
AnnaBridge 174:b96e65c34a4d 84 /**
AnnaBridge 174:b96e65c34a4d 85 * @brief Get the busy state of DAC.
AnnaBridge 174:b96e65c34a4d 86 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 87 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 88 * @return If DAC is able to convert or not.
AnnaBridge 174:b96e65c34a4d 89 * @retval 0 DAC is in idle state.
AnnaBridge 174:b96e65c34a4d 90 * @retval 1 DAC is in busy state, or DAC is not in ready state.
AnnaBridge 174:b96e65c34a4d 91 * @details If this macro returns 1, DAC is \b not in ready state. Ether DAC is busy or not in ready state.
AnnaBridge 174:b96e65c34a4d 92 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 93 */
AnnaBridge 174:b96e65c34a4d 94 #define DAC_IS_BUSY(dac, u32Ch) (inp32(DAC_BASE + 0x8 + 0x10 * (u32Ch)) & DAC_STS_BUSY_Msk ? 1 : 0)
AnnaBridge 174:b96e65c34a4d 95
AnnaBridge 174:b96e65c34a4d 96
AnnaBridge 174:b96e65c34a4d 97 /**
AnnaBridge 174:b96e65c34a4d 98 * @brief Get the interrupt flag of specified channel.
AnnaBridge 174:b96e65c34a4d 99 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 100 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 101 * @return Returns the interrupt flag of selected channel.
AnnaBridge 174:b96e65c34a4d 102 * @retval 0 DAC interrupt flag is not set.
AnnaBridge 174:b96e65c34a4d 103 * @retval 1 DAC interrupt flag is set.
AnnaBridge 174:b96e65c34a4d 104 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 105 */
AnnaBridge 174:b96e65c34a4d 106 #define DAC_GET_INT_FLAG(dac, u32Ch) (inp32(DAC_BASE + 0x8 + 0x10 * (u32Ch)) & DAC_STS_DACIFG_Msk ? 1 : 0)
AnnaBridge 174:b96e65c34a4d 107
AnnaBridge 174:b96e65c34a4d 108 /**
AnnaBridge 174:b96e65c34a4d 109 * @brief This macro clear the interrupt status bit of specified channel.
AnnaBridge 174:b96e65c34a4d 110 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 111 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 112 * @return None
AnnaBridge 174:b96e65c34a4d 113 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 114 */
AnnaBridge 174:b96e65c34a4d 115 #define DAC_CLR_INT_FLAG(dac, u32Ch) do {\
AnnaBridge 174:b96e65c34a4d 116 if(u32Ch)\
AnnaBridge 174:b96e65c34a4d 117 DAC->STS1 = DAC_STS_DACIFG_Msk;\
AnnaBridge 174:b96e65c34a4d 118 else\
AnnaBridge 174:b96e65c34a4d 119 DAC->STS0 = DAC_STS_DACIFG_Msk;\
AnnaBridge 174:b96e65c34a4d 120 }while(0)
AnnaBridge 174:b96e65c34a4d 121
AnnaBridge 174:b96e65c34a4d 122
AnnaBridge 174:b96e65c34a4d 123 /**
AnnaBridge 174:b96e65c34a4d 124 * @brief Set the DAC reference voltage. This setting affects both DAC channel
AnnaBridge 174:b96e65c34a4d 125 * @param[in] dac Base address of DAC module
AnnaBridge 174:b96e65c34a4d 126 * @param[in] u32Ref The reference voltage selection. Valid values are:
AnnaBridge 174:b96e65c34a4d 127 * - \ref DAC_REFSEL_POWER
AnnaBridge 174:b96e65c34a4d 128 * - \ref DAC_REFSEL_INT_VREF
AnnaBridge 174:b96e65c34a4d 129 * - \ref DAC_REFSEL_VREF
AnnaBridge 174:b96e65c34a4d 130 * @return None
AnnaBridge 174:b96e65c34a4d 131 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 132 */
AnnaBridge 174:b96e65c34a4d 133 #define DAC_SET_REF_VOLTAGE(dac, u32Ref) (DAC->COMCTL = ((DAC->COMCTL) & ~DAC_COMCTL_REFSEL_Msk) | u32Ref)
AnnaBridge 174:b96e65c34a4d 134
AnnaBridge 174:b96e65c34a4d 135 /**
AnnaBridge 174:b96e65c34a4d 136 * @brief This macro enable the interrupt of specified channel.
AnnaBridge 174:b96e65c34a4d 137 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 138 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 139 * @return None
AnnaBridge 174:b96e65c34a4d 140 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 141 */
AnnaBridge 174:b96e65c34a4d 142 #define DAC_ENABLE_INT(dac, u32Ch) do {\
AnnaBridge 174:b96e65c34a4d 143 if(u32Ch)\
AnnaBridge 174:b96e65c34a4d 144 DAC->CTL1 |= DAC_CTL_DACIE_Msk;\
AnnaBridge 174:b96e65c34a4d 145 else\
AnnaBridge 174:b96e65c34a4d 146 DAC->CTL0 |= DAC_CTL_DACIE_Msk;\
AnnaBridge 174:b96e65c34a4d 147 }while(0)
AnnaBridge 174:b96e65c34a4d 148
AnnaBridge 174:b96e65c34a4d 149 /**
AnnaBridge 174:b96e65c34a4d 150 * @brief This macro disable the interrupt of specified channel.
AnnaBridge 174:b96e65c34a4d 151 * @param[in] dac Base address of DAC module.
AnnaBridge 174:b96e65c34a4d 152 * @param[in] u32Ch DAC channel number, could be 0 or 1
AnnaBridge 174:b96e65c34a4d 153 * @return None
AnnaBridge 174:b96e65c34a4d 154 * \hideinitializer
AnnaBridge 174:b96e65c34a4d 155 */
AnnaBridge 174:b96e65c34a4d 156 #define DAC_DISABLE_INT(dac, u32Ch) do {\
AnnaBridge 174:b96e65c34a4d 157 if(u32Ch)\
AnnaBridge 174:b96e65c34a4d 158 DAC->CTL1 &= ~DAC_CTL_DACIE_Msk;\
AnnaBridge 174:b96e65c34a4d 159 else\
AnnaBridge 174:b96e65c34a4d 160 DAC->CTL0 &= ~DAC_CTL_DACIE_Msk;\
AnnaBridge 174:b96e65c34a4d 161 }while(0)
AnnaBridge 174:b96e65c34a4d 162
AnnaBridge 174:b96e65c34a4d 163 void DAC_Open(DAC_T *dac, uint32_t u32Ch, uint32_t u32TrgSrc);
AnnaBridge 174:b96e65c34a4d 164 void DAC_Close(DAC_T *dac, uint32_t u32Ch);
AnnaBridge 174:b96e65c34a4d 165 int DAC_SetDelayTime(DAC_T *dac, uint32_t u32Delay);
AnnaBridge 174:b96e65c34a4d 166
AnnaBridge 174:b96e65c34a4d 167 /*@}*/ /* end of group NANO100_DAC_EXPORTED_FUNCTIONS */
AnnaBridge 174:b96e65c34a4d 168
AnnaBridge 174:b96e65c34a4d 169 /*@}*/ /* end of group NANO100_DAC_Driver */
AnnaBridge 174:b96e65c34a4d 170
AnnaBridge 174:b96e65c34a4d 171 /*@}*/ /* end of group NANO100_Device_Driver */
AnnaBridge 174:b96e65c34a4d 172
AnnaBridge 174:b96e65c34a4d 173 #ifdef __cplusplus
AnnaBridge 174:b96e65c34a4d 174 }
AnnaBridge 174:b96e65c34a4d 175 #endif
AnnaBridge 174:b96e65c34a4d 176
AnnaBridge 174:b96e65c34a4d 177 #endif //__DAC_H__
AnnaBridge 174:b96e65c34a4d 178
AnnaBridge 174:b96e65c34a4d 179 /*** (C) COPYRIGHT 2013 Nuvoton Technology Corp. ***/