mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/fsl_common.c@174:b96e65c34a4d, 2017-10-02 (annotated)
- Committer:
- AnnaBridge
- Date:
- Mon Oct 02 15:33:19 2017 +0100
- Revision:
- 174:b96e65c34a4d
This updates the lib to the mbed lib v 152
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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AnnaBridge | 174:b96e65c34a4d | 1 | /* |
AnnaBridge | 174:b96e65c34a4d | 2 | * Copyright (c) 2015-2016, Freescale Semiconductor, Inc. |
AnnaBridge | 174:b96e65c34a4d | 3 | * All rights reserved. |
AnnaBridge | 174:b96e65c34a4d | 4 | * |
AnnaBridge | 174:b96e65c34a4d | 5 | * Redistribution and use in source and binary forms, with or without modification, |
AnnaBridge | 174:b96e65c34a4d | 6 | * are permitted provided that the following conditions are met: |
AnnaBridge | 174:b96e65c34a4d | 7 | * |
AnnaBridge | 174:b96e65c34a4d | 8 | * o Redistributions of source code must retain the above copyright notice, this list |
AnnaBridge | 174:b96e65c34a4d | 9 | * of conditions and the following disclaimer. |
AnnaBridge | 174:b96e65c34a4d | 10 | * |
AnnaBridge | 174:b96e65c34a4d | 11 | * o Redistributions in binary form must reproduce the above copyright notice, this |
AnnaBridge | 174:b96e65c34a4d | 12 | * list of conditions and the following disclaimer in the documentation and/or |
AnnaBridge | 174:b96e65c34a4d | 13 | * other materials provided with the distribution. |
AnnaBridge | 174:b96e65c34a4d | 14 | * |
AnnaBridge | 174:b96e65c34a4d | 15 | * o Neither the name of Freescale Semiconductor, Inc. nor the names of its |
AnnaBridge | 174:b96e65c34a4d | 16 | * contributors may be used to endorse or promote products derived from this |
AnnaBridge | 174:b96e65c34a4d | 17 | * software without specific prior written permission. |
AnnaBridge | 174:b96e65c34a4d | 18 | * |
AnnaBridge | 174:b96e65c34a4d | 19 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND |
AnnaBridge | 174:b96e65c34a4d | 20 | * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED |
AnnaBridge | 174:b96e65c34a4d | 21 | * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
AnnaBridge | 174:b96e65c34a4d | 22 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR |
AnnaBridge | 174:b96e65c34a4d | 23 | * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES |
AnnaBridge | 174:b96e65c34a4d | 24 | * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; |
AnnaBridge | 174:b96e65c34a4d | 25 | * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON |
AnnaBridge | 174:b96e65c34a4d | 26 | * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
AnnaBridge | 174:b96e65c34a4d | 27 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS |
AnnaBridge | 174:b96e65c34a4d | 28 | * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
AnnaBridge | 174:b96e65c34a4d | 29 | */ |
AnnaBridge | 174:b96e65c34a4d | 30 | |
AnnaBridge | 174:b96e65c34a4d | 31 | #include "fsl_common.h" |
AnnaBridge | 174:b96e65c34a4d | 32 | void InstallIRQHandler(IRQn_Type irq, uint32_t irqHandler) |
AnnaBridge | 174:b96e65c34a4d | 33 | { |
AnnaBridge | 174:b96e65c34a4d | 34 | /* Addresses for VECTOR_TABLE and VECTOR_RAM come from the linker file */ |
AnnaBridge | 174:b96e65c34a4d | 35 | #if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) |
AnnaBridge | 174:b96e65c34a4d | 36 | extern uint32_t Image$$VECTOR_ROM$$Base[]; |
AnnaBridge | 174:b96e65c34a4d | 37 | extern uint32_t Image$$VECTOR_RAM$$Base[]; |
AnnaBridge | 174:b96e65c34a4d | 38 | extern uint32_t Image$$RW_m_data$$Base[]; |
AnnaBridge | 174:b96e65c34a4d | 39 | |
AnnaBridge | 174:b96e65c34a4d | 40 | #define __VECTOR_TABLE Image$$VECTOR_ROM$$Base |
AnnaBridge | 174:b96e65c34a4d | 41 | #define __VECTOR_RAM Image$$VECTOR_RAM$$Base |
AnnaBridge | 174:b96e65c34a4d | 42 | #define __RAM_VECTOR_TABLE_SIZE (((uint32_t)Image$$RW_m_data$$Base - (uint32_t)Image$$VECTOR_RAM$$Base)) |
AnnaBridge | 174:b96e65c34a4d | 43 | #elif defined(__ICCARM__) |
AnnaBridge | 174:b96e65c34a4d | 44 | extern uint32_t __RAM_VECTOR_TABLE_SIZE[]; |
AnnaBridge | 174:b96e65c34a4d | 45 | extern uint32_t __VECTOR_TABLE[]; |
AnnaBridge | 174:b96e65c34a4d | 46 | extern uint32_t __VECTOR_RAM[]; |
AnnaBridge | 174:b96e65c34a4d | 47 | #elif defined(__GNUC__) |
AnnaBridge | 174:b96e65c34a4d | 48 | extern uint32_t __VECTOR_TABLE[]; |
AnnaBridge | 174:b96e65c34a4d | 49 | extern uint32_t __VECTOR_RAM[]; |
AnnaBridge | 174:b96e65c34a4d | 50 | extern uint32_t __RAM_VECTOR_TABLE_SIZE_BYTES[]; |
AnnaBridge | 174:b96e65c34a4d | 51 | uint32_t __RAM_VECTOR_TABLE_SIZE = (uint32_t)(__RAM_VECTOR_TABLE_SIZE_BYTES); |
AnnaBridge | 174:b96e65c34a4d | 52 | #endif /* defined(__CC_ARM) */ |
AnnaBridge | 174:b96e65c34a4d | 53 | uint32_t n; |
AnnaBridge | 174:b96e65c34a4d | 54 | uint32_t interrupts_disabled; |
AnnaBridge | 174:b96e65c34a4d | 55 | |
AnnaBridge | 174:b96e65c34a4d | 56 | interrupts_disabled = __get_PRIMASK(); |
AnnaBridge | 174:b96e65c34a4d | 57 | __disable_irq(); |
AnnaBridge | 174:b96e65c34a4d | 58 | if (SCB->VTOR != (uint32_t)__VECTOR_RAM) |
AnnaBridge | 174:b96e65c34a4d | 59 | { |
AnnaBridge | 174:b96e65c34a4d | 60 | /* Copy the vector table from ROM to RAM */ |
AnnaBridge | 174:b96e65c34a4d | 61 | for (n = 0; n < ((uint32_t)__RAM_VECTOR_TABLE_SIZE) / sizeof(uint32_t); n++) |
AnnaBridge | 174:b96e65c34a4d | 62 | { |
AnnaBridge | 174:b96e65c34a4d | 63 | __VECTOR_RAM[n] = __VECTOR_TABLE[n]; |
AnnaBridge | 174:b96e65c34a4d | 64 | } |
AnnaBridge | 174:b96e65c34a4d | 65 | /* Point the VTOR to the position of vector table */ |
AnnaBridge | 174:b96e65c34a4d | 66 | SCB->VTOR = (uint32_t)__VECTOR_RAM; |
AnnaBridge | 174:b96e65c34a4d | 67 | } |
AnnaBridge | 174:b96e65c34a4d | 68 | |
AnnaBridge | 174:b96e65c34a4d | 69 | /* make sure the __VECTOR_RAM is noncachable */ |
AnnaBridge | 174:b96e65c34a4d | 70 | __VECTOR_RAM[irq + 16] = irqHandler; |
AnnaBridge | 174:b96e65c34a4d | 71 | |
AnnaBridge | 174:b96e65c34a4d | 72 | if (!interrupts_disabled) { |
AnnaBridge | 174:b96e65c34a4d | 73 | __enable_irq(); |
AnnaBridge | 174:b96e65c34a4d | 74 | } |
AnnaBridge | 174:b96e65c34a4d | 75 | } |
AnnaBridge | 174:b96e65c34a4d | 76 | #ifndef CPU_QN908X |
AnnaBridge | 174:b96e65c34a4d | 77 | #if (defined(FSL_FEATURE_SOC_SYSCON_COUNT) && (FSL_FEATURE_SOC_SYSCON_COUNT > 0)) |
AnnaBridge | 174:b96e65c34a4d | 78 | |
AnnaBridge | 174:b96e65c34a4d | 79 | void EnableDeepSleepIRQ(IRQn_Type interrupt) |
AnnaBridge | 174:b96e65c34a4d | 80 | { |
AnnaBridge | 174:b96e65c34a4d | 81 | uint32_t index = 0; |
AnnaBridge | 174:b96e65c34a4d | 82 | uint32_t intNumber = (uint32_t)interrupt; |
AnnaBridge | 174:b96e65c34a4d | 83 | while (intNumber >= 32u) |
AnnaBridge | 174:b96e65c34a4d | 84 | { |
AnnaBridge | 174:b96e65c34a4d | 85 | index++; |
AnnaBridge | 174:b96e65c34a4d | 86 | intNumber -= 32u; |
AnnaBridge | 174:b96e65c34a4d | 87 | } |
AnnaBridge | 174:b96e65c34a4d | 88 | |
AnnaBridge | 174:b96e65c34a4d | 89 | SYSCON->STARTERSET[index] = 1u << intNumber; |
AnnaBridge | 174:b96e65c34a4d | 90 | EnableIRQ(interrupt); /* also enable interrupt at NVIC */ |
AnnaBridge | 174:b96e65c34a4d | 91 | } |
AnnaBridge | 174:b96e65c34a4d | 92 | |
AnnaBridge | 174:b96e65c34a4d | 93 | void DisableDeepSleepIRQ(IRQn_Type interrupt) |
AnnaBridge | 174:b96e65c34a4d | 94 | { |
AnnaBridge | 174:b96e65c34a4d | 95 | uint32_t index = 0; |
AnnaBridge | 174:b96e65c34a4d | 96 | uint32_t intNumber = (uint32_t)interrupt; |
AnnaBridge | 174:b96e65c34a4d | 97 | while (intNumber >= 32u) |
AnnaBridge | 174:b96e65c34a4d | 98 | { |
AnnaBridge | 174:b96e65c34a4d | 99 | index++; |
AnnaBridge | 174:b96e65c34a4d | 100 | intNumber -= 32u; |
AnnaBridge | 174:b96e65c34a4d | 101 | } |
AnnaBridge | 174:b96e65c34a4d | 102 | |
AnnaBridge | 174:b96e65c34a4d | 103 | DisableIRQ(interrupt); /* also disable interrupt at NVIC */ |
AnnaBridge | 174:b96e65c34a4d | 104 | SYSCON->STARTERCLR[index] = 1u << intNumber; |
AnnaBridge | 174:b96e65c34a4d | 105 | } |
AnnaBridge | 174:b96e65c34a4d | 106 | #endif /* FSL_FEATURE_SOC_SYSCON_COUNT */ |
AnnaBridge | 174:b96e65c34a4d | 107 | #else |
AnnaBridge | 174:b96e65c34a4d | 108 | void EnableDeepSleepIRQ(IRQn_Type interrupt) |
AnnaBridge | 174:b96e65c34a4d | 109 | { |
AnnaBridge | 174:b96e65c34a4d | 110 | uint32_t index = 0; |
AnnaBridge | 174:b96e65c34a4d | 111 | uint32_t intNumber = (uint32_t)interrupt; |
AnnaBridge | 174:b96e65c34a4d | 112 | while (intNumber >= 32u) |
AnnaBridge | 174:b96e65c34a4d | 113 | { |
AnnaBridge | 174:b96e65c34a4d | 114 | index++; |
AnnaBridge | 174:b96e65c34a4d | 115 | intNumber -= 32u; |
AnnaBridge | 174:b96e65c34a4d | 116 | } |
AnnaBridge | 174:b96e65c34a4d | 117 | |
AnnaBridge | 174:b96e65c34a4d | 118 | /* SYSCON->STARTERSET[index] = 1u << intNumber; */ |
AnnaBridge | 174:b96e65c34a4d | 119 | EnableIRQ(interrupt); /* also enable interrupt at NVIC */ |
AnnaBridge | 174:b96e65c34a4d | 120 | } |
AnnaBridge | 174:b96e65c34a4d | 121 | |
AnnaBridge | 174:b96e65c34a4d | 122 | void DisableDeepSleepIRQ(IRQn_Type interrupt) |
AnnaBridge | 174:b96e65c34a4d | 123 | { |
AnnaBridge | 174:b96e65c34a4d | 124 | uint32_t index = 0; |
AnnaBridge | 174:b96e65c34a4d | 125 | uint32_t intNumber = (uint32_t)interrupt; |
AnnaBridge | 174:b96e65c34a4d | 126 | while (intNumber >= 32u) |
AnnaBridge | 174:b96e65c34a4d | 127 | { |
AnnaBridge | 174:b96e65c34a4d | 128 | index++; |
AnnaBridge | 174:b96e65c34a4d | 129 | intNumber -= 32u; |
AnnaBridge | 174:b96e65c34a4d | 130 | } |
AnnaBridge | 174:b96e65c34a4d | 131 | |
AnnaBridge | 174:b96e65c34a4d | 132 | DisableIRQ(interrupt); /* also disable interrupt at NVIC */ |
AnnaBridge | 174:b96e65c34a4d | 133 | /* SYSCON->STARTERCLR[index] = 1u << intNumber; */ |
AnnaBridge | 174:b96e65c34a4d | 134 | } |
AnnaBridge | 174:b96e65c34a4d | 135 | #endif /*CPU_QN908X */ |