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targets/cmsis/TARGET_Freescale/TARGET_K22F/system_MK22F51212.h@562:f0e4febb6ec5, 2015-06-09 (annotated)

Committer:
jpiat
Date:
Tue Jun 09 12:33:35 2015 +0000
Revision:
562:f0e4febb6ec5
Parent:
324:406fd2029f23 
Changed system clock to internal with PLL to 120MHz

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 324:406fd2029f23 1 /*
mbed_official 324:406fd2029f23 2 ** ###################################################################
mbed_official 324:406fd2029f23 3 ** Compilers: Keil ARM C/C++ Compiler
mbed_official 324:406fd2029f23 4 ** Freescale C/C++ for Embedded ARM
mbed_official 324:406fd2029f23 5 ** GNU C Compiler
mbed_official 324:406fd2029f23 6 ** GNU C Compiler - CodeSourcery Sourcery G++
mbed_official 324:406fd2029f23 7 ** IAR ANSI C/C++ Compiler for ARM
mbed_official 324:406fd2029f23 8 **
mbed_official 324:406fd2029f23 9 ** Reference manual: K22P121M120SF7RM, Rev. 1, March 24, 2014
mbed_official 324:406fd2029f23 10 ** Version: rev. 2.5, 2014-05-06
mbed_official 324:406fd2029f23 11 ** Build: b140611
mbed_official 324:406fd2029f23 12 **
mbed_official 324:406fd2029f23 13 ** Abstract:
mbed_official 324:406fd2029f23 14 ** Provides a system configuration function and a global variable that
mbed_official 324:406fd2029f23 15 ** contains the system frequency. It configures the device and initializes
mbed_official 324:406fd2029f23 16 ** the oscillator (PLL) that is part of the microcontroller device.
mbed_official 324:406fd2029f23 17 **
mbed_official 324:406fd2029f23 18 ** Copyright (c) 2014 Freescale Semiconductor, Inc.
mbed_official 324:406fd2029f23 19 ** All rights reserved.
mbed_official 324:406fd2029f23 20 **
mbed_official 324:406fd2029f23 21 ** Redistribution and use in source and binary forms, with or without modification,
mbed_official 324:406fd2029f23 22 ** are permitted provided that the following conditions are met:
mbed_official 324:406fd2029f23 23 **
mbed_official 324:406fd2029f23 24 ** o Redistributions of source code must retain the above copyright notice, this list
mbed_official 324:406fd2029f23 25 ** of conditions and the following disclaimer.
mbed_official 324:406fd2029f23 26 **
mbed_official 324:406fd2029f23 27 ** o Redistributions in binary form must reproduce the above copyright notice, this
mbed_official 324:406fd2029f23 28 ** list of conditions and the following disclaimer in the documentation and/or
mbed_official 324:406fd2029f23 29 ** other materials provided with the distribution.
mbed_official 324:406fd2029f23 30 **
mbed_official 324:406fd2029f23 31 ** o Neither the name of Freescale Semiconductor, Inc. nor the names of its
mbed_official 324:406fd2029f23 32 ** contributors may be used to endorse or promote products derived from this
mbed_official 324:406fd2029f23 33 ** software without specific prior written permission.
mbed_official 324:406fd2029f23 34 **
mbed_official 324:406fd2029f23 35 ** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
mbed_official 324:406fd2029f23 36 ** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
mbed_official 324:406fd2029f23 37 ** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 324:406fd2029f23 38 ** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
mbed_official 324:406fd2029f23 39 ** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
mbed_official 324:406fd2029f23 40 ** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
mbed_official 324:406fd2029f23 41 ** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
mbed_official 324:406fd2029f23 42 ** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
mbed_official 324:406fd2029f23 43 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
mbed_official 324:406fd2029f23 44 ** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 324:406fd2029f23 45 **
mbed_official 324:406fd2029f23 46 ** http: www.freescale.com
mbed_official 324:406fd2029f23 47 ** mail: support@freescale.com
mbed_official 324:406fd2029f23 48 **
mbed_official 324:406fd2029f23 49 ** Revisions:
mbed_official 324:406fd2029f23 50 ** - rev. 1.0 (2013-07-23)
mbed_official 324:406fd2029f23 51 ** Initial version.
mbed_official 324:406fd2029f23 52 ** - rev. 1.1 (2013-09-17)
mbed_official 324:406fd2029f23 53 ** RM rev. 0.4 update.
mbed_official 324:406fd2029f23 54 ** - rev. 2.0 (2013-10-29)
mbed_official 324:406fd2029f23 55 ** Register accessor macros added to the memory map.
mbed_official 324:406fd2029f23 56 ** Symbols for Processor Expert memory map compatibility added to the memory map.
mbed_official 324:406fd2029f23 57 ** Startup file for gcc has been updated according to CMSIS 3.2.
mbed_official 324:406fd2029f23 58 ** System initialization updated.
mbed_official 324:406fd2029f23 59 ** - rev. 2.1 (2013-10-30)
mbed_official 324:406fd2029f23 60 ** Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.
mbed_official 324:406fd2029f23 61 ** - rev. 2.2 (2013-12-20)
mbed_official 324:406fd2029f23 62 ** Update according to reference manual rev. 0.6,
mbed_official 324:406fd2029f23 63 ** - rev. 2.3 (2014-01-13)
mbed_official 324:406fd2029f23 64 ** Update according to reference manual rev. 0.61,
mbed_official 324:406fd2029f23 65 ** - rev. 2.4 (2014-02-10)
mbed_official 324:406fd2029f23 66 ** The declaration of clock configurations has been moved to separate header file system_MK22F51212.h
mbed_official 324:406fd2029f23 67 ** - rev. 2.5 (2014-05-06)
mbed_official 324:406fd2029f23 68 ** Update according to reference manual rev. 1.0,
mbed_official 324:406fd2029f23 69 ** Update of system and startup files.
mbed_official 324:406fd2029f23 70 ** Module access macro module_BASES replaced by module_BASE_PTRS.
mbed_official 324:406fd2029f23 71 **
mbed_official 324:406fd2029f23 72 ** ###################################################################
mbed_official 324:406fd2029f23 73 */
mbed_official 324:406fd2029f23 74
mbed_official 324:406fd2029f23 75 /*!
mbed_official 324:406fd2029f23 76 * @file MK22F51212
mbed_official 324:406fd2029f23 77 * @version 2.5
mbed_official 324:406fd2029f23 78 * @date 2014-05-06
mbed_official 324:406fd2029f23 79 * @brief Device specific configuration file for MK22F51212 (header file)
mbed_official 324:406fd2029f23 80 *
mbed_official 324:406fd2029f23 81 * Provides a system configuration function and a global variable that contains
mbed_official 324:406fd2029f23 82 * the system frequency. It configures the device and initializes the oscillator
mbed_official 324:406fd2029f23 83 * (PLL) that is part of the microcontroller device.
mbed_official 324:406fd2029f23 84 */
mbed_official 324:406fd2029f23 85
mbed_official 324:406fd2029f23 86 #ifndef SYSTEM_MK22F51212_H_
mbed_official 324:406fd2029f23 87 #define SYSTEM_MK22F51212_H_ /**< Symbol preventing repeated inclusion */
mbed_official 324:406fd2029f23 88
mbed_official 324:406fd2029f23 89 #ifdef __cplusplus
mbed_official 324:406fd2029f23 90 extern "C" {
mbed_official 324:406fd2029f23 91 #endif
mbed_official 324:406fd2029f23 92
mbed_official 324:406fd2029f23 93 #include <stdint.h>
mbed_official 324:406fd2029f23 94
mbed_official 324:406fd2029f23 95
mbed_official 324:406fd2029f23 96 #define DISABLE_WDOG 1
mbed_official 324:406fd2029f23 97
mbed_official 324:406fd2029f23 98 #ifndef CLOCK_SETUP
jpiat 562:f0e4febb6ec5 99 #define CLOCK_SETUP 0
mbed_official 324:406fd2029f23 100 #endif
mbed_official 324:406fd2029f23 101
mbed_official 324:406fd2029f23 102 /* MCG mode constants */
mbed_official 324:406fd2029f23 103
mbed_official 324:406fd2029f23 104 #define MCG_MODE_FEI 0U
mbed_official 324:406fd2029f23 105 #define MCG_MODE_FBI 1U
mbed_official 324:406fd2029f23 106 #define MCG_MODE_BLPI 2U
mbed_official 324:406fd2029f23 107 #define MCG_MODE_FEE 3U
mbed_official 324:406fd2029f23 108 #define MCG_MODE_FBE 4U
mbed_official 324:406fd2029f23 109 #define MCG_MODE_BLPE 5U
mbed_official 324:406fd2029f23 110 #define MCG_MODE_PBE 6U
mbed_official 324:406fd2029f23 111 #define MCG_MODE_PEE 7U
mbed_official 324:406fd2029f23 112
mbed_official 324:406fd2029f23 113 /* Predefined clock setups
mbed_official 324:406fd2029f23 114 0 ... Default part configuration
mbed_official 324:406fd2029f23 115 Multipurpose Clock Generator (MCG) in FEI mode.
mbed_official 324:406fd2029f23 116 Reference clock source for MCG module: Slow internal reference clock
mbed_official 324:406fd2029f23 117 Core clock = 20.97152MHz
mbed_official 324:406fd2029f23 118 Bus clock = 20.97152MHz
mbed_official 324:406fd2029f23 119 1 ... Maximum achievable clock frequency configuration
mbed_official 324:406fd2029f23 120 Multipurpose Clock Generator (MCG) in PEE mode.
mbed_official 324:406fd2029f23 121 Reference clock source for MCG module: System oscillator 0 reference clock
mbed_official 324:406fd2029f23 122 Core clock = 120MHz
mbed_official 324:406fd2029f23 123 Bus clock = 60MHz
mbed_official 324:406fd2029f23 124 2 ... Chip internaly clocked, ready for Very Low Power Run mode.
mbed_official 324:406fd2029f23 125 Multipurpose Clock Generator (MCG) in BLPI mode.
mbed_official 324:406fd2029f23 126 Reference clock source for MCG module: Fast internal reference clock
mbed_official 324:406fd2029f23 127 Core clock = 4MHz
mbed_official 324:406fd2029f23 128 Bus clock = 4MHz
mbed_official 324:406fd2029f23 129 3 ... Chip externally clocked, ready for Very Low Power Run mode.
mbed_official 324:406fd2029f23 130 Multipurpose Clock Generator (MCG) in BLPE mode.
mbed_official 324:406fd2029f23 131 Reference clock source for MCG module: System oscillator 0 reference clock
mbed_official 324:406fd2029f23 132 Core clock = 4MHz
mbed_official 324:406fd2029f23 133 Bus clock = 4MHz
mbed_official 324:406fd2029f23 134 4 ... USB clock setup
mbed_official 324:406fd2029f23 135 Multipurpose Clock Generator (MCG) in PEE mode.
mbed_official 324:406fd2029f23 136 Reference clock source for MCG module: System oscillator 0 reference clock
mbed_official 324:406fd2029f23 137 Core clock = 120MHz
mbed_official 324:406fd2029f23 138 Bus clock = 60MHz
mbed_official 324:406fd2029f23 139 5 ... Maximum achievable clock frequency configuration in RUN mode
mbed_official 324:406fd2029f23 140 Multipurpose Clock Generator (MCG) in PEE mode.
mbed_official 324:406fd2029f23 141 Reference clock source for MCG module: System oscillator 0 reference clock
mbed_official 324:406fd2029f23 142 Core clock = 80MHz
mbed_official 324:406fd2029f23 143 Bus clock = 40MHz
mbed_official 324:406fd2029f23 144 */
mbed_official 324:406fd2029f23 145
mbed_official 324:406fd2029f23 146 /* Define clock source values */
mbed_official 324:406fd2029f23 147
mbed_official 324:406fd2029f23 148 #define CPU_XTAL_CLK_HZ 8000000u /* Value of the external crystal or oscillator clock frequency in Hz */
mbed_official 324:406fd2029f23 149 #define CPU_XTAL32k_CLK_HZ 32768u /* Value of the external 32k crystal or oscillator clock frequency in Hz */
mbed_official 324:406fd2029f23 150 #define CPU_INT_SLOW_CLK_HZ 32768u /* Value of the slow internal oscillator clock frequency in Hz */
mbed_official 324:406fd2029f23 151 #define CPU_INT_FAST_CLK_HZ 4000000u /* Value of the fast internal oscillator clock frequency in Hz */
mbed_official 324:406fd2029f23 152 #define CPU_INT_IRC_CLK_HZ 48000000u /* Value of the 48M internal oscillator clock frequency in Hz */
mbed_official 324:406fd2029f23 153
mbed_official 324:406fd2029f23 154 /* RTC oscillator setting */
mbed_official 324:406fd2029f23 155 /* RTC_CR: SC2P=0,SC4P=0,SC8P=0,SC16P=0,CLKO=1,OSCE=1,WPS=0,UM=0,SUP=0,WPE=0,SWR=0 */
mbed_official 324:406fd2029f23 156 #define SYSTEM_RTC_CR_VALUE 0x0300U /* RTC_CR */
mbed_official 324:406fd2029f23 157
mbed_official 324:406fd2029f23 158 /* Low power mode enable */
mbed_official 324:406fd2029f23 159 /* SMC_PMPROT: AHSRUN=1,AVLP=1,ALLS=1,AVLLS=1 */
mbed_official 324:406fd2029f23 160 #define SYSTEM_SMC_PMPROT_VALUE 0xAAU /* SMC_PMPROT */
mbed_official 324:406fd2029f23 161
mbed_official 324:406fd2029f23 162 /* Internal reference clock trim */
mbed_official 324:406fd2029f23 163 /* #undef SLOW_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */
mbed_official 324:406fd2029f23 164 /* #undef SLOW_FINE_TRIM_ADDRESS */ /* Slow oscillator not trimmed. Commented out for MISRA compliance. */
mbed_official 324:406fd2029f23 165 /* #undef FAST_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */
mbed_official 324:406fd2029f23 166 /* #undef FAST_FINE_TRIM_ADDRESS */ /* Fast oscillator not trimmed. Commented out for MISRA compliance. */
mbed_official 324:406fd2029f23 167
mbed_official 324:406fd2029f23 168 #if (CLOCK_SETUP == 0)
jpiat 562:f0e4febb6ec5 169 #define DEFAULT_SYSTEM_CLOCK 120000000U /* Default System clock value */
jpiat 562:f0e4febb6ec5 170 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
jpiat 562:f0e4febb6ec5 171 /* MCG_C1: CLKS=0,FRDIV=4,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
jpiat 562:f0e4febb6ec5 172 #define SYSTEM_MCG_C1_VALUE 0x22U /* MCG_C1 */
mbed_official 324:406fd2029f23 173 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
mbed_official 324:406fd2029f23 174 #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */
mbed_official 324:406fd2029f23 175 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
mbed_official 324:406fd2029f23 176 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
mbed_official 324:406fd2029f23 177 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
mbed_official 324:406fd2029f23 178 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
jpiat 562:f0e4febb6ec5 179 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=3 */
jpiat 562:f0e4febb6ec5 180 #define SYSTEM_MCG_C5_VALUE 0x03U /* MCG_C5 */
jpiat 562:f0e4febb6ec5 181 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=6 */
jpiat 562:f0e4febb6ec5 182 #define SYSTEM_MCG_C6_VALUE 0x46U /* MCG_C6 */
jpiat 562:f0e4febb6ec5 183 /* MCG_C7: OSCSEL=0 */
mbed_official 324:406fd2029f23 184 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
jpiat 562:f0e4febb6ec5 185 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
jpiat 562:f0e4febb6ec5 186 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
jpiat 562:f0e4febb6ec5 187 /* SMC_PMCTRL: RUNM=3,STOPA=0,STOPM=0 */
jpiat 562:f0e4febb6ec5 188 #define SYSTEM_SMC_PMCTRL_VALUE 0x60U /* SMC_PMCTRL */
jpiat 562:f0e4febb6ec5 189 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */
jpiat 562:f0e4febb6ec5 190 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */
jpiat 562:f0e4febb6ec5 191 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=3,OSC32KOUT=0,RAMSIZE=0 */
jpiat 562:f0e4febb6ec5 192 #define SYSTEM_SIM_SOPT1_VALUE 0x000C0000U /* SIM_SOPT1 */
jpiat 562:f0e4febb6ec5 193 /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
jpiat 562:f0e4febb6ec5 194 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
mbed_official 324:406fd2029f23 195 #elif (CLOCK_SETUP == 1)
mbed_official 324:406fd2029f23 196 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
mbed_official 324:406fd2029f23 197 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
mbed_official 324:406fd2029f23 198 /* MCG_C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
mbed_official 324:406fd2029f23 199 #define SYSTEM_MCG_C1_VALUE 0x1AU /* MCG_C1 */
mbed_official 324:406fd2029f23 200 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
mbed_official 324:406fd2029f23 201 #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */
mbed_official 324:406fd2029f23 202 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
mbed_official 324:406fd2029f23 203 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
mbed_official 324:406fd2029f23 204 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
mbed_official 324:406fd2029f23 205 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
mbed_official 324:406fd2029f23 206 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=1 */
mbed_official 324:406fd2029f23 207 #define SYSTEM_MCG_C5_VALUE 0x01U /* MCG_C5 */
mbed_official 324:406fd2029f23 208 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=6 */
mbed_official 324:406fd2029f23 209 #define SYSTEM_MCG_C6_VALUE 0x46U /* MCG_C6 */
mbed_official 324:406fd2029f23 210 /* MCG_C7: OSCSEL=0 */
mbed_official 324:406fd2029f23 211 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
mbed_official 324:406fd2029f23 212 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
mbed_official 324:406fd2029f23 213 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
mbed_official 324:406fd2029f23 214 /* SMC_PMCTRL: RUNM=3,STOPA=0,STOPM=0 */
mbed_official 324:406fd2029f23 215 #define SYSTEM_SMC_PMCTRL_VALUE 0x60U /* SMC_PMCTRL */
mbed_official 324:406fd2029f23 216 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */
mbed_official 324:406fd2029f23 217 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */
mbed_official 324:406fd2029f23 218 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */
mbed_official 324:406fd2029f23 219 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
mbed_official 324:406fd2029f23 220 /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
mbed_official 324:406fd2029f23 221 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
mbed_official 324:406fd2029f23 222 #elif (CLOCK_SETUP == 2)
mbed_official 324:406fd2029f23 223 #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
mbed_official 324:406fd2029f23 224 #define MCG_MODE MCG_MODE_BLPI /* Clock generator mode */
mbed_official 324:406fd2029f23 225 /* MCG_C1: CLKS=1,FRDIV=0,IREFS=1,IRCLKEN=1,IREFSTEN=0 */
mbed_official 324:406fd2029f23 226 #define SYSTEM_MCG_C1_VALUE 0x46U /* MCG_C1 */
mbed_official 324:406fd2029f23 227 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=1,IRCS=1 */
mbed_official 324:406fd2029f23 228 #define SYSTEM_MCG_C2_VALUE 0x27U /* MCG_C2 */
mbed_official 324:406fd2029f23 229 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
mbed_official 324:406fd2029f23 230 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
mbed_official 324:406fd2029f23 231 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
mbed_official 324:406fd2029f23 232 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
mbed_official 324:406fd2029f23 233 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
mbed_official 324:406fd2029f23 234 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
mbed_official 324:406fd2029f23 235 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
mbed_official 324:406fd2029f23 236 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
mbed_official 324:406fd2029f23 237 /* MCG_C7: OSCSEL=0 */
mbed_official 324:406fd2029f23 238 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
mbed_official 324:406fd2029f23 239 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
mbed_official 324:406fd2029f23 240 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
mbed_official 324:406fd2029f23 241 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
mbed_official 324:406fd2029f23 242 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
mbed_official 324:406fd2029f23 243 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=0,OUTDIV3=0,OUTDIV4=4 */
mbed_official 324:406fd2029f23 244 #define SYSTEM_SIM_CLKDIV1_VALUE 0x00040000U /* SIM_CLKDIV1 */
mbed_official 324:406fd2029f23 245 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */
mbed_official 324:406fd2029f23 246 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
mbed_official 324:406fd2029f23 247 /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
mbed_official 324:406fd2029f23 248 #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */
mbed_official 324:406fd2029f23 249 #elif (CLOCK_SETUP == 3)
mbed_official 324:406fd2029f23 250 #define DEFAULT_SYSTEM_CLOCK 4000000u /* Default System clock value */
mbed_official 324:406fd2029f23 251 #define MCG_MODE MCG_MODE_BLPE /* Clock generator mode */
mbed_official 324:406fd2029f23 252 /* MCG_C1: CLKS=2,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
mbed_official 324:406fd2029f23 253 #define SYSTEM_MCG_C1_VALUE 0x9AU /* MCG_C1 */
mbed_official 324:406fd2029f23 254 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=1,IRCS=1 */
mbed_official 324:406fd2029f23 255 #define SYSTEM_MCG_C2_VALUE 0x27U /* MCG_C2 */
mbed_official 324:406fd2029f23 256 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
mbed_official 324:406fd2029f23 257 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
mbed_official 324:406fd2029f23 258 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=1,LOCS0=0 */
mbed_official 324:406fd2029f23 259 #define SYSTEM_MCG_SC_VALUE 0x02U /* MCG_SC */
mbed_official 324:406fd2029f23 260 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=0 */
mbed_official 324:406fd2029f23 261 #define SYSTEM_MCG_C5_VALUE 0x00U /* MCG_C5 */
mbed_official 324:406fd2029f23 262 /* MCG_C6: LOLIE0=0,PLLS=0,CME0=0,VDIV0=0 */
mbed_official 324:406fd2029f23 263 #define SYSTEM_MCG_C6_VALUE 0x00U /* MCG_C6 */
mbed_official 324:406fd2029f23 264 /* MCG_C7: OSCSEL=0 */
mbed_official 324:406fd2029f23 265 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
mbed_official 324:406fd2029f23 266 /* OSC_CR: ERCLKEN=0,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
mbed_official 324:406fd2029f23 267 #define SYSTEM_OSC_CR_VALUE 0x00U /* OSC_CR */
mbed_official 324:406fd2029f23 268 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
mbed_official 324:406fd2029f23 269 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
mbed_official 324:406fd2029f23 270 /* SIM_CLKDIV1: OUTDIV1=1,OUTDIV2=1,OUTDIV3=1,OUTDIV4=7 */
mbed_official 324:406fd2029f23 271 #define SYSTEM_SIM_CLKDIV1_VALUE 0x11170000U /* SIM_CLKDIV1 */
mbed_official 324:406fd2029f23 272 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */
mbed_official 324:406fd2029f23 273 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
mbed_official 324:406fd2029f23 274 /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=3,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
mbed_official 324:406fd2029f23 275 #define SYSTEM_SIM_SOPT2_VALUE 0x00030000U /* SIM_SOPT2 */
mbed_official 324:406fd2029f23 276 #elif (CLOCK_SETUP == 4)
mbed_official 324:406fd2029f23 277 #define DEFAULT_SYSTEM_CLOCK 120000000u /* Default System clock value */
mbed_official 324:406fd2029f23 278 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
mbed_official 324:406fd2029f23 279 /* MCG_C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
mbed_official 324:406fd2029f23 280 #define SYSTEM_MCG_C1_VALUE 0x1AU /* MCG_C1 */
mbed_official 324:406fd2029f23 281 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
mbed_official 324:406fd2029f23 282 #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */
mbed_official 324:406fd2029f23 283 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
mbed_official 324:406fd2029f23 284 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
mbed_official 324:406fd2029f23 285 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
mbed_official 324:406fd2029f23 286 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
mbed_official 324:406fd2029f23 287 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=1 */
mbed_official 324:406fd2029f23 288 #define SYSTEM_MCG_C5_VALUE 0x01U /* MCG_C5 */
mbed_official 324:406fd2029f23 289 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=6 */
mbed_official 324:406fd2029f23 290 #define SYSTEM_MCG_C6_VALUE 0x46U /* MCG_C6 */
mbed_official 324:406fd2029f23 291 /* MCG_C7: OSCSEL=0 */
mbed_official 324:406fd2029f23 292 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
mbed_official 324:406fd2029f23 293 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
mbed_official 324:406fd2029f23 294 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
mbed_official 324:406fd2029f23 295 /* SMC_PMCTRL: RUNM=3,STOPA=0,STOPM=0 */
mbed_official 324:406fd2029f23 296 #define SYSTEM_SMC_PMCTRL_VALUE 0x60U /* SMC_PMCTRL */
mbed_official 324:406fd2029f23 297 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=4 */
mbed_official 324:406fd2029f23 298 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01140000U /* SIM_CLKDIV1 */
mbed_official 324:406fd2029f23 299 /* SIM_CLKDIV2: USBDIV=4,USBFRAC=1 */
mbed_official 324:406fd2029f23 300 #define SYSTEM_SIM_CLKDIV2_VALUE 0x09U /* SIM_CLKDIV2 */
mbed_official 324:406fd2029f23 301 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */
mbed_official 324:406fd2029f23 302 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
mbed_official 324:406fd2029f23 303 /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
mbed_official 324:406fd2029f23 304 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
mbed_official 324:406fd2029f23 305 #elif (CLOCK_SETUP == 5)
mbed_official 324:406fd2029f23 306 #define DEFAULT_SYSTEM_CLOCK 80000000u /* Default System clock value */
mbed_official 324:406fd2029f23 307 #define MCG_MODE MCG_MODE_PEE /* Clock generator mode */
mbed_official 324:406fd2029f23 308 /* MCG_C1: CLKS=0,FRDIV=3,IREFS=0,IRCLKEN=1,IREFSTEN=0 */
mbed_official 324:406fd2029f23 309 #define SYSTEM_MCG_C1_VALUE 0x1AU /* MCG_C1 */
mbed_official 324:406fd2029f23 310 /* MCG_C2: LOCRE0=0,FCFTRIM=0,RANGE=2,HGO=0,EREFS=1,LP=0,IRCS=0 */
mbed_official 324:406fd2029f23 311 #define SYSTEM_MCG_C2_VALUE 0x24U /* MCG_C2 */
mbed_official 324:406fd2029f23 312 /* MCG_C4: DMX32=0,DRST_DRS=0,FCTRIM=0,SCFTRIM=0 */
mbed_official 324:406fd2029f23 313 #define SYSTEM_MCG_C4_VALUE 0x00U /* MCG_C4 */
mbed_official 324:406fd2029f23 314 /* MCG_SC: ATME=0,ATMS=0,ATMF=0,FLTPRSRV=0,FCRDIV=0,LOCS0=0 */
mbed_official 324:406fd2029f23 315 #define SYSTEM_MCG_SC_VALUE 0x00U /* MCG_SC */
mbed_official 324:406fd2029f23 316 /* MCG_C5: PLLCLKEN0=0,PLLSTEN0=0,PRDIV0=3 */
mbed_official 324:406fd2029f23 317 #define SYSTEM_MCG_C5_VALUE 0x03U /* MCG_C5 */
mbed_official 324:406fd2029f23 318 /* MCG_C6: LOLIE0=0,PLLS=1,CME0=0,VDIV0=0x10 */
mbed_official 324:406fd2029f23 319 #define SYSTEM_MCG_C6_VALUE 0x50U /* MCG_C6 */
mbed_official 324:406fd2029f23 320 /* MCG_C7: OSCSEL=0 */
mbed_official 324:406fd2029f23 321 #define SYSTEM_MCG_C7_VALUE 0x00U /* MCG_C7 */
mbed_official 324:406fd2029f23 322 /* OSC_CR: ERCLKEN=1,EREFSTEN=0,SC2P=0,SC4P=0,SC8P=0,SC16P=0 */
mbed_official 324:406fd2029f23 323 #define SYSTEM_OSC_CR_VALUE 0x80U /* OSC_CR */
mbed_official 324:406fd2029f23 324 /* SMC_PMCTRL: RUNM=0,STOPA=0,STOPM=0 */
mbed_official 324:406fd2029f23 325 #define SYSTEM_SMC_PMCTRL_VALUE 0x00U /* SMC_PMCTRL */
mbed_official 324:406fd2029f23 326 /* SIM_CLKDIV1: OUTDIV1=0,OUTDIV2=1,OUTDIV3=1,OUTDIV4=3 */
mbed_official 324:406fd2029f23 327 #define SYSTEM_SIM_CLKDIV1_VALUE 0x01130000U /* SIM_CLKDIV1 */
mbed_official 324:406fd2029f23 328 /* SIM_SOPT1: USBREGEN=0,USBSSTBY=0,USBVSTBY=0,OSC32KSEL=2,OSC32KOUT=0,RAMSIZE=0 */
mbed_official 324:406fd2029f23 329 #define SYSTEM_SIM_SOPT1_VALUE 0x00080000U /* SIM_SOPT1 */
mbed_official 324:406fd2029f23 330 /* SIM_SOPT2: LPUARTSRC=0,USBSRC=0,PLLFLLSEL=1,TRACECLKSEL=0,FBSL=0,CLKOUTSEL=0,RTCCLKOUTSEL=0 */
mbed_official 324:406fd2029f23 331 #define SYSTEM_SIM_SOPT2_VALUE 0x00010000U /* SIM_SOPT2 */
mbed_official 324:406fd2029f23 332 #endif
mbed_official 324:406fd2029f23 333
mbed_official 324:406fd2029f23 334 /**
mbed_official 324:406fd2029f23 335 * @brief System clock frequency (core clock)
mbed_official 324:406fd2029f23 336 *
mbed_official 324:406fd2029f23 337 * The system clock frequency supplied to the SysTick timer and the processor
mbed_official 324:406fd2029f23 338 * core clock. This variable can be used by the user application to setup the
mbed_official 324:406fd2029f23 339 * SysTick timer or configure other parameters. It may also be used by debugger to
mbed_official 324:406fd2029f23 340 * query the frequency of the debug timer or configure the trace clock speed
mbed_official 324:406fd2029f23 341 * SystemCoreClock is initialized with a correct predefined value.
mbed_official 324:406fd2029f23 342 */
mbed_official 324:406fd2029f23 343 extern uint32_t SystemCoreClock;
mbed_official 324:406fd2029f23 344
mbed_official 324:406fd2029f23 345 /**
mbed_official 324:406fd2029f23 346 * @brief Setup the microcontroller system.
mbed_official 324:406fd2029f23 347 *
mbed_official 324:406fd2029f23 348 * Typically this function configures the oscillator (PLL) that is part of the
mbed_official 324:406fd2029f23 349 * microcontroller device. For systems with variable clock speed it also updates
mbed_official 324:406fd2029f23 350 * the variable SystemCoreClock. SystemInit is called from startup_device file.
mbed_official 324:406fd2029f23 351 */
mbed_official 324:406fd2029f23 352 void SystemInit (void);
mbed_official 324:406fd2029f23 353
mbed_official 324:406fd2029f23 354 /**
mbed_official 324:406fd2029f23 355 * @brief Updates the SystemCoreClock variable.
mbed_official 324:406fd2029f23 356 *
mbed_official 324:406fd2029f23 357 * It must be called whenever the core clock is changed during program
mbed_official 324:406fd2029f23 358 * execution. SystemCoreClockUpdate() evaluates the clock register settings and calculates
mbed_official 324:406fd2029f23 359 * the current core clock.
mbed_official 324:406fd2029f23 360 */
mbed_official 324:406fd2029f23 361 void SystemCoreClockUpdate (void);
mbed_official 324:406fd2029f23 362
mbed_official 324:406fd2029f23 363 #ifdef __cplusplus
mbed_official 324:406fd2029f23 364 }
mbed_official 324:406fd2029f23 365 #endif
mbed_official 324:406fd2029f23 366
mbed_official 324:406fd2029f23 367 #endif /* #if !defined(SYSTEM_MK22F51212_H_) */