Hugo Zijlmans
/
BLDC
LPC1768.h@1:2c52307d223f, 2010-12-02 (annotated)
- Committer:
- hugozijlmans
- Date:
- Thu Dec 02 12:32:18 2010 +0000
- Revision:
- 1:2c52307d223f
- Child:
- 2:f034e862af1f
Added RIT & Timer0 interrupt routines
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
hugozijlmans | 1:2c52307d223f | 1 | #ifndef __LPC1768_h |
hugozijlmans | 1:2c52307d223f | 2 | #define __LPC1768_h |
hugozijlmans | 1:2c52307d223f | 3 | |
hugozijlmans | 1:2c52307d223f | 4 | // Define the register names that haven't been defined |
hugozijlmans | 1:2c52307d223f | 5 | |
hugozijlmans | 1:2c52307d223f | 6 | // MCPWM |
hugozijlmans | 1:2c52307d223f | 7 | #define MCLIM0 LPC_MCPWM->MCPER0 |
hugozijlmans | 1:2c52307d223f | 8 | #define MCLIM1 LPC_MCPWM->MCPER1 |
hugozijlmans | 1:2c52307d223f | 9 | #define MCLIM2 LPC_MCPWM->MCPER2 |
hugozijlmans | 1:2c52307d223f | 10 | |
hugozijlmans | 1:2c52307d223f | 11 | // Perhiperal clock select |
hugozijlmans | 1:2c52307d223f | 12 | #define PCLKSEL0 LPC_SC->PCLKSEL0 |
hugozijlmans | 1:2c52307d223f | 13 | #define PCLK_TIMER0_1 1 << 3 |
hugozijlmans | 1:2c52307d223f | 14 | #define PCLK_TIMER0_0 1 << 2 |
hugozijlmans | 1:2c52307d223f | 15 | #define PCLKSEL1 LPC_SC->PCLKSEL1 |
hugozijlmans | 1:2c52307d223f | 16 | #define PCLK_RIT_1 1 << 27 |
hugozijlmans | 1:2c52307d223f | 17 | #define PCLK_RIT_0 1 << 26 |
hugozijlmans | 1:2c52307d223f | 18 | |
hugozijlmans | 1:2c52307d223f | 19 | // Perhiperal power control |
hugozijlmans | 1:2c52307d223f | 20 | #define PCONP LPC_SC->PCONP |
hugozijlmans | 1:2c52307d223f | 21 | #define PCTIM0 1 << 1 |
hugozijlmans | 1:2c52307d223f | 22 | #define PCTIM1 1 << 2 |
hugozijlmans | 1:2c52307d223f | 23 | #define PCRIT 1 << 16 |
hugozijlmans | 1:2c52307d223f | 24 | |
hugozijlmans | 1:2c52307d223f | 25 | // CLKOUT |
hugozijlmans | 1:2c52307d223f | 26 | #define CLKSRCSEL LPC_SC->CLKSRCSEL |
hugozijlmans | 1:2c52307d223f | 27 | #define CCLKCFG LPC_SC->CCLKCFG |
hugozijlmans | 1:2c52307d223f | 28 | |
hugozijlmans | 1:2c52307d223f | 29 | // FI0 |
hugozijlmans | 1:2c52307d223f | 30 | #define FIOSET LPC_GPIO1->FIOSET |
hugozijlmans | 1:2c52307d223f | 31 | #define FIOCLR LPC_GPIO1->FIOCLR |
hugozijlmans | 1:2c52307d223f | 32 | #define FIOPIN LPC_GPIO1->FIOPIN |
hugozijlmans | 1:2c52307d223f | 33 | #define FIODIR LPC_GPIO1->FIODIR |
hugozijlmans | 1:2c52307d223f | 34 | |
hugozijlmans | 1:2c52307d223f | 35 | // PLL0 |
hugozijlmans | 1:2c52307d223f | 36 | #define PLL0FEED LPC_SC->PLL0FEED |
hugozijlmans | 1:2c52307d223f | 37 | #define PLL0STAT LPC_SC->PLL0STAT |
hugozijlmans | 1:2c52307d223f | 38 | #define PLL0CFG LPC_SC->PLL0CFG |
hugozijlmans | 1:2c52307d223f | 39 | #define PLL0CON LPC_SC->PLL0CON |
hugozijlmans | 1:2c52307d223f | 40 | |
hugozijlmans | 1:2c52307d223f | 41 | // Timer0 |
hugozijlmans | 1:2c52307d223f | 42 | #define T0MR0 LPC_TIM0->MR0 |
hugozijlmans | 1:2c52307d223f | 43 | #define T0PR LPC_TIM0->PR |
hugozijlmans | 1:2c52307d223f | 44 | #define T0TCR LPC_TIM0->TCR |
hugozijlmans | 1:2c52307d223f | 45 | #define T0CTCR LPC_TIM0->CTCR |
hugozijlmans | 1:2c52307d223f | 46 | #define T0MCR LPC_TIM0->MCR |
hugozijlmans | 1:2c52307d223f | 47 | #define T0IR LPC_TIM0->IR |
hugozijlmans | 1:2c52307d223f | 48 | #define T0IR_MR0 1 << 0 |
hugozijlmans | 1:2c52307d223f | 49 | #define T0IR_MR1 1 << 1 |
hugozijlmans | 1:2c52307d223f | 50 | #define T0IR_MR2 1 << 2 |
hugozijlmans | 1:2c52307d223f | 51 | #define T0IR_MR3 1 << 3 |
hugozijlmans | 1:2c52307d223f | 52 | #define T0IR_CR0 1 << 4 |
hugozijlmans | 1:2c52307d223f | 53 | #define T0IR_CR1 1 << 5 |
hugozijlmans | 1:2c52307d223f | 54 | |
hugozijlmans | 1:2c52307d223f | 55 | // RIT |
hugozijlmans | 1:2c52307d223f | 56 | |
hugozijlmans | 1:2c52307d223f | 57 | #define RICOMPVAL LPC_RIT->RICOMPVAL |
hugozijlmans | 1:2c52307d223f | 58 | #define RICTRL LPC_RIT->RICTRL |
hugozijlmans | 1:2c52307d223f | 59 | #define RITINT 1 << 0 |
hugozijlmans | 1:2c52307d223f | 60 | #define RITENCLR 1 << 1 |
hugozijlmans | 1:2c52307d223f | 61 | #define RITENBR 1 << 2 |
hugozijlmans | 1:2c52307d223f | 62 | #define RITEN 1 << 3 |
hugozijlmans | 1:2c52307d223f | 63 | |
hugozijlmans | 1:2c52307d223f | 64 | extern void PLL0_init(void); |
hugozijlmans | 1:2c52307d223f | 65 | extern void PLL0_disconnect(void); |
hugozijlmans | 1:2c52307d223f | 66 | extern void PLL0_connect(void); |
hugozijlmans | 1:2c52307d223f | 67 | extern void PLL0_disable(void); |
hugozijlmans | 1:2c52307d223f | 68 | extern void PLL0_enable(void); |
hugozijlmans | 1:2c52307d223f | 69 | extern void LED_init(void); |
hugozijlmans | 1:2c52307d223f | 70 | |
hugozijlmans | 1:2c52307d223f | 71 | #endif |