mbed-F401 - mbed library with additional peripherals for ST F…

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Peter Drescher / mbed-F401

mbed library with additional peripherals for ST F401 board

Fork of mbed-src by mbed official

This mbed LIB has additional peripherals for ST F401 board

UART2 : PA_3 rx, PA_2 tx
UART3 : PC_7 rx, PC_6 tx
I2C2 : PB_3 SDA, PB_10 SCL
I2C3 : PB_4 SDA, PA_8 SCL

targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_tim.c@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:: mbed_official
Date:: Wed Feb 26 09:45:12 2014 +0000
Revision:: 106:ced8cbb51063
Parent:: 80:66393a7b209d

Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	76:aeb1df146756	1	/**
mbed_official	76:aeb1df146756	2	******************************************************************************
mbed_official	76:aeb1df146756	3	* @file stm32l1xx_tim.c
mbed_official	76:aeb1df146756	4	* @author MCD Application Team
mbed_official	80:66393a7b209d	5	* @version V1.3.0
mbed_official	80:66393a7b209d	6	* @date 31-January-2014
mbed_official	76:aeb1df146756	7	* @brief This file provides firmware functions to manage the following
mbed_official	76:aeb1df146756	8	* functionalities of the TIM peripheral:
mbed_official	76:aeb1df146756	9	* + TimeBase management
mbed_official	76:aeb1df146756	10	* + Output Compare management
mbed_official	76:aeb1df146756	11	* + Input Capture management
mbed_official	76:aeb1df146756	12	* + Interrupts, DMA and flags management
mbed_official	76:aeb1df146756	13	* + Clocks management
mbed_official	76:aeb1df146756	14	* + Synchronization management
mbed_official	76:aeb1df146756	15	* + Specific interface management
mbed_official	76:aeb1df146756	16	* + Specific remapping management
mbed_official	76:aeb1df146756	17	*
mbed_official	76:aeb1df146756	18	* @verbatim
mbed_official	76:aeb1df146756	19
mbed_official	76:aeb1df146756	20	===============================================================================
mbed_official	76:aeb1df146756	21	##### How to use this driver #####
mbed_official	76:aeb1df146756	22	===============================================================================
mbed_official	76:aeb1df146756	23	[..] This driver provides functions to configure and program the TIM
mbed_official	76:aeb1df146756	24	of all STM32L1xx devices These functions are split in 8 groups:
mbed_official	76:aeb1df146756	25	(#) TIM TimeBase management: this group includes all needed functions
mbed_official	76:aeb1df146756	26	to configure the TM Timebase unit:
mbed_official	76:aeb1df146756	27	(++) Set/Get Prescaler.
mbed_official	76:aeb1df146756	28	(++) Set/Get Autoreload.
mbed_official	76:aeb1df146756	29	(++) Counter modes configuration.
mbed_official	76:aeb1df146756	30	(++) Set Clock division.
mbed_official	76:aeb1df146756	31	(++) Select the One Pulse mode.
mbed_official	76:aeb1df146756	32	(++) Update Request Configuration.
mbed_official	76:aeb1df146756	33	(++) Update Disable Configuration.
mbed_official	76:aeb1df146756	34	(++) Auto-Preload Configuration.
mbed_official	76:aeb1df146756	35	(++) Enable/Disable the counter.
mbed_official	76:aeb1df146756	36
mbed_official	76:aeb1df146756	37	(#) TIM Output Compare management: this group includes all needed
mbed_official	76:aeb1df146756	38	functions to configure the Capture/Compare unit used in Output
mbed_official	76:aeb1df146756	39	compare mode:
mbed_official	76:aeb1df146756	40	(++) Configure each channel, independently, in Output Compare mode.
mbed_official	76:aeb1df146756	41	(++) Select the output compare modes.
mbed_official	76:aeb1df146756	42	(++) Select the Polarities of each channel.
mbed_official	76:aeb1df146756	43	(++) Set/Get the Capture/Compare register values.
mbed_official	76:aeb1df146756	44	(++) Select the Output Compare Fast mode.
mbed_official	76:aeb1df146756	45	(++) Select the Output Compare Forced mode.
mbed_official	76:aeb1df146756	46	(++) Output Compare-Preload Configuration.
mbed_official	76:aeb1df146756	47	(++) Clear Output Compare Reference.
mbed_official	76:aeb1df146756	48	(++) Select the OCREF Clear signal.
mbed_official	76:aeb1df146756	49	(++) Enable/Disable the Capture/Compare Channels.
mbed_official	76:aeb1df146756	50
mbed_official	76:aeb1df146756	51	(#) TIM Input Capture management: this group includes all needed
mbed_official	76:aeb1df146756	52	functions to configure the Capture/Compare unit used in
mbed_official	76:aeb1df146756	53	Input Capture mode:
mbed_official	76:aeb1df146756	54	(++) Configure each channel in input capture mode.
mbed_official	76:aeb1df146756	55	(++) Configure Channel1/2 in PWM Input mode.
mbed_official	76:aeb1df146756	56	(++) Set the Input Capture Prescaler.
mbed_official	76:aeb1df146756	57	(++) Get the Capture/Compare values.
mbed_official	76:aeb1df146756	58
mbed_official	76:aeb1df146756	59	(#) TIM interrupts, DMA and flags management.
mbed_official	76:aeb1df146756	60	(++) Enable/Disable interrupt sources.
mbed_official	76:aeb1df146756	61	(++) Get flags status.
mbed_official	76:aeb1df146756	62	(++) Clear flags/ Pending bits.
mbed_official	76:aeb1df146756	63	(++) Enable/Disable DMA requests.
mbed_official	76:aeb1df146756	64	(++) Configure DMA burst mode.
mbed_official	76:aeb1df146756	65	(++) Select CaptureCompare DMA request.
mbed_official	76:aeb1df146756	66
mbed_official	76:aeb1df146756	67	(#) TIM clocks management: this group includes all needed functions
mbed_official	76:aeb1df146756	68	to configure the clock controller unit:
mbed_official	76:aeb1df146756	69	(++) Select internal/External clock.
mbed_official	76:aeb1df146756	70	(++) Select the external clock mode: ETR(Mode1/Mode2), TIx or ITRx.
mbed_official	76:aeb1df146756	71
mbed_official	76:aeb1df146756	72	(#) TIM synchronization management: this group includes all needed.
mbed_official	76:aeb1df146756	73	functions to configure the Synchronization unit:
mbed_official	76:aeb1df146756	74	(++) Select Input Trigger.
mbed_official	76:aeb1df146756	75	(++) Select Output Trigger.
mbed_official	76:aeb1df146756	76	(++) Select Master Slave Mode.
mbed_official	76:aeb1df146756	77	(++) ETR Configuration when used as external trigger.
mbed_official	76:aeb1df146756	78
mbed_official	76:aeb1df146756	79	(#) TIM specific interface management, this group includes all
mbed_official	76:aeb1df146756	80	needed functions to use the specific TIM interface:
mbed_official	76:aeb1df146756	81	(++) Encoder Interface Configuration.
mbed_official	76:aeb1df146756	82	(++) Select Hall Sensor.
mbed_official	76:aeb1df146756	83
mbed_official	76:aeb1df146756	84	(#) TIM specific remapping management includes the Remapping
mbed_official	76:aeb1df146756	85	configuration of specific timers
mbed_official	76:aeb1df146756	86
mbed_official	76:aeb1df146756	87	@endverbatim
mbed_official	76:aeb1df146756	88
mbed_official	76:aeb1df146756	89	******************************************************************************
mbed_official	76:aeb1df146756	90	* @attention
mbed_official	76:aeb1df146756	91	*
mbed_official	106:ced8cbb51063	92	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	76:aeb1df146756	93	*
mbed_official	106:ced8cbb51063	94	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	106:ced8cbb51063	95	* are permitted provided that the following conditions are met:
mbed_official	106:ced8cbb51063	96	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	106:ced8cbb51063	97	* this list of conditions and the following disclaimer.
mbed_official	106:ced8cbb51063	98	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	106:ced8cbb51063	99	* this list of conditions and the following disclaimer in the documentation
mbed_official	106:ced8cbb51063	100	* and/or other materials provided with the distribution.
mbed_official	106:ced8cbb51063	101	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	106:ced8cbb51063	102	* may be used to endorse or promote products derived from this software
mbed_official	106:ced8cbb51063	103	* without specific prior written permission.
mbed_official	76:aeb1df146756	104	*
mbed_official	106:ced8cbb51063	105	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	106:ced8cbb51063	106	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	106:ced8cbb51063	107	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	106:ced8cbb51063	108	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	106:ced8cbb51063	109	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	106:ced8cbb51063	110	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	106:ced8cbb51063	111	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	106:ced8cbb51063	112	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	106:ced8cbb51063	113	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	106:ced8cbb51063	114	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	76:aeb1df146756	115	*
mbed_official	76:aeb1df146756	116	******************************************************************************
mbed_official	76:aeb1df146756	117	*/
mbed_official	76:aeb1df146756	118
mbed_official	76:aeb1df146756	119	/* Includes ------------------------------------------------------------------*/
mbed_official	76:aeb1df146756	120	#include "stm32l1xx_tim.h"
mbed_official	76:aeb1df146756	121	#include "stm32l1xx_rcc.h"
mbed_official	76:aeb1df146756	122
mbed_official	76:aeb1df146756	123	/** @addtogroup STM32L1xx_StdPeriph_Driver
mbed_official	76:aeb1df146756	124	* @{
mbed_official	76:aeb1df146756	125	*/
mbed_official	76:aeb1df146756	126
mbed_official	76:aeb1df146756	127	/** @defgroup TIM
mbed_official	76:aeb1df146756	128	* @brief TIM driver modules
mbed_official	76:aeb1df146756	129	* @{
mbed_official	76:aeb1df146756	130	*/
mbed_official	76:aeb1df146756	131
mbed_official	76:aeb1df146756	132	/* Private typedef -----------------------------------------------------------*/
mbed_official	76:aeb1df146756	133	/* Private define ------------------------------------------------------------*/
mbed_official	76:aeb1df146756	134
mbed_official	76:aeb1df146756	135	/* ---------------------- TIM registers bit mask ------------------------ */
mbed_official	76:aeb1df146756	136	#define SMCR_ETR_MASK ((uint16_t)0x00FF)
mbed_official	76:aeb1df146756	137	#define CCMR_OFFSET ((uint16_t)0x0018)
mbed_official	76:aeb1df146756	138	#define CCER_CCE_SET ((uint16_t)0x0001)
mbed_official	76:aeb1df146756	139
mbed_official	76:aeb1df146756	140	/* Private macro -------------------------------------------------------------*/
mbed_official	76:aeb1df146756	141	/* Private variables ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	142	/* Private function prototypes -----------------------------------------------*/
mbed_official	76:aeb1df146756	143
mbed_official	76:aeb1df146756	144	static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	145	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	146	static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	147	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	148	static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	149	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	150	static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	151	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	152	/* Private functions ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	153
mbed_official	76:aeb1df146756	154	/** @defgroup TIM_Private_Functions
mbed_official	76:aeb1df146756	155	* @{
mbed_official	76:aeb1df146756	156	*/
mbed_official	76:aeb1df146756	157
mbed_official	76:aeb1df146756	158	/** @defgroup TIM_Group1 TimeBase management functions
mbed_official	76:aeb1df146756	159	* @brief TimeBase management functions
mbed_official	76:aeb1df146756	160	*
mbed_official	76:aeb1df146756	161	@verbatim
mbed_official	76:aeb1df146756	162	===============================================================================
mbed_official	76:aeb1df146756	163	##### TimeBase management functions #####
mbed_official	76:aeb1df146756	164	===============================================================================
mbed_official	76:aeb1df146756	165
mbed_official	76:aeb1df146756	166	* TIM Driver: how to use it in Timing(Time base) Mode *
mbed_official	76:aeb1df146756	167	===============================================================================
mbed_official	76:aeb1df146756	168	[..] To use the Timer in Timing(Time base) mode, the following steps are
mbed_official	76:aeb1df146756	169	mandatory:
mbed_official	76:aeb1df146756	170	(#) Enable TIM clock using
mbed_official	76:aeb1df146756	171	RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official	76:aeb1df146756	172	(#) Fill the TIM_TimeBaseInitStruct with the desired parameters.
mbed_official	76:aeb1df146756	173	(#) Call TIM_TimeBaseInit(TIMx, &TIM_TimeBaseInitStruct) to configure
mbed_official	76:aeb1df146756	174	the Time Base unit with the corresponding configuration.
mbed_official	76:aeb1df146756	175	(#) Enable the NVIC if you need to generate the update interrupt.
mbed_official	76:aeb1df146756	176	(#) Enable the corresponding interrupt using the function
mbed_official	76:aeb1df146756	177	TIM_ITConfig(TIMx, TIM_IT_Update).
mbed_official	76:aeb1df146756	178	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	179	[..]
mbed_official	76:aeb1df146756	180	(@) All other functions can be used seperatly to modify, if needed,
mbed_official	76:aeb1df146756	181	a specific feature of the Timer.
mbed_official	76:aeb1df146756	182
mbed_official	76:aeb1df146756	183	@endverbatim
mbed_official	76:aeb1df146756	184	* @{
mbed_official	76:aeb1df146756	185	*/
mbed_official	76:aeb1df146756	186
mbed_official	76:aeb1df146756	187	/**
mbed_official	76:aeb1df146756	188	* @brief Deinitializes the TIMx peripheral registers to their default reset values.
mbed_official	76:aeb1df146756	189	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	190	* @retval None
mbed_official	76:aeb1df146756	191	*
mbed_official	76:aeb1df146756	192	*/
mbed_official	76:aeb1df146756	193	void TIM_DeInit(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	194	{
mbed_official	76:aeb1df146756	195	/* Check the parameters */
mbed_official	76:aeb1df146756	196	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	197
mbed_official	76:aeb1df146756	198	if (TIMx == TIM2)
mbed_official	76:aeb1df146756	199	{
mbed_official	76:aeb1df146756	200	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
mbed_official	76:aeb1df146756	201	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
mbed_official	76:aeb1df146756	202	}
mbed_official	76:aeb1df146756	203	else if (TIMx == TIM3)
mbed_official	76:aeb1df146756	204	{
mbed_official	76:aeb1df146756	205	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
mbed_official	76:aeb1df146756	206	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
mbed_official	76:aeb1df146756	207	}
mbed_official	76:aeb1df146756	208	else if (TIMx == TIM4)
mbed_official	76:aeb1df146756	209	{
mbed_official	76:aeb1df146756	210	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, ENABLE);
mbed_official	76:aeb1df146756	211	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM4, DISABLE);
mbed_official	76:aeb1df146756	212	}
mbed_official	76:aeb1df146756	213	else if (TIMx == TIM5)
mbed_official	76:aeb1df146756	214	{
mbed_official	76:aeb1df146756	215	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, ENABLE);
mbed_official	76:aeb1df146756	216	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM5, DISABLE);
mbed_official	76:aeb1df146756	217	}
mbed_official	76:aeb1df146756	218	else if (TIMx == TIM6)
mbed_official	76:aeb1df146756	219	{
mbed_official	76:aeb1df146756	220	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE);
mbed_official	76:aeb1df146756	221	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE);
mbed_official	76:aeb1df146756	222	}
mbed_official	76:aeb1df146756	223	else if (TIMx == TIM7)
mbed_official	76:aeb1df146756	224	{
mbed_official	76:aeb1df146756	225	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE);
mbed_official	76:aeb1df146756	226	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE);
mbed_official	76:aeb1df146756	227	}
mbed_official	76:aeb1df146756	228
mbed_official	76:aeb1df146756	229	else if (TIMx == TIM9)
mbed_official	76:aeb1df146756	230	{
mbed_official	76:aeb1df146756	231	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, ENABLE);
mbed_official	76:aeb1df146756	232	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM9, DISABLE);
mbed_official	76:aeb1df146756	233	}
mbed_official	76:aeb1df146756	234	else if (TIMx == TIM10)
mbed_official	76:aeb1df146756	235	{
mbed_official	76:aeb1df146756	236	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, ENABLE);
mbed_official	76:aeb1df146756	237	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM10, DISABLE);
mbed_official	76:aeb1df146756	238	}
mbed_official	76:aeb1df146756	239	else
mbed_official	76:aeb1df146756	240	{
mbed_official	76:aeb1df146756	241	if (TIMx == TIM11)
mbed_official	76:aeb1df146756	242	{
mbed_official	76:aeb1df146756	243	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, ENABLE);
mbed_official	76:aeb1df146756	244	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM11, DISABLE);
mbed_official	76:aeb1df146756	245	}
mbed_official	76:aeb1df146756	246	}
mbed_official	76:aeb1df146756	247
mbed_official	76:aeb1df146756	248	}
mbed_official	76:aeb1df146756	249
mbed_official	76:aeb1df146756	250	/**
mbed_official	76:aeb1df146756	251	* @brief Initializes the TIMx Time Base Unit peripheral according to
mbed_official	76:aeb1df146756	252	* the specified parameters in the TIM_TimeBaseInitStruct.
mbed_official	76:aeb1df146756	253	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	254	* @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
mbed_official	76:aeb1df146756	255	* structure that contains the configuration information for
mbed_official	76:aeb1df146756	256	* the specified TIM peripheral.
mbed_official	76:aeb1df146756	257	* @retval None
mbed_official	76:aeb1df146756	258	*/
mbed_official	76:aeb1df146756	259	void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official	76:aeb1df146756	260	{
mbed_official	76:aeb1df146756	261	uint16_t tmpcr1 = 0;
mbed_official	76:aeb1df146756	262
mbed_official	76:aeb1df146756	263	/* Check the parameters */
mbed_official	76:aeb1df146756	264	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	265	assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
mbed_official	76:aeb1df146756	266	assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
mbed_official	76:aeb1df146756	267
mbed_official	76:aeb1df146756	268	tmpcr1 = TIMx->CR1;
mbed_official	76:aeb1df146756	269
mbed_official	76:aeb1df146756	270	if(((TIMx) == TIM2) \|\| ((TIMx) == TIM3) \|\| ((TIMx) == TIM4) \|\| ((TIMx) == TIM5))
mbed_official	76:aeb1df146756	271	{
mbed_official	76:aeb1df146756	272	/* Select the Counter Mode */
mbed_official	76:aeb1df146756	273	tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR \| TIM_CR1_CMS)));
mbed_official	76:aeb1df146756	274	tmpcr1 \|= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode;
mbed_official	76:aeb1df146756	275	}
mbed_official	76:aeb1df146756	276
mbed_official	76:aeb1df146756	277	if(((TIMx) != TIM6) && ((TIMx) != TIM7))
mbed_official	76:aeb1df146756	278	{
mbed_official	76:aeb1df146756	279	/* Set the clock division */
mbed_official	76:aeb1df146756	280	tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD));
mbed_official	76:aeb1df146756	281	tmpcr1 \|= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision;
mbed_official	76:aeb1df146756	282	}
mbed_official	76:aeb1df146756	283
mbed_official	76:aeb1df146756	284	TIMx->CR1 = tmpcr1;
mbed_official	76:aeb1df146756	285
mbed_official	76:aeb1df146756	286	/* Set the Autoreload value */
mbed_official	76:aeb1df146756	287	TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;
mbed_official	76:aeb1df146756	288
mbed_official	76:aeb1df146756	289	/* Set the Prescaler value */
mbed_official	76:aeb1df146756	290	TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
mbed_official	76:aeb1df146756	291
mbed_official	76:aeb1df146756	292	/* Generate an update event to reload the Prescaler value immediatly */
mbed_official	76:aeb1df146756	293	TIMx->EGR = TIM_PSCReloadMode_Immediate;
mbed_official	76:aeb1df146756	294	}
mbed_official	76:aeb1df146756	295
mbed_official	76:aeb1df146756	296	/**
mbed_official	76:aeb1df146756	297	* @brief Fills each TIM_TimeBaseInitStruct member with its default value.
mbed_official	76:aeb1df146756	298	* @param TIM_TimeBaseInitStruct : pointer to a TIM_TimeBaseInitTypeDef
mbed_official	76:aeb1df146756	299	* structure which will be initialized.
mbed_official	76:aeb1df146756	300	* @retval None
mbed_official	76:aeb1df146756	301	*/
mbed_official	76:aeb1df146756	302	void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official	76:aeb1df146756	303	{
mbed_official	76:aeb1df146756	304	/* Set the default configuration */
mbed_official	76:aeb1df146756	305	TIM_TimeBaseInitStruct->TIM_Period = 0xFFFFFFFF;
mbed_official	76:aeb1df146756	306	TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
mbed_official	76:aeb1df146756	307	TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
mbed_official	76:aeb1df146756	308	TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
mbed_official	76:aeb1df146756	309	}
mbed_official	76:aeb1df146756	310
mbed_official	76:aeb1df146756	311	/**
mbed_official	76:aeb1df146756	312	* @brief Configures the TIMx Prescaler.
mbed_official	76:aeb1df146756	313	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	314	* @param Prescaler: specifies the Prescaler Register value.
mbed_official	76:aeb1df146756	315	* @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode
mbed_official	76:aeb1df146756	316	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	317	* @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event.
mbed_official	76:aeb1df146756	318	* @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediatly.
mbed_official	76:aeb1df146756	319	* @retval None
mbed_official	76:aeb1df146756	320	*/
mbed_official	76:aeb1df146756	321	void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode)
mbed_official	76:aeb1df146756	322	{
mbed_official	76:aeb1df146756	323	/* Check the parameters */
mbed_official	76:aeb1df146756	324	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	325	assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode));
mbed_official	76:aeb1df146756	326
mbed_official	76:aeb1df146756	327	/* Set the Prescaler value */
mbed_official	76:aeb1df146756	328	TIMx->PSC = Prescaler;
mbed_official	76:aeb1df146756	329	/* Set or reset the UG Bit */
mbed_official	76:aeb1df146756	330	TIMx->EGR = TIM_PSCReloadMode;
mbed_official	76:aeb1df146756	331	}
mbed_official	76:aeb1df146756	332
mbed_official	76:aeb1df146756	333	/**
mbed_official	76:aeb1df146756	334	* @brief Specifies the TIMx Counter Mode to be used.
mbed_official	76:aeb1df146756	335	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	336	* @param TIM_CounterMode: specifies the Counter Mode to be used
mbed_official	76:aeb1df146756	337	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	338	* @arg TIM_CounterMode_Up: TIM Up Counting Mode.
mbed_official	76:aeb1df146756	339	* @arg TIM_CounterMode_Down: TIM Down Counting Mode.
mbed_official	76:aeb1df146756	340	* @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1.
mbed_official	76:aeb1df146756	341	* @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2.
mbed_official	76:aeb1df146756	342	* @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3.
mbed_official	76:aeb1df146756	343	* @retval None
mbed_official	76:aeb1df146756	344	*/
mbed_official	76:aeb1df146756	345	void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode)
mbed_official	76:aeb1df146756	346	{
mbed_official	76:aeb1df146756	347	uint16_t tmpcr1 = 0;
mbed_official	76:aeb1df146756	348
mbed_official	76:aeb1df146756	349	/* Check the parameters */
mbed_official	76:aeb1df146756	350	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	351	assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode));
mbed_official	76:aeb1df146756	352
mbed_official	76:aeb1df146756	353	tmpcr1 = TIMx->CR1;
mbed_official	76:aeb1df146756	354	/* Reset the CMS and DIR Bits */
mbed_official	76:aeb1df146756	355	tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR \| TIM_CR1_CMS)));
mbed_official	76:aeb1df146756	356	/* Set the Counter Mode */
mbed_official	76:aeb1df146756	357	tmpcr1 \|= TIM_CounterMode;
mbed_official	76:aeb1df146756	358	/* Write to TIMx CR1 register */
mbed_official	76:aeb1df146756	359	TIMx->CR1 = tmpcr1;
mbed_official	76:aeb1df146756	360	}
mbed_official	76:aeb1df146756	361
mbed_official	76:aeb1df146756	362	/**
mbed_official	76:aeb1df146756	363	* @brief Sets the TIMx Counter Register value
mbed_official	76:aeb1df146756	364	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	365	* @param Counter: specifies the Counter register new value.
mbed_official	76:aeb1df146756	366	* @retval None
mbed_official	76:aeb1df146756	367	*/
mbed_official	76:aeb1df146756	368	void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter)
mbed_official	76:aeb1df146756	369	{
mbed_official	76:aeb1df146756	370	/* Check the parameters */
mbed_official	76:aeb1df146756	371	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	372
mbed_official	76:aeb1df146756	373	/* Set the Counter Register value */
mbed_official	76:aeb1df146756	374	TIMx->CNT = Counter;
mbed_official	76:aeb1df146756	375	}
mbed_official	76:aeb1df146756	376
mbed_official	76:aeb1df146756	377	/**
mbed_official	76:aeb1df146756	378	* @brief Sets the TIMx Autoreload Register value
mbed_official	76:aeb1df146756	379	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	380	* @param Autoreload: specifies the Autoreload register new value.
mbed_official	76:aeb1df146756	381	* @retval None
mbed_official	76:aeb1df146756	382	*/
mbed_official	76:aeb1df146756	383	void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload)
mbed_official	76:aeb1df146756	384	{
mbed_official	76:aeb1df146756	385	/* Check the parameters */
mbed_official	76:aeb1df146756	386	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	387
mbed_official	76:aeb1df146756	388	/* Set the Autoreload Register value */
mbed_official	76:aeb1df146756	389	TIMx->ARR = Autoreload;
mbed_official	76:aeb1df146756	390	}
mbed_official	76:aeb1df146756	391
mbed_official	76:aeb1df146756	392	/**
mbed_official	76:aeb1df146756	393	* @brief Gets the TIMx Counter value.
mbed_official	76:aeb1df146756	394	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	395	* @retval Counter Register value.
mbed_official	76:aeb1df146756	396	*/
mbed_official	76:aeb1df146756	397	uint32_t TIM_GetCounter(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	398	{
mbed_official	76:aeb1df146756	399	/* Check the parameters */
mbed_official	76:aeb1df146756	400	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	401
mbed_official	76:aeb1df146756	402	/* Get the Counter Register value */
mbed_official	76:aeb1df146756	403	return TIMx->CNT;
mbed_official	76:aeb1df146756	404	}
mbed_official	76:aeb1df146756	405
mbed_official	76:aeb1df146756	406	/**
mbed_official	76:aeb1df146756	407	* @brief Gets the TIMx Prescaler value.
mbed_official	76:aeb1df146756	408	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	409	* @retval Prescaler Register value.
mbed_official	76:aeb1df146756	410	*/
mbed_official	76:aeb1df146756	411	uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	412	{
mbed_official	76:aeb1df146756	413	/* Check the parameters */
mbed_official	76:aeb1df146756	414	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	415
mbed_official	76:aeb1df146756	416	/* Get the Prescaler Register value */
mbed_official	76:aeb1df146756	417	return TIMx->PSC;
mbed_official	76:aeb1df146756	418	}
mbed_official	76:aeb1df146756	419
mbed_official	76:aeb1df146756	420	/**
mbed_official	76:aeb1df146756	421	* @brief Enables or Disables the TIMx Update event.
mbed_official	76:aeb1df146756	422	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	423	* @param NewState: new state of the TIMx UDIS bit
mbed_official	76:aeb1df146756	424	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	425	* @retval None
mbed_official	76:aeb1df146756	426	*/
mbed_official	76:aeb1df146756	427	void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	428	{
mbed_official	76:aeb1df146756	429	/* Check the parameters */
mbed_official	76:aeb1df146756	430	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	431	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	432
mbed_official	76:aeb1df146756	433	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	434	{
mbed_official	76:aeb1df146756	435	/* Set the Update Disable Bit */
mbed_official	76:aeb1df146756	436	TIMx->CR1 \|= TIM_CR1_UDIS;
mbed_official	76:aeb1df146756	437	}
mbed_official	76:aeb1df146756	438	else
mbed_official	76:aeb1df146756	439	{
mbed_official	76:aeb1df146756	440	/* Reset the Update Disable Bit */
mbed_official	76:aeb1df146756	441	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_UDIS);
mbed_official	76:aeb1df146756	442	}
mbed_official	76:aeb1df146756	443	}
mbed_official	76:aeb1df146756	444
mbed_official	76:aeb1df146756	445	/**
mbed_official	76:aeb1df146756	446	* @brief Configures the TIMx Update Request Interrupt source.
mbed_official	76:aeb1df146756	447	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	448	* @param TIM_UpdateSource: specifies the Update source.
mbed_official	76:aeb1df146756	449	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	450	* @arg TIM_UpdateSource_Global: Source of update is the counter overflow/underflow
mbed_official	76:aeb1df146756	451	or the setting of UG bit, or an update generation
mbed_official	76:aeb1df146756	452	through the slave mode controller.
mbed_official	76:aeb1df146756	453	* @arg TIM_UpdateSource_Regular: Source of update is counter overflow/underflow.
mbed_official	76:aeb1df146756	454	* @retval None
mbed_official	76:aeb1df146756	455	*/
mbed_official	76:aeb1df146756	456	void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource)
mbed_official	76:aeb1df146756	457	{
mbed_official	76:aeb1df146756	458	/* Check the parameters */
mbed_official	76:aeb1df146756	459	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	460	assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource));
mbed_official	76:aeb1df146756	461
mbed_official	76:aeb1df146756	462	if (TIM_UpdateSource != TIM_UpdateSource_Global)
mbed_official	76:aeb1df146756	463	{
mbed_official	76:aeb1df146756	464	/* Set the URS Bit */
mbed_official	76:aeb1df146756	465	TIMx->CR1 \|= TIM_CR1_URS;
mbed_official	76:aeb1df146756	466	}
mbed_official	76:aeb1df146756	467	else
mbed_official	76:aeb1df146756	468	{
mbed_official	76:aeb1df146756	469	/* Reset the URS Bit */
mbed_official	76:aeb1df146756	470	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_URS);
mbed_official	76:aeb1df146756	471	}
mbed_official	76:aeb1df146756	472	}
mbed_official	76:aeb1df146756	473
mbed_official	76:aeb1df146756	474	/**
mbed_official	76:aeb1df146756	475	* @brief Enables or disables TIMx peripheral Preload register on ARR.
mbed_official	76:aeb1df146756	476	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	477	* @param NewState: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	478	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	479	* @retval None
mbed_official	76:aeb1df146756	480	*/
mbed_official	76:aeb1df146756	481	void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	482	{
mbed_official	76:aeb1df146756	483	/* Check the parameters */
mbed_official	76:aeb1df146756	484	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	485	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	486
mbed_official	76:aeb1df146756	487	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	488	{
mbed_official	76:aeb1df146756	489	/* Set the ARR Preload Bit */
mbed_official	76:aeb1df146756	490	TIMx->CR1 \|= TIM_CR1_ARPE;
mbed_official	76:aeb1df146756	491	}
mbed_official	76:aeb1df146756	492	else
mbed_official	76:aeb1df146756	493	{
mbed_official	76:aeb1df146756	494	/* Reset the ARR Preload Bit */
mbed_official	76:aeb1df146756	495	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_ARPE);
mbed_official	76:aeb1df146756	496	}
mbed_official	76:aeb1df146756	497	}
mbed_official	76:aeb1df146756	498
mbed_official	76:aeb1df146756	499	/**
mbed_official	76:aeb1df146756	500	* @brief Selects the TIMx's One Pulse Mode.
mbed_official	76:aeb1df146756	501	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	502	* @param TIM_OPMode: specifies the OPM Mode to be used.
mbed_official	76:aeb1df146756	503	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	504	* @arg TIM_OPMode_Single:: TIM One Pulse Single Mode (Counter stops counting
mbed_official	76:aeb1df146756	505	* at the next update event (clearing the bit CEN)).
mbed_official	76:aeb1df146756	506	* @arg TIM_OPMode_Repetitive: TIM One Pulse Repetitive Mode
mbed_official	76:aeb1df146756	507	* (Counter is not stopped at update event).
mbed_official	76:aeb1df146756	508	* @retval None
mbed_official	76:aeb1df146756	509	*/
mbed_official	76:aeb1df146756	510	void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode)
mbed_official	76:aeb1df146756	511	{
mbed_official	76:aeb1df146756	512	/* Check the parameters */
mbed_official	76:aeb1df146756	513	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	514	assert_param(IS_TIM_OPM_MODE(TIM_OPMode));
mbed_official	76:aeb1df146756	515
mbed_official	76:aeb1df146756	516	/* Reset the OPM Bit */
mbed_official	76:aeb1df146756	517	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_OPM);
mbed_official	76:aeb1df146756	518	/* Configure the OPM Mode */
mbed_official	76:aeb1df146756	519	TIMx->CR1 \|= TIM_OPMode;
mbed_official	76:aeb1df146756	520	}
mbed_official	76:aeb1df146756	521
mbed_official	76:aeb1df146756	522	/**
mbed_official	76:aeb1df146756	523	* @brief Sets the TIMx Clock Division value.
mbed_official	76:aeb1df146756	524	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	525	* @param TIM_CKD: specifies the clock division value.
mbed_official	76:aeb1df146756	526	* This parameter can be one of the following value:
mbed_official	76:aeb1df146756	527	* @arg TIM_CKD_DIV1: TDTS = Tck_tim.
mbed_official	76:aeb1df146756	528	* @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim.
mbed_official	76:aeb1df146756	529	* @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim.
mbed_official	76:aeb1df146756	530	* @retval None
mbed_official	76:aeb1df146756	531	*/
mbed_official	76:aeb1df146756	532	void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD)
mbed_official	76:aeb1df146756	533	{
mbed_official	76:aeb1df146756	534	/* Check the parameters */
mbed_official	76:aeb1df146756	535	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	536	assert_param(IS_TIM_CKD_DIV(TIM_CKD));
mbed_official	76:aeb1df146756	537
mbed_official	76:aeb1df146756	538	/* Reset the CKD Bits */
mbed_official	76:aeb1df146756	539	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_CKD);
mbed_official	76:aeb1df146756	540	/* Set the CKD value */
mbed_official	76:aeb1df146756	541	TIMx->CR1 \|= TIM_CKD;
mbed_official	76:aeb1df146756	542	}
mbed_official	76:aeb1df146756	543
mbed_official	76:aeb1df146756	544	/**
mbed_official	76:aeb1df146756	545	* @brief Enables or disables the specified TIM peripheral.
mbed_official	76:aeb1df146756	546	* @param TIMx: where x can be 2 to 11 to select the TIMx peripheral.
mbed_official	76:aeb1df146756	547	* @param NewState: new state of the TIMx peripheral.
mbed_official	76:aeb1df146756	548	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	549	* @retval None
mbed_official	76:aeb1df146756	550	*/
mbed_official	76:aeb1df146756	551	void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	552	{
mbed_official	76:aeb1df146756	553	/* Check the parameters */
mbed_official	76:aeb1df146756	554	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	555	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	556
mbed_official	76:aeb1df146756	557	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	558	{
mbed_official	76:aeb1df146756	559	/* Enable the TIM Counter */
mbed_official	76:aeb1df146756	560	TIMx->CR1 \|= TIM_CR1_CEN;
mbed_official	76:aeb1df146756	561	}
mbed_official	76:aeb1df146756	562	else
mbed_official	76:aeb1df146756	563	{
mbed_official	76:aeb1df146756	564	/* Disable the TIM Counter */
mbed_official	76:aeb1df146756	565	TIMx->CR1 &= (uint16_t)(~((uint16_t)TIM_CR1_CEN));
mbed_official	76:aeb1df146756	566	}
mbed_official	76:aeb1df146756	567	}
mbed_official	76:aeb1df146756	568
mbed_official	76:aeb1df146756	569	/**
mbed_official	76:aeb1df146756	570	* @}
mbed_official	76:aeb1df146756	571	*/
mbed_official	76:aeb1df146756	572
mbed_official	76:aeb1df146756	573	/** @defgroup TIM_Group2 Output Compare management functions
mbed_official	76:aeb1df146756	574	* @brief Output Compare management functions
mbed_official	76:aeb1df146756	575	*
mbed_official	76:aeb1df146756	576	@verbatim
mbed_official	76:aeb1df146756	577	===============================================================================
mbed_official	76:aeb1df146756	578	##### Output Compare management functions #####
mbed_official	76:aeb1df146756	579	===============================================================================
mbed_official	76:aeb1df146756	580	* TIM Driver: how to use it in Output Compare Mode *
mbed_official	76:aeb1df146756	581	===============================================================================
mbed_official	76:aeb1df146756	582	[..] To use the Timer in Output Compare mode, the following steps are mandatory:
mbed_official	76:aeb1df146756	583	(#) Enable TIM clock using
mbed_official	76:aeb1df146756	584	RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official	76:aeb1df146756	585	(#) Configure the TIM pins by configuring the corresponding GPIO pins
mbed_official	76:aeb1df146756	586	(#) Configure the Time base unit as described in the first part of this
mbed_official	76:aeb1df146756	587	driver, if needed, else the Timer will run with the default
mbed_official	76:aeb1df146756	588	configuration:
mbed_official	76:aeb1df146756	589	(++) Autoreload value = 0xFFFF.
mbed_official	76:aeb1df146756	590	(++) Prescaler value = 0x0000.
mbed_official	76:aeb1df146756	591	(++) Counter mode = Up counting.
mbed_official	76:aeb1df146756	592	(++) Clock Division = TIM_CKD_DIV1.
mbed_official	76:aeb1df146756	593	(#) Fill the TIM_OCInitStruct with the desired parameters including:
mbed_official	76:aeb1df146756	594	(++) The TIM Output Compare mode: TIM_OCMode.
mbed_official	76:aeb1df146756	595	(++) TIM Output State: TIM_OutputState.
mbed_official	76:aeb1df146756	596	(++) TIM Pulse value: TIM_Pulse.
mbed_official	76:aeb1df146756	597	(++) TIM Output Compare Polarity : TIM_OCPolarity.
mbed_official	76:aeb1df146756	598	(#) Call TIM_OCxInit(TIMx, &TIM_OCInitStruct) to configure the desired
mbed_official	76:aeb1df146756	599	channel with the corresponding configuration.
mbed_official	76:aeb1df146756	600	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	601	[..]
mbed_official	76:aeb1df146756	602	(@) All other functions can be used separately to modify, if needed,
mbed_official	76:aeb1df146756	603	a specific feature of the Timer.
mbed_official	76:aeb1df146756	604	(@) In case of PWM mode, this function is mandatory:
mbed_official	76:aeb1df146756	605	TIM_OCxPreloadConfig(TIMx, TIM_OCPreload_ENABLE).
mbed_official	76:aeb1df146756	606	(@) If the corresponding interrupt or DMA request are needed, the user should:
mbed_official	76:aeb1df146756	607	(#@) Enable the NVIC (or the DMA) to use the TIM interrupts (or DMA requests).
mbed_official	76:aeb1df146756	608	(#@) Enable the corresponding interrupt (or DMA request) using the function
mbed_official	76:aeb1df146756	609	TIM_ITConfig(TIMx, TIM_IT_CCx) (or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official	76:aeb1df146756	610
mbed_official	76:aeb1df146756	611	@endverbatim
mbed_official	76:aeb1df146756	612	* @{
mbed_official	76:aeb1df146756	613	*/
mbed_official	76:aeb1df146756	614
mbed_official	76:aeb1df146756	615	/**
mbed_official	76:aeb1df146756	616	* @brief Initializes the TIMx Channel1 according to the specified
mbed_official	76:aeb1df146756	617	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	618	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	619	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	620	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	621	* peripheral.
mbed_official	76:aeb1df146756	622	* @retval None
mbed_official	76:aeb1df146756	623	*/
mbed_official	76:aeb1df146756	624	void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	625	{
mbed_official	76:aeb1df146756	626	uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official	76:aeb1df146756	627
mbed_official	76:aeb1df146756	628	/* Check the parameters */
mbed_official	76:aeb1df146756	629	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	630	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	631	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	632	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	633	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	76:aeb1df146756	634	TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	635
mbed_official	76:aeb1df146756	636	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	637	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	638
mbed_official	76:aeb1df146756	639	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	640	tmpccmrx = TIMx->CCMR1;
mbed_official	76:aeb1df146756	641
mbed_official	76:aeb1df146756	642	/* Reset the Output Compare Mode Bits */
mbed_official	76:aeb1df146756	643	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC1M));
mbed_official	76:aeb1df146756	644	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC1S));
mbed_official	76:aeb1df146756	645
mbed_official	76:aeb1df146756	646	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	647	tmpccmrx \|= TIM_OCInitStruct->TIM_OCMode;
mbed_official	76:aeb1df146756	648
mbed_official	76:aeb1df146756	649	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	650	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P));
mbed_official	76:aeb1df146756	651	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	652	tmpccer \|= TIM_OCInitStruct->TIM_OCPolarity;
mbed_official	76:aeb1df146756	653
mbed_official	76:aeb1df146756	654	/* Set the Output State */
mbed_official	76:aeb1df146756	655	tmpccer \|= TIM_OCInitStruct->TIM_OutputState;
mbed_official	76:aeb1df146756	656
mbed_official	76:aeb1df146756	657	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	658	TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	659
mbed_official	76:aeb1df146756	660	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	661	TIMx->CCMR1 = tmpccmrx;
mbed_official	76:aeb1df146756	662
mbed_official	76:aeb1df146756	663	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	664	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	665	}
mbed_official	76:aeb1df146756	666
mbed_official	76:aeb1df146756	667	/**
mbed_official	76:aeb1df146756	668	* @brief Initializes the TIMx Channel2 according to the specified
mbed_official	76:aeb1df146756	669	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	670	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	671	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	672	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	673	* peripheral.
mbed_official	76:aeb1df146756	674	* @retval None
mbed_official	76:aeb1df146756	675	*/
mbed_official	76:aeb1df146756	676	void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	677	{
mbed_official	76:aeb1df146756	678	uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official	76:aeb1df146756	679
mbed_official	76:aeb1df146756	680	/* Check the parameters */
mbed_official	76:aeb1df146756	681	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	682	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	683	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	684	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	685	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	686	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC2E));
mbed_official	76:aeb1df146756	687
mbed_official	76:aeb1df146756	688	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	689	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	690
mbed_official	76:aeb1df146756	691	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	692	tmpccmrx = TIMx->CCMR1;
mbed_official	76:aeb1df146756	693
mbed_official	76:aeb1df146756	694	/* Reset the Output Compare Mode Bits */
mbed_official	76:aeb1df146756	695	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC2M));
mbed_official	76:aeb1df146756	696
mbed_official	76:aeb1df146756	697	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	698	tmpccmrx \|= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official	76:aeb1df146756	699
mbed_official	76:aeb1df146756	700	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	701	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2P));
mbed_official	76:aeb1df146756	702	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	703	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4);
mbed_official	76:aeb1df146756	704
mbed_official	76:aeb1df146756	705	/* Set the Output State */
mbed_official	76:aeb1df146756	706	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4);
mbed_official	76:aeb1df146756	707
mbed_official	76:aeb1df146756	708	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	709	TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	710
mbed_official	76:aeb1df146756	711	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	712	TIMx->CCMR1 = tmpccmrx;
mbed_official	76:aeb1df146756	713
mbed_official	76:aeb1df146756	714	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	715	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	716	}
mbed_official	76:aeb1df146756	717
mbed_official	76:aeb1df146756	718	/**
mbed_official	76:aeb1df146756	719	* @brief Initializes the TIMx Channel3 according to the specified
mbed_official	76:aeb1df146756	720	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	721	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	722	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	723	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	724	* peripheral.
mbed_official	76:aeb1df146756	725	* @retval None
mbed_official	76:aeb1df146756	726	*/
mbed_official	76:aeb1df146756	727	void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	728	{
mbed_official	76:aeb1df146756	729	uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official	76:aeb1df146756	730
mbed_official	76:aeb1df146756	731	/* Check the parameters */
mbed_official	76:aeb1df146756	732	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	733	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	734	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	735	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	736
mbed_official	76:aeb1df146756	737	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	738	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC3E));
mbed_official	76:aeb1df146756	739
mbed_official	76:aeb1df146756	740	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	741	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	742
mbed_official	76:aeb1df146756	743	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	744	tmpccmrx = TIMx->CCMR2;
mbed_official	76:aeb1df146756	745
mbed_official	76:aeb1df146756	746	/* Reset the Output Compare Mode Bits */
mbed_official	76:aeb1df146756	747	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC3M));
mbed_official	76:aeb1df146756	748
mbed_official	76:aeb1df146756	749	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	750	tmpccmrx \|= TIM_OCInitStruct->TIM_OCMode;
mbed_official	76:aeb1df146756	751
mbed_official	76:aeb1df146756	752	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	753	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3P));
mbed_official	76:aeb1df146756	754	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	755	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8);
mbed_official	76:aeb1df146756	756
mbed_official	76:aeb1df146756	757	/* Set the Output State */
mbed_official	76:aeb1df146756	758	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8);
mbed_official	76:aeb1df146756	759
mbed_official	76:aeb1df146756	760	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	761	TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	762
mbed_official	76:aeb1df146756	763	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	764	TIMx->CCMR2 = tmpccmrx;
mbed_official	76:aeb1df146756	765
mbed_official	76:aeb1df146756	766	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	767	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	768	}
mbed_official	76:aeb1df146756	769
mbed_official	76:aeb1df146756	770	/**
mbed_official	76:aeb1df146756	771	* @brief Initializes the TIMx Channel4 according to the specified
mbed_official	76:aeb1df146756	772	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	773	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	774	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	775	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	776	* peripheral.
mbed_official	76:aeb1df146756	777	* @retval None
mbed_official	76:aeb1df146756	778	*/
mbed_official	76:aeb1df146756	779	void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	780	{
mbed_official	76:aeb1df146756	781	uint16_t tmpccmrx = 0, tmpccer = 0;
mbed_official	76:aeb1df146756	782
mbed_official	76:aeb1df146756	783	/* Check the parameters */
mbed_official	76:aeb1df146756	784	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	785	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	786	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	787	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	788
mbed_official	76:aeb1df146756	789	/* Disable the Channel 2: Reset the CC4E Bit */
mbed_official	76:aeb1df146756	790	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC4E));
mbed_official	76:aeb1df146756	791
mbed_official	76:aeb1df146756	792	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	793	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	794
mbed_official	76:aeb1df146756	795	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	796	tmpccmrx = TIMx->CCMR2;
mbed_official	76:aeb1df146756	797
mbed_official	76:aeb1df146756	798	/* Reset the Output Compare Mode Bits */
mbed_official	76:aeb1df146756	799	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC4M));
mbed_official	76:aeb1df146756	800
mbed_official	76:aeb1df146756	801	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	802	tmpccmrx \|= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official	76:aeb1df146756	803
mbed_official	76:aeb1df146756	804	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	805	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC4P));
mbed_official	76:aeb1df146756	806	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	807	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12);
mbed_official	76:aeb1df146756	808
mbed_official	76:aeb1df146756	809	/* Set the Output State */
mbed_official	76:aeb1df146756	810	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12);
mbed_official	76:aeb1df146756	811
mbed_official	76:aeb1df146756	812	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	813	TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	814
mbed_official	76:aeb1df146756	815	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	816	TIMx->CCMR2 = tmpccmrx;
mbed_official	76:aeb1df146756	817
mbed_official	76:aeb1df146756	818	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	819	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	820	}
mbed_official	76:aeb1df146756	821
mbed_official	76:aeb1df146756	822	/**
mbed_official	76:aeb1df146756	823	* @brief Fills each TIM_OCInitStruct member with its default value.
mbed_official	76:aeb1df146756	824	* @param TIM_OCInitStruct : pointer to a TIM_OCInitTypeDef structure which will
mbed_official	76:aeb1df146756	825	* be initialized.
mbed_official	76:aeb1df146756	826	* @retval None
mbed_official	76:aeb1df146756	827	*/
mbed_official	76:aeb1df146756	828	void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	829	{
mbed_official	76:aeb1df146756	830	/* Set the default configuration */
mbed_official	76:aeb1df146756	831	TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing;
mbed_official	76:aeb1df146756	832	TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
mbed_official	76:aeb1df146756	833	TIM_OCInitStruct->TIM_Pulse = 0x0000;
mbed_official	76:aeb1df146756	834	TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
mbed_official	76:aeb1df146756	835	}
mbed_official	76:aeb1df146756	836
mbed_official	76:aeb1df146756	837	/**
mbed_official	76:aeb1df146756	838	* @brief Selects the TIM Output Compare Mode.
mbed_official	76:aeb1df146756	839	* @note This function disables the selected channel before changing the Output
mbed_official	76:aeb1df146756	840	* Compare Mode.
mbed_official	76:aeb1df146756	841	* User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions.
mbed_official	76:aeb1df146756	842	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	843	* @param TIM_Channel: specifies the TIM Channel.
mbed_official	76:aeb1df146756	844	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	845	* @arg TIM_Channel_1: TIM Channel 1.
mbed_official	76:aeb1df146756	846	* @arg TIM_Channel_2: TIM Channel 2.
mbed_official	76:aeb1df146756	847	* @arg TIM_Channel_3: TIM Channel 3.
mbed_official	76:aeb1df146756	848	* @arg TIM_Channel_4: TIM Channel 4.
mbed_official	76:aeb1df146756	849	* @param TIM_OCMode: specifies the TIM Output Compare Mode.
mbed_official	76:aeb1df146756	850	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	851	* @arg TIM_OCMode_Timing: TIM Output Compare Timing mode.
mbed_official	76:aeb1df146756	852	* @arg TIM_OCMode_Active: TIM Output Compare Active mode.
mbed_official	76:aeb1df146756	853	* @arg TIM_OCMode_Inactive: TIM Output Compare Inactive mode.
mbed_official	76:aeb1df146756	854	* @arg TIM_OCMode_Toggle: TIM Output Compare Toggle mode.
mbed_official	76:aeb1df146756	855	* @arg TIM_OCMode_PWM1: TIM Output Compare PWM1 mode.
mbed_official	76:aeb1df146756	856	* @arg TIM_OCMode_PWM2: TIM Output Compare PWM2 mode.
mbed_official	76:aeb1df146756	857	* @arg TIM_ForcedAction_Active: TIM Forced Action Active mode.
mbed_official	76:aeb1df146756	858	* @arg TIM_ForcedAction_InActive: TIM Forced Action Inactive mode.
mbed_official	76:aeb1df146756	859	* @retval None
mbed_official	76:aeb1df146756	860	*/
mbed_official	76:aeb1df146756	861	void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
mbed_official	76:aeb1df146756	862	{
mbed_official	76:aeb1df146756	863	uint32_t tmp = 0;
mbed_official	76:aeb1df146756	864	uint16_t tmp1 = 0;
mbed_official	76:aeb1df146756	865
mbed_official	76:aeb1df146756	866	/* Check the parameters */
mbed_official	76:aeb1df146756	867	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	868	assert_param(IS_TIM_OCM(TIM_OCMode));
mbed_official	76:aeb1df146756	869
mbed_official	76:aeb1df146756	870	tmp = (uint32_t) TIMx;
mbed_official	76:aeb1df146756	871	tmp += CCMR_OFFSET;
mbed_official	76:aeb1df146756	872
mbed_official	76:aeb1df146756	873	tmp1 = CCER_CCE_SET << (uint16_t)TIM_Channel;
mbed_official	76:aeb1df146756	874
mbed_official	76:aeb1df146756	875	/* Disable the Channel: Reset the CCxE Bit */
mbed_official	76:aeb1df146756	876	TIMx->CCER &= (uint16_t) ~tmp1;
mbed_official	76:aeb1df146756	877
mbed_official	76:aeb1df146756	878	if((TIM_Channel == TIM_Channel_1) \|\|(TIM_Channel == TIM_Channel_3))
mbed_official	76:aeb1df146756	879	{
mbed_official	76:aeb1df146756	880	tmp += (TIM_Channel>>1);
mbed_official	76:aeb1df146756	881
mbed_official	76:aeb1df146756	882	/* Reset the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	883	(__IO uint32_t ) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M);
mbed_official	76:aeb1df146756	884
mbed_official	76:aeb1df146756	885	/* Configure the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	886	(__IO uint32_t ) tmp \|= TIM_OCMode;
mbed_official	76:aeb1df146756	887	}
mbed_official	76:aeb1df146756	888	else
mbed_official	76:aeb1df146756	889	{
mbed_official	76:aeb1df146756	890	tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1;
mbed_official	76:aeb1df146756	891
mbed_official	76:aeb1df146756	892	/* Reset the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	893	(__IO uint32_t ) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M);
mbed_official	76:aeb1df146756	894
mbed_official	76:aeb1df146756	895	/* Configure the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	896	(__IO uint32_t ) tmp \|= (uint16_t)(TIM_OCMode << 8);
mbed_official	76:aeb1df146756	897	}
mbed_official	76:aeb1df146756	898	}
mbed_official	76:aeb1df146756	899
mbed_official	76:aeb1df146756	900	/**
mbed_official	76:aeb1df146756	901	* @brief Sets the TIMx Capture Compare1 Register value
mbed_official	76:aeb1df146756	902	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	903	* @param Compare1: specifies the Capture Compare1 register new value.
mbed_official	76:aeb1df146756	904	* @retval None
mbed_official	76:aeb1df146756	905	*/
mbed_official	76:aeb1df146756	906	void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1)
mbed_official	76:aeb1df146756	907	{
mbed_official	76:aeb1df146756	908	/* Check the parameters */
mbed_official	76:aeb1df146756	909	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	910
mbed_official	76:aeb1df146756	911	/* Set the Capture Compare1 Register value */
mbed_official	76:aeb1df146756	912	TIMx->CCR1 = Compare1;
mbed_official	76:aeb1df146756	913	}
mbed_official	76:aeb1df146756	914
mbed_official	76:aeb1df146756	915	/**
mbed_official	76:aeb1df146756	916	* @brief Sets the TIMx Capture Compare2 Register value.
mbed_official	76:aeb1df146756	917	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	918	* @param Compare2: specifies the Capture Compare2 register new value.
mbed_official	76:aeb1df146756	919	* @retval None
mbed_official	76:aeb1df146756	920	*/
mbed_official	76:aeb1df146756	921	void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2)
mbed_official	76:aeb1df146756	922	{
mbed_official	76:aeb1df146756	923	/* Check the parameters */
mbed_official	76:aeb1df146756	924	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	925
mbed_official	76:aeb1df146756	926	/* Set the Capture Compare2 Register value */
mbed_official	76:aeb1df146756	927	TIMx->CCR2 = Compare2;
mbed_official	76:aeb1df146756	928	}
mbed_official	76:aeb1df146756	929
mbed_official	76:aeb1df146756	930	/**
mbed_official	76:aeb1df146756	931	* @brief Sets the TIMx Capture Compare3 Register value.
mbed_official	76:aeb1df146756	932	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	933	* @param Compare3: specifies the Capture Compare3 register new value.
mbed_official	76:aeb1df146756	934	* @retval None
mbed_official	76:aeb1df146756	935	*/
mbed_official	76:aeb1df146756	936	void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3)
mbed_official	76:aeb1df146756	937	{
mbed_official	76:aeb1df146756	938	/* Check the parameters */
mbed_official	76:aeb1df146756	939	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	940
mbed_official	76:aeb1df146756	941	/* Set the Capture Compare3 Register value */
mbed_official	76:aeb1df146756	942	TIMx->CCR3 = Compare3;
mbed_official	76:aeb1df146756	943	}
mbed_official	76:aeb1df146756	944
mbed_official	76:aeb1df146756	945	/**
mbed_official	76:aeb1df146756	946	* @brief Sets the TIMx Capture Compare4 Register value.
mbed_official	76:aeb1df146756	947	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	948	* @param Compare4: specifies the Capture Compare4 register new value.
mbed_official	76:aeb1df146756	949	* @retval None
mbed_official	76:aeb1df146756	950	*/
mbed_official	76:aeb1df146756	951	void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4)
mbed_official	76:aeb1df146756	952	{
mbed_official	76:aeb1df146756	953	/* Check the parameters */
mbed_official	76:aeb1df146756	954	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	955
mbed_official	76:aeb1df146756	956	/* Set the Capture Compare4 Register value */
mbed_official	76:aeb1df146756	957	TIMx->CCR4 = Compare4;
mbed_official	76:aeb1df146756	958	}
mbed_official	76:aeb1df146756	959
mbed_official	76:aeb1df146756	960	/**
mbed_official	76:aeb1df146756	961	* @brief Forces the TIMx output 1 waveform to active or inactive level.
mbed_official	76:aeb1df146756	962	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	963	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	964	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	965	* @arg TIM_ForcedAction_Active: Force active level on OC1REF.
mbed_official	76:aeb1df146756	966	* @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF.
mbed_official	76:aeb1df146756	967	* @retval None
mbed_official	76:aeb1df146756	968	*/
mbed_official	76:aeb1df146756	969	void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	970	{
mbed_official	76:aeb1df146756	971	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	972	/* Check the parameters */
mbed_official	76:aeb1df146756	973	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	974	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	975	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	976	/* Reset the OC1M Bits */
mbed_official	76:aeb1df146756	977	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1M);
mbed_official	76:aeb1df146756	978	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	979	tmpccmr1 \|= TIM_ForcedAction;
mbed_official	76:aeb1df146756	980	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	981	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	982	}
mbed_official	76:aeb1df146756	983
mbed_official	76:aeb1df146756	984	/**
mbed_official	76:aeb1df146756	985	* @brief Forces the TIMx output 2 waveform to active or inactive level.
mbed_official	76:aeb1df146756	986	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM
mbed_official	76:aeb1df146756	987	* peripheral.
mbed_official	76:aeb1df146756	988	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	989	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	990	* @arg TIM_ForcedAction_Active: Force active level on OC2REF.
mbed_official	76:aeb1df146756	991	* @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF.
mbed_official	76:aeb1df146756	992	* @retval None
mbed_official	76:aeb1df146756	993	*/
mbed_official	76:aeb1df146756	994	void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	995	{
mbed_official	76:aeb1df146756	996	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	997
mbed_official	76:aeb1df146756	998	/* Check the parameters */
mbed_official	76:aeb1df146756	999	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1000	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1001
mbed_official	76:aeb1df146756	1002	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1003	/* Reset the OC2M Bits */
mbed_official	76:aeb1df146756	1004	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2M);
mbed_official	76:aeb1df146756	1005	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1006	tmpccmr1 \|= (uint16_t)(TIM_ForcedAction << 8);
mbed_official	76:aeb1df146756	1007	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1008	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1009	}
mbed_official	76:aeb1df146756	1010
mbed_official	76:aeb1df146756	1011	/**
mbed_official	76:aeb1df146756	1012	* @brief Forces the TIMx output 3 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1013	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1014	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1015	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1016	* @arg TIM_ForcedAction_Active: Force active level on OC3REF.
mbed_official	76:aeb1df146756	1017	* @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF.
mbed_official	76:aeb1df146756	1018	* @retval None
mbed_official	76:aeb1df146756	1019	*/
mbed_official	76:aeb1df146756	1020	void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1021	{
mbed_official	76:aeb1df146756	1022	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1023
mbed_official	76:aeb1df146756	1024	/* Check the parameters */
mbed_official	76:aeb1df146756	1025	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1026	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1027
mbed_official	76:aeb1df146756	1028	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1029	/* Reset the OC1M Bits */
mbed_official	76:aeb1df146756	1030	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3M);
mbed_official	76:aeb1df146756	1031	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1032	tmpccmr2 \|= TIM_ForcedAction;
mbed_official	76:aeb1df146756	1033	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1034	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1035	}
mbed_official	76:aeb1df146756	1036
mbed_official	76:aeb1df146756	1037	/**
mbed_official	76:aeb1df146756	1038	* @brief Forces the TIMx output 4 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1039	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1040	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1041	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1042	* @arg TIM_ForcedAction_Active: Force active level on OC4REF.
mbed_official	76:aeb1df146756	1043	* @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF.
mbed_official	76:aeb1df146756	1044	* @retval None
mbed_official	76:aeb1df146756	1045	*/
mbed_official	76:aeb1df146756	1046	void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1047	{
mbed_official	76:aeb1df146756	1048	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1049	/* Check the parameters */
mbed_official	76:aeb1df146756	1050	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1051	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1052
mbed_official	76:aeb1df146756	1053	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1054	/* Reset the OC2M Bits */
mbed_official	76:aeb1df146756	1055	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4M);
mbed_official	76:aeb1df146756	1056	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1057	tmpccmr2 \|= (uint16_t)(TIM_ForcedAction << 8);
mbed_official	76:aeb1df146756	1058	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1059	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1060	}
mbed_official	76:aeb1df146756	1061
mbed_official	76:aeb1df146756	1062	/**
mbed_official	76:aeb1df146756	1063	* @brief Enables or disables the TIMx peripheral Preload register on CCR1.
mbed_official	76:aeb1df146756	1064	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1065	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official	76:aeb1df146756	1066	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1067	* @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official	76:aeb1df146756	1068	* @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official	76:aeb1df146756	1069	* @retval None
mbed_official	76:aeb1df146756	1070	*/
mbed_official	76:aeb1df146756	1071	void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1072	{
mbed_official	76:aeb1df146756	1073	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1074	/* Check the parameters */
mbed_official	76:aeb1df146756	1075	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1076	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1077
mbed_official	76:aeb1df146756	1078	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1079	/* Reset the OC1PE Bit */
mbed_official	76:aeb1df146756	1080	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1PE);
mbed_official	76:aeb1df146756	1081	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1082	tmpccmr1 \|= TIM_OCPreload;
mbed_official	76:aeb1df146756	1083	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1084	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1085	}
mbed_official	76:aeb1df146756	1086
mbed_official	76:aeb1df146756	1087	/**
mbed_official	76:aeb1df146756	1088	* @brief Enables or disables the TIMx peripheral Preload register on CCR2.
mbed_official	76:aeb1df146756	1089	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1090	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official	76:aeb1df146756	1091	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1092	* @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official	76:aeb1df146756	1093	* @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official	76:aeb1df146756	1094	* @retval None
mbed_official	76:aeb1df146756	1095	*/
mbed_official	76:aeb1df146756	1096	void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1097	{
mbed_official	76:aeb1df146756	1098	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1099	/* Check the parameters */
mbed_official	76:aeb1df146756	1100	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1101	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1102
mbed_official	76:aeb1df146756	1103	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1104	/* Reset the OC2PE Bit */
mbed_official	76:aeb1df146756	1105	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2PE);
mbed_official	76:aeb1df146756	1106	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1107	tmpccmr1 \|= (uint16_t)(TIM_OCPreload << 8);
mbed_official	76:aeb1df146756	1108	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1109	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1110	}
mbed_official	76:aeb1df146756	1111
mbed_official	76:aeb1df146756	1112	/**
mbed_official	76:aeb1df146756	1113	* @brief Enables or disables the TIMx peripheral Preload register on CCR3.
mbed_official	76:aeb1df146756	1114	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1115	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official	76:aeb1df146756	1116	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1117	* @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official	76:aeb1df146756	1118	* @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official	76:aeb1df146756	1119	* @retval None
mbed_official	76:aeb1df146756	1120	*/
mbed_official	76:aeb1df146756	1121	void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1122	{
mbed_official	76:aeb1df146756	1123	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1124
mbed_official	76:aeb1df146756	1125	/* Check the parameters */
mbed_official	76:aeb1df146756	1126	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1127	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1128
mbed_official	76:aeb1df146756	1129	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1130	/* Reset the OC3PE Bit */
mbed_official	76:aeb1df146756	1131	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3PE);
mbed_official	76:aeb1df146756	1132	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1133	tmpccmr2 \|= TIM_OCPreload;
mbed_official	76:aeb1df146756	1134	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1135	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1136	}
mbed_official	76:aeb1df146756	1137
mbed_official	76:aeb1df146756	1138	/**
mbed_official	76:aeb1df146756	1139	* @brief Enables or disables the TIMx peripheral Preload register on CCR4.
mbed_official	76:aeb1df146756	1140	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1141	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register.
mbed_official	76:aeb1df146756	1142	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1143	* @arg TIM_OCPreload_Enable: Enable TIM output compare Preload
mbed_official	76:aeb1df146756	1144	* @arg TIM_OCPreload_Disable: Disable TIM output compare Preload
mbed_official	76:aeb1df146756	1145	* @retval None
mbed_official	76:aeb1df146756	1146	*/
mbed_official	76:aeb1df146756	1147	void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1148	{
mbed_official	76:aeb1df146756	1149	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1150
mbed_official	76:aeb1df146756	1151	/* Check the parameters */
mbed_official	76:aeb1df146756	1152	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1153	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1154
mbed_official	76:aeb1df146756	1155	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1156	/* Reset the OC4PE Bit */
mbed_official	76:aeb1df146756	1157	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4PE);
mbed_official	76:aeb1df146756	1158	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1159	tmpccmr2 \|= (uint16_t)(TIM_OCPreload << 8);
mbed_official	76:aeb1df146756	1160	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1161	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1162	}
mbed_official	76:aeb1df146756	1163
mbed_official	76:aeb1df146756	1164	/**
mbed_official	76:aeb1df146756	1165	* @brief Configures the TIMx Output Compare 1 Fast feature.
mbed_official	76:aeb1df146756	1166	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1167	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1168	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1169	* @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official	76:aeb1df146756	1170	* @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official	76:aeb1df146756	1171	* @retval None
mbed_official	76:aeb1df146756	1172	*/
mbed_official	76:aeb1df146756	1173	void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1174	{
mbed_official	76:aeb1df146756	1175	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1176
mbed_official	76:aeb1df146756	1177	/* Check the parameters */
mbed_official	76:aeb1df146756	1178	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1179	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1180
mbed_official	76:aeb1df146756	1181	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	1182	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1183	/* Reset the OC1FE Bit */
mbed_official	76:aeb1df146756	1184	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1FE);
mbed_official	76:aeb1df146756	1185	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1186	tmpccmr1 \|= TIM_OCFast;
mbed_official	76:aeb1df146756	1187	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	1188	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1189	}
mbed_official	76:aeb1df146756	1190
mbed_official	76:aeb1df146756	1191	/**
mbed_official	76:aeb1df146756	1192	* @brief Configures the TIMx Output Compare 2 Fast feature.
mbed_official	76:aeb1df146756	1193	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1194	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1195	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1196	* @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official	76:aeb1df146756	1197	* @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official	76:aeb1df146756	1198	* @retval None
mbed_official	76:aeb1df146756	1199	*/
mbed_official	76:aeb1df146756	1200	void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1201	{
mbed_official	76:aeb1df146756	1202	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1203
mbed_official	76:aeb1df146756	1204	/* Check the parameters */
mbed_official	76:aeb1df146756	1205	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1206	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1207
mbed_official	76:aeb1df146756	1208	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	1209	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1210	/* Reset the OC2FE Bit */
mbed_official	76:aeb1df146756	1211	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2FE);
mbed_official	76:aeb1df146756	1212	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1213	tmpccmr1 \|= (uint16_t)(TIM_OCFast << 8);
mbed_official	76:aeb1df146756	1214	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	1215	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1216	}
mbed_official	76:aeb1df146756	1217
mbed_official	76:aeb1df146756	1218	/**
mbed_official	76:aeb1df146756	1219	* @brief Configures the TIMx Output Compare 3 Fast feature.
mbed_official	76:aeb1df146756	1220	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1221	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1222	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1223	* @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official	76:aeb1df146756	1224	* @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official	76:aeb1df146756	1225	* @retval None
mbed_official	76:aeb1df146756	1226	*/
mbed_official	76:aeb1df146756	1227	void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1228	{
mbed_official	76:aeb1df146756	1229	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1230
mbed_official	76:aeb1df146756	1231	/* Check the parameters */
mbed_official	76:aeb1df146756	1232	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1233	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1234
mbed_official	76:aeb1df146756	1235	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1236	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1237	/* Reset the OC3FE Bit */
mbed_official	76:aeb1df146756	1238	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3FE);
mbed_official	76:aeb1df146756	1239	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1240	tmpccmr2 \|= TIM_OCFast;
mbed_official	76:aeb1df146756	1241	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1242	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1243	}
mbed_official	76:aeb1df146756	1244
mbed_official	76:aeb1df146756	1245	/**
mbed_official	76:aeb1df146756	1246	* @brief Configures the TIMx Output Compare 4 Fast feature.
mbed_official	76:aeb1df146756	1247	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1248	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1249	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1250	* @arg TIM_OCFast_Enable: TIM output compare fast enable.
mbed_official	76:aeb1df146756	1251	* @arg TIM_OCFast_Disable: TIM output compare fast disable.
mbed_official	76:aeb1df146756	1252	* @retval None
mbed_official	76:aeb1df146756	1253	*/
mbed_official	76:aeb1df146756	1254	void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1255	{
mbed_official	76:aeb1df146756	1256	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1257
mbed_official	76:aeb1df146756	1258	/* Check the parameters */
mbed_official	76:aeb1df146756	1259	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1260	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1261
mbed_official	76:aeb1df146756	1262	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1263	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1264	/* Reset the OC4FE Bit */
mbed_official	76:aeb1df146756	1265	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4FE);
mbed_official	76:aeb1df146756	1266	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1267	tmpccmr2 \|= (uint16_t)(TIM_OCFast << 8);
mbed_official	76:aeb1df146756	1268	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1269	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1270	}
mbed_official	76:aeb1df146756	1271
mbed_official	76:aeb1df146756	1272	/**
mbed_official	76:aeb1df146756	1273	* @brief Clears or safeguards the OCREF1 signal on an external event
mbed_official	76:aeb1df146756	1274	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1275	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1276	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1277	* @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official	76:aeb1df146756	1278	* @arg TIM_OCClear_Disable: TIM Output clear disable.
mbed_official	76:aeb1df146756	1279	* @retval None
mbed_official	76:aeb1df146756	1280	*/
mbed_official	76:aeb1df146756	1281	void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1282	{
mbed_official	76:aeb1df146756	1283	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1284
mbed_official	76:aeb1df146756	1285	/* Check the parameters */
mbed_official	76:aeb1df146756	1286	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1287	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1288
mbed_official	76:aeb1df146756	1289	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1290	/* Reset the OC1CE Bit */
mbed_official	76:aeb1df146756	1291	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1CE);
mbed_official	76:aeb1df146756	1292	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1293	tmpccmr1 \|= TIM_OCClear;
mbed_official	76:aeb1df146756	1294	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1295	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1296	}
mbed_official	76:aeb1df146756	1297
mbed_official	76:aeb1df146756	1298	/**
mbed_official	76:aeb1df146756	1299	* @brief Clears or safeguards the OCREF2 signal on an external event
mbed_official	76:aeb1df146756	1300	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1301	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1302
mbed_official	76:aeb1df146756	1303	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1304	* @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official	76:aeb1df146756	1305	* @arg TIM_OCClear_Disable: TIM Output clear disable .
mbed_official	76:aeb1df146756	1306	* @retval None
mbed_official	76:aeb1df146756	1307	*/
mbed_official	76:aeb1df146756	1308	void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1309	{
mbed_official	76:aeb1df146756	1310	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1311
mbed_official	76:aeb1df146756	1312	/* Check the parameters */
mbed_official	76:aeb1df146756	1313	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1314	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1315
mbed_official	76:aeb1df146756	1316	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1317	/* Reset the OC2CE Bit */
mbed_official	76:aeb1df146756	1318	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2CE);
mbed_official	76:aeb1df146756	1319	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1320	tmpccmr1 \|= (uint16_t)(TIM_OCClear << 8);
mbed_official	76:aeb1df146756	1321	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1322	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1323	}
mbed_official	76:aeb1df146756	1324
mbed_official	76:aeb1df146756	1325	/**
mbed_official	76:aeb1df146756	1326	* @brief Clears or safeguards the OCREF3 signal on an external event
mbed_official	76:aeb1df146756	1327	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1328	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1329	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1330	* @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official	76:aeb1df146756	1331	* @arg TIM_OCClear_Disable: TIM Output clear disable.
mbed_official	76:aeb1df146756	1332	* @retval None
mbed_official	76:aeb1df146756	1333	*/
mbed_official	76:aeb1df146756	1334	void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1335	{
mbed_official	76:aeb1df146756	1336	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1337
mbed_official	76:aeb1df146756	1338	/* Check the parameters */
mbed_official	76:aeb1df146756	1339	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1340	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1341
mbed_official	76:aeb1df146756	1342	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1343	/* Reset the OC3CE Bit */
mbed_official	76:aeb1df146756	1344	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3CE);
mbed_official	76:aeb1df146756	1345	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1346	tmpccmr2 \|= TIM_OCClear;
mbed_official	76:aeb1df146756	1347	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1348	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1349	}
mbed_official	76:aeb1df146756	1350
mbed_official	76:aeb1df146756	1351	/**
mbed_official	76:aeb1df146756	1352	* @brief Clears or safeguards the OCREF4 signal on an external event
mbed_official	76:aeb1df146756	1353	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1354	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1355	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1356	* @arg TIM_OCClear_Enable: TIM Output clear enable.
mbed_official	76:aeb1df146756	1357	* @arg TIM_OCClear_Disable: TIM Output clear disable.
mbed_official	76:aeb1df146756	1358	* @retval None
mbed_official	76:aeb1df146756	1359	*/
mbed_official	76:aeb1df146756	1360	void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1361	{
mbed_official	76:aeb1df146756	1362	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1363
mbed_official	76:aeb1df146756	1364	/* Check the parameters */
mbed_official	76:aeb1df146756	1365	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1366	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1367
mbed_official	76:aeb1df146756	1368	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1369	/* Reset the OC4CE Bit */
mbed_official	76:aeb1df146756	1370	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4CE);
mbed_official	76:aeb1df146756	1371	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1372	tmpccmr2 \|= (uint16_t)(TIM_OCClear << 8);
mbed_official	76:aeb1df146756	1373	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1374	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1375	}
mbed_official	76:aeb1df146756	1376
mbed_official	76:aeb1df146756	1377	/**
mbed_official	76:aeb1df146756	1378	* @brief Configures the TIMx channel 1 polarity.
mbed_official	76:aeb1df146756	1379	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1380	* @param TIM_OCPolarity: specifies the OC1 Polarity.
mbed_official	76:aeb1df146756	1381	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1382	* @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official	76:aeb1df146756	1383	* @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official	76:aeb1df146756	1384	* @retval None
mbed_official	76:aeb1df146756	1385	*/
mbed_official	76:aeb1df146756	1386	void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1387	{
mbed_official	76:aeb1df146756	1388	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1389
mbed_official	76:aeb1df146756	1390	/* Check the parameters */
mbed_official	76:aeb1df146756	1391	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1392	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1393
mbed_official	76:aeb1df146756	1394	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1395	/* Set or Reset the CC1P Bit */
mbed_official	76:aeb1df146756	1396	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P);
mbed_official	76:aeb1df146756	1397	tmpccer \|= TIM_OCPolarity;
mbed_official	76:aeb1df146756	1398	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1399	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1400	}
mbed_official	76:aeb1df146756	1401
mbed_official	76:aeb1df146756	1402	/**
mbed_official	76:aeb1df146756	1403	* @brief Configures the TIMx channel 2 polarity.
mbed_official	76:aeb1df146756	1404	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1405	* @param TIM_OCPolarity: specifies the OC2 Polarity.
mbed_official	76:aeb1df146756	1406	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1407	* @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official	76:aeb1df146756	1408	* @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official	76:aeb1df146756	1409	* @retval None
mbed_official	76:aeb1df146756	1410	*/
mbed_official	76:aeb1df146756	1411	void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1412	{
mbed_official	76:aeb1df146756	1413	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1414
mbed_official	76:aeb1df146756	1415	/* Check the parameters */
mbed_official	76:aeb1df146756	1416	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1417	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1418
mbed_official	76:aeb1df146756	1419	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1420	/* Set or Reset the CC2P Bit */
mbed_official	76:aeb1df146756	1421	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2P);
mbed_official	76:aeb1df146756	1422	tmpccer \|= (uint16_t)(TIM_OCPolarity << 4);
mbed_official	76:aeb1df146756	1423	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1424	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1425	}
mbed_official	76:aeb1df146756	1426
mbed_official	76:aeb1df146756	1427	/**
mbed_official	76:aeb1df146756	1428	* @brief Configures the TIMx channel 3 polarity.
mbed_official	76:aeb1df146756	1429	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1430	* @param TIM_OCPolarity: specifies the OC3 Polarity.
mbed_official	76:aeb1df146756	1431	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1432	* @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official	76:aeb1df146756	1433	* @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official	76:aeb1df146756	1434	* @retval None
mbed_official	76:aeb1df146756	1435	*/
mbed_official	76:aeb1df146756	1436	void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1437	{
mbed_official	76:aeb1df146756	1438	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1439
mbed_official	76:aeb1df146756	1440	/* Check the parameters */
mbed_official	76:aeb1df146756	1441	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1442	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1443
mbed_official	76:aeb1df146756	1444	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1445	/* Set or Reset the CC3P Bit */
mbed_official	76:aeb1df146756	1446	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3P);
mbed_official	76:aeb1df146756	1447	tmpccer \|= (uint16_t)(TIM_OCPolarity << 8);
mbed_official	76:aeb1df146756	1448	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1449	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1450	}
mbed_official	76:aeb1df146756	1451
mbed_official	76:aeb1df146756	1452	/**
mbed_official	76:aeb1df146756	1453	* @brief Configures the TIMx channel 4 polarity.
mbed_official	76:aeb1df146756	1454	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1455	* @param TIM_OCPolarity: specifies the OC4 Polarity.
mbed_official	76:aeb1df146756	1456	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1457	* @arg TIM_OCPolarity_High: Output Compare active high.
mbed_official	76:aeb1df146756	1458	* @arg TIM_OCPolarity_Low: Output Compare active low.
mbed_official	76:aeb1df146756	1459	* @retval None
mbed_official	76:aeb1df146756	1460	*/
mbed_official	76:aeb1df146756	1461	void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1462	{
mbed_official	76:aeb1df146756	1463	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1464
mbed_official	76:aeb1df146756	1465	/* Check the parameters */
mbed_official	76:aeb1df146756	1466	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1467	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1468
mbed_official	76:aeb1df146756	1469	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1470	/* Set or Reset the CC4P Bit */
mbed_official	76:aeb1df146756	1471	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P);
mbed_official	76:aeb1df146756	1472	tmpccer \|= (uint16_t)(TIM_OCPolarity << 12);
mbed_official	76:aeb1df146756	1473	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1474	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1475	}
mbed_official	76:aeb1df146756	1476
mbed_official	76:aeb1df146756	1477	/**
mbed_official	76:aeb1df146756	1478	* @brief Selects the OCReference Clear source.
mbed_official	76:aeb1df146756	1479	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1480	* @param TIM_OCReferenceClear: specifies the OCReference Clear source.
mbed_official	76:aeb1df146756	1481	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1482	* @arg TIM_OCReferenceClear_ETRF: The internal OCreference clear input is connected to ETRF.
mbed_official	76:aeb1df146756	1483	* @arg TIM_OCReferenceClear_OCREFCLR: The internal OCreference clear input is connected to OCREF_CLR input.
mbed_official	76:aeb1df146756	1484	* @retval None
mbed_official	76:aeb1df146756	1485	*/
mbed_official	76:aeb1df146756	1486	void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear)
mbed_official	76:aeb1df146756	1487	{
mbed_official	76:aeb1df146756	1488	/* Check the parameters */
mbed_official	76:aeb1df146756	1489	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1490	assert_param(TIM_OCREFERENCECECLEAR_SOURCE(TIM_OCReferenceClear));
mbed_official	76:aeb1df146756	1491
mbed_official	76:aeb1df146756	1492	/* Set the TIM_OCReferenceClear source */
mbed_official	76:aeb1df146756	1493	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_OCCS);
mbed_official	76:aeb1df146756	1494	TIMx->SMCR \|= TIM_OCReferenceClear;
mbed_official	76:aeb1df146756	1495	}
mbed_official	76:aeb1df146756	1496
mbed_official	76:aeb1df146756	1497	/**
mbed_official	76:aeb1df146756	1498	* @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official	76:aeb1df146756	1499	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1500	* @param TIM_Channel: specifies the TIM Channel.
mbed_official	76:aeb1df146756	1501	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1502	* @arg TIM_Channel_1: TIM Channel 1.
mbed_official	76:aeb1df146756	1503	* @arg TIM_Channel_2: TIM Channel 2.
mbed_official	76:aeb1df146756	1504	* @arg TIM_Channel_3: TIM Channel 3.
mbed_official	76:aeb1df146756	1505	* @arg TIM_Channel_4: TIM Channel 4.
mbed_official	76:aeb1df146756	1506	* @param TIM_CCx: specifies the TIM Channel CCxE bit new state.
mbed_official	76:aeb1df146756	1507	* This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable.
mbed_official	76:aeb1df146756	1508	* @retval None
mbed_official	76:aeb1df146756	1509	*/
mbed_official	76:aeb1df146756	1510	void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx)
mbed_official	76:aeb1df146756	1511	{
mbed_official	76:aeb1df146756	1512	uint16_t tmp = 0;
mbed_official	76:aeb1df146756	1513
mbed_official	76:aeb1df146756	1514	/* Check the parameters */
mbed_official	76:aeb1df146756	1515	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1516	assert_param(IS_TIM_CCX(TIM_CCx));
mbed_official	76:aeb1df146756	1517
mbed_official	76:aeb1df146756	1518	tmp = CCER_CCE_SET << TIM_Channel;
mbed_official	76:aeb1df146756	1519
mbed_official	76:aeb1df146756	1520	/* Reset the CCxE Bit */
mbed_official	76:aeb1df146756	1521	TIMx->CCER &= (uint16_t)~ tmp;
mbed_official	76:aeb1df146756	1522
mbed_official	76:aeb1df146756	1523	/* Set or reset the CCxE Bit */
mbed_official	76:aeb1df146756	1524	TIMx->CCER \|= (uint16_t)(TIM_CCx << TIM_Channel);
mbed_official	76:aeb1df146756	1525	}
mbed_official	76:aeb1df146756	1526
mbed_official	76:aeb1df146756	1527	/**
mbed_official	76:aeb1df146756	1528	* @}
mbed_official	76:aeb1df146756	1529	*/
mbed_official	76:aeb1df146756	1530
mbed_official	76:aeb1df146756	1531	/** @defgroup TIM_Group3 Input Capture management functions
mbed_official	76:aeb1df146756	1532	* @brief Input Capture management functions
mbed_official	76:aeb1df146756	1533	*
mbed_official	76:aeb1df146756	1534	@verbatim
mbed_official	76:aeb1df146756	1535	===============================================================================
mbed_official	76:aeb1df146756	1536	##### Input Capture management functions #####
mbed_official	76:aeb1df146756	1537	===============================================================================
mbed_official	76:aeb1df146756	1538
mbed_official	76:aeb1df146756	1539	* TIM Driver: how to use it in Input Capture Mode *
mbed_official	76:aeb1df146756	1540	===============================================================================
mbed_official	76:aeb1df146756	1541	[..] To use the Timer in Input Capture mode, the following steps are mandatory:
mbed_official	76:aeb1df146756	1542	(#) Enable TIM clock using RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE)
mbed_official	76:aeb1df146756	1543	function.
mbed_official	76:aeb1df146756	1544	(#) Configure the TIM pins by configuring the corresponding GPIO pins.
mbed_official	76:aeb1df146756	1545	(#) Configure the Time base unit as described in the first part of this
mbed_official	76:aeb1df146756	1546	driver, if needed, else the Timer will run with the default configuration:
mbed_official	76:aeb1df146756	1547	(++) Autoreload value = 0xFFFF.
mbed_official	76:aeb1df146756	1548	(++) Prescaler value = 0x0000.
mbed_official	76:aeb1df146756	1549	(++) Counter mode = Up counting.
mbed_official	76:aeb1df146756	1550	(++) Clock Division = TIM_CKD_DIV1.
mbed_official	76:aeb1df146756	1551	(#) Fill the TIM_ICInitStruct with the desired parameters including:
mbed_official	76:aeb1df146756	1552	(++) TIM Channel: TIM_Channel.
mbed_official	76:aeb1df146756	1553	(++) TIM Input Capture polarity: TIM_ICPolarity.
mbed_official	76:aeb1df146756	1554	(++) TIM Input Capture selection: TIM_ICSelection.
mbed_official	76:aeb1df146756	1555	(++) TIM Input Capture Prescaler: TIM_ICPrescaler.
mbed_official	76:aeb1df146756	1556	(++) TIM Input CApture filter value: TIM_ICFilter.
mbed_official	76:aeb1df146756	1557	(#) Call TIM_ICInit(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official	76:aeb1df146756	1558	channel with the corresponding configuration and to measure only
mbed_official	76:aeb1df146756	1559	frequency or duty cycle of the input signal,or, Call
mbed_official	76:aeb1df146756	1560	TIM_PWMIConfig(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official	76:aeb1df146756	1561	channels with the corresponding configuration and to measure the
mbed_official	76:aeb1df146756	1562	frequency and the duty cycle of the input signal.
mbed_official	76:aeb1df146756	1563	(#) Enable the NVIC or the DMA to read the measured frequency.
mbed_official	76:aeb1df146756	1564	(#) Enable the corresponding interrupt (or DMA request) to read
mbed_official	76:aeb1df146756	1565	the Captured value, using the function TIM_ITConfig(TIMx, TIM_IT_CCx)
mbed_official	76:aeb1df146756	1566	(or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official	76:aeb1df146756	1567	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	1568	(#) Use TIM_GetCapturex(TIMx); to read the captured value.
mbed_official	76:aeb1df146756	1569	[..]
mbed_official	76:aeb1df146756	1570	(@) All other functions can be used separately to modify, if needed,
mbed_official	76:aeb1df146756	1571	a specific feature of the Timer.
mbed_official	76:aeb1df146756	1572
mbed_official	76:aeb1df146756	1573	@endverbatim
mbed_official	76:aeb1df146756	1574	* @{
mbed_official	76:aeb1df146756	1575	*/
mbed_official	76:aeb1df146756	1576
mbed_official	76:aeb1df146756	1577	/**
mbed_official	76:aeb1df146756	1578	* @brief Initializes the TIM peripheral according to the specified
mbed_official	76:aeb1df146756	1579	* parameters in the TIM_ICInitStruct.
mbed_official	76:aeb1df146756	1580	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1581	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official	76:aeb1df146756	1582	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	1583	* peripheral.
mbed_official	76:aeb1df146756	1584	* @retval None
mbed_official	76:aeb1df146756	1585	*/
mbed_official	76:aeb1df146756	1586	void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	1587	{
mbed_official	76:aeb1df146756	1588	/* Check the parameters */
mbed_official	76:aeb1df146756	1589	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1590	assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity));
mbed_official	76:aeb1df146756	1591	assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection));
mbed_official	76:aeb1df146756	1592	assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler));
mbed_official	76:aeb1df146756	1593	assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter));
mbed_official	76:aeb1df146756	1594
mbed_official	76:aeb1df146756	1595	if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official	76:aeb1df146756	1596	{
mbed_official	76:aeb1df146756	1597	/* TI1 Configuration */
mbed_official	76:aeb1df146756	1598	TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	1599	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	1600	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1601	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1602	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1603	}
mbed_official	76:aeb1df146756	1604	else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
mbed_official	76:aeb1df146756	1605	{
mbed_official	76:aeb1df146756	1606	/* TI2 Configuration */
mbed_official	76:aeb1df146756	1607	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1608	TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	1609	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	1610	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1611	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1612	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1613	}
mbed_official	76:aeb1df146756	1614	else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
mbed_official	76:aeb1df146756	1615	{
mbed_official	76:aeb1df146756	1616	/* TI3 Configuration */
mbed_official	76:aeb1df146756	1617	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1618	TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	1619	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	1620	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1621	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1622	TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1623	}
mbed_official	76:aeb1df146756	1624	else
mbed_official	76:aeb1df146756	1625	{
mbed_official	76:aeb1df146756	1626	/* TI4 Configuration */
mbed_official	76:aeb1df146756	1627	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1628	TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	1629	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	1630	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1631	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1632	TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1633	}
mbed_official	76:aeb1df146756	1634	}
mbed_official	76:aeb1df146756	1635
mbed_official	76:aeb1df146756	1636	/**
mbed_official	76:aeb1df146756	1637	* @brief Fills each TIM_ICInitStruct member with its default value.
mbed_official	76:aeb1df146756	1638	* @param TIM_ICInitStruct : pointer to a TIM_ICInitTypeDef structure which will
mbed_official	76:aeb1df146756	1639	* be initialized.
mbed_official	76:aeb1df146756	1640	* @retval None
mbed_official	76:aeb1df146756	1641	*/
mbed_official	76:aeb1df146756	1642	void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	1643	{
mbed_official	76:aeb1df146756	1644	/* Set the default configuration */
mbed_official	76:aeb1df146756	1645	TIM_ICInitStruct->TIM_Channel = TIM_Channel_1;
mbed_official	76:aeb1df146756	1646	TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	1647	TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	1648	TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
mbed_official	76:aeb1df146756	1649	TIM_ICInitStruct->TIM_ICFilter = 0x00;
mbed_official	76:aeb1df146756	1650	}
mbed_official	76:aeb1df146756	1651
mbed_official	76:aeb1df146756	1652	/**
mbed_official	76:aeb1df146756	1653	* @brief Configures the TIM peripheral according to the specified
mbed_official	76:aeb1df146756	1654	* parameters in the TIM_ICInitStruct to measure an external PWM signal.
mbed_official	76:aeb1df146756	1655	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1656	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official	76:aeb1df146756	1657	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	1658	* peripheral.
mbed_official	76:aeb1df146756	1659	* @retval None
mbed_official	76:aeb1df146756	1660	*/
mbed_official	76:aeb1df146756	1661	void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	1662	{
mbed_official	76:aeb1df146756	1663	uint16_t icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	1664	uint16_t icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	1665	/* Check the parameters */
mbed_official	76:aeb1df146756	1666	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1667	/* Select the Opposite Input Polarity */
mbed_official	76:aeb1df146756	1668	if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising)
mbed_official	76:aeb1df146756	1669	{
mbed_official	76:aeb1df146756	1670	icoppositepolarity = TIM_ICPolarity_Falling;
mbed_official	76:aeb1df146756	1671	}
mbed_official	76:aeb1df146756	1672	else
mbed_official	76:aeb1df146756	1673	{
mbed_official	76:aeb1df146756	1674	icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	1675	}
mbed_official	76:aeb1df146756	1676	/* Select the Opposite Input */
mbed_official	76:aeb1df146756	1677	if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI)
mbed_official	76:aeb1df146756	1678	{
mbed_official	76:aeb1df146756	1679	icoppositeselection = TIM_ICSelection_IndirectTI;
mbed_official	76:aeb1df146756	1680	}
mbed_official	76:aeb1df146756	1681	else
mbed_official	76:aeb1df146756	1682	{
mbed_official	76:aeb1df146756	1683	icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	1684	}
mbed_official	76:aeb1df146756	1685	if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official	76:aeb1df146756	1686	{
mbed_official	76:aeb1df146756	1687	/* TI1 Configuration */
mbed_official	76:aeb1df146756	1688	TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	1689	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1690	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1691	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1692	/* TI2 Configuration */
mbed_official	76:aeb1df146756	1693	TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1694	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1695	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1696	}
mbed_official	76:aeb1df146756	1697	else
mbed_official	76:aeb1df146756	1698	{
mbed_official	76:aeb1df146756	1699	/* TI2 Configuration */
mbed_official	76:aeb1df146756	1700	TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	1701	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1702	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1703	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1704	/* TI1 Configuration */
mbed_official	76:aeb1df146756	1705	TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	1706	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	1707	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	1708	}
mbed_official	76:aeb1df146756	1709	}
mbed_official	76:aeb1df146756	1710
mbed_official	76:aeb1df146756	1711	/**
mbed_official	76:aeb1df146756	1712	* @brief Gets the TIMx Input Capture 1 value.
mbed_official	76:aeb1df146756	1713	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1714	* @retval Capture Compare 1 Register value.
mbed_official	76:aeb1df146756	1715	*/
mbed_official	76:aeb1df146756	1716	uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	1717	{
mbed_official	76:aeb1df146756	1718	/* Check the parameters */
mbed_official	76:aeb1df146756	1719	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1720
mbed_official	76:aeb1df146756	1721	/* Get the Capture 1 Register value */
mbed_official	76:aeb1df146756	1722	return TIMx->CCR1;
mbed_official	76:aeb1df146756	1723	}
mbed_official	76:aeb1df146756	1724
mbed_official	76:aeb1df146756	1725	/**
mbed_official	76:aeb1df146756	1726	* @brief Gets the TIMx Input Capture 2 value.
mbed_official	76:aeb1df146756	1727	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1728	* @retval Capture Compare 2 Register value.
mbed_official	76:aeb1df146756	1729	*/
mbed_official	76:aeb1df146756	1730	uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	1731	{
mbed_official	76:aeb1df146756	1732	/* Check the parameters */
mbed_official	76:aeb1df146756	1733	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1734
mbed_official	76:aeb1df146756	1735	/* Get the Capture 2 Register value */
mbed_official	76:aeb1df146756	1736	return TIMx->CCR2;
mbed_official	76:aeb1df146756	1737	}
mbed_official	76:aeb1df146756	1738
mbed_official	76:aeb1df146756	1739	/**
mbed_official	76:aeb1df146756	1740	* @brief Gets the TIMx Input Capture 3 value.
mbed_official	76:aeb1df146756	1741	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1742	* @retval Capture Compare 3 Register value.
mbed_official	76:aeb1df146756	1743	*/
mbed_official	76:aeb1df146756	1744	uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	1745	{
mbed_official	76:aeb1df146756	1746	/* Check the parameters */
mbed_official	76:aeb1df146756	1747	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1748
mbed_official	76:aeb1df146756	1749	/* Get the Capture 3 Register value */
mbed_official	76:aeb1df146756	1750	return TIMx->CCR3;
mbed_official	76:aeb1df146756	1751	}
mbed_official	76:aeb1df146756	1752
mbed_official	76:aeb1df146756	1753	/**
mbed_official	76:aeb1df146756	1754	* @brief Gets the TIMx Input Capture 4 value.
mbed_official	76:aeb1df146756	1755	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1756	* @retval Capture Compare 4 Register value.
mbed_official	76:aeb1df146756	1757	*/
mbed_official	76:aeb1df146756	1758	uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	1759	{
mbed_official	76:aeb1df146756	1760	/* Check the parameters */
mbed_official	76:aeb1df146756	1761	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1762
mbed_official	76:aeb1df146756	1763	/* Get the Capture 4 Register value */
mbed_official	76:aeb1df146756	1764	return TIMx->CCR4;
mbed_official	76:aeb1df146756	1765	}
mbed_official	76:aeb1df146756	1766
mbed_official	76:aeb1df146756	1767	/**
mbed_official	76:aeb1df146756	1768	* @brief Sets the TIMx Input Capture 1 prescaler.
mbed_official	76:aeb1df146756	1769	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1770	* @param TIM_ICPSC: specifies the Input Capture1 prescaler new value.
mbed_official	76:aeb1df146756	1771	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1772	* @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official	76:aeb1df146756	1773	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official	76:aeb1df146756	1774	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official	76:aeb1df146756	1775	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official	76:aeb1df146756	1776	* @retval None
mbed_official	76:aeb1df146756	1777	*/
mbed_official	76:aeb1df146756	1778	void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	1779	{
mbed_official	76:aeb1df146756	1780	/* Check the parameters */
mbed_official	76:aeb1df146756	1781	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1782	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	1783
mbed_official	76:aeb1df146756	1784	/* Reset the IC1PSC Bits */
mbed_official	76:aeb1df146756	1785	TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC1PSC);
mbed_official	76:aeb1df146756	1786	/* Set the IC1PSC value */
mbed_official	76:aeb1df146756	1787	TIMx->CCMR1 \|= TIM_ICPSC;
mbed_official	76:aeb1df146756	1788	}
mbed_official	76:aeb1df146756	1789
mbed_official	76:aeb1df146756	1790	/**
mbed_official	76:aeb1df146756	1791	* @brief Sets the TIMx Input Capture 2 prescaler.
mbed_official	76:aeb1df146756	1792	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1793	* @param TIM_ICPSC: specifies the Input Capture2 prescaler new value.
mbed_official	76:aeb1df146756	1794	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1795	* @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official	76:aeb1df146756	1796	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official	76:aeb1df146756	1797	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official	76:aeb1df146756	1798	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official	76:aeb1df146756	1799	* @retval None
mbed_official	76:aeb1df146756	1800	*/
mbed_official	76:aeb1df146756	1801	void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	1802	{
mbed_official	76:aeb1df146756	1803	/* Check the parameters */
mbed_official	76:aeb1df146756	1804	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1805	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	1806
mbed_official	76:aeb1df146756	1807	/* Reset the IC2PSC Bits */
mbed_official	76:aeb1df146756	1808	TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC2PSC);
mbed_official	76:aeb1df146756	1809	/* Set the IC2PSC value */
mbed_official	76:aeb1df146756	1810	TIMx->CCMR1 \|= (uint16_t)(TIM_ICPSC << 8);
mbed_official	76:aeb1df146756	1811	}
mbed_official	76:aeb1df146756	1812
mbed_official	76:aeb1df146756	1813	/**
mbed_official	76:aeb1df146756	1814	* @brief Sets the TIMx Input Capture 3 prescaler.
mbed_official	76:aeb1df146756	1815	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1816	* @param TIM_ICPSC: specifies the Input Capture3 prescaler new value.
mbed_official	76:aeb1df146756	1817	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1818	* @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official	76:aeb1df146756	1819	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official	76:aeb1df146756	1820	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official	76:aeb1df146756	1821	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official	76:aeb1df146756	1822	* @retval None
mbed_official	76:aeb1df146756	1823	*/
mbed_official	76:aeb1df146756	1824	void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	1825	{
mbed_official	76:aeb1df146756	1826	/* Check the parameters */
mbed_official	76:aeb1df146756	1827	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1828	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	1829
mbed_official	76:aeb1df146756	1830	/* Reset the IC3PSC Bits */
mbed_official	76:aeb1df146756	1831	TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC3PSC);
mbed_official	76:aeb1df146756	1832	/* Set the IC3PSC value */
mbed_official	76:aeb1df146756	1833	TIMx->CCMR2 \|= TIM_ICPSC;
mbed_official	76:aeb1df146756	1834	}
mbed_official	76:aeb1df146756	1835
mbed_official	76:aeb1df146756	1836	/**
mbed_official	76:aeb1df146756	1837	* @brief Sets the TIMx Input Capture 4 prescaler.
mbed_official	76:aeb1df146756	1838	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1839	* @param TIM_ICPSC: specifies the Input Capture4 prescaler new value.
mbed_official	76:aeb1df146756	1840	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1841	* @arg TIM_ICPSC_DIV1: no prescaler.
mbed_official	76:aeb1df146756	1842	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events.
mbed_official	76:aeb1df146756	1843	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events.
mbed_official	76:aeb1df146756	1844	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events.
mbed_official	76:aeb1df146756	1845	* @retval None
mbed_official	76:aeb1df146756	1846	*/
mbed_official	76:aeb1df146756	1847	void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	1848	{
mbed_official	76:aeb1df146756	1849	/* Check the parameters */
mbed_official	76:aeb1df146756	1850	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1851	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	1852
mbed_official	76:aeb1df146756	1853	/* Reset the IC4PSC Bits */
mbed_official	76:aeb1df146756	1854	TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC4PSC);
mbed_official	76:aeb1df146756	1855	/* Set the IC4PSC value */
mbed_official	76:aeb1df146756	1856	TIMx->CCMR2 \|= (uint16_t)(TIM_ICPSC << 8);
mbed_official	76:aeb1df146756	1857	}
mbed_official	76:aeb1df146756	1858
mbed_official	76:aeb1df146756	1859	/**
mbed_official	76:aeb1df146756	1860	* @}
mbed_official	76:aeb1df146756	1861	*/
mbed_official	76:aeb1df146756	1862
mbed_official	76:aeb1df146756	1863	/** @defgroup TIM_Group4 Interrupts DMA and flags management functions
mbed_official	76:aeb1df146756	1864	* @brief Interrupts, DMA and flags management functions
mbed_official	76:aeb1df146756	1865	*
mbed_official	76:aeb1df146756	1866	@verbatim
mbed_official	76:aeb1df146756	1867	===============================================================================
mbed_official	76:aeb1df146756	1868	##### Interrupts, DMA and flags management functions #####
mbed_official	76:aeb1df146756	1869	===============================================================================
mbed_official	76:aeb1df146756	1870
mbed_official	76:aeb1df146756	1871	@endverbatim
mbed_official	76:aeb1df146756	1872	* @{
mbed_official	76:aeb1df146756	1873	*/
mbed_official	76:aeb1df146756	1874
mbed_official	76:aeb1df146756	1875	/**
mbed_official	76:aeb1df146756	1876	* @brief Enables or disables the specified TIM interrupts.
mbed_official	76:aeb1df146756	1877	* @param TIMx: where x can be 2 to 11 to select the TIMx peripheral.
mbed_official	76:aeb1df146756	1878	* @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled.
mbed_official	76:aeb1df146756	1879	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	1880	* @arg TIM_IT_Update: TIM update Interrupt source.
mbed_official	76:aeb1df146756	1881	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source.
mbed_official	76:aeb1df146756	1882	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source.
mbed_official	76:aeb1df146756	1883	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source.
mbed_official	76:aeb1df146756	1884	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source.
mbed_official	76:aeb1df146756	1885	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source.
mbed_official	76:aeb1df146756	1886	* @note TIM6 and TIM7 can only generate an update interrupt.
mbed_official	76:aeb1df146756	1887	* @note TIM_IT_CC2, TIM_IT_CC3, TIM_IT_CC4 and TIM_IT_Trigger can not be used with TIM10 and TIM11.
mbed_official	76:aeb1df146756	1888	* @note TIM_IT_CC3, TIM_IT_CC4 can not be used with TIM9.
mbed_official	76:aeb1df146756	1889	* @param NewState: new state of the TIM interrupts.
mbed_official	76:aeb1df146756	1890	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	1891	* @retval None
mbed_official	76:aeb1df146756	1892	*/
mbed_official	76:aeb1df146756	1893	void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState)
mbed_official	76:aeb1df146756	1894	{
mbed_official	76:aeb1df146756	1895	/* Check the parameters */
mbed_official	76:aeb1df146756	1896	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1897	assert_param(IS_TIM_IT(TIM_IT));
mbed_official	76:aeb1df146756	1898	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	1899
mbed_official	76:aeb1df146756	1900	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	1901	{
mbed_official	76:aeb1df146756	1902	/* Enable the Interrupt sources */
mbed_official	76:aeb1df146756	1903	TIMx->DIER \|= TIM_IT;
mbed_official	76:aeb1df146756	1904	}
mbed_official	76:aeb1df146756	1905	else
mbed_official	76:aeb1df146756	1906	{
mbed_official	76:aeb1df146756	1907	/* Disable the Interrupt sources */
mbed_official	76:aeb1df146756	1908	TIMx->DIER &= (uint16_t)~TIM_IT;
mbed_official	76:aeb1df146756	1909	}
mbed_official	76:aeb1df146756	1910	}
mbed_official	76:aeb1df146756	1911
mbed_official	76:aeb1df146756	1912	/**
mbed_official	76:aeb1df146756	1913	* @brief Configures the TIMx event to be generate by software.
mbed_official	76:aeb1df146756	1914	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1915	* @param TIM_EventSource: specifies the event source.
mbed_official	76:aeb1df146756	1916	* This parameter can be one or more of the following values:
mbed_official	76:aeb1df146756	1917	* @arg TIM_EventSource_Update: Timer update Event source.
mbed_official	76:aeb1df146756	1918	* @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source.
mbed_official	76:aeb1df146756	1919	* @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source.
mbed_official	76:aeb1df146756	1920	* @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source.
mbed_official	76:aeb1df146756	1921	* @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source.
mbed_official	76:aeb1df146756	1922	* @arg TIM_EventSource_Trigger: Timer Trigger Event source.
mbed_official	76:aeb1df146756	1923	* @note TIM6 and TIM7 can only generate an update event.
mbed_official	76:aeb1df146756	1924	* @note TIM9 can only generate an update event, Capture Compare 1 event,
mbed_official	76:aeb1df146756	1925	* Capture Compare 2 event and TIM_EventSource_Trigger.
mbed_official	76:aeb1df146756	1926	* @note TIM10 and TIM11 can only generate an update event and Capture Compare 1 event.
mbed_official	76:aeb1df146756	1927	* @retval None
mbed_official	76:aeb1df146756	1928	*/
mbed_official	76:aeb1df146756	1929	void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource)
mbed_official	76:aeb1df146756	1930	{
mbed_official	76:aeb1df146756	1931	/* Check the parameters */
mbed_official	76:aeb1df146756	1932	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1933	assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource));
mbed_official	76:aeb1df146756	1934	/* Set the event sources */
mbed_official	76:aeb1df146756	1935	TIMx->EGR = TIM_EventSource;
mbed_official	76:aeb1df146756	1936	}
mbed_official	76:aeb1df146756	1937
mbed_official	76:aeb1df146756	1938	/**
mbed_official	76:aeb1df146756	1939	* @brief Checks whether the specified TIM flag is set or not.
mbed_official	76:aeb1df146756	1940	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1941	* @param TIM_FLAG: specifies the flag to check.
mbed_official	76:aeb1df146756	1942	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1943	* @arg TIM_FLAG_Update: TIM update Flag.
mbed_official	76:aeb1df146756	1944	* @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag.
mbed_official	76:aeb1df146756	1945	* @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag.
mbed_official	76:aeb1df146756	1946	* @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag.
mbed_official	76:aeb1df146756	1947	* @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag.
mbed_official	76:aeb1df146756	1948	* @arg TIM_FLAG_Trigger: TIM Trigger Flag.
mbed_official	76:aeb1df146756	1949	* @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag.
mbed_official	76:aeb1df146756	1950	* @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag.
mbed_official	76:aeb1df146756	1951	* @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag.
mbed_official	76:aeb1df146756	1952	* @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag.
mbed_official	76:aeb1df146756	1953	*
mbed_official	76:aeb1df146756	1954	* @note TIM6 and TIM7 can have only one update flag.
mbed_official	76:aeb1df146756	1955	* @note TIM9 can have only update flag, TIM_FLAG_CC1, TIM_FLAG_CC2 and TIM_FLAG_Trigger,
mbed_official	76:aeb1df146756	1956	* TIM_FLAG_CC1OF or TIM_FLAG_CC2OF flags.
mbed_official	76:aeb1df146756	1957	* @note TIM10 and TIM11 can have only update flag, TIM_FLAG_CC1 or TIM_FLAG_CC1OF flags
mbed_official	76:aeb1df146756	1958	* @retval The new state of TIM_FLAG (SET or RESET).
mbed_official	76:aeb1df146756	1959	*/
mbed_official	76:aeb1df146756	1960	FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official	76:aeb1df146756	1961	{
mbed_official	76:aeb1df146756	1962	ITStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	1963
mbed_official	76:aeb1df146756	1964	/* Check the parameters */
mbed_official	76:aeb1df146756	1965	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1966	assert_param(IS_TIM_GET_FLAG(TIM_FLAG));
mbed_official	76:aeb1df146756	1967
mbed_official	76:aeb1df146756	1968	if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET)
mbed_official	76:aeb1df146756	1969	{
mbed_official	76:aeb1df146756	1970	bitstatus = SET;
mbed_official	76:aeb1df146756	1971	}
mbed_official	76:aeb1df146756	1972	else
mbed_official	76:aeb1df146756	1973	{
mbed_official	76:aeb1df146756	1974	bitstatus = RESET;
mbed_official	76:aeb1df146756	1975	}
mbed_official	76:aeb1df146756	1976	return bitstatus;
mbed_official	76:aeb1df146756	1977	}
mbed_official	76:aeb1df146756	1978
mbed_official	76:aeb1df146756	1979	/**
mbed_official	76:aeb1df146756	1980	* @brief Clears the TIMx's pending flags.
mbed_official	76:aeb1df146756	1981	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1982	* @param TIM_FLAG: specifies the flag bit to clear.
mbed_official	76:aeb1df146756	1983	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	1984	* @arg TIM_FLAG_Update: TIM update Flag.
mbed_official	76:aeb1df146756	1985	* @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag.
mbed_official	76:aeb1df146756	1986	* @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag.
mbed_official	76:aeb1df146756	1987	* @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag.
mbed_official	76:aeb1df146756	1988	* @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag.
mbed_official	76:aeb1df146756	1989	* @arg TIM_FLAG_Trigger: TIM Trigger Flag.
mbed_official	76:aeb1df146756	1990	* @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag.
mbed_official	76:aeb1df146756	1991	* @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag.
mbed_official	76:aeb1df146756	1992	* @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag.
mbed_official	76:aeb1df146756	1993	* @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag.
mbed_official	76:aeb1df146756	1994	* @note TIM6 and TIM7 can have only one update flag.
mbed_official	76:aeb1df146756	1995	* @note TIM9 can have only update flag, TIM_FLAG_CC1, TIM_FLAG_CC2 and TIM_FLAG_Trigger flags
mbed_official	76:aeb1df146756	1996	* TIM_FLAG_CC1OF or TIM_FLAG_CC2OF flags.
mbed_official	76:aeb1df146756	1997	* @note TIM10 and TIM11 can have only update flag, TIM_FLAG_CC1
mbed_official	76:aeb1df146756	1998	* or TIM_FLAG_CC1OF flags
mbed_official	76:aeb1df146756	1999	* @retval None
mbed_official	76:aeb1df146756	2000	*/
mbed_official	76:aeb1df146756	2001	void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official	76:aeb1df146756	2002	{
mbed_official	76:aeb1df146756	2003	/* Check the parameters */
mbed_official	76:aeb1df146756	2004	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2005	assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG));
mbed_official	76:aeb1df146756	2006
mbed_official	76:aeb1df146756	2007	/* Clear the flags */
mbed_official	76:aeb1df146756	2008	TIMx->SR = (uint16_t)~TIM_FLAG;
mbed_official	76:aeb1df146756	2009	}
mbed_official	76:aeb1df146756	2010
mbed_official	76:aeb1df146756	2011	/**
mbed_official	76:aeb1df146756	2012	* @brief Checks whether the TIM interrupt has occurred or not.
mbed_official	76:aeb1df146756	2013	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2014	* @param TIM_IT: specifies the TIM interrupt source to check.
mbed_official	76:aeb1df146756	2015	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2016	* @arg TIM_IT_Update: TIM update Interrupt source.
mbed_official	76:aeb1df146756	2017	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source.
mbed_official	76:aeb1df146756	2018	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source.
mbed_official	76:aeb1df146756	2019	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source.
mbed_official	76:aeb1df146756	2020	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source.
mbed_official	76:aeb1df146756	2021	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source.
mbed_official	76:aeb1df146756	2022	*
mbed_official	76:aeb1df146756	2023	* @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official	76:aeb1df146756	2024	* @note TIM9 can have only update interrupt, TIM_FLAG_CC1 or TIM_FLAG_CC2,
mbed_official	76:aeb1df146756	2025	* interrupt and TIM_IT_Trigger interrupt.
mbed_official	76:aeb1df146756	2026	* @note TIM10 and TIM11 can have only update interrupt or TIM_FLAG_CC1
mbed_official	76:aeb1df146756	2027	* interrupt
mbed_official	76:aeb1df146756	2028	* @retval The new state of the TIM_IT(SET or RESET).
mbed_official	76:aeb1df146756	2029	*/
mbed_official	76:aeb1df146756	2030	ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official	76:aeb1df146756	2031	{
mbed_official	76:aeb1df146756	2032	ITStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	2033	uint16_t itstatus = 0x0, itenable = 0x0;
mbed_official	76:aeb1df146756	2034
mbed_official	76:aeb1df146756	2035	/* Check the parameters */
mbed_official	76:aeb1df146756	2036	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2037	assert_param(IS_TIM_GET_IT(TIM_IT));
mbed_official	76:aeb1df146756	2038
mbed_official	76:aeb1df146756	2039	itstatus = TIMx->SR & TIM_IT;
mbed_official	76:aeb1df146756	2040
mbed_official	76:aeb1df146756	2041	itenable = TIMx->DIER & TIM_IT;
mbed_official	76:aeb1df146756	2042	if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
mbed_official	76:aeb1df146756	2043	{
mbed_official	76:aeb1df146756	2044	bitstatus = SET;
mbed_official	76:aeb1df146756	2045	}
mbed_official	76:aeb1df146756	2046	else
mbed_official	76:aeb1df146756	2047	{
mbed_official	76:aeb1df146756	2048	bitstatus = RESET;
mbed_official	76:aeb1df146756	2049	}
mbed_official	76:aeb1df146756	2050	return bitstatus;
mbed_official	76:aeb1df146756	2051	}
mbed_official	76:aeb1df146756	2052
mbed_official	76:aeb1df146756	2053	/**
mbed_official	76:aeb1df146756	2054	* @brief Clears the TIMx's interrupt pending bits.
mbed_official	76:aeb1df146756	2055	* @param TIMx: where x can be 2 to 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2056	* @param TIM_IT: specifies the pending bit to clear.
mbed_official	76:aeb1df146756	2057	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2058	* @arg TIM_IT_Update: TIM update Interrupt source.
mbed_official	76:aeb1df146756	2059	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source.
mbed_official	76:aeb1df146756	2060	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source.
mbed_official	76:aeb1df146756	2061	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source.
mbed_official	76:aeb1df146756	2062	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source.
mbed_official	76:aeb1df146756	2063	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source.
mbed_official	76:aeb1df146756	2064	* @note
mbed_official	76:aeb1df146756	2065	* @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official	76:aeb1df146756	2066	* @note TIM9 can have only update interrupt, TIM_IT_CC1 or TIM_IT_CC2,
mbed_official	76:aeb1df146756	2067	* and TIM_IT_Trigger interrupt.
mbed_official	76:aeb1df146756	2068	* @note TIM10 and TIM11 can have only update interrupt or TIM_IT_CC1
mbed_official	76:aeb1df146756	2069	* interrupt
mbed_official	76:aeb1df146756	2070	* @retval None
mbed_official	76:aeb1df146756	2071	*/
mbed_official	76:aeb1df146756	2072	void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official	76:aeb1df146756	2073	{
mbed_official	76:aeb1df146756	2074	/* Check the parameters */
mbed_official	76:aeb1df146756	2075	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2076	assert_param(IS_TIM_IT(TIM_IT));
mbed_official	76:aeb1df146756	2077
mbed_official	76:aeb1df146756	2078	/* Clear the IT pending Bit */
mbed_official	76:aeb1df146756	2079	TIMx->SR = (uint16_t)~TIM_IT;
mbed_official	76:aeb1df146756	2080	}
mbed_official	76:aeb1df146756	2081
mbed_official	76:aeb1df146756	2082	/**
mbed_official	76:aeb1df146756	2083	* @brief Configures the TIMx's DMA interface.
mbed_official	76:aeb1df146756	2084	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2085	* @param TIM_DMABase: DMA Base address.
mbed_official	76:aeb1df146756	2086	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2087	* @arg TIM_DMABase_CR1: TIM CR1 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2088	* @arg TIM_DMABase_CR2: TIM CR2 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2089	* @arg TIM_DMABase_SMCR: TIM SMCR register as TIM DMA Base.
mbed_official	76:aeb1df146756	2090	* @arg TIM_DMABase_DIER: TIM DIER register as TIM DMA Base.
mbed_official	76:aeb1df146756	2091	* @arg TIM_DMABase_SR: TIM SR register as TIM DMA Base.
mbed_official	76:aeb1df146756	2092	* @arg TIM_DMABase_EGR: TIM EGR register as TIM DMA Base.
mbed_official	76:aeb1df146756	2093	* @arg TIM_DMABase_CCMR1: TIM CCMR1 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2094	* @arg TIM_DMABase_CCMR2: TIM CCMR2 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2095	* @arg TIM_DMABase_CCER: TIM CCER register as TIM DMA Base.
mbed_official	76:aeb1df146756	2096	* @arg TIM_DMABase_CNT: TIM CNT register as TIM DMA Base.
mbed_official	76:aeb1df146756	2097	* @arg TIM_DMABase_PSC: TIM PSC register as TIM DMA Base.
mbed_official	76:aeb1df146756	2098	* @arg TIM_DMABase_ARR: TIM ARR register as TIM DMA Base.
mbed_official	76:aeb1df146756	2099	* @arg TIM_DMABase_CCR1: TIM CCR1 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2100	* @arg TIM_DMABase_CCR2: TIM CCR2 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2101	* @arg TIM_DMABase_CCR3: TIM CCR3 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2102	* @arg TIM_DMABase_CCR4: TIM CCR4 register as TIM DMA Base.
mbed_official	76:aeb1df146756	2103	* @arg TIM_DMABase_DCR: TIM DCR register as TIM DMA Base.
mbed_official	76:aeb1df146756	2104	* @arg TIM_DMABase_OR: TIM OR register as TIM DMA Base.
mbed_official	76:aeb1df146756	2105	* @param TIM_DMABurstLength: DMA Burst length.
mbed_official	76:aeb1df146756	2106	* This parameter can be one value between:
mbed_official	76:aeb1df146756	2107	* TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official	76:aeb1df146756	2108	* @retval None
mbed_official	76:aeb1df146756	2109	*/
mbed_official	76:aeb1df146756	2110	void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength)
mbed_official	76:aeb1df146756	2111	{
mbed_official	76:aeb1df146756	2112	/* Check the parameters */
mbed_official	76:aeb1df146756	2113	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2114	assert_param(IS_TIM_DMA_BASE(TIM_DMABase));
mbed_official	76:aeb1df146756	2115	assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength));
mbed_official	76:aeb1df146756	2116	/* Set the DMA Base and the DMA Burst Length */
mbed_official	76:aeb1df146756	2117	TIMx->DCR = TIM_DMABase \| TIM_DMABurstLength;
mbed_official	76:aeb1df146756	2118	}
mbed_official	76:aeb1df146756	2119
mbed_official	76:aeb1df146756	2120	/**
mbed_official	76:aeb1df146756	2121	* @brief Enables or disables the TIMx's DMA Requests.
mbed_official	76:aeb1df146756	2122	* @param TIMx: where x can be 2, 3, 4, 5, 6 or 7 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2123	* @param TIM_DMASource: specifies the DMA Request sources.
mbed_official	76:aeb1df146756	2124	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2125	* @arg TIM_DMA_Update: TIM update Interrupt source.
mbed_official	76:aeb1df146756	2126	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source.
mbed_official	76:aeb1df146756	2127	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source.
mbed_official	76:aeb1df146756	2128	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source.
mbed_official	76:aeb1df146756	2129	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source.
mbed_official	76:aeb1df146756	2130	* @arg TIM_DMA_Trigger: TIM Trigger DMA source.
mbed_official	76:aeb1df146756	2131	* @param NewState: new state of the DMA Request sources.
mbed_official	76:aeb1df146756	2132	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2133	* @retval None
mbed_official	76:aeb1df146756	2134	*/
mbed_official	76:aeb1df146756	2135	void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState)
mbed_official	76:aeb1df146756	2136	{
mbed_official	76:aeb1df146756	2137	/* Check the parameters */
mbed_official	76:aeb1df146756	2138	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2139	assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource));
mbed_official	76:aeb1df146756	2140	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2141
mbed_official	76:aeb1df146756	2142	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2143	{
mbed_official	76:aeb1df146756	2144	/* Enable the DMA sources */
mbed_official	76:aeb1df146756	2145	TIMx->DIER \|= TIM_DMASource;
mbed_official	76:aeb1df146756	2146	}
mbed_official	76:aeb1df146756	2147	else
mbed_official	76:aeb1df146756	2148	{
mbed_official	76:aeb1df146756	2149	/* Disable the DMA sources */
mbed_official	76:aeb1df146756	2150	TIMx->DIER &= (uint16_t)~TIM_DMASource;
mbed_official	76:aeb1df146756	2151	}
mbed_official	76:aeb1df146756	2152	}
mbed_official	76:aeb1df146756	2153
mbed_official	76:aeb1df146756	2154	/**
mbed_official	76:aeb1df146756	2155	* @brief Selects the TIMx peripheral Capture Compare DMA source.
mbed_official	76:aeb1df146756	2156	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2157	* @param NewState: new state of the Capture Compare DMA source
mbed_official	76:aeb1df146756	2158	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2159	* @retval None
mbed_official	76:aeb1df146756	2160	*/
mbed_official	76:aeb1df146756	2161	void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	2162	{
mbed_official	76:aeb1df146756	2163	/* Check the parameters */
mbed_official	76:aeb1df146756	2164	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2165	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2166
mbed_official	76:aeb1df146756	2167	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2168	{
mbed_official	76:aeb1df146756	2169	/* Set the CCDS Bit */
mbed_official	76:aeb1df146756	2170	TIMx->CR2 \|= TIM_CR2_CCDS;
mbed_official	76:aeb1df146756	2171	}
mbed_official	76:aeb1df146756	2172	else
mbed_official	76:aeb1df146756	2173	{
mbed_official	76:aeb1df146756	2174	/* Reset the CCDS Bit */
mbed_official	76:aeb1df146756	2175	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCDS);
mbed_official	76:aeb1df146756	2176	}
mbed_official	76:aeb1df146756	2177	}
mbed_official	76:aeb1df146756	2178
mbed_official	76:aeb1df146756	2179	/**
mbed_official	76:aeb1df146756	2180	* @}
mbed_official	76:aeb1df146756	2181	*/
mbed_official	76:aeb1df146756	2182
mbed_official	76:aeb1df146756	2183	/** @defgroup TIM_Group5 Clocks management functions
mbed_official	76:aeb1df146756	2184	* @brief Clocks management functions
mbed_official	76:aeb1df146756	2185	*
mbed_official	76:aeb1df146756	2186	@verbatim
mbed_official	76:aeb1df146756	2187	===============================================================================
mbed_official	76:aeb1df146756	2188	##### Clocks management functions #####
mbed_official	76:aeb1df146756	2189	===============================================================================
mbed_official	76:aeb1df146756	2190
mbed_official	76:aeb1df146756	2191	@endverbatim
mbed_official	76:aeb1df146756	2192	* @{
mbed_official	76:aeb1df146756	2193	*/
mbed_official	76:aeb1df146756	2194
mbed_official	76:aeb1df146756	2195	/**
mbed_official	76:aeb1df146756	2196	* @brief Configures the TIMx internal Clock
mbed_official	76:aeb1df146756	2197	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2198	* @retval None
mbed_official	76:aeb1df146756	2199	*/
mbed_official	76:aeb1df146756	2200	void TIM_InternalClockConfig(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2201	{
mbed_official	76:aeb1df146756	2202	/* Check the parameters */
mbed_official	76:aeb1df146756	2203	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2204	/* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official	76:aeb1df146756	2205	TIMx->SMCR &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	2206	}
mbed_official	76:aeb1df146756	2207
mbed_official	76:aeb1df146756	2208	/**
mbed_official	76:aeb1df146756	2209	* @brief Configures the TIMx Internal Trigger as External Clock
mbed_official	76:aeb1df146756	2210	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2211	* @param TIM_ITRSource: Trigger source.
mbed_official	76:aeb1df146756	2212	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2213	* @param TIM_TS_ITR0: Internal Trigger 0.
mbed_official	76:aeb1df146756	2214	* @param TIM_TS_ITR1: Internal Trigger 1.
mbed_official	76:aeb1df146756	2215	* @param TIM_TS_ITR2: Internal Trigger 2.
mbed_official	76:aeb1df146756	2216	* @param TIM_TS_ITR3: Internal Trigger 3.
mbed_official	76:aeb1df146756	2217	* @retval None
mbed_official	76:aeb1df146756	2218	*/
mbed_official	76:aeb1df146756	2219	void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official	76:aeb1df146756	2220	{
mbed_official	76:aeb1df146756	2221	/* Check the parameters */
mbed_official	76:aeb1df146756	2222	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2223	assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official	76:aeb1df146756	2224	/* Select the Internal Trigger */
mbed_official	76:aeb1df146756	2225	TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2226	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2227	TIMx->SMCR \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2228	}
mbed_official	76:aeb1df146756	2229
mbed_official	76:aeb1df146756	2230	/**
mbed_official	76:aeb1df146756	2231	* @brief Configures the TIMx Trigger as External Clock
mbed_official	76:aeb1df146756	2232	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2233	* @param TIM_TIxExternalCLKSource: Trigger source.
mbed_official	76:aeb1df146756	2234	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2235	* @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector.
mbed_official	76:aeb1df146756	2236	* @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1.
mbed_official	76:aeb1df146756	2237	* @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2.
mbed_official	76:aeb1df146756	2238	* @param TIM_ICPolarity: specifies the TIx Polarity.
mbed_official	76:aeb1df146756	2239	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2240	* @arg TIM_ICPolarity_Rising:
mbed_official	76:aeb1df146756	2241	* @arg TIM_ICPolarity_Falling:
mbed_official	76:aeb1df146756	2242	* @param ICFilter : specifies the filter value.
mbed_official	76:aeb1df146756	2243	* This parameter must be a value between 0x0 and 0xF.
mbed_official	76:aeb1df146756	2244	* @retval None
mbed_official	76:aeb1df146756	2245	*/
mbed_official	76:aeb1df146756	2246	void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official	76:aeb1df146756	2247	uint16_t TIM_ICPolarity, uint16_t ICFilter)
mbed_official	76:aeb1df146756	2248	{
mbed_official	76:aeb1df146756	2249	/* Check the parameters */
mbed_official	76:aeb1df146756	2250	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2251	assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity));
mbed_official	76:aeb1df146756	2252	assert_param(IS_TIM_IC_FILTER(ICFilter));
mbed_official	76:aeb1df146756	2253
mbed_official	76:aeb1df146756	2254	/* Configure the Timer Input Clock Source */
mbed_official	76:aeb1df146756	2255	if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2)
mbed_official	76:aeb1df146756	2256	{
mbed_official	76:aeb1df146756	2257	TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official	76:aeb1df146756	2258	}
mbed_official	76:aeb1df146756	2259	else
mbed_official	76:aeb1df146756	2260	{
mbed_official	76:aeb1df146756	2261	TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official	76:aeb1df146756	2262	}
mbed_official	76:aeb1df146756	2263	/* Select the Trigger source */
mbed_official	76:aeb1df146756	2264	TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource);
mbed_official	76:aeb1df146756	2265	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2266	TIMx->SMCR \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2267	}
mbed_official	76:aeb1df146756	2268
mbed_official	76:aeb1df146756	2269	/**
mbed_official	76:aeb1df146756	2270	* @brief Configures the External clock Mode1
mbed_official	76:aeb1df146756	2271	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2272	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	2273	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2274	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	2275	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	2276	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	2277	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	2278	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	2279	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2280	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	2281	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	2282	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	2283	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	2284	* @retval None
mbed_official	76:aeb1df146756	2285	*/
mbed_official	76:aeb1df146756	2286	void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	76:aeb1df146756	2287	uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	2288	{
mbed_official	76:aeb1df146756	2289	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2290
mbed_official	76:aeb1df146756	2291	/* Check the parameters */
mbed_official	76:aeb1df146756	2292	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2293	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	2294	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	2295	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	2296
mbed_official	76:aeb1df146756	2297	/* Configure the ETR Clock source */
mbed_official	76:aeb1df146756	2298	TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official	76:aeb1df146756	2299
mbed_official	76:aeb1df146756	2300	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	2301	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2302	/* Reset the SMS Bits */
mbed_official	76:aeb1df146756	2303	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	2304	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2305	tmpsmcr \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2306	/* Select the Trigger selection : ETRF */
mbed_official	76:aeb1df146756	2307	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official	76:aeb1df146756	2308	tmpsmcr \|= TIM_TS_ETRF;
mbed_official	76:aeb1df146756	2309	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2310	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2311	}
mbed_official	76:aeb1df146756	2312
mbed_official	76:aeb1df146756	2313	/**
mbed_official	76:aeb1df146756	2314	* @brief Configures the External clock Mode2
mbed_official	76:aeb1df146756	2315	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2316	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	2317	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2318	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	2319	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	2320	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	2321	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	2322	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	2323	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2324	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	2325	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	2326	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	2327	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	2328	* @retval None
mbed_official	76:aeb1df146756	2329	*/
mbed_official	76:aeb1df146756	2330	void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official	76:aeb1df146756	2331	uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	2332	{
mbed_official	76:aeb1df146756	2333	/* Check the parameters */
mbed_official	76:aeb1df146756	2334	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2335	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	2336	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	2337	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	2338
mbed_official	76:aeb1df146756	2339	/* Configure the ETR Clock source */
mbed_official	76:aeb1df146756	2340	TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official	76:aeb1df146756	2341	/* Enable the External clock mode2 */
mbed_official	76:aeb1df146756	2342	TIMx->SMCR \|= TIM_SMCR_ECE;
mbed_official	76:aeb1df146756	2343	}
mbed_official	76:aeb1df146756	2344
mbed_official	76:aeb1df146756	2345	/**
mbed_official	76:aeb1df146756	2346	* @}
mbed_official	76:aeb1df146756	2347	*/
mbed_official	76:aeb1df146756	2348
mbed_official	76:aeb1df146756	2349	/** @defgroup TIM_Group6 Synchronization management functions
mbed_official	76:aeb1df146756	2350	* @brief Synchronization management functions
mbed_official	76:aeb1df146756	2351	*
mbed_official	76:aeb1df146756	2352	@verbatim
mbed_official	76:aeb1df146756	2353	===============================================================================
mbed_official	76:aeb1df146756	2354	##### Synchronization management functions #####
mbed_official	76:aeb1df146756	2355	===============================================================================
mbed_official	76:aeb1df146756	2356	* TIM Driver: how to use it in synchronization Mode *
mbed_official	76:aeb1df146756	2357	===============================================================================
mbed_official	76:aeb1df146756	2358	[..] Case of two/several Timers
mbed_official	76:aeb1df146756	2359	(#) Configure the Master Timers using the following functions:
mbed_official	76:aeb1df146756	2360	(++) void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2361	uint16_t TIM_TRGOSource).
mbed_official	76:aeb1df146756	2362	(++) void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2363	uint16_t TIM_MasterSlaveMode);
mbed_official	76:aeb1df146756	2364	(#) Configure the Slave Timers using the following functions:
mbed_official	76:aeb1df146756	2365	(++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2366	uint16_t TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2367	(++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official	76:aeb1df146756	2368	[..] Case of Timers and external trigger(ETR pin)
mbed_official	76:aeb1df146756	2369	(#) Configure the Etrenal trigger using this function:
mbed_official	76:aeb1df146756	2370	(++) void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official	76:aeb1df146756	2371	uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official	76:aeb1df146756	2372	(#) Configure the Slave Timers using the following functions:
mbed_official	76:aeb1df146756	2373	(++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2374	uint16_t TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2375	(++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official	76:aeb1df146756	2376
mbed_official	76:aeb1df146756	2377	@endverbatim
mbed_official	76:aeb1df146756	2378	* @{
mbed_official	76:aeb1df146756	2379	*/
mbed_official	76:aeb1df146756	2380
mbed_official	76:aeb1df146756	2381	/**
mbed_official	76:aeb1df146756	2382	* @brief Selects the Input Trigger source
mbed_official	76:aeb1df146756	2383	* @param TIMx: where x can be 2, 3, 4, 5, or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2384	* @param TIM_InputTriggerSource: The Input Trigger source.
mbed_official	76:aeb1df146756	2385	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2386	* @arg TIM_TS_ITR0: Internal Trigger 0.
mbed_official	76:aeb1df146756	2387	* @arg TIM_TS_ITR1: Internal Trigger 1.
mbed_official	76:aeb1df146756	2388	* @arg TIM_TS_ITR2: Internal Trigger 2.
mbed_official	76:aeb1df146756	2389	* @arg TIM_TS_ITR3: Internal Trigger 3.
mbed_official	76:aeb1df146756	2390	* @arg TIM_TS_TI1F_ED: TI1 Edge Detector.
mbed_official	76:aeb1df146756	2391	* @arg TIM_TS_TI1FP1: Filtered Timer Input 1.
mbed_official	76:aeb1df146756	2392	* @arg TIM_TS_TI2FP2: Filtered Timer Input 2.
mbed_official	76:aeb1df146756	2393	* @arg TIM_TS_ETRF: External Trigger input.
mbed_official	76:aeb1df146756	2394	* @retval None
mbed_official	76:aeb1df146756	2395	*/
mbed_official	76:aeb1df146756	2396	void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official	76:aeb1df146756	2397	{
mbed_official	76:aeb1df146756	2398	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2399
mbed_official	76:aeb1df146756	2400	/* Check the parameters */
mbed_official	76:aeb1df146756	2401	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2402	assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official	76:aeb1df146756	2403
mbed_official	76:aeb1df146756	2404	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	2405	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2406	/* Reset the TS Bits */
mbed_official	76:aeb1df146756	2407	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official	76:aeb1df146756	2408	/* Set the Input Trigger source */
mbed_official	76:aeb1df146756	2409	tmpsmcr \|= TIM_InputTriggerSource;
mbed_official	76:aeb1df146756	2410	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2411	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2412	}
mbed_official	76:aeb1df146756	2413
mbed_official	76:aeb1df146756	2414	/**
mbed_official	76:aeb1df146756	2415	* @brief Selects the TIMx Trigger Output Mode.
mbed_official	76:aeb1df146756	2416	* @param TIMx: where x can be 2, 3, 4, 5, 6, 7 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2417	* @param TIM_TRGOSource: specifies the Trigger Output source.
mbed_official	76:aeb1df146756	2418	* This paramter can be one of the following values:
mbed_official	76:aeb1df146756	2419	*
mbed_official	76:aeb1df146756	2420	* @param For all TIMx
mbed_official	76:aeb1df146756	2421	* @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2422	* @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2423	* @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2424	*
mbed_official	76:aeb1df146756	2425	* @param For all TIMx except TIM6 and TIM7
mbed_official	76:aeb1df146756	2426	* @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag
mbed_official	76:aeb1df146756	2427	* is to be set, as soon as a capture or compare match occurs (TRGO).
mbed_official	76:aeb1df146756	2428	* @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2429
mbed_official	76:aeb1df146756	2430	* @param For all TIMx except TIM6, TIM7, TIM10 and TIM11
mbed_official	76:aeb1df146756	2431	* @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2432
mbed_official	76:aeb1df146756	2433	* @param For TIM2, TIM3 and TIM4
mbed_official	76:aeb1df146756	2434	* @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2435	* @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2436	*
mbed_official	76:aeb1df146756	2437	* @retval None
mbed_official	76:aeb1df146756	2438	*/
mbed_official	76:aeb1df146756	2439	void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource)
mbed_official	76:aeb1df146756	2440	{
mbed_official	76:aeb1df146756	2441	/* Check the parameters */
mbed_official	76:aeb1df146756	2442	assert_param(IS_TIM_LIST5_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2443	assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource));
mbed_official	76:aeb1df146756	2444
mbed_official	76:aeb1df146756	2445	/* Reset the MMS Bits */
mbed_official	76:aeb1df146756	2446	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_MMS);
mbed_official	76:aeb1df146756	2447	/* Select the TRGO source */
mbed_official	76:aeb1df146756	2448	TIMx->CR2 \|= TIM_TRGOSource;
mbed_official	76:aeb1df146756	2449	}
mbed_official	76:aeb1df146756	2450
mbed_official	76:aeb1df146756	2451	/**
mbed_official	76:aeb1df146756	2452	* @brief Selects the TIMx Slave Mode.
mbed_official	76:aeb1df146756	2453	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2454	* @param TIM_SlaveMode: specifies the Timer Slave Mode.
mbed_official	76:aeb1df146756	2455	* This paramter can be one of the following values:
mbed_official	76:aeb1df146756	2456	* @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes
mbed_official	76:aeb1df146756	2457	* the counter and triggers an update of the registers.
mbed_official	76:aeb1df146756	2458	* @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high.
mbed_official	76:aeb1df146756	2459	* @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI.
mbed_official	76:aeb1df146756	2460	* @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter.
mbed_official	76:aeb1df146756	2461	* @retval None
mbed_official	76:aeb1df146756	2462	*/
mbed_official	76:aeb1df146756	2463	void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode)
mbed_official	76:aeb1df146756	2464	{
mbed_official	76:aeb1df146756	2465	/* Check the parameters */
mbed_official	76:aeb1df146756	2466	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2467	assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode));
mbed_official	76:aeb1df146756	2468
mbed_official	76:aeb1df146756	2469	/* Reset the SMS Bits */
mbed_official	76:aeb1df146756	2470	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_SMS);
mbed_official	76:aeb1df146756	2471	/* Select the Slave Mode */
mbed_official	76:aeb1df146756	2472	TIMx->SMCR \|= TIM_SlaveMode;
mbed_official	76:aeb1df146756	2473	}
mbed_official	76:aeb1df146756	2474
mbed_official	76:aeb1df146756	2475	/**
mbed_official	76:aeb1df146756	2476	* @brief Sets or Resets the TIMx Master/Slave Mode.
mbed_official	76:aeb1df146756	2477	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2478	* @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode.
mbed_official	76:aeb1df146756	2479	* This paramter can be one of the following values:
mbed_official	76:aeb1df146756	2480	* @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer
mbed_official	76:aeb1df146756	2481	* and its slaves (through TRGO).
mbed_official	76:aeb1df146756	2482	* @arg TIM_MasterSlaveMode_Disable: No action
mbed_official	76:aeb1df146756	2483	* @retval None
mbed_official	76:aeb1df146756	2484	*/
mbed_official	76:aeb1df146756	2485	void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode)
mbed_official	76:aeb1df146756	2486	{
mbed_official	76:aeb1df146756	2487	/* Check the parameters */
mbed_official	76:aeb1df146756	2488	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2489	assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode));
mbed_official	76:aeb1df146756	2490
mbed_official	76:aeb1df146756	2491	/* Reset the MSM Bit */
mbed_official	76:aeb1df146756	2492	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_MSM);
mbed_official	76:aeb1df146756	2493
mbed_official	76:aeb1df146756	2494	/* Set or Reset the MSM Bit */
mbed_official	76:aeb1df146756	2495	TIMx->SMCR \|= TIM_MasterSlaveMode;
mbed_official	76:aeb1df146756	2496	}
mbed_official	76:aeb1df146756	2497
mbed_official	76:aeb1df146756	2498	/**
mbed_official	76:aeb1df146756	2499	* @brief Configures the TIMx External Trigger (ETR).
mbed_official	76:aeb1df146756	2500	* @param TIMx: where x can be 2, 3, 4, 5, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2501	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	2502	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2503	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	2504	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	2505	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	2506	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	2507	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	2508	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2509	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	2510	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	2511	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	2512	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	2513	* @retval None
mbed_official	76:aeb1df146756	2514	*/
mbed_official	76:aeb1df146756	2515	void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	76:aeb1df146756	2516	uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	2517	{
mbed_official	76:aeb1df146756	2518	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2519
mbed_official	76:aeb1df146756	2520	/* Check the parameters */
mbed_official	76:aeb1df146756	2521	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2522	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	2523	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	2524	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	2525
mbed_official	76:aeb1df146756	2526	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2527	/* Reset the ETR Bits */
mbed_official	76:aeb1df146756	2528	tmpsmcr &= SMCR_ETR_MASK;
mbed_official	76:aeb1df146756	2529	/* Set the Prescaler, the Filter value and the Polarity */
mbed_official	76:aeb1df146756	2530	tmpsmcr \|= (uint16_t)(TIM_ExtTRGPrescaler \| (uint16_t)(TIM_ExtTRGPolarity \| (uint16_t)(ExtTRGFilter << (uint16_t)8)));
mbed_official	76:aeb1df146756	2531	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2532	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2533	}
mbed_official	76:aeb1df146756	2534
mbed_official	76:aeb1df146756	2535	/**
mbed_official	76:aeb1df146756	2536	* @}
mbed_official	76:aeb1df146756	2537	*/
mbed_official	76:aeb1df146756	2538
mbed_official	76:aeb1df146756	2539	/** @defgroup TIM_Group7 Specific interface management functions
mbed_official	76:aeb1df146756	2540	* @brief Specific interface management functions
mbed_official	76:aeb1df146756	2541	*
mbed_official	76:aeb1df146756	2542	@verbatim
mbed_official	76:aeb1df146756	2543	===============================================================================
mbed_official	76:aeb1df146756	2544	##### Specific interface management functions #####
mbed_official	76:aeb1df146756	2545	===============================================================================
mbed_official	76:aeb1df146756	2546
mbed_official	76:aeb1df146756	2547	@endverbatim
mbed_official	76:aeb1df146756	2548	* @{
mbed_official	76:aeb1df146756	2549	*/
mbed_official	76:aeb1df146756	2550
mbed_official	76:aeb1df146756	2551	/**
mbed_official	76:aeb1df146756	2552	* @brief Configures the TIMx Encoder Interface.
mbed_official	80:66393a7b209d	2553	* @param TIMx: where x can be 2, 3, 4, 5 or 9 to select the TIM peripheral.
mbed_official	80:66393a7b209d	2554	* @note TIM9 is supporting Encoder Interface only in STM32L1XX_MDP, STM32L1XX_HD
mbed_official	80:66393a7b209d	2555	* and STM32L1XX_XL devices.
mbed_official	76:aeb1df146756	2556	* @param TIM_EncoderMode: specifies the TIMx Encoder Mode.
mbed_official	76:aeb1df146756	2557	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2558	* @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level.
mbed_official	76:aeb1df146756	2559	* @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level.
mbed_official	76:aeb1df146756	2560	* @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending
mbed_official	76:aeb1df146756	2561	* on the level of the other input.
mbed_official	76:aeb1df146756	2562	* @param TIM_IC1Polarity: specifies the IC1 Polarity.
mbed_official	76:aeb1df146756	2563	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	2564	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	2565	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	2566	* @param TIM_IC2Polarity: specifies the IC2 Polarity
mbed_official	76:aeb1df146756	2567	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	2568	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	2569	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	2570	* @retval None
mbed_official	76:aeb1df146756	2571	*/
mbed_official	76:aeb1df146756	2572	void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official	76:aeb1df146756	2573	uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity)
mbed_official	76:aeb1df146756	2574	{
mbed_official	76:aeb1df146756	2575	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2576	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	2577	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	2578
mbed_official	76:aeb1df146756	2579	/* Check the parameters */
mbed_official	80:66393a7b209d	2580	assert_param(IS_TIM_LIST7_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2581	assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode));
mbed_official	76:aeb1df146756	2582	assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity));
mbed_official	76:aeb1df146756	2583	assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity));
mbed_official	76:aeb1df146756	2584
mbed_official	76:aeb1df146756	2585	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	2586	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2587	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	2588	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	2589	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	2590	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	2591	/* Set the encoder Mode */
mbed_official	76:aeb1df146756	2592	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	2593	tmpsmcr \|= TIM_EncoderMode;
mbed_official	76:aeb1df146756	2594	/* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official	76:aeb1df146756	2595	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S)));
mbed_official	76:aeb1df146756	2596	tmpccmr1 \|= TIM_CCMR1_CC1S_0 \| TIM_CCMR1_CC2S_0;
mbed_official	76:aeb1df146756	2597	/* Set the TI1 and the TI2 Polarities */
mbed_official	76:aeb1df146756	2598	tmpccer &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCER_CC1P)) & ((uint16_t)~((uint16_t)TIM_CCER_CC2P)));
mbed_official	76:aeb1df146756	2599	tmpccer \|= (uint16_t)(TIM_IC1Polarity \| (uint16_t)(TIM_IC2Polarity << (uint16_t)4));
mbed_official	76:aeb1df146756	2600	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2601	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2602	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	2603	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	2604	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	2605	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	2606	}
mbed_official	76:aeb1df146756	2607
mbed_official	76:aeb1df146756	2608	/**
mbed_official	76:aeb1df146756	2609	* @brief Enables or disables the TIMx's Hall sensor interface.
mbed_official	76:aeb1df146756	2610	* @param TIMx: where x can be 2, 3, 4 or 5 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2611	* @param NewState: new state of the TIMx Hall sensor interface.
mbed_official	76:aeb1df146756	2612	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2613	* @retval None
mbed_official	76:aeb1df146756	2614	*/
mbed_official	76:aeb1df146756	2615	void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	2616	{
mbed_official	76:aeb1df146756	2617	/* Check the parameters */
mbed_official	76:aeb1df146756	2618	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2619	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2620
mbed_official	76:aeb1df146756	2621	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2622	{
mbed_official	76:aeb1df146756	2623	/* Set the TI1S Bit */
mbed_official	76:aeb1df146756	2624	TIMx->CR2 \|= TIM_CR2_TI1S;
mbed_official	76:aeb1df146756	2625	}
mbed_official	76:aeb1df146756	2626	else
mbed_official	76:aeb1df146756	2627	{
mbed_official	76:aeb1df146756	2628	/* Reset the TI1S Bit */
mbed_official	76:aeb1df146756	2629	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_TI1S);
mbed_official	76:aeb1df146756	2630	}
mbed_official	76:aeb1df146756	2631	}
mbed_official	76:aeb1df146756	2632
mbed_official	76:aeb1df146756	2633	/**
mbed_official	76:aeb1df146756	2634	* @}
mbed_official	76:aeb1df146756	2635	*/
mbed_official	76:aeb1df146756	2636
mbed_official	76:aeb1df146756	2637	/** @defgroup TIM_Group8 Specific remapping management function
mbed_official	76:aeb1df146756	2638	* @brief Specific remapping management function
mbed_official	76:aeb1df146756	2639	*
mbed_official	76:aeb1df146756	2640	@verbatim
mbed_official	76:aeb1df146756	2641	===============================================================================
mbed_official	76:aeb1df146756	2642	##### Specific remapping management function #####
mbed_official	76:aeb1df146756	2643	===============================================================================
mbed_official	76:aeb1df146756	2644
mbed_official	76:aeb1df146756	2645	@endverbatim
mbed_official	76:aeb1df146756	2646	* @{
mbed_official	76:aeb1df146756	2647	*/
mbed_official	76:aeb1df146756	2648
mbed_official	76:aeb1df146756	2649	/**
mbed_official	76:aeb1df146756	2650	* @brief Configures the TIM2, TIM3, TIM9, TIM10 and TIM11 Remapping input
mbed_official	76:aeb1df146756	2651	* Capabilities.
mbed_official	76:aeb1df146756	2652	* @param TIMx: where x can be 2, 3, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2653	* @param TIM_Remap: specifies the TIM input remapping source.
mbed_official	76:aeb1df146756	2654	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2655	* @arg TIM2_TIM10_OC: TIM2 ITR1 is connected to TIM10 output compare(default).
mbed_official	76:aeb1df146756	2656	* @arg TIM2_TIM5_TRGO: TIM2 ITR1 is connected to TIM5 Trigger output.
mbed_official	76:aeb1df146756	2657	* @arg TIM3_TIM11_OC: TIM3 ITR2 is connected to TIM11 output compare(default).
mbed_official	76:aeb1df146756	2658	* @arg TIM3_TIM5_TRGO: TIM3 ITR2 is connected to TIM5 Trigger output.
mbed_official	76:aeb1df146756	2659	* @arg TIM9_GPIO: TIM9 Channel 1 is connected to dedicated Timer pin(default).
mbed_official	76:aeb1df146756	2660	* @arg TIM9_LSE: TIM9 Channel 1 is connected to LSE clock.
mbed_official	76:aeb1df146756	2661	* @arg TIM9_TIM3_TRGO: TIM9 ITR1 is connected to TIM3 TRGO.
mbed_official	76:aeb1df146756	2662	* @arg TIM9_TS_IO: TIM9 ITR1 is connected to Touch Sense IO.
mbed_official	76:aeb1df146756	2663	* @arg TIM10_GPIO: TIM10 Channel 1 is connected to dedicated Timer pin(default).
mbed_official	76:aeb1df146756	2664	* @arg TIM10_LSI: TIM10 Channel 1 is connected to LSI clock.
mbed_official	76:aeb1df146756	2665	* @arg TIM10_LSE: TIM10 Channel 1 is connected to LSE clock.
mbed_official	76:aeb1df146756	2666	* @arg TIM10_RTC: TIM10 Channel 1 is connected to RTC Output event.
mbed_official	76:aeb1df146756	2667	* @arg TIM10_RI: TIM10 Channel 1 is connected to Routing Interface (RI).
mbed_official	76:aeb1df146756	2668	* @arg TIM10_ETR_LSE: TIM10 ETR input is connected to LSE Clock.
mbed_official	76:aeb1df146756	2669	* @arg TIM10_ETR_TIM9_TRGO: TIM10 ETR input is connected to TIM9 Trigger Output.
mbed_official	76:aeb1df146756	2670	* @arg TIM11_GPIO: TIM11 Channel 1 is connected to dedicated Timer pin(default).
mbed_official	76:aeb1df146756	2671	* @arg TIM11_MSI: TIM11 Channel 1 is connected to MSI clock.
mbed_official	76:aeb1df146756	2672	* @arg TIM11_HSE_RTC: TIM11 Channel 1 is connected to HSE_RTC clock.
mbed_official	76:aeb1df146756	2673	* @arg TIM11_RI: TIM11 Channel 1 is connected to Routing Interface (RI).
mbed_official	76:aeb1df146756	2674	* @arg TIM11_ETR_LSE: TIM11 ETR input is connected to LSE Clock.
mbed_official	76:aeb1df146756	2675	* @arg TIM11_ETR_TIM9_TRGO: TIM11 ETR input is connected to TIM9 Trigger Output.
mbed_official	76:aeb1df146756	2676	* @retval None
mbed_official	76:aeb1df146756	2677	*/
mbed_official	76:aeb1df146756	2678	void TIM_RemapConfig(TIM_TypeDef* TIMx, uint32_t TIM_Remap)
mbed_official	76:aeb1df146756	2679	{
mbed_official	76:aeb1df146756	2680	/* Check the parameters */
mbed_official	76:aeb1df146756	2681	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2682	assert_param(IS_TIM_REMAP(TIM_Remap));
mbed_official	76:aeb1df146756	2683
mbed_official	76:aeb1df146756	2684	/* Set the Timer remapping configuration */
mbed_official	76:aeb1df146756	2685	TIMx->OR &= (uint16_t)(TIM_Remap >> 16);
mbed_official	76:aeb1df146756	2686	TIMx->OR \|= (uint16_t)TIM_Remap;
mbed_official	76:aeb1df146756	2687	}
mbed_official	76:aeb1df146756	2688
mbed_official	76:aeb1df146756	2689	/**
mbed_official	76:aeb1df146756	2690	* @}
mbed_official	76:aeb1df146756	2691	*/
mbed_official	76:aeb1df146756	2692
mbed_official	76:aeb1df146756	2693	/**
mbed_official	76:aeb1df146756	2694	* @brief Configure the TI1 as Input.
mbed_official	76:aeb1df146756	2695	* @param TIMx: where x can be 2, 3, 4, 9, 10 or 11 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2696	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	76:aeb1df146756	2697	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2698	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	2699	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	2700	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	2701	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2702	* @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official	76:aeb1df146756	2703	* @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official	76:aeb1df146756	2704	* @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	2705	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	2706	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	2707	* @retval None
mbed_official	76:aeb1df146756	2708	*/
mbed_official	76:aeb1df146756	2709	static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	2710	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	2711	{
mbed_official	76:aeb1df146756	2712	uint16_t tmpccmr1 = 0, tmpccer = 0;
mbed_official	76:aeb1df146756	2713
mbed_official	76:aeb1df146756	2714	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	76:aeb1df146756	2715	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	2716	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	2717	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	2718	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	2719	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F)));
mbed_official	76:aeb1df146756	2720	tmpccmr1 \|= (uint16_t)(TIM_ICSelection \| (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official	76:aeb1df146756	2721	/* Select the Polarity and set the CC1E Bit */
mbed_official	76:aeb1df146756	2722	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P \| TIM_CCER_CC1NP));
mbed_official	76:aeb1df146756	2723	tmpccer \|= (uint16_t)(TIM_ICPolarity \| (uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	2724	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	76:aeb1df146756	2725	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	2726	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	2727	}
mbed_official	76:aeb1df146756	2728
mbed_official	76:aeb1df146756	2729	/**
mbed_official	76:aeb1df146756	2730	* @brief Configure the TI2 as Input.
mbed_official	76:aeb1df146756	2731	* @param TIMx: where x can be 2, 3, 4 or 9 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2732	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	76:aeb1df146756	2733	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2734	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	2735	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	2736	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	2737	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2738	* @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official	76:aeb1df146756	2739	* @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official	76:aeb1df146756	2740	* @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	2741	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	2742	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	2743	* @retval None
mbed_official	76:aeb1df146756	2744	*/
mbed_official	76:aeb1df146756	2745	static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	2746	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	2747	{
mbed_official	76:aeb1df146756	2748	uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	2749
mbed_official	76:aeb1df146756	2750	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	2751	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E);
mbed_official	76:aeb1df146756	2752	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	2753	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	2754	tmp = (uint16_t)(TIM_ICPolarity << 4);
mbed_official	76:aeb1df146756	2755	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	2756	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F)));
mbed_official	76:aeb1df146756	2757	tmpccmr1 \|= (uint16_t)(TIM_ICFilter << 12);
mbed_official	76:aeb1df146756	2758	tmpccmr1 \|= (uint16_t)(TIM_ICSelection << 8);
mbed_official	76:aeb1df146756	2759	/* Select the Polarity and set the CC2E Bit */
mbed_official	76:aeb1df146756	2760	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P \| TIM_CCER_CC2NP));
mbed_official	76:aeb1df146756	2761	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC2E);
mbed_official	76:aeb1df146756	2762	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	76:aeb1df146756	2763	TIMx->CCMR1 = tmpccmr1 ;
mbed_official	76:aeb1df146756	2764	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	2765	}
mbed_official	76:aeb1df146756	2766
mbed_official	76:aeb1df146756	2767	/**
mbed_official	76:aeb1df146756	2768	* @brief Configure the TI3 as Input.
mbed_official	76:aeb1df146756	2769	* @param TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2770	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	76:aeb1df146756	2771	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2772	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	2773	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	2774	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	2775	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2776	* @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official	76:aeb1df146756	2777	* @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official	76:aeb1df146756	2778	* @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	2779	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	2780	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	2781	* @retval None
mbed_official	76:aeb1df146756	2782	*/
mbed_official	76:aeb1df146756	2783	static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	2784	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	2785	{
mbed_official	76:aeb1df146756	2786	uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	2787
mbed_official	76:aeb1df146756	2788	/* Disable the Channel 3: Reset the CC3E Bit */
mbed_official	76:aeb1df146756	2789	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC3E);
mbed_official	76:aeb1df146756	2790	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	2791	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	2792	tmp = (uint16_t)(TIM_ICPolarity << 8);
mbed_official	76:aeb1df146756	2793	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	2794	tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR2_CC3S)) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC3F)));
mbed_official	76:aeb1df146756	2795	tmpccmr2 \|= (uint16_t)(TIM_ICSelection \| (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official	76:aeb1df146756	2796	/* Select the Polarity and set the CC3E Bit */
mbed_official	76:aeb1df146756	2797	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P \| TIM_CCER_CC3NP));
mbed_official	76:aeb1df146756	2798	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC3E);
mbed_official	76:aeb1df146756	2799	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	76:aeb1df146756	2800	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	2801	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	2802	}
mbed_official	76:aeb1df146756	2803
mbed_official	76:aeb1df146756	2804	/**
mbed_official	76:aeb1df146756	2805	* @brief Configure the TI4 as Input.
mbed_official	76:aeb1df146756	2806	* @param TIMx: where x can be 2, 3 or 4 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2807	* @param TIM_ICPolarity : The Input Polarity.
mbed_official	76:aeb1df146756	2808	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2809	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	2810	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	2811	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	2812	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2813	* @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official	76:aeb1df146756	2814	* @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official	76:aeb1df146756	2815	* @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	2816	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	2817	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	2818	* @retval None
mbed_official	76:aeb1df146756	2819	*/
mbed_official	76:aeb1df146756	2820	static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	2821	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	2822	{
mbed_official	76:aeb1df146756	2823	uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	2824
mbed_official	76:aeb1df146756	2825	/* Disable the Channel 4: Reset the CC4E Bit */
mbed_official	76:aeb1df146756	2826	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC4E);
mbed_official	76:aeb1df146756	2827	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	2828	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	2829	tmp = (uint16_t)(TIM_ICPolarity << 12);
mbed_official	76:aeb1df146756	2830	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	2831	tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CCMR2_CC4S) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC4F)));
mbed_official	76:aeb1df146756	2832	tmpccmr2 \|= (uint16_t)(TIM_ICSelection << 8);
mbed_official	76:aeb1df146756	2833	tmpccmr2 \|= (uint16_t)(TIM_ICFilter << 12);
mbed_official	76:aeb1df146756	2834
mbed_official	76:aeb1df146756	2835	/* Select the Polarity and set the CC4E Bit */
mbed_official	76:aeb1df146756	2836	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC4P \| TIM_CCER_CC4NP));
mbed_official	76:aeb1df146756	2837	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC4E);
mbed_official	76:aeb1df146756	2838	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	76:aeb1df146756	2839	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	2840	TIMx->CCER = tmpccer ;
mbed_official	76:aeb1df146756	2841	}
mbed_official	76:aeb1df146756	2842
mbed_official	76:aeb1df146756	2843	/**
mbed_official	76:aeb1df146756	2844	* @}
mbed_official	76:aeb1df146756	2845	*/
mbed_official	76:aeb1df146756	2846
mbed_official	76:aeb1df146756	2847	/**
mbed_official	76:aeb1df146756	2848	* @}
mbed_official	76:aeb1df146756	2849	*/
mbed_official	76:aeb1df146756	2850
mbed_official	76:aeb1df146756	2851	/**
mbed_official	76:aeb1df146756	2852	* @}
mbed_official	76:aeb1df146756	2853	*/
mbed_official	76:aeb1df146756	2854
mbed_official	76:aeb1df146756	2855	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	08 Mar 2014
Imports:	301
Forks:	0
Commits:	115
Dependents:	0
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_L152RE/stm32l1xx_tim.c@106:ced8cbb51063, 2014-02-26 (annotated)

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