mbed library with additional peripherals for ST F401 board

Fork of mbed-src by mbed official

This mbed LIB has additional peripherals for ST F401 board

  • UART2 : PA_3 rx, PA_2 tx
  • UART3 : PC_7 rx, PC_6 tx
  • I2C2 : PB_3 SDA, PB_10 SCL
  • I2C3 : PB_4 SDA, PA_8 SCL
Committer:
mbed_official
Date:
Wed Feb 26 09:45:12 2014 +0000
Revision:
106:ced8cbb51063
Parent:
87:085cde657901
Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd

Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/

[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_i2s.h
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 106:ced8cbb51063 5 * @version V1.0.0
mbed_official 106:ced8cbb51063 6 * @date 18-February-2014
mbed_official 87:085cde657901 7 * @brief Header file of I2S HAL module.
mbed_official 87:085cde657901 8 ******************************************************************************
mbed_official 87:085cde657901 9 * @attention
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 * <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 12 *
mbed_official 87:085cde657901 13 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 14 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 15 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 16 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 18 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 19 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 21 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 22 * without specific prior written permission.
mbed_official 87:085cde657901 23 *
mbed_official 87:085cde657901 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 34 *
mbed_official 87:085cde657901 35 ******************************************************************************
mbed_official 87:085cde657901 36 */
mbed_official 87:085cde657901 37
mbed_official 87:085cde657901 38 /* Define to prevent recursive inclusion -------------------------------------*/
mbed_official 87:085cde657901 39 #ifndef __STM32F4xx_HAL_I2S_H
mbed_official 87:085cde657901 40 #define __STM32F4xx_HAL_I2S_H
mbed_official 87:085cde657901 41
mbed_official 87:085cde657901 42 #ifdef __cplusplus
mbed_official 87:085cde657901 43 extern "C" {
mbed_official 87:085cde657901 44 #endif
mbed_official 87:085cde657901 45
mbed_official 87:085cde657901 46 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 47 #include "stm32f4xx_hal_def.h"
mbed_official 87:085cde657901 48
mbed_official 87:085cde657901 49 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 50 * @{
mbed_official 87:085cde657901 51 */
mbed_official 87:085cde657901 52
mbed_official 87:085cde657901 53 /** @addtogroup I2S
mbed_official 87:085cde657901 54 * @{
mbed_official 87:085cde657901 55 */
mbed_official 87:085cde657901 56
mbed_official 87:085cde657901 57 /* Exported types ------------------------------------------------------------*/
mbed_official 87:085cde657901 58 /**
mbed_official 87:085cde657901 59 * @brief I2S Init structure definition
mbed_official 87:085cde657901 60 */
mbed_official 87:085cde657901 61 typedef struct
mbed_official 87:085cde657901 62 {
mbed_official 87:085cde657901 63 uint32_t Mode; /*!< Specifies the I2S operating mode.
mbed_official 87:085cde657901 64 This parameter can be a value of @ref I2S_Mode */
mbed_official 87:085cde657901 65
mbed_official 87:085cde657901 66 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
mbed_official 87:085cde657901 67 This parameter can be a value of @ref I2S_Standard */
mbed_official 87:085cde657901 68
mbed_official 87:085cde657901 69 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
mbed_official 87:085cde657901 70 This parameter can be a value of @ref I2S_Data_Format */
mbed_official 87:085cde657901 71
mbed_official 87:085cde657901 72 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
mbed_official 87:085cde657901 73 This parameter can be a value of @ref I2S_MCLK_Output */
mbed_official 87:085cde657901 74
mbed_official 87:085cde657901 75 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
mbed_official 87:085cde657901 76 This parameter can be a value of @ref I2S_Audio_Frequency */
mbed_official 87:085cde657901 77
mbed_official 87:085cde657901 78 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
mbed_official 87:085cde657901 79 This parameter can be a value of @ref I2S_Clock_Polarity */
mbed_official 87:085cde657901 80
mbed_official 87:085cde657901 81 uint32_t ClockSource; /*!< Specifies the I2S Clock Source.
mbed_official 87:085cde657901 82 This parameter can be a value of @ref I2S_Clock_Source */
mbed_official 87:085cde657901 83
mbed_official 87:085cde657901 84 uint32_t FullDuplexMode; /*!< Specifies the I2S FullDuplex mode.
mbed_official 87:085cde657901 85 This parameter can be a value of @ref I2S_FullDuplex_Mode */
mbed_official 87:085cde657901 86
mbed_official 87:085cde657901 87 }I2S_InitTypeDef;
mbed_official 87:085cde657901 88
mbed_official 87:085cde657901 89 /**
mbed_official 87:085cde657901 90 * @brief HAL State structures definition
mbed_official 87:085cde657901 91 */
mbed_official 87:085cde657901 92 typedef enum
mbed_official 87:085cde657901 93 {
mbed_official 87:085cde657901 94 HAL_I2S_STATE_RESET = 0x00, /*!< I2S not yet initialized or disabled */
mbed_official 87:085cde657901 95 HAL_I2S_STATE_READY = 0x01, /*!< I2S initialized and ready for use */
mbed_official 87:085cde657901 96 HAL_I2S_STATE_BUSY = 0x02, /*!< I2S internal process is ongoing */
mbed_official 87:085cde657901 97 HAL_I2S_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
mbed_official 87:085cde657901 98 HAL_I2S_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
mbed_official 87:085cde657901 99 HAL_I2S_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
mbed_official 87:085cde657901 100 HAL_I2S_STATE_TIMEOUT = 0x03, /*!< I2S timeout state */
mbed_official 87:085cde657901 101 HAL_I2S_STATE_ERROR = 0x04 /*!< I2S error state */
mbed_official 87:085cde657901 102
mbed_official 87:085cde657901 103 }HAL_I2S_StateTypeDef;
mbed_official 87:085cde657901 104
mbed_official 87:085cde657901 105 /**
mbed_official 87:085cde657901 106 * @brief HAL I2S Error Code structure definition
mbed_official 87:085cde657901 107 */
mbed_official 87:085cde657901 108 typedef enum
mbed_official 87:085cde657901 109 {
mbed_official 87:085cde657901 110 HAL_I2S_ERROR_NONE = 0x00, /*!< No error */
mbed_official 87:085cde657901 111 HAL_I2S_ERROR_UDR = 0x01, /*!< I2S Underrun error */
mbed_official 87:085cde657901 112 HAL_I2S_ERROR_OVR = 0x02, /*!< I2S Overrun error */
mbed_official 87:085cde657901 113 HAL_I2SEX_ERROR_UDR = 0x04, /*!< I2S extended Underrun error */
mbed_official 87:085cde657901 114 HAL_I2SEX_ERROR_OVR = 0x08, /*!< I2S extended Overrun error */
mbed_official 87:085cde657901 115 HAL_I2S_ERROR_FRE = 0x10, /*!< I2S Frame format error */
mbed_official 87:085cde657901 116 HAL_I2S_ERROR_DMA = 0x20 /*!< DMA transfer error */
mbed_official 87:085cde657901 117 }HAL_I2S_ErrorTypeDef;
mbed_official 87:085cde657901 118
mbed_official 87:085cde657901 119 /**
mbed_official 87:085cde657901 120 * @brief I2S handle Structure definition
mbed_official 87:085cde657901 121 */
mbed_official 87:085cde657901 122 typedef struct
mbed_official 87:085cde657901 123 {
mbed_official 87:085cde657901 124 SPI_TypeDef *Instance; /* I2S registers base address */
mbed_official 87:085cde657901 125
mbed_official 87:085cde657901 126 I2S_InitTypeDef Init; /* I2S communication parameters */
mbed_official 87:085cde657901 127
mbed_official 87:085cde657901 128 uint16_t *pTxBuffPtr; /* Pointer to I2S Tx transfer buffer */
mbed_official 87:085cde657901 129
mbed_official 87:085cde657901 130 __IO uint16_t TxXferSize; /* I2S Tx transfer size */
mbed_official 87:085cde657901 131
mbed_official 87:085cde657901 132 __IO uint16_t TxXferCount; /* I2S Tx transfer Counter */
mbed_official 87:085cde657901 133
mbed_official 87:085cde657901 134 uint16_t *pRxBuffPtr; /* Pointer to I2S Rx transfer buffer */
mbed_official 87:085cde657901 135
mbed_official 87:085cde657901 136 __IO uint16_t RxXferSize; /* I2S Rx transfer size */
mbed_official 87:085cde657901 137
mbed_official 87:085cde657901 138 __IO uint16_t RxXferCount; /* I2S Rx transfer counter */
mbed_official 87:085cde657901 139
mbed_official 87:085cde657901 140 DMA_HandleTypeDef *hdmatx; /* I2S Tx DMA handle parameters */
mbed_official 87:085cde657901 141
mbed_official 87:085cde657901 142 DMA_HandleTypeDef *hdmarx; /* I2S Rx DMA handle parameters */
mbed_official 87:085cde657901 143
mbed_official 87:085cde657901 144 __IO HAL_LockTypeDef Lock; /* I2S locking object */
mbed_official 87:085cde657901 145
mbed_official 87:085cde657901 146 __IO HAL_I2S_StateTypeDef State; /* I2S communication state */
mbed_official 87:085cde657901 147
mbed_official 87:085cde657901 148 __IO HAL_I2S_ErrorTypeDef ErrorCode; /* I2S Error code */
mbed_official 87:085cde657901 149
mbed_official 87:085cde657901 150 }I2S_HandleTypeDef;
mbed_official 87:085cde657901 151
mbed_official 87:085cde657901 152 /* Exported constants --------------------------------------------------------*/
mbed_official 87:085cde657901 153
mbed_official 87:085cde657901 154 /** @defgroup I2S_Exported_Constants
mbed_official 87:085cde657901 155 * @{
mbed_official 87:085cde657901 156 */
mbed_official 87:085cde657901 157 #define I2SxEXT(__INSTANCE__) ((__INSTANCE__) == (SPI2)? (SPI_TypeDef *)(I2S2ext_BASE): (SPI_TypeDef *)(I2S3ext_BASE))
mbed_official 87:085cde657901 158
mbed_official 87:085cde657901 159 /** @defgroup I2S_Clock_Source
mbed_official 87:085cde657901 160 * @{
mbed_official 87:085cde657901 161 */
mbed_official 87:085cde657901 162 #define I2S_CLOCK_PLL ((uint32_t)0x00000000)
mbed_official 87:085cde657901 163 #define I2S_CLOCK_EXTERNAL ((uint32_t)0x00000001)
mbed_official 87:085cde657901 164
mbed_official 87:085cde657901 165 #define IS_I2S_CLOCKSOURCE(CLOCK) (((CLOCK) == I2S_CLOCK_EXTERNAL) || \
mbed_official 87:085cde657901 166 ((CLOCK) == I2S_CLOCK_PLL))
mbed_official 87:085cde657901 167 /**
mbed_official 87:085cde657901 168 * @}
mbed_official 87:085cde657901 169 */
mbed_official 87:085cde657901 170
mbed_official 87:085cde657901 171 /** @defgroup I2S_Mode
mbed_official 87:085cde657901 172 * @{
mbed_official 87:085cde657901 173 */
mbed_official 87:085cde657901 174 #define I2S_MODE_SLAVE_TX ((uint32_t)0x00000000)
mbed_official 87:085cde657901 175 #define I2S_MODE_SLAVE_RX ((uint32_t)0x00000100)
mbed_official 87:085cde657901 176 #define I2S_MODE_MASTER_TX ((uint32_t)0x00000200)
mbed_official 87:085cde657901 177 #define I2S_MODE_MASTER_RX ((uint32_t)0x00000300)
mbed_official 87:085cde657901 178
mbed_official 87:085cde657901 179 #define IS_I2S_MODE(MODE) (((MODE) == I2S_MODE_SLAVE_TX) || \
mbed_official 87:085cde657901 180 ((MODE) == I2S_MODE_SLAVE_RX) || \
mbed_official 87:085cde657901 181 ((MODE) == I2S_MODE_MASTER_TX) || \
mbed_official 87:085cde657901 182 ((MODE) == I2S_MODE_MASTER_RX))
mbed_official 87:085cde657901 183 /**
mbed_official 87:085cde657901 184 * @}
mbed_official 87:085cde657901 185 */
mbed_official 87:085cde657901 186
mbed_official 87:085cde657901 187 /** @defgroup I2S_Standard
mbed_official 87:085cde657901 188 * @{
mbed_official 87:085cde657901 189 */
mbed_official 87:085cde657901 190 #define I2S_STANDARD_PHILLIPS ((uint32_t)0x00000000)
mbed_official 87:085cde657901 191 #define I2S_STANDARD_MSB ((uint32_t)0x00000010)
mbed_official 87:085cde657901 192 #define I2S_STANDARD_LSB ((uint32_t)0x00000020)
mbed_official 87:085cde657901 193 #define I2S_STANDARD_PCM_SHORT ((uint32_t)0x00000030)
mbed_official 87:085cde657901 194 #define I2S_STANDARD_PCM_LONG ((uint32_t)0x000000B0)
mbed_official 87:085cde657901 195
mbed_official 87:085cde657901 196 #define IS_I2S_STANDARD(STANDARD) (((STANDARD) == I2S_STANDARD_PHILLIPS) || \
mbed_official 87:085cde657901 197 ((STANDARD) == I2S_STANDARD_MSB) || \
mbed_official 87:085cde657901 198 ((STANDARD) == I2S_STANDARD_LSB) || \
mbed_official 87:085cde657901 199 ((STANDARD) == I2S_STANDARD_PCM_SHORT) || \
mbed_official 87:085cde657901 200 ((STANDARD) == I2S_STANDARD_PCM_LONG))
mbed_official 87:085cde657901 201 /**
mbed_official 87:085cde657901 202 * @}
mbed_official 87:085cde657901 203 */
mbed_official 87:085cde657901 204
mbed_official 87:085cde657901 205 /** @defgroup I2S_Data_Format
mbed_official 87:085cde657901 206 * @{
mbed_official 87:085cde657901 207 */
mbed_official 87:085cde657901 208 #define I2S_DATAFORMAT_16B ((uint32_t)0x00000000)
mbed_official 87:085cde657901 209 #define I2S_DATAFORMAT_16B_EXTENDED ((uint32_t)0x00000001)
mbed_official 87:085cde657901 210 #define I2S_DATAFORMAT_24B ((uint32_t)0x00000003)
mbed_official 87:085cde657901 211 #define I2S_DATAFORMAT_32B ((uint32_t)0x00000005)
mbed_official 87:085cde657901 212
mbed_official 87:085cde657901 213 #define IS_I2S_DATA_FORMAT(FORMAT) (((FORMAT) == I2S_DATAFORMAT_16B) || \
mbed_official 87:085cde657901 214 ((FORMAT) == I2S_DATAFORMAT_16B_EXTENDED) || \
mbed_official 87:085cde657901 215 ((FORMAT) == I2S_DATAFORMAT_24B) || \
mbed_official 87:085cde657901 216 ((FORMAT) == I2S_DATAFORMAT_32B))
mbed_official 87:085cde657901 217 /**
mbed_official 87:085cde657901 218 * @}
mbed_official 87:085cde657901 219 */
mbed_official 87:085cde657901 220
mbed_official 87:085cde657901 221 /** @defgroup I2S_MCLK_Output
mbed_official 87:085cde657901 222 * @{
mbed_official 87:085cde657901 223 */
mbed_official 87:085cde657901 224 #define I2S_MCLKOUTPUT_ENABLE ((uint32_t)SPI_I2SPR_MCKOE)
mbed_official 87:085cde657901 225 #define I2S_MCLKOUTPUT_DISABLE ((uint32_t)0x00000000)
mbed_official 87:085cde657901 226
mbed_official 87:085cde657901 227 #define IS_I2S_MCLK_OUTPUT(OUTPUT) (((OUTPUT) == I2S_MCLKOUTPUT_ENABLE) || \
mbed_official 87:085cde657901 228 ((OUTPUT) == I2S_MCLKOUTPUT_DISABLE))
mbed_official 87:085cde657901 229 /**
mbed_official 87:085cde657901 230 * @}
mbed_official 87:085cde657901 231 */
mbed_official 87:085cde657901 232
mbed_official 87:085cde657901 233 /** @defgroup I2S_Audio_Frequency
mbed_official 87:085cde657901 234 * @{
mbed_official 87:085cde657901 235 */
mbed_official 87:085cde657901 236 #define I2S_AUDIOFREQ_192K ((uint32_t)192000)
mbed_official 87:085cde657901 237 #define I2S_AUDIOFREQ_96K ((uint32_t)96000)
mbed_official 87:085cde657901 238 #define I2S_AUDIOFREQ_48K ((uint32_t)48000)
mbed_official 87:085cde657901 239 #define I2S_AUDIOFREQ_44K ((uint32_t)44100)
mbed_official 87:085cde657901 240 #define I2S_AUDIOFREQ_32K ((uint32_t)32000)
mbed_official 87:085cde657901 241 #define I2S_AUDIOFREQ_22K ((uint32_t)22050)
mbed_official 87:085cde657901 242 #define I2S_AUDIOFREQ_16K ((uint32_t)16000)
mbed_official 87:085cde657901 243 #define I2S_AUDIOFREQ_11K ((uint32_t)11025)
mbed_official 87:085cde657901 244 #define I2S_AUDIOFREQ_8K ((uint32_t)8000)
mbed_official 87:085cde657901 245 #define I2S_AUDIOFREQ_DEFAULT ((uint32_t)2)
mbed_official 87:085cde657901 246
mbed_official 87:085cde657901 247 #define IS_I2S_AUDIO_FREQ(FREQ) ((((FREQ) >= I2S_AUDIOFREQ_8K) && \
mbed_official 87:085cde657901 248 ((FREQ) <= I2S_AUDIOFREQ_192K)) || \
mbed_official 87:085cde657901 249 ((FREQ) == I2S_AUDIOFREQ_DEFAULT))
mbed_official 87:085cde657901 250 /**
mbed_official 87:085cde657901 251 * @}
mbed_official 87:085cde657901 252 */
mbed_official 87:085cde657901 253
mbed_official 87:085cde657901 254 /** @defgroup I2S_FullDuplex_Mode
mbed_official 87:085cde657901 255 * @{
mbed_official 87:085cde657901 256 */
mbed_official 87:085cde657901 257 #define I2S_FULLDUPLEXMODE_DISABLE ((uint32_t)0x00000000)
mbed_official 87:085cde657901 258 #define I2S_FULLDUPLEXMODE_ENABLE ((uint32_t)0x00000001)
mbed_official 87:085cde657901 259
mbed_official 87:085cde657901 260 #define IS_I2S_FULLDUPLEX_MODE(MODE) (((MODE) == I2S_FULLDUPLEXMODE_DISABLE) || \
mbed_official 87:085cde657901 261 ((MODE) == I2S_FULLDUPLEXMODE_ENABLE))
mbed_official 87:085cde657901 262 /**
mbed_official 87:085cde657901 263 * @}
mbed_official 87:085cde657901 264 */
mbed_official 87:085cde657901 265
mbed_official 87:085cde657901 266 /** @defgroup I2S_Clock_Polarity
mbed_official 87:085cde657901 267 * @{
mbed_official 87:085cde657901 268 */
mbed_official 87:085cde657901 269 #define I2S_CPOL_LOW ((uint32_t)0x00000000)
mbed_official 87:085cde657901 270 #define I2S_CPOL_HIGH ((uint32_t)SPI_I2SCFGR_CKPOL)
mbed_official 87:085cde657901 271
mbed_official 87:085cde657901 272 #define IS_I2S_CPOL(CPOL) (((CPOL) == I2S_CPOL_LOW) || \
mbed_official 87:085cde657901 273 ((CPOL) == I2S_CPOL_HIGH))
mbed_official 87:085cde657901 274 /**
mbed_official 87:085cde657901 275 * @}
mbed_official 87:085cde657901 276 */
mbed_official 87:085cde657901 277
mbed_official 87:085cde657901 278 /** @defgroup I2S_Interrupt_configuration_definition
mbed_official 87:085cde657901 279 * @{
mbed_official 87:085cde657901 280 */
mbed_official 87:085cde657901 281 #define I2S_IT_TXE SPI_CR2_TXEIE
mbed_official 87:085cde657901 282 #define I2S_IT_RXNE SPI_CR2_RXNEIE
mbed_official 87:085cde657901 283 #define I2S_IT_ERR SPI_CR2_ERRIE
mbed_official 87:085cde657901 284 /**
mbed_official 87:085cde657901 285 * @}
mbed_official 87:085cde657901 286 */
mbed_official 87:085cde657901 287
mbed_official 87:085cde657901 288 /** @defgroup I2S_Flag_definition
mbed_official 87:085cde657901 289 * @{
mbed_official 87:085cde657901 290 */
mbed_official 87:085cde657901 291 #define I2S_FLAG_TXE SPI_SR_TXE
mbed_official 87:085cde657901 292 #define I2S_FLAG_RXNE SPI_SR_RXNE
mbed_official 87:085cde657901 293
mbed_official 87:085cde657901 294 #define I2S_FLAG_UDR SPI_SR_UDR
mbed_official 87:085cde657901 295 #define I2S_FLAG_OVR SPI_SR_OVR
mbed_official 87:085cde657901 296 #define I2S_FLAG_FRE SPI_SR_FRE
mbed_official 87:085cde657901 297
mbed_official 87:085cde657901 298 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
mbed_official 87:085cde657901 299 #define I2S_FLAG_BSY SPI_SR_BSY
mbed_official 87:085cde657901 300 /**
mbed_official 87:085cde657901 301 * @}
mbed_official 87:085cde657901 302 */
mbed_official 87:085cde657901 303
mbed_official 87:085cde657901 304 /**
mbed_official 87:085cde657901 305 * @}
mbed_official 87:085cde657901 306 */
mbed_official 87:085cde657901 307
mbed_official 87:085cde657901 308 /* Exported macro ------------------------------------------------------------*/
mbed_official 87:085cde657901 309
mbed_official 87:085cde657901 310 /** @brief Enable or disable the specified SPI peripheral (in I2S mode).
mbed_official 87:085cde657901 311 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 87:085cde657901 312 * @retval None
mbed_official 87:085cde657901 313 */
mbed_official 87:085cde657901 314 #define __HAL_I2S_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR |= SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 315 #define __HAL_I2S_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->I2SCFGR &= ~SPI_I2SCFGR_I2SE)
mbed_official 87:085cde657901 316
mbed_official 87:085cde657901 317 /** @brief Enable or disable the specified I2S interrupts.
mbed_official 87:085cde657901 318 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 87:085cde657901 319 * @param __INTERRUPT__: specifies the interrupt source to enable or disable.
mbed_official 87:085cde657901 320 * This parameter can be one of the following values:
mbed_official 87:085cde657901 321 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
mbed_official 87:085cde657901 322 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
mbed_official 87:085cde657901 323 * @arg I2S_IT_ERR: Error interrupt enable
mbed_official 87:085cde657901 324 * @retval None
mbed_official 87:085cde657901 325 */
mbed_official 87:085cde657901 326 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 |= (__INTERRUPT__))
mbed_official 87:085cde657901 327 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->CR2 &= ~(__INTERRUPT__))
mbed_official 87:085cde657901 328
mbed_official 87:085cde657901 329 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
mbed_official 87:085cde657901 330 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 87:085cde657901 331 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
mbed_official 87:085cde657901 332 * @param __INTERRUPT__: specifies the I2S interrupt source to check.
mbed_official 87:085cde657901 333 * This parameter can be one of the following values:
mbed_official 87:085cde657901 334 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
mbed_official 87:085cde657901 335 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
mbed_official 87:085cde657901 336 * @arg I2S_IT_ERR: Error interrupt enable
mbed_official 87:085cde657901 337 * @retval The new state of __IT__ (TRUE or FALSE).
mbed_official 87:085cde657901 338 */
mbed_official 87:085cde657901 339 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
mbed_official 87:085cde657901 340
mbed_official 87:085cde657901 341 /** @brief Checks whether the specified I2S flag is set or not.
mbed_official 87:085cde657901 342 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 87:085cde657901 343 * @param __FLAG__: specifies the flag to check.
mbed_official 87:085cde657901 344 * This parameter can be one of the following values:
mbed_official 87:085cde657901 345 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
mbed_official 87:085cde657901 346 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
mbed_official 87:085cde657901 347 * @arg I2S_FLAG_UDR: Underrun flag
mbed_official 87:085cde657901 348 * @arg I2S_FLAG_OVR: Overrun flag
mbed_official 87:085cde657901 349 * @arg I2S_FLAG_FRE: Frame error flag
mbed_official 87:085cde657901 350 * @arg I2S_FLAG_CHSIDE: Channel Side flag
mbed_official 87:085cde657901 351 * @arg I2S_FLAG_BSY: Busy flag
mbed_official 87:085cde657901 352 * @retval The new state of __FLAG__ (TRUE or FALSE).
mbed_official 87:085cde657901 353 */
mbed_official 87:085cde657901 354 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
mbed_official 87:085cde657901 355
mbed_official 87:085cde657901 356 /** @brief Clears the I2S OVR pending flag.
mbed_official 87:085cde657901 357 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 87:085cde657901 358 * @retval None
mbed_official 87:085cde657901 359 */
mbed_official 87:085cde657901 360 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{(__HANDLE__)->Instance->DR;\
mbed_official 87:085cde657901 361 (__HANDLE__)->Instance->SR;}while(0)
mbed_official 87:085cde657901 362 /** @brief Clears the I2S UDR pending flag.
mbed_official 87:085cde657901 363 * @param __HANDLE__: specifies the I2S Handle.
mbed_official 87:085cde657901 364 * @retval None
mbed_official 87:085cde657901 365 */
mbed_official 87:085cde657901 366 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__)((__HANDLE__)->Instance->SR)
mbed_official 87:085cde657901 367
mbed_official 87:085cde657901 368 /* Include I2S Extension module */
mbed_official 87:085cde657901 369 #include "stm32f4xx_hal_i2s_ex.h"
mbed_official 87:085cde657901 370
mbed_official 87:085cde657901 371 /* Exported functions --------------------------------------------------------*/
mbed_official 87:085cde657901 372
mbed_official 87:085cde657901 373 /* Initialization/de-initialization functions **********************************/
mbed_official 87:085cde657901 374 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 375 HAL_StatusTypeDef HAL_I2S_DeInit (I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 376 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 377 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 378
mbed_official 87:085cde657901 379 /* I/O operation functions *****************************************************/
mbed_official 87:085cde657901 380 /* Blocking mode: Polling */
mbed_official 87:085cde657901 381 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
mbed_official 87:085cde657901 382 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
mbed_official 87:085cde657901 383
mbed_official 87:085cde657901 384 /* Non-Blocking mode: Interrupt */
mbed_official 87:085cde657901 385 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 87:085cde657901 386 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 87:085cde657901 387 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 388
mbed_official 87:085cde657901 389 /* Non-Blocking mode: DMA */
mbed_official 87:085cde657901 390 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 87:085cde657901 391 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
mbed_official 87:085cde657901 392
mbed_official 87:085cde657901 393 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 394 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 395 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 396
mbed_official 87:085cde657901 397 /* Peripheral Control and State functions **************************************/
mbed_official 87:085cde657901 398 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 399 HAL_I2S_ErrorTypeDef HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 400
mbed_official 87:085cde657901 401 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
mbed_official 106:ced8cbb51063 402 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 106:ced8cbb51063 403 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 106:ced8cbb51063 404 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 106:ced8cbb51063 405 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
mbed_official 106:ced8cbb51063 406 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
mbed_official 87:085cde657901 407
mbed_official 87:085cde657901 408 void I2S_DMATxCplt(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 409 void I2S_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 410 void I2S_DMARxCplt(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 411 void I2S_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 412 void I2S_DMAError(DMA_HandleTypeDef *hdma);
mbed_official 87:085cde657901 413 HAL_StatusTypeDef I2S_WaitFlagStateUntilTimeout(I2S_HandleTypeDef *hi2s, uint32_t Flag, uint32_t Status, uint32_t Timeout);
mbed_official 87:085cde657901 414
mbed_official 87:085cde657901 415 /**
mbed_official 87:085cde657901 416 * @}
mbed_official 87:085cde657901 417 */
mbed_official 87:085cde657901 418
mbed_official 87:085cde657901 419 /**
mbed_official 87:085cde657901 420 * @}
mbed_official 87:085cde657901 421 */
mbed_official 87:085cde657901 422
mbed_official 87:085cde657901 423 #ifdef __cplusplus
mbed_official 87:085cde657901 424 }
mbed_official 87:085cde657901 425 #endif
mbed_official 87:085cde657901 426
mbed_official 87:085cde657901 427
mbed_official 87:085cde657901 428 #endif /* __STM32F4xx_HAL_I2S_H */
mbed_official 87:085cde657901 429
mbed_official 87:085cde657901 430 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/