mbed-F401 - mbed library with additional peripherals for ST F…

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Peter Drescher / mbed-F401

mbed library with additional peripherals for ST F401 board

Fork of mbed-src by mbed official

This mbed LIB has additional peripherals for ST F401 board

UART2 : PA_3 rx, PA_2 tx
UART3 : PC_7 rx, PC_6 tx
I2C2 : PB_3 SDA, PB_10 SCL
I2C3 : PB_4 SDA, PA_8 SCL

targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_tim.c@106:ced8cbb51063, 2014-02-26 (annotated)

Committer:: mbed_official
Date:: Wed Feb 26 09:45:12 2014 +0000
Revision:: 106:ced8cbb51063
Parent:: 76:aeb1df146756

Synchronized with git revision 4222735eff5868389433f0e9271976b39c8115cd



Full URL: https://github.com/mbedmicro/mbed/commit/4222735eff5868389433f0e9271976b39c8115cd/



[NUCLEO_xxx] Update STM32CubeF4 driver V1.0.0 + update license

Who changed what in which revision?

User	Revision	Line number	New contents of line
mbed_official	76:aeb1df146756	1	/**
mbed_official	76:aeb1df146756	2	******************************************************************************
mbed_official	76:aeb1df146756	3	* @file stm32f0xx_tim.c
mbed_official	76:aeb1df146756	4	* @author MCD Application Team
mbed_official	76:aeb1df146756	5	* @version V1.3.0
mbed_official	76:aeb1df146756	6	* @date 16-January-2014
mbed_official	76:aeb1df146756	7	* @brief This file provides firmware functions to manage the following
mbed_official	76:aeb1df146756	8	* functionalities of the TIM peripheral:
mbed_official	76:aeb1df146756	9	* + TimeBase management
mbed_official	76:aeb1df146756	10	* + Output Compare management
mbed_official	76:aeb1df146756	11	* + Input Capture management
mbed_official	76:aeb1df146756	12	* + Interrupts, DMA and flags management
mbed_official	76:aeb1df146756	13	* + Clocks management
mbed_official	76:aeb1df146756	14	* + Synchronization management
mbed_official	76:aeb1df146756	15	* + Specific interface management
mbed_official	76:aeb1df146756	16	* + Specific remapping management
mbed_official	76:aeb1df146756	17	*
mbed_official	76:aeb1df146756	18	* @verbatim
mbed_official	76:aeb1df146756	19
mbed_official	76:aeb1df146756	20	===============================================================================
mbed_official	76:aeb1df146756	21	##### How to use this driver #####
mbed_official	76:aeb1df146756	22	===============================================================================
mbed_official	76:aeb1df146756	23	[..] This driver provides functions to configure and program the TIM
mbed_official	76:aeb1df146756	24	of all STM32F0xx devices These functions are split in 8 groups:
mbed_official	76:aeb1df146756	25	(#) TIM TimeBase management: this group includes all needed functions
mbed_official	76:aeb1df146756	26	to configure the TM Timebase unit:
mbed_official	76:aeb1df146756	27	(++) Set/Get Prescaler.
mbed_official	76:aeb1df146756	28	(++) Set/Get Autoreload.
mbed_official	76:aeb1df146756	29	(++) Counter modes configuration.
mbed_official	76:aeb1df146756	30	(++) Set Clock division.
mbed_official	76:aeb1df146756	31	(++) Select the One Pulse mode.
mbed_official	76:aeb1df146756	32	(++) Update Request Configuration.
mbed_official	76:aeb1df146756	33	(++) Update Disable Configuration.
mbed_official	76:aeb1df146756	34	(++) Auto-Preload Configuration.
mbed_official	76:aeb1df146756	35	(++) Enable/Disable the counter.
mbed_official	76:aeb1df146756	36
mbed_official	76:aeb1df146756	37	(#) TIM Output Compare management: this group includes all needed
mbed_official	76:aeb1df146756	38	functions to configure the Capture/Compare unit used in Output
mbed_official	76:aeb1df146756	39	compare mode:
mbed_official	76:aeb1df146756	40	(++) Configure each channel, independently, in Output Compare mode.
mbed_official	76:aeb1df146756	41	(++) Select the output compare modes.
mbed_official	76:aeb1df146756	42	(++) Select the Polarities of each channel.
mbed_official	76:aeb1df146756	43	(++) Set/Get the Capture/Compare register values.
mbed_official	76:aeb1df146756	44	(++) Select the Output Compare Fast mode.
mbed_official	76:aeb1df146756	45	(++) Select the Output Compare Forced mode.
mbed_official	76:aeb1df146756	46	(++) Output Compare-Preload Configuration.
mbed_official	76:aeb1df146756	47	(++) Clear Output Compare Reference.
mbed_official	76:aeb1df146756	48	(++) Select the OCREF Clear signal.
mbed_official	76:aeb1df146756	49	(++) Enable/Disable the Capture/Compare Channels.
mbed_official	76:aeb1df146756	50
mbed_official	76:aeb1df146756	51	(#) TIM Input Capture management: this group includes all needed
mbed_official	76:aeb1df146756	52	functions to configure the Capture/Compare unit used in
mbed_official	76:aeb1df146756	53	Input Capture mode:
mbed_official	76:aeb1df146756	54	(++) Configure each channel in input capture mode.
mbed_official	76:aeb1df146756	55	(++) Configure Channel1/2 in PWM Input mode.
mbed_official	76:aeb1df146756	56	(++) Set the Input Capture Prescaler.
mbed_official	76:aeb1df146756	57	(++) Get the Capture/Compare values.
mbed_official	76:aeb1df146756	58
mbed_official	76:aeb1df146756	59	(#) Advanced-control timers (TIM1) specific features
mbed_official	76:aeb1df146756	60	(++) Configures the Break input, dead time, Lock level, the OSSI,
mbed_official	76:aeb1df146756	61	the OSSR State and the AOE(automatic output enable)
mbed_official	76:aeb1df146756	62	(++) Enable/Disable the TIM peripheral Main Outputs
mbed_official	76:aeb1df146756	63	(++) Select the Commutation event
mbed_official	76:aeb1df146756	64	(++) Set/Reset the Capture Compare Preload Control bit
mbed_official	76:aeb1df146756	65
mbed_official	76:aeb1df146756	66	(#) TIM interrupts, DMA and flags management.
mbed_official	76:aeb1df146756	67	(++) Enable/Disable interrupt sources.
mbed_official	76:aeb1df146756	68	(++) Get flags status.
mbed_official	76:aeb1df146756	69	(++) Clear flags/ Pending bits.
mbed_official	76:aeb1df146756	70	(++) Enable/Disable DMA requests.
mbed_official	76:aeb1df146756	71	(++) Configure DMA burst mode.
mbed_official	76:aeb1df146756	72	(++) Select CaptureCompare DMA request.
mbed_official	76:aeb1df146756	73
mbed_official	76:aeb1df146756	74	(#) TIM clocks management: this group includes all needed functions
mbed_official	76:aeb1df146756	75	to configure the clock controller unit:
mbed_official	76:aeb1df146756	76	(++) Select internal/External clock.
mbed_official	76:aeb1df146756	77	(++) Select the external clock mode: ETR(Mode1/Mode2), TIx or ITRx.
mbed_official	76:aeb1df146756	78
mbed_official	76:aeb1df146756	79	(#) TIM synchronization management: this group includes all needed.
mbed_official	76:aeb1df146756	80	functions to configure the Synchronization unit:
mbed_official	76:aeb1df146756	81	(++) Select Input Trigger.
mbed_official	76:aeb1df146756	82	(++) Select Output Trigger.
mbed_official	76:aeb1df146756	83	(++) Select Master Slave Mode.
mbed_official	76:aeb1df146756	84	(++) ETR Configuration when used as external trigger.
mbed_official	76:aeb1df146756	85
mbed_official	76:aeb1df146756	86	(#) TIM specific interface management, this group includes all
mbed_official	76:aeb1df146756	87	needed functions to use the specific TIM interface:
mbed_official	76:aeb1df146756	88	(++) Encoder Interface Configuration.
mbed_official	76:aeb1df146756	89	(++) Select Hall Sensor.
mbed_official	76:aeb1df146756	90
mbed_official	76:aeb1df146756	91	(#) TIM specific remapping management includes the Remapping
mbed_official	76:aeb1df146756	92	configuration of specific timers
mbed_official	76:aeb1df146756	93
mbed_official	76:aeb1df146756	94	@endverbatim
mbed_official	76:aeb1df146756	95	*
mbed_official	76:aeb1df146756	96	******************************************************************************
mbed_official	76:aeb1df146756	97	* @attention
mbed_official	76:aeb1df146756	98	*
mbed_official	106:ced8cbb51063	99	* <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
mbed_official	76:aeb1df146756	100	*
mbed_official	106:ced8cbb51063	101	* Redistribution and use in source and binary forms, with or without modification,
mbed_official	106:ced8cbb51063	102	* are permitted provided that the following conditions are met:
mbed_official	106:ced8cbb51063	103	* 1. Redistributions of source code must retain the above copyright notice,
mbed_official	106:ced8cbb51063	104	* this list of conditions and the following disclaimer.
mbed_official	106:ced8cbb51063	105	* 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official	106:ced8cbb51063	106	* this list of conditions and the following disclaimer in the documentation
mbed_official	106:ced8cbb51063	107	* and/or other materials provided with the distribution.
mbed_official	106:ced8cbb51063	108	* 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official	106:ced8cbb51063	109	* may be used to endorse or promote products derived from this software
mbed_official	106:ced8cbb51063	110	* without specific prior written permission.
mbed_official	76:aeb1df146756	111	*
mbed_official	106:ced8cbb51063	112	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official	106:ced8cbb51063	113	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official	106:ced8cbb51063	114	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official	106:ced8cbb51063	115	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official	106:ced8cbb51063	116	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official	106:ced8cbb51063	117	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official	106:ced8cbb51063	118	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official	106:ced8cbb51063	119	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official	106:ced8cbb51063	120	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official	106:ced8cbb51063	121	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official	76:aeb1df146756	122	*
mbed_official	76:aeb1df146756	123	******************************************************************************
mbed_official	76:aeb1df146756	124	*/
mbed_official	76:aeb1df146756	125
mbed_official	76:aeb1df146756	126	/* Includes ------------------------------------------------------------------*/
mbed_official	76:aeb1df146756	127	#include "stm32f0xx_tim.h"
mbed_official	76:aeb1df146756	128	#include "stm32f0xx_rcc.h"
mbed_official	76:aeb1df146756	129
mbed_official	76:aeb1df146756	130	/** @addtogroup STM32F0xx_StdPeriph_Driver
mbed_official	76:aeb1df146756	131	* @{
mbed_official	76:aeb1df146756	132	*/
mbed_official	76:aeb1df146756	133
mbed_official	76:aeb1df146756	134	/** @defgroup TIM
mbed_official	76:aeb1df146756	135	* @brief TIM driver modules
mbed_official	76:aeb1df146756	136	* @{
mbed_official	76:aeb1df146756	137	*/
mbed_official	76:aeb1df146756	138
mbed_official	76:aeb1df146756	139	/* Private typedef -----------------------------------------------------------*/
mbed_official	76:aeb1df146756	140	/* Private define ------------------------------------------------------------*/
mbed_official	76:aeb1df146756	141
mbed_official	76:aeb1df146756	142	/* ---------------------- TIM registers bit mask ------------------------ */
mbed_official	76:aeb1df146756	143	#define SMCR_ETR_MASK ((uint16_t)0x00FF)
mbed_official	76:aeb1df146756	144	#define CCMR_OFFSET ((uint16_t)0x0018)
mbed_official	76:aeb1df146756	145	#define CCER_CCE_SET ((uint16_t)0x0001)
mbed_official	76:aeb1df146756	146	#define CCER_CCNE_SET ((uint16_t)0x0004)
mbed_official	76:aeb1df146756	147
mbed_official	76:aeb1df146756	148	/* Private macro -------------------------------------------------------------*/
mbed_official	76:aeb1df146756	149	/* Private variables ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	150	/* Private function prototypes -----------------------------------------------*/
mbed_official	76:aeb1df146756	151
mbed_official	76:aeb1df146756	152	static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	153	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	154	static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	155	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	156	static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	157	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	158	static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	159	uint16_t TIM_ICFilter);
mbed_official	76:aeb1df146756	160	/* Private functions ---------------------------------------------------------*/
mbed_official	76:aeb1df146756	161
mbed_official	76:aeb1df146756	162	/** @defgroup TIM_Private_Functions
mbed_official	76:aeb1df146756	163	* @{
mbed_official	76:aeb1df146756	164	*/
mbed_official	76:aeb1df146756	165
mbed_official	76:aeb1df146756	166	/** @defgroup TIM_Group1 TimeBase management functions
mbed_official	76:aeb1df146756	167	* @brief TimeBase management functions
mbed_official	76:aeb1df146756	168	*
mbed_official	76:aeb1df146756	169	@verbatim
mbed_official	76:aeb1df146756	170	===============================================================================
mbed_official	76:aeb1df146756	171	##### TimeBase management functions #####
mbed_official	76:aeb1df146756	172	===============================================================================
mbed_official	76:aeb1df146756	173
mbed_official	76:aeb1df146756	174	* TIM Driver: how to use it in Timing(Time base) Mode *
mbed_official	76:aeb1df146756	175	===============================================================================
mbed_official	76:aeb1df146756	176	[..] To use the Timer in Timing(Time base) mode, the following steps are
mbed_official	76:aeb1df146756	177	mandatory:
mbed_official	76:aeb1df146756	178	(#) Enable TIM clock using
mbed_official	76:aeb1df146756	179	RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official	76:aeb1df146756	180	(#) Fill the TIM_TimeBaseInitStruct with the desired parameters.
mbed_official	76:aeb1df146756	181	(#) Call TIM_TimeBaseInit(TIMx, &TIM_TimeBaseInitStruct) to configure
mbed_official	76:aeb1df146756	182	the Time Base unit with the corresponding configuration.
mbed_official	76:aeb1df146756	183	(#) Enable the NVIC if you need to generate the update interrupt.
mbed_official	76:aeb1df146756	184	(#) Enable the corresponding interrupt using the function
mbed_official	76:aeb1df146756	185	TIM_ITConfig(TIMx, TIM_IT_Update).
mbed_official	76:aeb1df146756	186	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	187	[..]
mbed_official	76:aeb1df146756	188	(@) All other functions can be used seperatly to modify, if needed,
mbed_official	76:aeb1df146756	189	a specific feature of the Timer.
mbed_official	76:aeb1df146756	190
mbed_official	76:aeb1df146756	191	@endverbatim
mbed_official	76:aeb1df146756	192	* @{
mbed_official	76:aeb1df146756	193	*/
mbed_official	76:aeb1df146756	194
mbed_official	76:aeb1df146756	195	/**
mbed_official	76:aeb1df146756	196	* @brief Deinitializes the TIMx peripheral registers to their default reset values.
mbed_official	76:aeb1df146756	197	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	198	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	199	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	200	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	201	* @retval None
mbed_official	76:aeb1df146756	202	*
mbed_official	76:aeb1df146756	203	*/
mbed_official	76:aeb1df146756	204	void TIM_DeInit(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	205	{
mbed_official	76:aeb1df146756	206	/* Check the parameters */
mbed_official	76:aeb1df146756	207	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	208
mbed_official	76:aeb1df146756	209	if (TIMx == TIM1)
mbed_official	76:aeb1df146756	210	{
mbed_official	76:aeb1df146756	211	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, ENABLE);
mbed_official	76:aeb1df146756	212	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM1, DISABLE);
mbed_official	76:aeb1df146756	213	}
mbed_official	76:aeb1df146756	214	else if (TIMx == TIM2)
mbed_official	76:aeb1df146756	215	{
mbed_official	76:aeb1df146756	216	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, ENABLE);
mbed_official	76:aeb1df146756	217	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM2, DISABLE);
mbed_official	76:aeb1df146756	218	}
mbed_official	76:aeb1df146756	219	else if (TIMx == TIM3)
mbed_official	76:aeb1df146756	220	{
mbed_official	76:aeb1df146756	221	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, ENABLE);
mbed_official	76:aeb1df146756	222	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM3, DISABLE);
mbed_official	76:aeb1df146756	223	}
mbed_official	76:aeb1df146756	224	else if (TIMx == TIM6)
mbed_official	76:aeb1df146756	225	{
mbed_official	76:aeb1df146756	226	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, ENABLE);
mbed_official	76:aeb1df146756	227	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM6, DISABLE);
mbed_official	76:aeb1df146756	228	}
mbed_official	76:aeb1df146756	229	else if (TIMx == TIM7)
mbed_official	76:aeb1df146756	230	{
mbed_official	76:aeb1df146756	231	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, ENABLE);
mbed_official	76:aeb1df146756	232	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM7, DISABLE);
mbed_official	76:aeb1df146756	233	}
mbed_official	76:aeb1df146756	234	else if (TIMx == TIM14)
mbed_official	76:aeb1df146756	235	{
mbed_official	76:aeb1df146756	236	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, ENABLE);
mbed_official	76:aeb1df146756	237	RCC_APB1PeriphResetCmd(RCC_APB1Periph_TIM14, DISABLE);
mbed_official	76:aeb1df146756	238	}
mbed_official	76:aeb1df146756	239	else if (TIMx == TIM15)
mbed_official	76:aeb1df146756	240	{
mbed_official	76:aeb1df146756	241	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, ENABLE);
mbed_official	76:aeb1df146756	242	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM15, DISABLE);
mbed_official	76:aeb1df146756	243	}
mbed_official	76:aeb1df146756	244	else if (TIMx == TIM16)
mbed_official	76:aeb1df146756	245	{
mbed_official	76:aeb1df146756	246	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, ENABLE);
mbed_official	76:aeb1df146756	247	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM16, DISABLE);
mbed_official	76:aeb1df146756	248	}
mbed_official	76:aeb1df146756	249	else
mbed_official	76:aeb1df146756	250	{
mbed_official	76:aeb1df146756	251	if (TIMx == TIM17)
mbed_official	76:aeb1df146756	252	{
mbed_official	76:aeb1df146756	253	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, ENABLE);
mbed_official	76:aeb1df146756	254	RCC_APB2PeriphResetCmd(RCC_APB2Periph_TIM17, DISABLE);
mbed_official	76:aeb1df146756	255	}
mbed_official	76:aeb1df146756	256	}
mbed_official	76:aeb1df146756	257
mbed_official	76:aeb1df146756	258	}
mbed_official	76:aeb1df146756	259
mbed_official	76:aeb1df146756	260	/**
mbed_official	76:aeb1df146756	261	* @brief Initializes the TIMx Time Base Unit peripheral according to
mbed_official	76:aeb1df146756	262	* the specified parameters in the TIM_TimeBaseInitStruct.
mbed_official	76:aeb1df146756	263	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	264	* peripheral.
mbed_official	76:aeb1df146756	265	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	266	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	267	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	268	* @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef
mbed_official	76:aeb1df146756	269	* structure that contains the configuration information for
mbed_official	76:aeb1df146756	270	* the specified TIM peripheral.
mbed_official	76:aeb1df146756	271	* @retval None
mbed_official	76:aeb1df146756	272	*/
mbed_official	76:aeb1df146756	273	void TIM_TimeBaseInit(TIM_TypeDef* TIMx, TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official	76:aeb1df146756	274	{
mbed_official	76:aeb1df146756	275	uint16_t tmpcr1 = 0;
mbed_official	76:aeb1df146756	276
mbed_official	76:aeb1df146756	277	/* Check the parameters */
mbed_official	76:aeb1df146756	278	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	279	assert_param(IS_TIM_COUNTER_MODE(TIM_TimeBaseInitStruct->TIM_CounterMode));
mbed_official	76:aeb1df146756	280	assert_param(IS_TIM_CKD_DIV(TIM_TimeBaseInitStruct->TIM_ClockDivision));
mbed_official	76:aeb1df146756	281
mbed_official	76:aeb1df146756	282	tmpcr1 = TIMx->CR1;
mbed_official	76:aeb1df146756	283
mbed_official	76:aeb1df146756	284	if((TIMx == TIM1) \|\| (TIMx == TIM2) \|\| (TIMx == TIM3))
mbed_official	76:aeb1df146756	285	{
mbed_official	76:aeb1df146756	286	/* Select the Counter Mode */
mbed_official	76:aeb1df146756	287	tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR \| TIM_CR1_CMS)));
mbed_official	76:aeb1df146756	288	tmpcr1 \|= (uint32_t)TIM_TimeBaseInitStruct->TIM_CounterMode;
mbed_official	76:aeb1df146756	289	}
mbed_official	76:aeb1df146756	290
mbed_official	76:aeb1df146756	291	if(TIMx != TIM6)
mbed_official	76:aeb1df146756	292	{
mbed_official	76:aeb1df146756	293	/* Set the clock division */
mbed_official	76:aeb1df146756	294	tmpcr1 &= (uint16_t)(~((uint16_t)TIM_CR1_CKD));
mbed_official	76:aeb1df146756	295	tmpcr1 \|= (uint32_t)TIM_TimeBaseInitStruct->TIM_ClockDivision;
mbed_official	76:aeb1df146756	296	}
mbed_official	76:aeb1df146756	297
mbed_official	76:aeb1df146756	298	TIMx->CR1 = tmpcr1;
mbed_official	76:aeb1df146756	299
mbed_official	76:aeb1df146756	300	/* Set the Autoreload value */
mbed_official	76:aeb1df146756	301	TIMx->ARR = TIM_TimeBaseInitStruct->TIM_Period ;
mbed_official	76:aeb1df146756	302
mbed_official	76:aeb1df146756	303	/* Set the Prescaler value */
mbed_official	76:aeb1df146756	304	TIMx->PSC = TIM_TimeBaseInitStruct->TIM_Prescaler;
mbed_official	76:aeb1df146756	305
mbed_official	76:aeb1df146756	306	if ((TIMx == TIM1) \|\| (TIMx == TIM15)\|\| (TIMx == TIM16) \|\| (TIMx == TIM17))
mbed_official	76:aeb1df146756	307	{
mbed_official	76:aeb1df146756	308	/* Set the Repetition Counter value */
mbed_official	76:aeb1df146756	309	TIMx->RCR = TIM_TimeBaseInitStruct->TIM_RepetitionCounter;
mbed_official	76:aeb1df146756	310	}
mbed_official	76:aeb1df146756	311
mbed_official	76:aeb1df146756	312	/* Generate an update event to reload the Prescaler and the Repetition counter
mbed_official	76:aeb1df146756	313	values immediately */
mbed_official	76:aeb1df146756	314	TIMx->EGR = TIM_PSCReloadMode_Immediate;
mbed_official	76:aeb1df146756	315	}
mbed_official	76:aeb1df146756	316
mbed_official	76:aeb1df146756	317	/**
mbed_official	76:aeb1df146756	318	* @brief Fills each TIM_TimeBaseInitStruct member with its default value.
mbed_official	76:aeb1df146756	319	* @param TIM_TimeBaseInitStruct: pointer to a TIM_TimeBaseInitTypeDef structure
mbed_official	76:aeb1df146756	320	* which will be initialized.
mbed_official	76:aeb1df146756	321	* @retval None
mbed_official	76:aeb1df146756	322	*/
mbed_official	76:aeb1df146756	323	void TIM_TimeBaseStructInit(TIM_TimeBaseInitTypeDef* TIM_TimeBaseInitStruct)
mbed_official	76:aeb1df146756	324	{
mbed_official	76:aeb1df146756	325	/* Set the default configuration */
mbed_official	76:aeb1df146756	326	TIM_TimeBaseInitStruct->TIM_Period = 0xFFFFFFFF;
mbed_official	76:aeb1df146756	327	TIM_TimeBaseInitStruct->TIM_Prescaler = 0x0000;
mbed_official	76:aeb1df146756	328	TIM_TimeBaseInitStruct->TIM_ClockDivision = TIM_CKD_DIV1;
mbed_official	76:aeb1df146756	329	TIM_TimeBaseInitStruct->TIM_CounterMode = TIM_CounterMode_Up;
mbed_official	76:aeb1df146756	330	TIM_TimeBaseInitStruct->TIM_RepetitionCounter = 0x0000;
mbed_official	76:aeb1df146756	331	}
mbed_official	76:aeb1df146756	332
mbed_official	76:aeb1df146756	333	/**
mbed_official	76:aeb1df146756	334	* @brief Configures the TIMx Prescaler.
mbed_official	76:aeb1df146756	335	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	336	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	337	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	338	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	339	* @param Prescaler: specifies the Prescaler Register value
mbed_official	76:aeb1df146756	340	* @param TIM_PSCReloadMode: specifies the TIM Prescaler Reload mode
mbed_official	76:aeb1df146756	341	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	342	* @arg TIM_PSCReloadMode_Update: The Prescaler is loaded at the update event.
mbed_official	76:aeb1df146756	343	* @arg TIM_PSCReloadMode_Immediate: The Prescaler is loaded immediatly.
mbed_official	76:aeb1df146756	344	* @retval None
mbed_official	76:aeb1df146756	345	*/
mbed_official	76:aeb1df146756	346	void TIM_PrescalerConfig(TIM_TypeDef* TIMx, uint16_t Prescaler, uint16_t TIM_PSCReloadMode)
mbed_official	76:aeb1df146756	347	{
mbed_official	76:aeb1df146756	348	/* Check the parameters */
mbed_official	76:aeb1df146756	349	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	350	assert_param(IS_TIM_PRESCALER_RELOAD(TIM_PSCReloadMode));
mbed_official	76:aeb1df146756	351
mbed_official	76:aeb1df146756	352	/* Set the Prescaler value */
mbed_official	76:aeb1df146756	353	TIMx->PSC = Prescaler;
mbed_official	76:aeb1df146756	354	/* Set or reset the UG Bit */
mbed_official	76:aeb1df146756	355	TIMx->EGR = TIM_PSCReloadMode;
mbed_official	76:aeb1df146756	356	}
mbed_official	76:aeb1df146756	357
mbed_official	76:aeb1df146756	358	/**
mbed_official	76:aeb1df146756	359	* @brief Specifies the TIMx Counter Mode to be used.
mbed_official	76:aeb1df146756	360	* @param TIMx: where x can be 1, 2, or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	361	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	362	* @param TIM_CounterMode: specifies the Counter Mode to be used
mbed_official	76:aeb1df146756	363	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	364	* @arg TIM_CounterMode_Up: TIM Up Counting Mode
mbed_official	76:aeb1df146756	365	* @arg TIM_CounterMode_Down: TIM Down Counting Mode
mbed_official	76:aeb1df146756	366	* @arg TIM_CounterMode_CenterAligned1: TIM Center Aligned Mode1
mbed_official	76:aeb1df146756	367	* @arg TIM_CounterMode_CenterAligned2: TIM Center Aligned Mode2
mbed_official	76:aeb1df146756	368	* @arg TIM_CounterMode_CenterAligned3: TIM Center Aligned Mode3
mbed_official	76:aeb1df146756	369	* @retval None
mbed_official	76:aeb1df146756	370	*/
mbed_official	76:aeb1df146756	371	void TIM_CounterModeConfig(TIM_TypeDef* TIMx, uint16_t TIM_CounterMode)
mbed_official	76:aeb1df146756	372	{
mbed_official	76:aeb1df146756	373	uint16_t tmpcr1 = 0;
mbed_official	76:aeb1df146756	374
mbed_official	76:aeb1df146756	375	/* Check the parameters */
mbed_official	76:aeb1df146756	376	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	377	assert_param(IS_TIM_COUNTER_MODE(TIM_CounterMode));
mbed_official	76:aeb1df146756	378
mbed_official	76:aeb1df146756	379	tmpcr1 = TIMx->CR1;
mbed_official	76:aeb1df146756	380	/* Reset the CMS and DIR Bits */
mbed_official	76:aeb1df146756	381	tmpcr1 &= (uint16_t)(~((uint16_t)(TIM_CR1_DIR \| TIM_CR1_CMS)));
mbed_official	76:aeb1df146756	382	/* Set the Counter Mode */
mbed_official	76:aeb1df146756	383	tmpcr1 \|= TIM_CounterMode;
mbed_official	76:aeb1df146756	384	/* Write to TIMx CR1 register */
mbed_official	76:aeb1df146756	385	TIMx->CR1 = tmpcr1;
mbed_official	76:aeb1df146756	386	}
mbed_official	76:aeb1df146756	387
mbed_official	76:aeb1df146756	388	/**
mbed_official	76:aeb1df146756	389	* @brief Sets the TIMx Counter Register value
mbed_official	76:aeb1df146756	390	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	391	* peripheral.
mbed_official	76:aeb1df146756	392	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	393	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	394	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	395	* @param Counter: specifies the Counter register new value.
mbed_official	76:aeb1df146756	396	* @retval None
mbed_official	76:aeb1df146756	397	*/
mbed_official	76:aeb1df146756	398	void TIM_SetCounter(TIM_TypeDef* TIMx, uint32_t Counter)
mbed_official	76:aeb1df146756	399	{
mbed_official	76:aeb1df146756	400	/* Check the parameters */
mbed_official	76:aeb1df146756	401	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	402
mbed_official	76:aeb1df146756	403	/* Set the Counter Register value */
mbed_official	76:aeb1df146756	404	TIMx->CNT = Counter;
mbed_official	76:aeb1df146756	405	}
mbed_official	76:aeb1df146756	406
mbed_official	76:aeb1df146756	407	/**
mbed_official	76:aeb1df146756	408	* @brief Sets the TIMx Autoreload Register value
mbed_official	76:aeb1df146756	409	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	410	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	411	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	412	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	413	* @param Autoreload: specifies the Autoreload register new value.
mbed_official	76:aeb1df146756	414	* @retval None
mbed_official	76:aeb1df146756	415	*/
mbed_official	76:aeb1df146756	416	void TIM_SetAutoreload(TIM_TypeDef* TIMx, uint32_t Autoreload)
mbed_official	76:aeb1df146756	417	{
mbed_official	76:aeb1df146756	418	/* Check the parameters */
mbed_official	76:aeb1df146756	419	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	420
mbed_official	76:aeb1df146756	421	/* Set the Autoreload Register value */
mbed_official	76:aeb1df146756	422	TIMx->ARR = Autoreload;
mbed_official	76:aeb1df146756	423	}
mbed_official	76:aeb1df146756	424
mbed_official	76:aeb1df146756	425	/**
mbed_official	76:aeb1df146756	426	* @brief Gets the TIMx Counter value.
mbed_official	76:aeb1df146756	427	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	428	* peripheral.
mbed_official	76:aeb1df146756	429	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	430	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	431	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	432	* @retval Counter Register value.
mbed_official	76:aeb1df146756	433	*/
mbed_official	76:aeb1df146756	434	uint32_t TIM_GetCounter(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	435	{
mbed_official	76:aeb1df146756	436	/* Check the parameters */
mbed_official	76:aeb1df146756	437	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	438
mbed_official	76:aeb1df146756	439	/* Get the Counter Register value */
mbed_official	76:aeb1df146756	440	return TIMx->CNT;
mbed_official	76:aeb1df146756	441	}
mbed_official	76:aeb1df146756	442
mbed_official	76:aeb1df146756	443	/**
mbed_official	76:aeb1df146756	444	* @brief Gets the TIMx Prescaler value.
mbed_official	76:aeb1df146756	445	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	446	* peripheral.
mbed_official	76:aeb1df146756	447	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	448	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	449	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	450	* @retval Prescaler Register value.
mbed_official	76:aeb1df146756	451	*/
mbed_official	76:aeb1df146756	452	uint16_t TIM_GetPrescaler(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	453	{
mbed_official	76:aeb1df146756	454	/* Check the parameters */
mbed_official	76:aeb1df146756	455	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	456
mbed_official	76:aeb1df146756	457	/* Get the Prescaler Register value */
mbed_official	76:aeb1df146756	458	return TIMx->PSC;
mbed_official	76:aeb1df146756	459	}
mbed_official	76:aeb1df146756	460
mbed_official	76:aeb1df146756	461	/**
mbed_official	76:aeb1df146756	462	* @brief Enables or Disables the TIMx Update event.
mbed_official	76:aeb1df146756	463	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	464	* peripheral.
mbed_official	76:aeb1df146756	465	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	466	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	467	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	468	* @param NewState: new state of the TIMx UDIS bit
mbed_official	76:aeb1df146756	469	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	470	* @retval None
mbed_official	76:aeb1df146756	471	*/
mbed_official	76:aeb1df146756	472	void TIM_UpdateDisableConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	473	{
mbed_official	76:aeb1df146756	474	/* Check the parameters */
mbed_official	76:aeb1df146756	475	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	476	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	477
mbed_official	76:aeb1df146756	478	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	479	{
mbed_official	76:aeb1df146756	480	/* Set the Update Disable Bit */
mbed_official	76:aeb1df146756	481	TIMx->CR1 \|= TIM_CR1_UDIS;
mbed_official	76:aeb1df146756	482	}
mbed_official	76:aeb1df146756	483	else
mbed_official	76:aeb1df146756	484	{
mbed_official	76:aeb1df146756	485	/* Reset the Update Disable Bit */
mbed_official	76:aeb1df146756	486	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_UDIS);
mbed_official	76:aeb1df146756	487	}
mbed_official	76:aeb1df146756	488	}
mbed_official	76:aeb1df146756	489
mbed_official	76:aeb1df146756	490	/**
mbed_official	76:aeb1df146756	491	* @brief Configures the TIMx Update Request Interrupt source.
mbed_official	76:aeb1df146756	492	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	493	* peripheral.
mbed_official	76:aeb1df146756	494	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	495	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	496	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	497	* @param TIM_UpdateSource: specifies the Update source.
mbed_official	76:aeb1df146756	498	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	499	* @arg TIM_UpdateSource_Regular: Source of update is the counter
mbed_official	76:aeb1df146756	500	* overflow/underflow or the setting of UG bit, or an update
mbed_official	76:aeb1df146756	501	* generation through the slave mode controller.
mbed_official	76:aeb1df146756	502	* @arg TIM_UpdateSource_Global: Source of update is counter overflow/underflow.
mbed_official	76:aeb1df146756	503	* @retval None
mbed_official	76:aeb1df146756	504	*/
mbed_official	76:aeb1df146756	505	void TIM_UpdateRequestConfig(TIM_TypeDef* TIMx, uint16_t TIM_UpdateSource)
mbed_official	76:aeb1df146756	506	{
mbed_official	76:aeb1df146756	507	/* Check the parameters */
mbed_official	76:aeb1df146756	508	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	509	assert_param(IS_TIM_UPDATE_SOURCE(TIM_UpdateSource));
mbed_official	76:aeb1df146756	510
mbed_official	76:aeb1df146756	511	if (TIM_UpdateSource != TIM_UpdateSource_Global)
mbed_official	76:aeb1df146756	512	{
mbed_official	76:aeb1df146756	513	/* Set the URS Bit */
mbed_official	76:aeb1df146756	514	TIMx->CR1 \|= TIM_CR1_URS;
mbed_official	76:aeb1df146756	515	}
mbed_official	76:aeb1df146756	516	else
mbed_official	76:aeb1df146756	517	{
mbed_official	76:aeb1df146756	518	/* Reset the URS Bit */
mbed_official	76:aeb1df146756	519	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_URS);
mbed_official	76:aeb1df146756	520	}
mbed_official	76:aeb1df146756	521	}
mbed_official	76:aeb1df146756	522
mbed_official	76:aeb1df146756	523	/**
mbed_official	76:aeb1df146756	524	* @brief Enables or disables TIMx peripheral Preload register on ARR.
mbed_official	76:aeb1df146756	525	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	526	* peripheral.
mbed_official	76:aeb1df146756	527	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	528	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	529	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	530	* @param NewState: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	531	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	532	* @retval None
mbed_official	76:aeb1df146756	533	*/
mbed_official	76:aeb1df146756	534	void TIM_ARRPreloadConfig(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	535	{
mbed_official	76:aeb1df146756	536	/* Check the parameters */
mbed_official	76:aeb1df146756	537	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	538	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	539
mbed_official	76:aeb1df146756	540	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	541	{
mbed_official	76:aeb1df146756	542	/* Set the ARR Preload Bit */
mbed_official	76:aeb1df146756	543	TIMx->CR1 \|= TIM_CR1_ARPE;
mbed_official	76:aeb1df146756	544	}
mbed_official	76:aeb1df146756	545	else
mbed_official	76:aeb1df146756	546	{
mbed_official	76:aeb1df146756	547	/* Reset the ARR Preload Bit */
mbed_official	76:aeb1df146756	548	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_ARPE);
mbed_official	76:aeb1df146756	549	}
mbed_official	76:aeb1df146756	550	}
mbed_official	76:aeb1df146756	551
mbed_official	76:aeb1df146756	552	/**
mbed_official	76:aeb1df146756	553	* @brief Selects the TIMx's One Pulse Mode.
mbed_official	76:aeb1df146756	554	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17 to select the TIM
mbed_official	76:aeb1df146756	555	* peripheral.
mbed_official	76:aeb1df146756	556	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	557	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	558	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	559	* @param TIM_OPMode: specifies the OPM Mode to be used.
mbed_official	76:aeb1df146756	560	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	561	* @arg TIM_OPMode_Single
mbed_official	76:aeb1df146756	562	* @arg TIM_OPMode_Repetitive
mbed_official	76:aeb1df146756	563	* @retval None
mbed_official	76:aeb1df146756	564	*/
mbed_official	76:aeb1df146756	565	void TIM_SelectOnePulseMode(TIM_TypeDef* TIMx, uint16_t TIM_OPMode)
mbed_official	76:aeb1df146756	566	{
mbed_official	76:aeb1df146756	567	/* Check the parameters */
mbed_official	76:aeb1df146756	568	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	569	assert_param(IS_TIM_OPM_MODE(TIM_OPMode));
mbed_official	76:aeb1df146756	570
mbed_official	76:aeb1df146756	571	/* Reset the OPM Bit */
mbed_official	76:aeb1df146756	572	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_OPM);
mbed_official	76:aeb1df146756	573	/* Configure the OPM Mode */
mbed_official	76:aeb1df146756	574	TIMx->CR1 \|= TIM_OPMode;
mbed_official	76:aeb1df146756	575	}
mbed_official	76:aeb1df146756	576
mbed_official	76:aeb1df146756	577	/**
mbed_official	76:aeb1df146756	578	* @brief Sets the TIMx Clock Division value.
mbed_official	76:aeb1df146756	579	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	580	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	581	* @param TIM_CKD: specifies the clock division value.
mbed_official	76:aeb1df146756	582	* This parameter can be one of the following value:
mbed_official	76:aeb1df146756	583	* @arg TIM_CKD_DIV1: TDTS = Tck_tim
mbed_official	76:aeb1df146756	584	* @arg TIM_CKD_DIV2: TDTS = 2*Tck_tim
mbed_official	76:aeb1df146756	585	* @arg TIM_CKD_DIV4: TDTS = 4*Tck_tim
mbed_official	76:aeb1df146756	586	* @retval None
mbed_official	76:aeb1df146756	587	*/
mbed_official	76:aeb1df146756	588	void TIM_SetClockDivision(TIM_TypeDef* TIMx, uint16_t TIM_CKD)
mbed_official	76:aeb1df146756	589	{
mbed_official	76:aeb1df146756	590	/* Check the parameters */
mbed_official	76:aeb1df146756	591	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	592	assert_param(IS_TIM_CKD_DIV(TIM_CKD));
mbed_official	76:aeb1df146756	593
mbed_official	76:aeb1df146756	594	/* Reset the CKD Bits */
mbed_official	76:aeb1df146756	595	TIMx->CR1 &= (uint16_t)~((uint16_t)TIM_CR1_CKD);
mbed_official	76:aeb1df146756	596	/* Set the CKD value */
mbed_official	76:aeb1df146756	597	TIMx->CR1 \|= TIM_CKD;
mbed_official	76:aeb1df146756	598	}
mbed_official	76:aeb1df146756	599
mbed_official	76:aeb1df146756	600	/**
mbed_official	76:aeb1df146756	601	* @brief Enables or disables the specified TIM peripheral.
mbed_official	76:aeb1df146756	602	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 and 17to select the TIMx
mbed_official	76:aeb1df146756	603	* peripheral.
mbed_official	76:aeb1df146756	604	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	605	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	606	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	607	* @param NewState: new state of the TIMx peripheral.
mbed_official	76:aeb1df146756	608	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	609	* @retval None
mbed_official	76:aeb1df146756	610	*/
mbed_official	76:aeb1df146756	611	void TIM_Cmd(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	612	{
mbed_official	76:aeb1df146756	613	/* Check the parameters */
mbed_official	76:aeb1df146756	614	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	615	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	616
mbed_official	76:aeb1df146756	617	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	618	{
mbed_official	76:aeb1df146756	619	/* Enable the TIM Counter */
mbed_official	76:aeb1df146756	620	TIMx->CR1 \|= TIM_CR1_CEN;
mbed_official	76:aeb1df146756	621	}
mbed_official	76:aeb1df146756	622	else
mbed_official	76:aeb1df146756	623	{
mbed_official	76:aeb1df146756	624	/* Disable the TIM Counter */
mbed_official	76:aeb1df146756	625	TIMx->CR1 &= (uint16_t)(~((uint16_t)TIM_CR1_CEN));
mbed_official	76:aeb1df146756	626	}
mbed_official	76:aeb1df146756	627	}
mbed_official	76:aeb1df146756	628
mbed_official	76:aeb1df146756	629	/**
mbed_official	76:aeb1df146756	630	* @}
mbed_official	76:aeb1df146756	631	*/
mbed_official	76:aeb1df146756	632
mbed_official	76:aeb1df146756	633	/** @defgroup TIM_Group2 Advanced-control timers (TIM1) specific features
mbed_official	76:aeb1df146756	634	* @brief Advanced-control timers (TIM1) specific features
mbed_official	76:aeb1df146756	635	*
mbed_official	76:aeb1df146756	636	@verbatim
mbed_official	76:aeb1df146756	637	===============================================================================
mbed_official	76:aeb1df146756	638	##### Advanced-control timers (TIM1) specific features #####
mbed_official	76:aeb1df146756	639	===============================================================================
mbed_official	76:aeb1df146756	640
mbed_official	76:aeb1df146756	641	===================================================================
mbed_official	76:aeb1df146756	642	* TIM Driver: how to use the Break feature *
mbed_official	76:aeb1df146756	643	===================================================================
mbed_official	76:aeb1df146756	644	[..] After configuring the Timer channel(s) in the appropriate Output Compare mode:
mbed_official	76:aeb1df146756	645
mbed_official	76:aeb1df146756	646	(#) Fill the TIM_BDTRInitStruct with the desired parameters for the Timer
mbed_official	76:aeb1df146756	647	Break Polarity, dead time, Lock level, the OSSI/OSSR State and the
mbed_official	76:aeb1df146756	648	AOE(automatic output enable).
mbed_official	76:aeb1df146756	649
mbed_official	76:aeb1df146756	650	(#) Call TIM_BDTRConfig(TIMx, &TIM_BDTRInitStruct) to configure the Timer
mbed_official	76:aeb1df146756	651
mbed_official	76:aeb1df146756	652	(#) Enable the Main Output using TIM_CtrlPWMOutputs(TIM1, ENABLE)
mbed_official	76:aeb1df146756	653
mbed_official	76:aeb1df146756	654	(#) Once the break even occurs, the Timer's output signals are put in reset
mbed_official	76:aeb1df146756	655	state or in a known state (according to the configuration made in
mbed_official	76:aeb1df146756	656	TIM_BDTRConfig() function).
mbed_official	76:aeb1df146756	657
mbed_official	76:aeb1df146756	658	@endverbatim
mbed_official	76:aeb1df146756	659	* @{
mbed_official	76:aeb1df146756	660	*/
mbed_official	76:aeb1df146756	661	/**
mbed_official	76:aeb1df146756	662	* @brief Configures the: Break feature, dead time, Lock level, OSSI/OSSR State
mbed_official	76:aeb1df146756	663	* and the AOE(automatic output enable).
mbed_official	76:aeb1df146756	664	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM
mbed_official	76:aeb1df146756	665	* @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure that
mbed_official	76:aeb1df146756	666	* contains the BDTR Register configuration information for the TIM peripheral.
mbed_official	76:aeb1df146756	667	* @retval None
mbed_official	76:aeb1df146756	668	*/
mbed_official	76:aeb1df146756	669	void TIM_BDTRConfig(TIM_TypeDef* TIMx, TIM_BDTRInitTypeDef *TIM_BDTRInitStruct)
mbed_official	76:aeb1df146756	670	{
mbed_official	76:aeb1df146756	671	/* Check the parameters */
mbed_official	76:aeb1df146756	672	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	673	assert_param(IS_TIM_OSSR_STATE(TIM_BDTRInitStruct->TIM_OSSRState));
mbed_official	76:aeb1df146756	674	assert_param(IS_TIM_OSSI_STATE(TIM_BDTRInitStruct->TIM_OSSIState));
mbed_official	76:aeb1df146756	675	assert_param(IS_TIM_LOCK_LEVEL(TIM_BDTRInitStruct->TIM_LOCKLevel));
mbed_official	76:aeb1df146756	676	assert_param(IS_TIM_BREAK_STATE(TIM_BDTRInitStruct->TIM_Break));
mbed_official	76:aeb1df146756	677	assert_param(IS_TIM_BREAK_POLARITY(TIM_BDTRInitStruct->TIM_BreakPolarity));
mbed_official	76:aeb1df146756	678	assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(TIM_BDTRInitStruct->TIM_AutomaticOutput));
mbed_official	76:aeb1df146756	679	/* Set the Lock level, the Break enable Bit and the Ploarity, the OSSR State,
mbed_official	76:aeb1df146756	680	the OSSI State, the dead time value and the Automatic Output Enable Bit */
mbed_official	76:aeb1df146756	681	TIMx->BDTR = (uint32_t)TIM_BDTRInitStruct->TIM_OSSRState \| TIM_BDTRInitStruct->TIM_OSSIState \|
mbed_official	76:aeb1df146756	682	TIM_BDTRInitStruct->TIM_LOCKLevel \| TIM_BDTRInitStruct->TIM_DeadTime \|
mbed_official	76:aeb1df146756	683	TIM_BDTRInitStruct->TIM_Break \| TIM_BDTRInitStruct->TIM_BreakPolarity \|
mbed_official	76:aeb1df146756	684	TIM_BDTRInitStruct->TIM_AutomaticOutput;
mbed_official	76:aeb1df146756	685	}
mbed_official	76:aeb1df146756	686
mbed_official	76:aeb1df146756	687	/**
mbed_official	76:aeb1df146756	688	* @brief Fills each TIM_BDTRInitStruct member with its default value.
mbed_official	76:aeb1df146756	689	* @param TIM_BDTRInitStruct: pointer to a TIM_BDTRInitTypeDef structure which
mbed_official	76:aeb1df146756	690	* will be initialized.
mbed_official	76:aeb1df146756	691	* @retval None
mbed_official	76:aeb1df146756	692	*/
mbed_official	76:aeb1df146756	693	void TIM_BDTRStructInit(TIM_BDTRInitTypeDef* TIM_BDTRInitStruct)
mbed_official	76:aeb1df146756	694	{
mbed_official	76:aeb1df146756	695	/* Set the default configuration */
mbed_official	76:aeb1df146756	696	TIM_BDTRInitStruct->TIM_OSSRState = TIM_OSSRState_Disable;
mbed_official	76:aeb1df146756	697	TIM_BDTRInitStruct->TIM_OSSIState = TIM_OSSIState_Disable;
mbed_official	76:aeb1df146756	698	TIM_BDTRInitStruct->TIM_LOCKLevel = TIM_LOCKLevel_OFF;
mbed_official	76:aeb1df146756	699	TIM_BDTRInitStruct->TIM_DeadTime = 0x00;
mbed_official	76:aeb1df146756	700	TIM_BDTRInitStruct->TIM_Break = TIM_Break_Disable;
mbed_official	76:aeb1df146756	701	TIM_BDTRInitStruct->TIM_BreakPolarity = TIM_BreakPolarity_Low;
mbed_official	76:aeb1df146756	702	TIM_BDTRInitStruct->TIM_AutomaticOutput = TIM_AutomaticOutput_Disable;
mbed_official	76:aeb1df146756	703	}
mbed_official	76:aeb1df146756	704
mbed_official	76:aeb1df146756	705	/**
mbed_official	76:aeb1df146756	706	* @brief Enables or disables the TIM peripheral Main Outputs.
mbed_official	76:aeb1df146756	707	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIMx peripheral.
mbed_official	76:aeb1df146756	708	* @param NewState: new state of the TIM peripheral Main Outputs.
mbed_official	76:aeb1df146756	709	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	710	* @retval None
mbed_official	76:aeb1df146756	711	*/
mbed_official	76:aeb1df146756	712	void TIM_CtrlPWMOutputs(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	713	{
mbed_official	76:aeb1df146756	714	/* Check the parameters */
mbed_official	76:aeb1df146756	715	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	716	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	717	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	718	{
mbed_official	76:aeb1df146756	719	/* Enable the TIM Main Output */
mbed_official	76:aeb1df146756	720	TIMx->BDTR \|= TIM_BDTR_MOE;
mbed_official	76:aeb1df146756	721	}
mbed_official	76:aeb1df146756	722	else
mbed_official	76:aeb1df146756	723	{
mbed_official	76:aeb1df146756	724	/* Disable the TIM Main Output */
mbed_official	76:aeb1df146756	725	TIMx->BDTR &= (uint16_t)(~((uint16_t)TIM_BDTR_MOE));
mbed_official	76:aeb1df146756	726	}
mbed_official	76:aeb1df146756	727	}
mbed_official	76:aeb1df146756	728
mbed_official	76:aeb1df146756	729	/**
mbed_official	76:aeb1df146756	730	* @}
mbed_official	76:aeb1df146756	731	*/
mbed_official	76:aeb1df146756	732
mbed_official	76:aeb1df146756	733	/** @defgroup TIM_Group3 Output Compare management functions
mbed_official	76:aeb1df146756	734	* @brief Output Compare management functions
mbed_official	76:aeb1df146756	735	*
mbed_official	76:aeb1df146756	736	@verbatim
mbed_official	76:aeb1df146756	737	===============================================================================
mbed_official	76:aeb1df146756	738	##### Output Compare management functions #####
mbed_official	76:aeb1df146756	739	===============================================================================
mbed_official	76:aeb1df146756	740	* TIM Driver: how to use it in Output Compare Mode *
mbed_official	76:aeb1df146756	741	===============================================================================
mbed_official	76:aeb1df146756	742	[..] To use the Timer in Output Compare mode, the following steps are mandatory:
mbed_official	76:aeb1df146756	743	(#) Enable TIM clock using
mbed_official	76:aeb1df146756	744	RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE) function.
mbed_official	76:aeb1df146756	745	(#) Configure the TIM pins by configuring the corresponding GPIO pins
mbed_official	76:aeb1df146756	746	(#) Configure the Time base unit as described in the first part of this
mbed_official	76:aeb1df146756	747	driver, if needed, else the Timer will run with the default
mbed_official	76:aeb1df146756	748	configuration:
mbed_official	76:aeb1df146756	749	(++) Autoreload value = 0xFFFF.
mbed_official	76:aeb1df146756	750	(++) Prescaler value = 0x0000.
mbed_official	76:aeb1df146756	751	(++) Counter mode = Up counting.
mbed_official	76:aeb1df146756	752	(++) Clock Division = TIM_CKD_DIV1.
mbed_official	76:aeb1df146756	753	(#) Fill the TIM_OCInitStruct with the desired parameters including:
mbed_official	76:aeb1df146756	754	(++) The TIM Output Compare mode: TIM_OCMode.
mbed_official	76:aeb1df146756	755	(++) TIM Output State: TIM_OutputState.
mbed_official	76:aeb1df146756	756	(++) TIM Pulse value: TIM_Pulse.
mbed_official	76:aeb1df146756	757	(++) TIM Output Compare Polarity : TIM_OCPolarity.
mbed_official	76:aeb1df146756	758	(#) Call TIM_OCxInit(TIMx, &TIM_OCInitStruct) to configure the desired
mbed_official	76:aeb1df146756	759	channel with the corresponding configuration.
mbed_official	76:aeb1df146756	760	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	761	[..]
mbed_official	76:aeb1df146756	762	(@) All other functions can be used separately to modify, if needed,
mbed_official	76:aeb1df146756	763	a specific feature of the Timer.
mbed_official	76:aeb1df146756	764	(@) In case of PWM mode, this function is mandatory:
mbed_official	76:aeb1df146756	765	TIM_OCxPreloadConfig(TIMx, TIM_OCPreload_ENABLE).
mbed_official	76:aeb1df146756	766	(@) If the corresponding interrupt or DMA request are needed, the user should:
mbed_official	76:aeb1df146756	767	(#@) Enable the NVIC (or the DMA) to use the TIM interrupts (or DMA requests).
mbed_official	76:aeb1df146756	768	(#@) Enable the corresponding interrupt (or DMA request) using the function
mbed_official	76:aeb1df146756	769	TIM_ITConfig(TIMx, TIM_IT_CCx) (or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official	76:aeb1df146756	770
mbed_official	76:aeb1df146756	771	@endverbatim
mbed_official	76:aeb1df146756	772	* @{
mbed_official	76:aeb1df146756	773	*/
mbed_official	76:aeb1df146756	774
mbed_official	76:aeb1df146756	775	/**
mbed_official	76:aeb1df146756	776	* @brief Initializes the TIMx Channel1 according to the specified
mbed_official	76:aeb1df146756	777	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	778	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	779	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	780	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	781	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	782	* peripheral.
mbed_official	76:aeb1df146756	783	* @retval None
mbed_official	76:aeb1df146756	784	*/
mbed_official	76:aeb1df146756	785	void TIM_OC1Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	786	{
mbed_official	76:aeb1df146756	787	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	788
mbed_official	76:aeb1df146756	789	/* Check the parameters */
mbed_official	76:aeb1df146756	790	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	791	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	792	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	793	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	794	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	76:aeb1df146756	795	TIMx->CCER &= (uint16_t)(~(uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	796	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	797	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	798	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	799	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	800
mbed_official	76:aeb1df146756	801	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	802	tmpccmrx = TIMx->CCMR1;
mbed_official	76:aeb1df146756	803
mbed_official	76:aeb1df146756	804	/* Reset the Output Compare Mode Bits */
mbed_official	76:aeb1df146756	805	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC1M));
mbed_official	76:aeb1df146756	806	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC1S));
mbed_official	76:aeb1df146756	807
mbed_official	76:aeb1df146756	808	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	809	tmpccmrx \|= TIM_OCInitStruct->TIM_OCMode;
mbed_official	76:aeb1df146756	810
mbed_official	76:aeb1df146756	811	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	812	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1P));
mbed_official	76:aeb1df146756	813	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	814	tmpccer \|= TIM_OCInitStruct->TIM_OCPolarity;
mbed_official	76:aeb1df146756	815
mbed_official	76:aeb1df146756	816	/* Set the Output State */
mbed_official	76:aeb1df146756	817	tmpccer \|= TIM_OCInitStruct->TIM_OutputState;
mbed_official	76:aeb1df146756	818
mbed_official	76:aeb1df146756	819	if((TIMx == TIM1) \|\| (TIMx == TIM15) \|\| (TIMx == TIM16) \|\| (TIMx == TIM17))
mbed_official	76:aeb1df146756	820	{
mbed_official	76:aeb1df146756	821	assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
mbed_official	76:aeb1df146756	822	assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
mbed_official	76:aeb1df146756	823	assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
mbed_official	76:aeb1df146756	824	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	825
mbed_official	76:aeb1df146756	826	/* Reset the Output N Polarity level */
mbed_official	76:aeb1df146756	827	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NP));
mbed_official	76:aeb1df146756	828	/* Set the Output N Polarity */
mbed_official	76:aeb1df146756	829	tmpccer \|= TIM_OCInitStruct->TIM_OCNPolarity;
mbed_official	76:aeb1df146756	830
mbed_official	76:aeb1df146756	831	/* Reset the Output N State */
mbed_official	76:aeb1df146756	832	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC1NE));
mbed_official	76:aeb1df146756	833	/* Set the Output N State */
mbed_official	76:aeb1df146756	834	tmpccer \|= TIM_OCInitStruct->TIM_OutputNState;
mbed_official	76:aeb1df146756	835
mbed_official	76:aeb1df146756	836	/* Reset the Ouput Compare and Output Compare N IDLE State */
mbed_official	76:aeb1df146756	837	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1));
mbed_official	76:aeb1df146756	838	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS1N));
mbed_official	76:aeb1df146756	839
mbed_official	76:aeb1df146756	840	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	841	tmpcr2 \|= TIM_OCInitStruct->TIM_OCIdleState;
mbed_official	76:aeb1df146756	842	/* Set the Output N Idle state */
mbed_official	76:aeb1df146756	843	tmpcr2 \|= TIM_OCInitStruct->TIM_OCNIdleState;
mbed_official	76:aeb1df146756	844	}
mbed_official	76:aeb1df146756	845	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	846	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	847
mbed_official	76:aeb1df146756	848	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	849	TIMx->CCMR1 = tmpccmrx;
mbed_official	76:aeb1df146756	850
mbed_official	76:aeb1df146756	851	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	852	TIMx->CCR1 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	853
mbed_official	76:aeb1df146756	854	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	855	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	856	}
mbed_official	76:aeb1df146756	857
mbed_official	76:aeb1df146756	858	/**
mbed_official	76:aeb1df146756	859	* @brief Initializes the TIMx Channel2 according to the specified
mbed_official	76:aeb1df146756	860	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	861	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	862	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	863	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	864	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	865	* peripheral.
mbed_official	76:aeb1df146756	866	* @retval None
mbed_official	76:aeb1df146756	867	*/
mbed_official	76:aeb1df146756	868	void TIM_OC2Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	869	{
mbed_official	76:aeb1df146756	870	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	871
mbed_official	76:aeb1df146756	872	/* Check the parameters */
mbed_official	76:aeb1df146756	873	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	874	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	875	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	876	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	877	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	878	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC2E));
mbed_official	76:aeb1df146756	879
mbed_official	76:aeb1df146756	880	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	881	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	882	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	883	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	884
mbed_official	76:aeb1df146756	885	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	886	tmpccmrx = TIMx->CCMR1;
mbed_official	76:aeb1df146756	887
mbed_official	76:aeb1df146756	888	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	76:aeb1df146756	889	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_OC2M));
mbed_official	76:aeb1df146756	890	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S));
mbed_official	76:aeb1df146756	891
mbed_official	76:aeb1df146756	892	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	893	tmpccmrx \|= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official	76:aeb1df146756	894
mbed_official	76:aeb1df146756	895	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	896	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2P));
mbed_official	76:aeb1df146756	897	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	898	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 4);
mbed_official	76:aeb1df146756	899
mbed_official	76:aeb1df146756	900	/* Set the Output State */
mbed_official	76:aeb1df146756	901	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 4);
mbed_official	76:aeb1df146756	902
mbed_official	76:aeb1df146756	903	if((TIMx == TIM1) \|\| (TIMx == TIM15))
mbed_official	76:aeb1df146756	904	{
mbed_official	76:aeb1df146756	905	/* Check the parameters */
mbed_official	76:aeb1df146756	906	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	907
mbed_official	76:aeb1df146756	908	/* Reset the Ouput Compare State */
mbed_official	76:aeb1df146756	909	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2));
mbed_official	76:aeb1df146756	910
mbed_official	76:aeb1df146756	911	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	912	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 2);
mbed_official	76:aeb1df146756	913
mbed_official	76:aeb1df146756	914	if (TIMx == TIM1)
mbed_official	76:aeb1df146756	915	{
mbed_official	76:aeb1df146756	916	/* Check the parameters */
mbed_official	76:aeb1df146756	917	assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
mbed_official	76:aeb1df146756	918	assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
mbed_official	76:aeb1df146756	919	assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
mbed_official	76:aeb1df146756	920
mbed_official	76:aeb1df146756	921	/* Reset the Output N Polarity level */
mbed_official	76:aeb1df146756	922	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NP));
mbed_official	76:aeb1df146756	923	/* Set the Output N Polarity */
mbed_official	76:aeb1df146756	924	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 4);
mbed_official	76:aeb1df146756	925
mbed_official	76:aeb1df146756	926	/* Reset the Output N State */
mbed_official	76:aeb1df146756	927	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC2NE));
mbed_official	76:aeb1df146756	928	/* Set the Output N State */
mbed_official	76:aeb1df146756	929	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 4);
mbed_official	76:aeb1df146756	930
mbed_official	76:aeb1df146756	931	/* Reset the Output Compare N IDLE State */
mbed_official	76:aeb1df146756	932	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS2N));
mbed_official	76:aeb1df146756	933
mbed_official	76:aeb1df146756	934	/* Set the Output N Idle state */
mbed_official	76:aeb1df146756	935	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 2);
mbed_official	76:aeb1df146756	936	}
mbed_official	76:aeb1df146756	937	}
mbed_official	76:aeb1df146756	938	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	939	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	940
mbed_official	76:aeb1df146756	941	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	942	TIMx->CCMR1 = tmpccmrx;
mbed_official	76:aeb1df146756	943
mbed_official	76:aeb1df146756	944	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	945	TIMx->CCR2 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	946
mbed_official	76:aeb1df146756	947	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	948	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	949	}
mbed_official	76:aeb1df146756	950
mbed_official	76:aeb1df146756	951	/**
mbed_official	76:aeb1df146756	952	* @brief Initializes the TIMx Channel3 according to the specified
mbed_official	76:aeb1df146756	953	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	954	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	955	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	956	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	957	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	958	* peripheral.
mbed_official	76:aeb1df146756	959	* @retval None
mbed_official	76:aeb1df146756	960	*/
mbed_official	76:aeb1df146756	961	void TIM_OC3Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	962	{
mbed_official	76:aeb1df146756	963	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	964
mbed_official	76:aeb1df146756	965	/* Check the parameters */
mbed_official	76:aeb1df146756	966	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	967	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	968	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	969	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	970	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	971	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC3E));
mbed_official	76:aeb1df146756	972
mbed_official	76:aeb1df146756	973	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	974	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	975	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	976	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	977
mbed_official	76:aeb1df146756	978	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	979	tmpccmrx = TIMx->CCMR2;
mbed_official	76:aeb1df146756	980
mbed_official	76:aeb1df146756	981	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	76:aeb1df146756	982	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC3M));
mbed_official	76:aeb1df146756	983	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC3S));
mbed_official	76:aeb1df146756	984	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	985	tmpccmrx \|= TIM_OCInitStruct->TIM_OCMode;
mbed_official	76:aeb1df146756	986
mbed_official	76:aeb1df146756	987	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	988	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3P));
mbed_official	76:aeb1df146756	989	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	990	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 8);
mbed_official	76:aeb1df146756	991
mbed_official	76:aeb1df146756	992	/* Set the Output State */
mbed_official	76:aeb1df146756	993	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 8);
mbed_official	76:aeb1df146756	994
mbed_official	76:aeb1df146756	995	if(TIMx == TIM1)
mbed_official	76:aeb1df146756	996	{
mbed_official	76:aeb1df146756	997	assert_param(IS_TIM_OUTPUTN_STATE(TIM_OCInitStruct->TIM_OutputNState));
mbed_official	76:aeb1df146756	998	assert_param(IS_TIM_OCN_POLARITY(TIM_OCInitStruct->TIM_OCNPolarity));
mbed_official	76:aeb1df146756	999	assert_param(IS_TIM_OCNIDLE_STATE(TIM_OCInitStruct->TIM_OCNIdleState));
mbed_official	76:aeb1df146756	1000	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	1001
mbed_official	76:aeb1df146756	1002	/* Reset the Output N Polarity level */
mbed_official	76:aeb1df146756	1003	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NP));
mbed_official	76:aeb1df146756	1004	/* Set the Output N Polarity */
mbed_official	76:aeb1df146756	1005	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNPolarity << 8);
mbed_official	76:aeb1df146756	1006	/* Reset the Output N State */
mbed_official	76:aeb1df146756	1007	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC3NE));
mbed_official	76:aeb1df146756	1008
mbed_official	76:aeb1df146756	1009	/* Set the Output N State */
mbed_official	76:aeb1df146756	1010	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputNState << 8);
mbed_official	76:aeb1df146756	1011	/* Reset the Ouput Compare and Output Compare N IDLE State */
mbed_official	76:aeb1df146756	1012	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3));
mbed_official	76:aeb1df146756	1013	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS3N));
mbed_official	76:aeb1df146756	1014	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	1015	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 4);
mbed_official	76:aeb1df146756	1016	/* Set the Output N Idle state */
mbed_official	76:aeb1df146756	1017	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCNIdleState << 4);
mbed_official	76:aeb1df146756	1018	}
mbed_official	76:aeb1df146756	1019	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	1020	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	1021
mbed_official	76:aeb1df146756	1022	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1023	TIMx->CCMR2 = tmpccmrx;
mbed_official	76:aeb1df146756	1024
mbed_official	76:aeb1df146756	1025	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	1026	TIMx->CCR3 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	1027
mbed_official	76:aeb1df146756	1028	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	1029	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1030	}
mbed_official	76:aeb1df146756	1031
mbed_official	76:aeb1df146756	1032	/**
mbed_official	76:aeb1df146756	1033	* @brief Initializes the TIMx Channel4 according to the specified
mbed_official	76:aeb1df146756	1034	* parameters in the TIM_OCInitStruct.
mbed_official	76:aeb1df146756	1035	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1036	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1037	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure
mbed_official	76:aeb1df146756	1038	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	1039	* peripheral.
mbed_official	76:aeb1df146756	1040	* @retval None
mbed_official	76:aeb1df146756	1041	*/
mbed_official	76:aeb1df146756	1042	void TIM_OC4Init(TIM_TypeDef* TIMx, TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	1043	{
mbed_official	76:aeb1df146756	1044	uint16_t tmpccmrx = 0, tmpccer = 0, tmpcr2 = 0;
mbed_official	76:aeb1df146756	1045
mbed_official	76:aeb1df146756	1046	/* Check the parameters */
mbed_official	76:aeb1df146756	1047	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1048	assert_param(IS_TIM_OC_MODE(TIM_OCInitStruct->TIM_OCMode));
mbed_official	76:aeb1df146756	1049	assert_param(IS_TIM_OUTPUT_STATE(TIM_OCInitStruct->TIM_OutputState));
mbed_official	76:aeb1df146756	1050	assert_param(IS_TIM_OC_POLARITY(TIM_OCInitStruct->TIM_OCPolarity));
mbed_official	76:aeb1df146756	1051	/* Disable the Channel 2: Reset the CC4E Bit */
mbed_official	76:aeb1df146756	1052	TIMx->CCER &= (uint16_t)(~((uint16_t)TIM_CCER_CC4E));
mbed_official	76:aeb1df146756	1053
mbed_official	76:aeb1df146756	1054	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	1055	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1056	/* Get the TIMx CR2 register value */
mbed_official	76:aeb1df146756	1057	tmpcr2 = TIMx->CR2;
mbed_official	76:aeb1df146756	1058
mbed_official	76:aeb1df146756	1059	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1060	tmpccmrx = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1061
mbed_official	76:aeb1df146756	1062	/* Reset the Output Compare mode and Capture/Compare selection Bits */
mbed_official	76:aeb1df146756	1063	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_OC4M));
mbed_official	76:aeb1df146756	1064	tmpccmrx &= (uint16_t)(~((uint16_t)TIM_CCMR2_CC4S));
mbed_official	76:aeb1df146756	1065
mbed_official	76:aeb1df146756	1066	/* Select the Output Compare Mode */
mbed_official	76:aeb1df146756	1067	tmpccmrx \|= (uint16_t)(TIM_OCInitStruct->TIM_OCMode << 8);
mbed_official	76:aeb1df146756	1068
mbed_official	76:aeb1df146756	1069	/* Reset the Output Polarity level */
mbed_official	76:aeb1df146756	1070	tmpccer &= (uint16_t)(~((uint16_t)TIM_CCER_CC4P));
mbed_official	76:aeb1df146756	1071	/* Set the Output Compare Polarity */
mbed_official	76:aeb1df146756	1072	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OCPolarity << 12);
mbed_official	76:aeb1df146756	1073
mbed_official	76:aeb1df146756	1074	/* Set the Output State */
mbed_official	76:aeb1df146756	1075	tmpccer \|= (uint16_t)(TIM_OCInitStruct->TIM_OutputState << 12);
mbed_official	76:aeb1df146756	1076
mbed_official	76:aeb1df146756	1077	if(TIMx == TIM1)
mbed_official	76:aeb1df146756	1078	{
mbed_official	76:aeb1df146756	1079	assert_param(IS_TIM_OCIDLE_STATE(TIM_OCInitStruct->TIM_OCIdleState));
mbed_official	76:aeb1df146756	1080	/* Reset the Ouput Compare IDLE State */
mbed_official	76:aeb1df146756	1081	tmpcr2 &= (uint16_t)(~((uint16_t)TIM_CR2_OIS4));
mbed_official	76:aeb1df146756	1082	/* Set the Output Idle state */
mbed_official	76:aeb1df146756	1083	tmpcr2 \|= (uint16_t)(TIM_OCInitStruct->TIM_OCIdleState << 6);
mbed_official	76:aeb1df146756	1084	}
mbed_official	76:aeb1df146756	1085	/* Write to TIMx CR2 */
mbed_official	76:aeb1df146756	1086	TIMx->CR2 = tmpcr2;
mbed_official	76:aeb1df146756	1087
mbed_official	76:aeb1df146756	1088	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1089	TIMx->CCMR2 = tmpccmrx;
mbed_official	76:aeb1df146756	1090
mbed_official	76:aeb1df146756	1091	/* Set the Capture Compare Register value */
mbed_official	76:aeb1df146756	1092	TIMx->CCR4 = TIM_OCInitStruct->TIM_Pulse;
mbed_official	76:aeb1df146756	1093
mbed_official	76:aeb1df146756	1094	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	1095	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1096	}
mbed_official	76:aeb1df146756	1097
mbed_official	76:aeb1df146756	1098	/**
mbed_official	76:aeb1df146756	1099	* @brief Fills each TIM_OCInitStruct member with its default value.
mbed_official	76:aeb1df146756	1100	* @param TIM_OCInitStruct: pointer to a TIM_OCInitTypeDef structure which will
mbed_official	76:aeb1df146756	1101	* be initialized.
mbed_official	76:aeb1df146756	1102	* @retval None
mbed_official	76:aeb1df146756	1103	*/
mbed_official	76:aeb1df146756	1104	void TIM_OCStructInit(TIM_OCInitTypeDef* TIM_OCInitStruct)
mbed_official	76:aeb1df146756	1105	{
mbed_official	76:aeb1df146756	1106	/* Set the default configuration */
mbed_official	76:aeb1df146756	1107	TIM_OCInitStruct->TIM_OCMode = TIM_OCMode_Timing;
mbed_official	76:aeb1df146756	1108	TIM_OCInitStruct->TIM_OutputState = TIM_OutputState_Disable;
mbed_official	76:aeb1df146756	1109	TIM_OCInitStruct->TIM_OutputNState = TIM_OutputNState_Disable;
mbed_official	76:aeb1df146756	1110	TIM_OCInitStruct->TIM_Pulse = 0x0000000;
mbed_official	76:aeb1df146756	1111	TIM_OCInitStruct->TIM_OCPolarity = TIM_OCPolarity_High;
mbed_official	76:aeb1df146756	1112	TIM_OCInitStruct->TIM_OCNPolarity = TIM_OCPolarity_High;
mbed_official	76:aeb1df146756	1113	TIM_OCInitStruct->TIM_OCIdleState = TIM_OCIdleState_Reset;
mbed_official	76:aeb1df146756	1114	TIM_OCInitStruct->TIM_OCNIdleState = TIM_OCNIdleState_Reset;
mbed_official	76:aeb1df146756	1115	}
mbed_official	76:aeb1df146756	1116
mbed_official	76:aeb1df146756	1117	/**
mbed_official	76:aeb1df146756	1118	* @brief Selects the TIM Output Compare Mode.
mbed_official	76:aeb1df146756	1119	* @note This function disables the selected channel before changing the Output
mbed_official	76:aeb1df146756	1120	* Compare Mode.
mbed_official	76:aeb1df146756	1121	* User has to enable this channel using TIM_CCxCmd and TIM_CCxNCmd functions.
mbed_official	76:aeb1df146756	1122	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1123	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1124	* @param TIM_Channel: specifies the TIM Channel
mbed_official	76:aeb1df146756	1125	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1126	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	76:aeb1df146756	1127	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	76:aeb1df146756	1128	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	76:aeb1df146756	1129	* @arg TIM_Channel_4: TIM Channel 4
mbed_official	76:aeb1df146756	1130	* @param TIM_OCMode: specifies the TIM Output Compare Mode.
mbed_official	76:aeb1df146756	1131	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1132	* @arg TIM_OCMode_Timing
mbed_official	76:aeb1df146756	1133	* @arg TIM_OCMode_Active
mbed_official	76:aeb1df146756	1134	* @arg TIM_OCMode_Toggle
mbed_official	76:aeb1df146756	1135	* @arg TIM_OCMode_PWM1
mbed_official	76:aeb1df146756	1136	* @arg TIM_OCMode_PWM2
mbed_official	76:aeb1df146756	1137	* @arg TIM_ForcedAction_Active
mbed_official	76:aeb1df146756	1138	* @arg TIM_ForcedAction_InActive
mbed_official	76:aeb1df146756	1139	* @retval None
mbed_official	76:aeb1df146756	1140	*/
mbed_official	76:aeb1df146756	1141	void TIM_SelectOCxM(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_OCMode)
mbed_official	76:aeb1df146756	1142	{
mbed_official	76:aeb1df146756	1143	uint32_t tmp = 0;
mbed_official	76:aeb1df146756	1144	uint16_t tmp1 = 0;
mbed_official	76:aeb1df146756	1145
mbed_official	76:aeb1df146756	1146	/* Check the parameters */
mbed_official	76:aeb1df146756	1147	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1148	assert_param(IS_TIM_OCM(TIM_OCMode));
mbed_official	76:aeb1df146756	1149
mbed_official	76:aeb1df146756	1150	tmp = (uint32_t) TIMx;
mbed_official	76:aeb1df146756	1151	tmp += CCMR_OFFSET;
mbed_official	76:aeb1df146756	1152
mbed_official	76:aeb1df146756	1153	tmp1 = CCER_CCE_SET << (uint16_t)TIM_Channel;
mbed_official	76:aeb1df146756	1154
mbed_official	76:aeb1df146756	1155	/* Disable the Channel: Reset the CCxE Bit */
mbed_official	76:aeb1df146756	1156	TIMx->CCER &= (uint16_t) ~tmp1;
mbed_official	76:aeb1df146756	1157
mbed_official	76:aeb1df146756	1158	if((TIM_Channel == TIM_Channel_1) \|\|(TIM_Channel == TIM_Channel_3))
mbed_official	76:aeb1df146756	1159	{
mbed_official	76:aeb1df146756	1160	tmp += (TIM_Channel>>1);
mbed_official	76:aeb1df146756	1161
mbed_official	76:aeb1df146756	1162	/* Reset the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1163	(__IO uint32_t ) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC1M);
mbed_official	76:aeb1df146756	1164
mbed_official	76:aeb1df146756	1165	/* Configure the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1166	(__IO uint32_t ) tmp \|= TIM_OCMode;
mbed_official	76:aeb1df146756	1167	}
mbed_official	76:aeb1df146756	1168	else
mbed_official	76:aeb1df146756	1169	{
mbed_official	76:aeb1df146756	1170	tmp += (uint16_t)(TIM_Channel - (uint16_t)4)>> (uint16_t)1;
mbed_official	76:aeb1df146756	1171
mbed_official	76:aeb1df146756	1172	/* Reset the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1173	(__IO uint32_t ) tmp &= (uint32_t)~((uint32_t)TIM_CCMR1_OC2M);
mbed_official	76:aeb1df146756	1174
mbed_official	76:aeb1df146756	1175	/* Configure the OCxM bits in the CCMRx register */
mbed_official	76:aeb1df146756	1176	(__IO uint32_t ) tmp \|= (uint16_t)(TIM_OCMode << 8);
mbed_official	76:aeb1df146756	1177	}
mbed_official	76:aeb1df146756	1178	}
mbed_official	76:aeb1df146756	1179
mbed_official	76:aeb1df146756	1180	/**
mbed_official	76:aeb1df146756	1181	* @brief Sets the TIMx Capture Compare1 Register value
mbed_official	76:aeb1df146756	1182	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1183	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1184	* @param Compare1: specifies the Capture Compare1 register new value.
mbed_official	76:aeb1df146756	1185	* @retval None
mbed_official	76:aeb1df146756	1186	*/
mbed_official	76:aeb1df146756	1187	void TIM_SetCompare1(TIM_TypeDef* TIMx, uint32_t Compare1)
mbed_official	76:aeb1df146756	1188	{
mbed_official	76:aeb1df146756	1189	/* Check the parameters */
mbed_official	76:aeb1df146756	1190	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1191
mbed_official	76:aeb1df146756	1192	/* Set the Capture Compare1 Register value */
mbed_official	76:aeb1df146756	1193	TIMx->CCR1 = Compare1;
mbed_official	76:aeb1df146756	1194	}
mbed_official	76:aeb1df146756	1195
mbed_official	76:aeb1df146756	1196	/**
mbed_official	76:aeb1df146756	1197	* @brief Sets the TIMx Capture Compare2 Register value
mbed_official	76:aeb1df146756	1198	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1199	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1200	* @param Compare2: specifies the Capture Compare2 register new value.
mbed_official	76:aeb1df146756	1201	* @retval None
mbed_official	76:aeb1df146756	1202	*/
mbed_official	76:aeb1df146756	1203	void TIM_SetCompare2(TIM_TypeDef* TIMx, uint32_t Compare2)
mbed_official	76:aeb1df146756	1204	{
mbed_official	76:aeb1df146756	1205	/* Check the parameters */
mbed_official	76:aeb1df146756	1206	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1207
mbed_official	76:aeb1df146756	1208	/* Set the Capture Compare2 Register value */
mbed_official	76:aeb1df146756	1209	TIMx->CCR2 = Compare2;
mbed_official	76:aeb1df146756	1210	}
mbed_official	76:aeb1df146756	1211
mbed_official	76:aeb1df146756	1212	/**
mbed_official	76:aeb1df146756	1213	* @brief Sets the TIMx Capture Compare3 Register value
mbed_official	76:aeb1df146756	1214	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1215	* @param Compare3: specifies the Capture Compare3 register new value.
mbed_official	76:aeb1df146756	1216	* @retval None
mbed_official	76:aeb1df146756	1217	*/
mbed_official	76:aeb1df146756	1218	void TIM_SetCompare3(TIM_TypeDef* TIMx, uint32_t Compare3)
mbed_official	76:aeb1df146756	1219	{
mbed_official	76:aeb1df146756	1220	/* Check the parameters */
mbed_official	76:aeb1df146756	1221	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1222
mbed_official	76:aeb1df146756	1223	/* Set the Capture Compare3 Register value */
mbed_official	76:aeb1df146756	1224	TIMx->CCR3 = Compare3;
mbed_official	76:aeb1df146756	1225	}
mbed_official	76:aeb1df146756	1226
mbed_official	76:aeb1df146756	1227	/**
mbed_official	76:aeb1df146756	1228	* @brief Sets the TIMx Capture Compare4 Register value
mbed_official	76:aeb1df146756	1229	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1230	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1231	* @param Compare4: specifies the Capture Compare4 register new value.
mbed_official	76:aeb1df146756	1232	* @retval None
mbed_official	76:aeb1df146756	1233	*/
mbed_official	76:aeb1df146756	1234	void TIM_SetCompare4(TIM_TypeDef* TIMx, uint32_t Compare4)
mbed_official	76:aeb1df146756	1235	{
mbed_official	76:aeb1df146756	1236	/* Check the parameters */
mbed_official	76:aeb1df146756	1237	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1238
mbed_official	76:aeb1df146756	1239	/* Set the Capture Compare4 Register value */
mbed_official	76:aeb1df146756	1240	TIMx->CCR4 = Compare4;
mbed_official	76:aeb1df146756	1241	}
mbed_official	76:aeb1df146756	1242
mbed_official	76:aeb1df146756	1243	/**
mbed_official	76:aeb1df146756	1244	* @brief Forces the TIMx output 1 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1245	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1246	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1247	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1248	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1249	* @arg TIM_ForcedAction_Active: Force active level on OC1REF
mbed_official	76:aeb1df146756	1250	* @arg TIM_ForcedAction_InActive: Force inactive level on OC1REF.
mbed_official	76:aeb1df146756	1251	* @retval None
mbed_official	76:aeb1df146756	1252	*/
mbed_official	76:aeb1df146756	1253	void TIM_ForcedOC1Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1254	{
mbed_official	76:aeb1df146756	1255	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1256	/* Check the parameters */
mbed_official	76:aeb1df146756	1257	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1258	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1259	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1260	/* Reset the OC1M Bits */
mbed_official	76:aeb1df146756	1261	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1M);
mbed_official	76:aeb1df146756	1262	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1263	tmpccmr1 \|= TIM_ForcedAction;
mbed_official	76:aeb1df146756	1264	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1265	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1266	}
mbed_official	76:aeb1df146756	1267
mbed_official	76:aeb1df146756	1268	/**
mbed_official	76:aeb1df146756	1269	* @brief Forces the TIMx output 2 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1270	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1271	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1272	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1273	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1274	* @arg TIM_ForcedAction_Active: Force active level on OC2REF
mbed_official	76:aeb1df146756	1275	* @arg TIM_ForcedAction_InActive: Force inactive level on OC2REF.
mbed_official	76:aeb1df146756	1276	* @retval None
mbed_official	76:aeb1df146756	1277	*/
mbed_official	76:aeb1df146756	1278	void TIM_ForcedOC2Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1279	{
mbed_official	76:aeb1df146756	1280	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1281
mbed_official	76:aeb1df146756	1282	/* Check the parameters */
mbed_official	76:aeb1df146756	1283	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1284	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1285
mbed_official	76:aeb1df146756	1286	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1287	/* Reset the OC2M Bits */
mbed_official	76:aeb1df146756	1288	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2M);
mbed_official	76:aeb1df146756	1289	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1290	tmpccmr1 \|= (uint16_t)(TIM_ForcedAction << 8);
mbed_official	76:aeb1df146756	1291	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1292	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1293	}
mbed_official	76:aeb1df146756	1294
mbed_official	76:aeb1df146756	1295	/**
mbed_official	76:aeb1df146756	1296	* @brief Forces the TIMx output 3 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1297	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1298	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1299	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1300	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1301	* @arg TIM_ForcedAction_Active: Force active level on OC3REF
mbed_official	76:aeb1df146756	1302	* @arg TIM_ForcedAction_InActive: Force inactive level on OC3REF.
mbed_official	76:aeb1df146756	1303	* @retval None
mbed_official	76:aeb1df146756	1304	*/
mbed_official	76:aeb1df146756	1305	void TIM_ForcedOC3Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1306	{
mbed_official	76:aeb1df146756	1307	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1308
mbed_official	76:aeb1df146756	1309	/* Check the parameters */
mbed_official	76:aeb1df146756	1310	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1311	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1312
mbed_official	76:aeb1df146756	1313	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1314	/* Reset the OC1M Bits */
mbed_official	76:aeb1df146756	1315	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3M);
mbed_official	76:aeb1df146756	1316	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1317	tmpccmr2 \|= TIM_ForcedAction;
mbed_official	76:aeb1df146756	1318	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1319	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1320	}
mbed_official	76:aeb1df146756	1321
mbed_official	76:aeb1df146756	1322	/**
mbed_official	76:aeb1df146756	1323	* @brief Forces the TIMx output 4 waveform to active or inactive level.
mbed_official	76:aeb1df146756	1324	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1325	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1326	* @param TIM_ForcedAction: specifies the forced Action to be set to the output waveform.
mbed_official	76:aeb1df146756	1327	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1328	* @arg TIM_ForcedAction_Active: Force active level on OC4REF
mbed_official	76:aeb1df146756	1329	* @arg TIM_ForcedAction_InActive: Force inactive level on OC4REF.
mbed_official	76:aeb1df146756	1330	* @retval None
mbed_official	76:aeb1df146756	1331	*/
mbed_official	76:aeb1df146756	1332	void TIM_ForcedOC4Config(TIM_TypeDef* TIMx, uint16_t TIM_ForcedAction)
mbed_official	76:aeb1df146756	1333	{
mbed_official	76:aeb1df146756	1334	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1335	/* Check the parameters */
mbed_official	76:aeb1df146756	1336	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1337	assert_param(IS_TIM_FORCED_ACTION(TIM_ForcedAction));
mbed_official	76:aeb1df146756	1338
mbed_official	76:aeb1df146756	1339	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1340	/* Reset the OC2M Bits */
mbed_official	76:aeb1df146756	1341	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4M);
mbed_official	76:aeb1df146756	1342	/* Configure The Forced output Mode */
mbed_official	76:aeb1df146756	1343	tmpccmr2 \|= (uint16_t)(TIM_ForcedAction << 8);
mbed_official	76:aeb1df146756	1344	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1345	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1346	}
mbed_official	76:aeb1df146756	1347
mbed_official	76:aeb1df146756	1348	/**
mbed_official	76:aeb1df146756	1349	* @brief Sets or Resets the TIM peripheral Capture Compare Preload Control bit.
mbed_official	76:aeb1df146756	1350	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIMx peripheral
mbed_official	76:aeb1df146756	1351	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1352	* @param NewState: new state of the Capture Compare Preload Control bit
mbed_official	76:aeb1df146756	1353	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	1354	* @retval None
mbed_official	76:aeb1df146756	1355	*/
mbed_official	76:aeb1df146756	1356	void TIM_CCPreloadControl(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	1357	{
mbed_official	76:aeb1df146756	1358	/* Check the parameters */
mbed_official	76:aeb1df146756	1359	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1360	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	1361	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	1362	{
mbed_official	76:aeb1df146756	1363	/* Set the CCPC Bit */
mbed_official	76:aeb1df146756	1364	TIMx->CR2 \|= TIM_CR2_CCPC;
mbed_official	76:aeb1df146756	1365	}
mbed_official	76:aeb1df146756	1366	else
mbed_official	76:aeb1df146756	1367	{
mbed_official	76:aeb1df146756	1368	/* Reset the CCPC Bit */
mbed_official	76:aeb1df146756	1369	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCPC);
mbed_official	76:aeb1df146756	1370	}
mbed_official	76:aeb1df146756	1371	}
mbed_official	76:aeb1df146756	1372
mbed_official	76:aeb1df146756	1373
mbed_official	76:aeb1df146756	1374	/**
mbed_official	76:aeb1df146756	1375	* @brief Enables or disables the TIMx peripheral Preload register on CCR1.
mbed_official	76:aeb1df146756	1376	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 and 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1377	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1378	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1379	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1380	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1381	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1382	* @retval None
mbed_official	76:aeb1df146756	1383	*/
mbed_official	76:aeb1df146756	1384	void TIM_OC1PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1385	{
mbed_official	76:aeb1df146756	1386	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1387	/* Check the parameters */
mbed_official	76:aeb1df146756	1388	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1389	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1390
mbed_official	76:aeb1df146756	1391	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1392	/* Reset the OC1PE Bit */
mbed_official	76:aeb1df146756	1393	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1PE);
mbed_official	76:aeb1df146756	1394	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1395	tmpccmr1 \|= TIM_OCPreload;
mbed_official	76:aeb1df146756	1396	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1397	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1398	}
mbed_official	76:aeb1df146756	1399
mbed_official	76:aeb1df146756	1400	/**
mbed_official	76:aeb1df146756	1401	* @brief Enables or disables the TIMx peripheral Preload register on CCR2.
mbed_official	76:aeb1df146756	1402	* @param TIMx: where x can be 1, 2, 3 and 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1403	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1404	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1405	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1406	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1407	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1408	* @retval None
mbed_official	76:aeb1df146756	1409	*/
mbed_official	76:aeb1df146756	1410	void TIM_OC2PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1411	{
mbed_official	76:aeb1df146756	1412	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1413	/* Check the parameters */
mbed_official	76:aeb1df146756	1414	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1415	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1416
mbed_official	76:aeb1df146756	1417	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1418	/* Reset the OC2PE Bit */
mbed_official	76:aeb1df146756	1419	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2PE);
mbed_official	76:aeb1df146756	1420	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1421	tmpccmr1 \|= (uint16_t)(TIM_OCPreload << 8);
mbed_official	76:aeb1df146756	1422	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1423	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1424	}
mbed_official	76:aeb1df146756	1425
mbed_official	76:aeb1df146756	1426	/**
mbed_official	76:aeb1df146756	1427	* @brief Enables or disables the TIMx peripheral Preload register on CCR3.
mbed_official	76:aeb1df146756	1428	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1429	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1430	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1431	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1432	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1433	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1434	* @retval None
mbed_official	76:aeb1df146756	1435	*/
mbed_official	76:aeb1df146756	1436	void TIM_OC3PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1437	{
mbed_official	76:aeb1df146756	1438	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1439
mbed_official	76:aeb1df146756	1440	/* Check the parameters */
mbed_official	76:aeb1df146756	1441	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1442	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1443
mbed_official	76:aeb1df146756	1444	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1445	/* Reset the OC3PE Bit */
mbed_official	76:aeb1df146756	1446	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3PE);
mbed_official	76:aeb1df146756	1447	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1448	tmpccmr2 \|= TIM_OCPreload;
mbed_official	76:aeb1df146756	1449	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1450	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1451	}
mbed_official	76:aeb1df146756	1452
mbed_official	76:aeb1df146756	1453	/**
mbed_official	76:aeb1df146756	1454	* @brief Enables or disables the TIMx peripheral Preload register on CCR4.
mbed_official	76:aeb1df146756	1455	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1456	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1457	* @param TIM_OCPreload: new state of the TIMx peripheral Preload register
mbed_official	76:aeb1df146756	1458	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1459	* @arg TIM_OCPreload_Enable
mbed_official	76:aeb1df146756	1460	* @arg TIM_OCPreload_Disable
mbed_official	76:aeb1df146756	1461	* @retval None
mbed_official	76:aeb1df146756	1462	*/
mbed_official	76:aeb1df146756	1463	void TIM_OC4PreloadConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPreload)
mbed_official	76:aeb1df146756	1464	{
mbed_official	76:aeb1df146756	1465	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1466
mbed_official	76:aeb1df146756	1467	/* Check the parameters */
mbed_official	76:aeb1df146756	1468	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1469	assert_param(IS_TIM_OCPRELOAD_STATE(TIM_OCPreload));
mbed_official	76:aeb1df146756	1470
mbed_official	76:aeb1df146756	1471	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1472	/* Reset the OC4PE Bit */
mbed_official	76:aeb1df146756	1473	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4PE);
mbed_official	76:aeb1df146756	1474	/* Enable or Disable the Output Compare Preload feature */
mbed_official	76:aeb1df146756	1475	tmpccmr2 \|= (uint16_t)(TIM_OCPreload << 8);
mbed_official	76:aeb1df146756	1476	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1477	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1478	}
mbed_official	76:aeb1df146756	1479
mbed_official	76:aeb1df146756	1480	/**
mbed_official	76:aeb1df146756	1481	* @brief Configures the TIMx Output Compare 1 Fast feature.
mbed_official	76:aeb1df146756	1482	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1483	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1484	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1485	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1486	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1487	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1488	* @retval None
mbed_official	76:aeb1df146756	1489	*/
mbed_official	76:aeb1df146756	1490	void TIM_OC1FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1491	{
mbed_official	76:aeb1df146756	1492	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1493
mbed_official	76:aeb1df146756	1494	/* Check the parameters */
mbed_official	76:aeb1df146756	1495	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1496	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1497
mbed_official	76:aeb1df146756	1498	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	1499	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1500	/* Reset the OC1FE Bit */
mbed_official	76:aeb1df146756	1501	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1FE);
mbed_official	76:aeb1df146756	1502	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1503	tmpccmr1 \|= TIM_OCFast;
mbed_official	76:aeb1df146756	1504	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	1505	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1506	}
mbed_official	76:aeb1df146756	1507
mbed_official	76:aeb1df146756	1508	/**
mbed_official	76:aeb1df146756	1509	* @brief Configures the TIMx Output Compare 2 Fast feature.
mbed_official	76:aeb1df146756	1510	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1511	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1512	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1513	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1514	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1515	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1516	* @retval None
mbed_official	76:aeb1df146756	1517	*/
mbed_official	76:aeb1df146756	1518	void TIM_OC2FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1519	{
mbed_official	76:aeb1df146756	1520	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1521
mbed_official	76:aeb1df146756	1522	/* Check the parameters */
mbed_official	76:aeb1df146756	1523	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1524	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1525
mbed_official	76:aeb1df146756	1526	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	1527	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1528	/* Reset the OC2FE Bit */
mbed_official	76:aeb1df146756	1529	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2FE);
mbed_official	76:aeb1df146756	1530	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1531	tmpccmr1 \|= (uint16_t)(TIM_OCFast << 8);
mbed_official	76:aeb1df146756	1532	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	1533	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1534	}
mbed_official	76:aeb1df146756	1535
mbed_official	76:aeb1df146756	1536	/**
mbed_official	76:aeb1df146756	1537	* @brief Configures the TIMx Output Compare 3 Fast feature.
mbed_official	76:aeb1df146756	1538	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1539	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1540	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1541	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1542	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1543	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1544	* @retval None
mbed_official	76:aeb1df146756	1545	*/
mbed_official	76:aeb1df146756	1546	void TIM_OC3FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1547	{
mbed_official	76:aeb1df146756	1548	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1549
mbed_official	76:aeb1df146756	1550	/* Check the parameters */
mbed_official	76:aeb1df146756	1551	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1552	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1553
mbed_official	76:aeb1df146756	1554	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1555	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1556	/* Reset the OC3FE Bit */
mbed_official	76:aeb1df146756	1557	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3FE);
mbed_official	76:aeb1df146756	1558	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1559	tmpccmr2 \|= TIM_OCFast;
mbed_official	76:aeb1df146756	1560	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1561	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1562	}
mbed_official	76:aeb1df146756	1563
mbed_official	76:aeb1df146756	1564	/**
mbed_official	76:aeb1df146756	1565	* @brief Configures the TIMx Output Compare 4 Fast feature.
mbed_official	76:aeb1df146756	1566	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1567	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1568	* @param TIM_OCFast: new state of the Output Compare Fast Enable Bit.
mbed_official	76:aeb1df146756	1569	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1570	* @arg TIM_OCFast_Enable: TIM output compare fast enable
mbed_official	76:aeb1df146756	1571	* @arg TIM_OCFast_Disable: TIM output compare fast disable
mbed_official	76:aeb1df146756	1572	* @retval None
mbed_official	76:aeb1df146756	1573	*/
mbed_official	76:aeb1df146756	1574	void TIM_OC4FastConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCFast)
mbed_official	76:aeb1df146756	1575	{
mbed_official	76:aeb1df146756	1576	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1577
mbed_official	76:aeb1df146756	1578	/* Check the parameters */
mbed_official	76:aeb1df146756	1579	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1580	assert_param(IS_TIM_OCFAST_STATE(TIM_OCFast));
mbed_official	76:aeb1df146756	1581
mbed_official	76:aeb1df146756	1582	/* Get the TIMx CCMR2 register value */
mbed_official	76:aeb1df146756	1583	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1584	/* Reset the OC4FE Bit */
mbed_official	76:aeb1df146756	1585	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4FE);
mbed_official	76:aeb1df146756	1586	/* Enable or Disable the Output Compare Fast Bit */
mbed_official	76:aeb1df146756	1587	tmpccmr2 \|= (uint16_t)(TIM_OCFast << 8);
mbed_official	76:aeb1df146756	1588	/* Write to TIMx CCMR2 */
mbed_official	76:aeb1df146756	1589	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1590	}
mbed_official	76:aeb1df146756	1591
mbed_official	76:aeb1df146756	1592	/**
mbed_official	76:aeb1df146756	1593	* @brief Clears or safeguards the OCREF1 signal on an external event
mbed_official	76:aeb1df146756	1594	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1595	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1596	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1597	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1598	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1599	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1600	* @retval None
mbed_official	76:aeb1df146756	1601	*/
mbed_official	76:aeb1df146756	1602	void TIM_ClearOC1Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1603	{
mbed_official	76:aeb1df146756	1604	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1605
mbed_official	76:aeb1df146756	1606	/* Check the parameters */
mbed_official	76:aeb1df146756	1607	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1608	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1609
mbed_official	76:aeb1df146756	1610	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1611	/* Reset the OC1CE Bit */
mbed_official	76:aeb1df146756	1612	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC1CE);
mbed_official	76:aeb1df146756	1613	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1614	tmpccmr1 \|= TIM_OCClear;
mbed_official	76:aeb1df146756	1615	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1616	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1617	}
mbed_official	76:aeb1df146756	1618
mbed_official	76:aeb1df146756	1619	/**
mbed_official	76:aeb1df146756	1620	* @brief Clears or safeguards the OCREF2 signal on an external event
mbed_official	76:aeb1df146756	1621	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1622	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1623	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1624	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1625	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1626	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1627	* @retval None
mbed_official	76:aeb1df146756	1628	*/
mbed_official	76:aeb1df146756	1629	void TIM_ClearOC2Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1630	{
mbed_official	76:aeb1df146756	1631	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	1632
mbed_official	76:aeb1df146756	1633	/* Check the parameters */
mbed_official	76:aeb1df146756	1634	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1635	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1636
mbed_official	76:aeb1df146756	1637	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	1638	/* Reset the OC2CE Bit */
mbed_official	76:aeb1df146756	1639	tmpccmr1 &= (uint16_t)~((uint16_t)TIM_CCMR1_OC2CE);
mbed_official	76:aeb1df146756	1640	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1641	tmpccmr1 \|= (uint16_t)(TIM_OCClear << 8);
mbed_official	76:aeb1df146756	1642	/* Write to TIMx CCMR1 register */
mbed_official	76:aeb1df146756	1643	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	1644	}
mbed_official	76:aeb1df146756	1645
mbed_official	76:aeb1df146756	1646	/**
mbed_official	76:aeb1df146756	1647	* @brief Clears or safeguards the OCREF3 signal on an external event
mbed_official	76:aeb1df146756	1648	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1649	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1650	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1651	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1652	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1653	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1654	* @retval None
mbed_official	76:aeb1df146756	1655	*/
mbed_official	76:aeb1df146756	1656	void TIM_ClearOC3Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1657	{
mbed_official	76:aeb1df146756	1658	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1659
mbed_official	76:aeb1df146756	1660	/* Check the parameters */
mbed_official	76:aeb1df146756	1661	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1662	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1663
mbed_official	76:aeb1df146756	1664	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1665	/* Reset the OC3CE Bit */
mbed_official	76:aeb1df146756	1666	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC3CE);
mbed_official	76:aeb1df146756	1667	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1668	tmpccmr2 \|= TIM_OCClear;
mbed_official	76:aeb1df146756	1669	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1670	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1671	}
mbed_official	76:aeb1df146756	1672
mbed_official	76:aeb1df146756	1673	/**
mbed_official	76:aeb1df146756	1674	* @brief Clears or safeguards the OCREF4 signal on an external event
mbed_official	76:aeb1df146756	1675	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1676	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1677	* @param TIM_OCClear: new state of the Output Compare Clear Enable Bit.
mbed_official	76:aeb1df146756	1678	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1679	* @arg TIM_OCClear_Enable: TIM Output clear enable
mbed_official	76:aeb1df146756	1680	* @arg TIM_OCClear_Disable: TIM Output clear disable
mbed_official	76:aeb1df146756	1681	* @retval None
mbed_official	76:aeb1df146756	1682	*/
mbed_official	76:aeb1df146756	1683	void TIM_ClearOC4Ref(TIM_TypeDef* TIMx, uint16_t TIM_OCClear)
mbed_official	76:aeb1df146756	1684	{
mbed_official	76:aeb1df146756	1685	uint16_t tmpccmr2 = 0;
mbed_official	76:aeb1df146756	1686
mbed_official	76:aeb1df146756	1687	/* Check the parameters */
mbed_official	76:aeb1df146756	1688	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1689	assert_param(IS_TIM_OCCLEAR_STATE(TIM_OCClear));
mbed_official	76:aeb1df146756	1690
mbed_official	76:aeb1df146756	1691	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	1692	/* Reset the OC4CE Bit */
mbed_official	76:aeb1df146756	1693	tmpccmr2 &= (uint16_t)~((uint16_t)TIM_CCMR2_OC4CE);
mbed_official	76:aeb1df146756	1694	/* Enable or Disable the Output Compare Clear Bit */
mbed_official	76:aeb1df146756	1695	tmpccmr2 \|= (uint16_t)(TIM_OCClear << 8);
mbed_official	76:aeb1df146756	1696	/* Write to TIMx CCMR2 register */
mbed_official	76:aeb1df146756	1697	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	1698	}
mbed_official	76:aeb1df146756	1699
mbed_official	76:aeb1df146756	1700	/**
mbed_official	76:aeb1df146756	1701	* @brief Configures the TIMx channel 1 polarity.
mbed_official	76:aeb1df146756	1702	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1703	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1704	* @param TIM_OCPolarity: specifies the OC1 Polarity
mbed_official	76:aeb1df146756	1705	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1706	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1707	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1708	* @retval None
mbed_official	76:aeb1df146756	1709	*/
mbed_official	76:aeb1df146756	1710	void TIM_OC1PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1711	{
mbed_official	76:aeb1df146756	1712	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1713
mbed_official	76:aeb1df146756	1714	/* Check the parameters */
mbed_official	76:aeb1df146756	1715	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1716	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1717
mbed_official	76:aeb1df146756	1718	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1719	/* Set or Reset the CC1P Bit */
mbed_official	76:aeb1df146756	1720	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1P);
mbed_official	76:aeb1df146756	1721	tmpccer \|= TIM_OCPolarity;
mbed_official	76:aeb1df146756	1722	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1723	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1724	}
mbed_official	76:aeb1df146756	1725
mbed_official	76:aeb1df146756	1726	/**
mbed_official	76:aeb1df146756	1727	* @brief Configures the TIMx Channel 1N polarity.
mbed_official	76:aeb1df146756	1728	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1729	* @param TIM_OCNPolarity: specifies the OC1N Polarity
mbed_official	76:aeb1df146756	1730	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1731	* @arg TIM_OCNPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1732	* @arg TIM_OCNPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1733	* @retval None
mbed_official	76:aeb1df146756	1734	*/
mbed_official	76:aeb1df146756	1735	void TIM_OC1NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity)
mbed_official	76:aeb1df146756	1736	{
mbed_official	76:aeb1df146756	1737	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1738	/* Check the parameters */
mbed_official	76:aeb1df146756	1739	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1740	assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity));
mbed_official	76:aeb1df146756	1741
mbed_official	76:aeb1df146756	1742	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1743	/* Set or Reset the CC1NP Bit */
mbed_official	76:aeb1df146756	1744	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC1NP);
mbed_official	76:aeb1df146756	1745	tmpccer \|= TIM_OCNPolarity;
mbed_official	76:aeb1df146756	1746	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1747	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1748	}
mbed_official	76:aeb1df146756	1749
mbed_official	76:aeb1df146756	1750	/**
mbed_official	76:aeb1df146756	1751	* @brief Configures the TIMx channel 2 polarity.
mbed_official	76:aeb1df146756	1752	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1753	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1754	* @param TIM_OCPolarity: specifies the OC2 Polarity
mbed_official	76:aeb1df146756	1755	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1756	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1757	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1758	* @retval None
mbed_official	76:aeb1df146756	1759	*/
mbed_official	76:aeb1df146756	1760	void TIM_OC2PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1761	{
mbed_official	76:aeb1df146756	1762	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1763
mbed_official	76:aeb1df146756	1764	/* Check the parameters */
mbed_official	76:aeb1df146756	1765	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1766	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1767
mbed_official	76:aeb1df146756	1768	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1769	/* Set or Reset the CC2P Bit */
mbed_official	76:aeb1df146756	1770	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2P);
mbed_official	76:aeb1df146756	1771	tmpccer \|= (uint16_t)(TIM_OCPolarity << 4);
mbed_official	76:aeb1df146756	1772	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1773	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1774	}
mbed_official	76:aeb1df146756	1775
mbed_official	76:aeb1df146756	1776	/**
mbed_official	76:aeb1df146756	1777	* @brief Configures the TIMx Channel 2N polarity.
mbed_official	76:aeb1df146756	1778	* @param TIMx: where x can be 1 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1779	* @param TIM_OCNPolarity: specifies the OC2N Polarity
mbed_official	76:aeb1df146756	1780	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1781	* @arg TIM_OCNPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1782	* @arg TIM_OCNPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1783	* @retval None
mbed_official	76:aeb1df146756	1784	*/
mbed_official	76:aeb1df146756	1785	void TIM_OC2NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity)
mbed_official	76:aeb1df146756	1786	{
mbed_official	76:aeb1df146756	1787	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1788	/* Check the parameters */
mbed_official	76:aeb1df146756	1789	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1790	assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity));
mbed_official	76:aeb1df146756	1791
mbed_official	76:aeb1df146756	1792	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1793	/* Set or Reset the CC2NP Bit */
mbed_official	76:aeb1df146756	1794	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC2NP);
mbed_official	76:aeb1df146756	1795	tmpccer \|= (uint16_t)(TIM_OCNPolarity << 4);
mbed_official	76:aeb1df146756	1796	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1797	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1798	}
mbed_official	76:aeb1df146756	1799
mbed_official	76:aeb1df146756	1800	/**
mbed_official	76:aeb1df146756	1801	* @brief Configures the TIMx channel 3 polarity.
mbed_official	76:aeb1df146756	1802	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1803	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1804	* @param TIM_OCPolarity: specifies the OC3 Polarity
mbed_official	76:aeb1df146756	1805	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1806	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1807	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1808	* @retval None
mbed_official	76:aeb1df146756	1809	*/
mbed_official	76:aeb1df146756	1810	void TIM_OC3PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1811	{
mbed_official	76:aeb1df146756	1812	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1813
mbed_official	76:aeb1df146756	1814	/* Check the parameters */
mbed_official	76:aeb1df146756	1815	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1816	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1817
mbed_official	76:aeb1df146756	1818	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1819	/* Set or Reset the CC3P Bit */
mbed_official	76:aeb1df146756	1820	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3P);
mbed_official	76:aeb1df146756	1821	tmpccer \|= (uint16_t)(TIM_OCPolarity << 8);
mbed_official	76:aeb1df146756	1822	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1823	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1824	}
mbed_official	76:aeb1df146756	1825
mbed_official	76:aeb1df146756	1826	/**
mbed_official	76:aeb1df146756	1827	* @brief Configures the TIMx Channel 3N polarity.
mbed_official	76:aeb1df146756	1828	* @param TIMx: where x can be 1 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1829	* @param TIM_OCNPolarity: specifies the OC3N Polarity
mbed_official	76:aeb1df146756	1830	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1831	* @arg TIM_OCNPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1832	* @arg TIM_OCNPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1833	* @retval None
mbed_official	76:aeb1df146756	1834	*/
mbed_official	76:aeb1df146756	1835	void TIM_OC3NPolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCNPolarity)
mbed_official	76:aeb1df146756	1836	{
mbed_official	76:aeb1df146756	1837	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1838
mbed_official	76:aeb1df146756	1839	/* Check the parameters */
mbed_official	76:aeb1df146756	1840	assert_param(IS_TIM_LIST1_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1841	assert_param(IS_TIM_OCN_POLARITY(TIM_OCNPolarity));
mbed_official	76:aeb1df146756	1842
mbed_official	76:aeb1df146756	1843	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1844	/* Set or Reset the CC3NP Bit */
mbed_official	76:aeb1df146756	1845	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC3NP);
mbed_official	76:aeb1df146756	1846	tmpccer \|= (uint16_t)(TIM_OCNPolarity << 8);
mbed_official	76:aeb1df146756	1847	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1848	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1849	}
mbed_official	76:aeb1df146756	1850
mbed_official	76:aeb1df146756	1851	/**
mbed_official	76:aeb1df146756	1852	* @brief Configures the TIMx channel 4 polarity.
mbed_official	76:aeb1df146756	1853	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1854	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1855	* @param TIM_OCPolarity: specifies the OC4 Polarity
mbed_official	76:aeb1df146756	1856	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1857	* @arg TIM_OCPolarity_High: Output Compare active high
mbed_official	76:aeb1df146756	1858	* @arg TIM_OCPolarity_Low: Output Compare active low
mbed_official	76:aeb1df146756	1859	* @retval None
mbed_official	76:aeb1df146756	1860	*/
mbed_official	76:aeb1df146756	1861	void TIM_OC4PolarityConfig(TIM_TypeDef* TIMx, uint16_t TIM_OCPolarity)
mbed_official	76:aeb1df146756	1862	{
mbed_official	76:aeb1df146756	1863	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	1864
mbed_official	76:aeb1df146756	1865	/* Check the parameters */
mbed_official	76:aeb1df146756	1866	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1867	assert_param(IS_TIM_OC_POLARITY(TIM_OCPolarity));
mbed_official	76:aeb1df146756	1868
mbed_official	76:aeb1df146756	1869	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	1870	/* Set or Reset the CC4P Bit */
mbed_official	76:aeb1df146756	1871	tmpccer &= (uint16_t)~((uint16_t)TIM_CCER_CC4P);
mbed_official	76:aeb1df146756	1872	tmpccer \|= (uint16_t)(TIM_OCPolarity << 12);
mbed_official	76:aeb1df146756	1873	/* Write to TIMx CCER register */
mbed_official	76:aeb1df146756	1874	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	1875	}
mbed_official	76:aeb1df146756	1876
mbed_official	76:aeb1df146756	1877	/**
mbed_official	76:aeb1df146756	1878	* @brief Selects the OCReference Clear source.
mbed_official	76:aeb1df146756	1879	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1880	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1881	* @param TIM_OCReferenceClear: specifies the OCReference Clear source.
mbed_official	76:aeb1df146756	1882	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1883	* @arg TIM_OCReferenceClear_ETRF: The internal OCreference clear input is connected to ETRF.
mbed_official	76:aeb1df146756	1884	* @arg TIM_OCReferenceClear_OCREFCLR: The internal OCreference clear input is connected to OCREF_CLR input.
mbed_official	76:aeb1df146756	1885	* @retval None
mbed_official	76:aeb1df146756	1886	*/
mbed_official	76:aeb1df146756	1887	void TIM_SelectOCREFClear(TIM_TypeDef* TIMx, uint16_t TIM_OCReferenceClear)
mbed_official	76:aeb1df146756	1888	{
mbed_official	76:aeb1df146756	1889	/* Check the parameters */
mbed_official	76:aeb1df146756	1890	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1891	assert_param(TIM_OCREFERENCECECLEAR_SOURCE(TIM_OCReferenceClear));
mbed_official	76:aeb1df146756	1892
mbed_official	76:aeb1df146756	1893	/* Set the TIM_OCReferenceClear source */
mbed_official	76:aeb1df146756	1894	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_OCCS);
mbed_official	76:aeb1df146756	1895	TIMx->SMCR \|= TIM_OCReferenceClear;
mbed_official	76:aeb1df146756	1896	}
mbed_official	76:aeb1df146756	1897
mbed_official	76:aeb1df146756	1898	/**
mbed_official	76:aeb1df146756	1899	* @brief Enables or disables the TIM Capture Compare Channel x.
mbed_official	76:aeb1df146756	1900	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1901	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	1902	* @param TIM_Channel: specifies the TIM Channel
mbed_official	76:aeb1df146756	1903	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	1904	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	76:aeb1df146756	1905	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	76:aeb1df146756	1906	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	76:aeb1df146756	1907	* @arg TIM_Channel_4: TIM Channel 4
mbed_official	76:aeb1df146756	1908	* @param TIM_CCx: specifies the TIM Channel CCxE bit new state.
mbed_official	76:aeb1df146756	1909	* This parameter can be: TIM_CCx_Enable or TIM_CCx_Disable.
mbed_official	76:aeb1df146756	1910	* @retval None
mbed_official	76:aeb1df146756	1911	*/
mbed_official	76:aeb1df146756	1912	void TIM_CCxCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCx)
mbed_official	76:aeb1df146756	1913	{
mbed_official	76:aeb1df146756	1914	uint16_t tmp = 0;
mbed_official	76:aeb1df146756	1915
mbed_official	76:aeb1df146756	1916	/* Check the parameters */
mbed_official	76:aeb1df146756	1917	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1918	assert_param(IS_TIM_CCX(TIM_CCx));
mbed_official	76:aeb1df146756	1919
mbed_official	76:aeb1df146756	1920	tmp = CCER_CCE_SET << TIM_Channel;
mbed_official	76:aeb1df146756	1921
mbed_official	76:aeb1df146756	1922	/* Reset the CCxE Bit */
mbed_official	76:aeb1df146756	1923	TIMx->CCER &= (uint16_t)~ tmp;
mbed_official	76:aeb1df146756	1924
mbed_official	76:aeb1df146756	1925	/* Set or reset the CCxE Bit */
mbed_official	76:aeb1df146756	1926	TIMx->CCER \|= (uint16_t)(TIM_CCx << TIM_Channel);
mbed_official	76:aeb1df146756	1927	}
mbed_official	76:aeb1df146756	1928
mbed_official	76:aeb1df146756	1929	/**
mbed_official	76:aeb1df146756	1930	* @brief Enables or disables the TIM Capture Compare Channel xN.
mbed_official	76:aeb1df146756	1931	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	1932	* @param TIM_Channel: specifies the TIM Channel
mbed_official	76:aeb1df146756	1933	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	1934	* @arg TIM_Channel_1: TIM Channel 1
mbed_official	76:aeb1df146756	1935	* @arg TIM_Channel_2: TIM Channel 2
mbed_official	76:aeb1df146756	1936	* @arg TIM_Channel_3: TIM Channel 3
mbed_official	76:aeb1df146756	1937	* @param TIM_CCxN: specifies the TIM Channel CCxNE bit new state.
mbed_official	76:aeb1df146756	1938	* This parameter can be: TIM_CCxN_Enable or TIM_CCxN_Disable.
mbed_official	76:aeb1df146756	1939	* @retval None
mbed_official	76:aeb1df146756	1940	*/
mbed_official	76:aeb1df146756	1941	void TIM_CCxNCmd(TIM_TypeDef* TIMx, uint16_t TIM_Channel, uint16_t TIM_CCxN)
mbed_official	76:aeb1df146756	1942	{
mbed_official	76:aeb1df146756	1943	uint16_t tmp = 0;
mbed_official	76:aeb1df146756	1944
mbed_official	76:aeb1df146756	1945	/* Check the parameters */
mbed_official	76:aeb1df146756	1946	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1947	assert_param(IS_TIM_COMPLEMENTARY_CHANNEL(TIM_Channel));
mbed_official	76:aeb1df146756	1948	assert_param(IS_TIM_CCXN(TIM_CCxN));
mbed_official	76:aeb1df146756	1949
mbed_official	76:aeb1df146756	1950	tmp = CCER_CCNE_SET << TIM_Channel;
mbed_official	76:aeb1df146756	1951
mbed_official	76:aeb1df146756	1952	/* Reset the CCxNE Bit */
mbed_official	76:aeb1df146756	1953	TIMx->CCER &= (uint16_t) ~tmp;
mbed_official	76:aeb1df146756	1954
mbed_official	76:aeb1df146756	1955	/* Set or reset the CCxNE Bit */
mbed_official	76:aeb1df146756	1956	TIMx->CCER \|= (uint16_t)(TIM_CCxN << TIM_Channel);
mbed_official	76:aeb1df146756	1957	}
mbed_official	76:aeb1df146756	1958
mbed_official	76:aeb1df146756	1959	/**
mbed_official	76:aeb1df146756	1960	* @brief Selects the TIM peripheral Commutation event.
mbed_official	76:aeb1df146756	1961	* @param TIMx: where x can be 1, 15, 16 or 17 to select the TIMx peripheral
mbed_official	76:aeb1df146756	1962	* @param NewState: new state of the Commutation event.
mbed_official	76:aeb1df146756	1963	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	1964	* @retval None
mbed_official	76:aeb1df146756	1965	*/
mbed_official	76:aeb1df146756	1966	void TIM_SelectCOM(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	1967	{
mbed_official	76:aeb1df146756	1968	/* Check the parameters */
mbed_official	76:aeb1df146756	1969	assert_param(IS_TIM_LIST2_PERIPH(TIMx));
mbed_official	76:aeb1df146756	1970	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	1971	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	1972	{
mbed_official	76:aeb1df146756	1973	/* Set the COM Bit */
mbed_official	76:aeb1df146756	1974	TIMx->CR2 \|= TIM_CR2_CCUS;
mbed_official	76:aeb1df146756	1975	}
mbed_official	76:aeb1df146756	1976	else
mbed_official	76:aeb1df146756	1977	{
mbed_official	76:aeb1df146756	1978	/* Reset the COM Bit */
mbed_official	76:aeb1df146756	1979	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCUS);
mbed_official	76:aeb1df146756	1980	}
mbed_official	76:aeb1df146756	1981	}
mbed_official	76:aeb1df146756	1982
mbed_official	76:aeb1df146756	1983	/**
mbed_official	76:aeb1df146756	1984	* @}
mbed_official	76:aeb1df146756	1985	*/
mbed_official	76:aeb1df146756	1986
mbed_official	76:aeb1df146756	1987	/** @defgroup TIM_Group4 Input Capture management functions
mbed_official	76:aeb1df146756	1988	* @brief Input Capture management functions
mbed_official	76:aeb1df146756	1989	*
mbed_official	76:aeb1df146756	1990	@verbatim
mbed_official	76:aeb1df146756	1991	===============================================================================
mbed_official	76:aeb1df146756	1992	##### Input Capture management functions #####
mbed_official	76:aeb1df146756	1993	===============================================================================
mbed_official	76:aeb1df146756	1994
mbed_official	76:aeb1df146756	1995	* TIM Driver: how to use it in Input Capture Mode *
mbed_official	76:aeb1df146756	1996	===============================================================================
mbed_official	76:aeb1df146756	1997	[..] To use the Timer in Input Capture mode, the following steps are mandatory:
mbed_official	76:aeb1df146756	1998	(#) Enable TIM clock using RCC_APBxPeriphClockCmd(RCC_APBxPeriph_TIMx, ENABLE)
mbed_official	76:aeb1df146756	1999	function.
mbed_official	76:aeb1df146756	2000	(#) Configure the TIM pins by configuring the corresponding GPIO pins.
mbed_official	76:aeb1df146756	2001	(#) Configure the Time base unit as described in the first part of this
mbed_official	76:aeb1df146756	2002	driver, if needed, else the Timer will run with the default configuration:
mbed_official	76:aeb1df146756	2003	(++) Autoreload value = 0xFFFF.
mbed_official	76:aeb1df146756	2004	(++) Prescaler value = 0x0000.
mbed_official	76:aeb1df146756	2005	(++) Counter mode = Up counting.
mbed_official	76:aeb1df146756	2006	(++) Clock Division = TIM_CKD_DIV1.
mbed_official	76:aeb1df146756	2007	(#) Fill the TIM_ICInitStruct with the desired parameters including:
mbed_official	76:aeb1df146756	2008	(++) TIM Channel: TIM_Channel.
mbed_official	76:aeb1df146756	2009	(++) TIM Input Capture polarity: TIM_ICPolarity.
mbed_official	76:aeb1df146756	2010	(++) TIM Input Capture selection: TIM_ICSelection.
mbed_official	76:aeb1df146756	2011	(++) TIM Input Capture Prescaler: TIM_ICPrescaler.
mbed_official	76:aeb1df146756	2012	(++) TIM Input CApture filter value: TIM_ICFilter.
mbed_official	76:aeb1df146756	2013	(#) Call TIM_ICInit(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official	76:aeb1df146756	2014	channel with the corresponding configuration and to measure only
mbed_official	76:aeb1df146756	2015	frequency or duty cycle of the input signal,or, Call
mbed_official	76:aeb1df146756	2016	TIM_PWMIConfig(TIMx, &TIM_ICInitStruct) to configure the desired
mbed_official	76:aeb1df146756	2017	channels with the corresponding configuration and to measure the
mbed_official	76:aeb1df146756	2018	frequency and the duty cycle of the input signal.
mbed_official	76:aeb1df146756	2019	(#) Enable the NVIC or the DMA to read the measured frequency.
mbed_official	76:aeb1df146756	2020	(#) Enable the corresponding interrupt (or DMA request) to read
mbed_official	76:aeb1df146756	2021	the Captured value, using the function TIM_ITConfig(TIMx, TIM_IT_CCx)
mbed_official	76:aeb1df146756	2022	(or TIM_DMA_Cmd(TIMx, TIM_DMA_CCx)).
mbed_official	76:aeb1df146756	2023	(#) Call the TIM_Cmd(ENABLE) function to enable the TIM counter.
mbed_official	76:aeb1df146756	2024	(#) Use TIM_GetCapturex(TIMx); to read the captured value.
mbed_official	76:aeb1df146756	2025	[..]
mbed_official	76:aeb1df146756	2026	(@) All other functions can be used separately to modify, if needed,
mbed_official	76:aeb1df146756	2027	a specific feature of the Timer.
mbed_official	76:aeb1df146756	2028
mbed_official	76:aeb1df146756	2029	@endverbatim
mbed_official	76:aeb1df146756	2030	* @{
mbed_official	76:aeb1df146756	2031	*/
mbed_official	76:aeb1df146756	2032
mbed_official	76:aeb1df146756	2033	/**
mbed_official	76:aeb1df146756	2034	* @brief Initializes the TIM peripheral according to the specified
mbed_official	76:aeb1df146756	2035	* parameters in the TIM_ICInitStruct.
mbed_official	76:aeb1df146756	2036	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2037	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2038	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official	76:aeb1df146756	2039	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	2040	* peripheral.
mbed_official	76:aeb1df146756	2041	* @retval None
mbed_official	76:aeb1df146756	2042	*/
mbed_official	76:aeb1df146756	2043	void TIM_ICInit(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	2044	{
mbed_official	76:aeb1df146756	2045	/* Check the parameters */
mbed_official	76:aeb1df146756	2046	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2047	assert_param(IS_TIM_CHANNEL(TIM_ICInitStruct->TIM_Channel));
mbed_official	76:aeb1df146756	2048	assert_param(IS_TIM_IC_SELECTION(TIM_ICInitStruct->TIM_ICSelection));
mbed_official	76:aeb1df146756	2049	assert_param(IS_TIM_IC_PRESCALER(TIM_ICInitStruct->TIM_ICPrescaler));
mbed_official	76:aeb1df146756	2050	assert_param(IS_TIM_IC_FILTER(TIM_ICInitStruct->TIM_ICFilter));
mbed_official	76:aeb1df146756	2051	assert_param(IS_TIM_IC_POLARITY(TIM_ICInitStruct->TIM_ICPolarity));
mbed_official	76:aeb1df146756	2052
mbed_official	76:aeb1df146756	2053	if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official	76:aeb1df146756	2054	{
mbed_official	76:aeb1df146756	2055	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2056	/* TI1 Configuration */
mbed_official	76:aeb1df146756	2057	TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2058	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2059	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2060	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2061	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2062	}
mbed_official	76:aeb1df146756	2063	else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_2)
mbed_official	76:aeb1df146756	2064	{
mbed_official	76:aeb1df146756	2065	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2066	/* TI2 Configuration */
mbed_official	76:aeb1df146756	2067	TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2068	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2069	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2070	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2071	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2072	}
mbed_official	76:aeb1df146756	2073	else if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_3)
mbed_official	76:aeb1df146756	2074	{
mbed_official	76:aeb1df146756	2075	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2076	/* TI3 Configuration */
mbed_official	76:aeb1df146756	2077	TI3_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2078	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2079	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2080	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2081	TIM_SetIC3Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2082	}
mbed_official	76:aeb1df146756	2083	else
mbed_official	76:aeb1df146756	2084	{
mbed_official	76:aeb1df146756	2085	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2086	/* TI4 Configuration */
mbed_official	76:aeb1df146756	2087	TI4_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity,
mbed_official	76:aeb1df146756	2088	TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2089	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2090	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2091	TIM_SetIC4Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2092	}
mbed_official	76:aeb1df146756	2093	}
mbed_official	76:aeb1df146756	2094
mbed_official	76:aeb1df146756	2095	/**
mbed_official	76:aeb1df146756	2096	* @brief Fills each TIM_ICInitStruct member with its default value.
mbed_official	76:aeb1df146756	2097	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure which will
mbed_official	76:aeb1df146756	2098	* be initialized.
mbed_official	76:aeb1df146756	2099	* @retval None
mbed_official	76:aeb1df146756	2100	*/
mbed_official	76:aeb1df146756	2101	void TIM_ICStructInit(TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	2102	{
mbed_official	76:aeb1df146756	2103	/* Set the default configuration */
mbed_official	76:aeb1df146756	2104	TIM_ICInitStruct->TIM_Channel = TIM_Channel_1;
mbed_official	76:aeb1df146756	2105	TIM_ICInitStruct->TIM_ICPolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	2106	TIM_ICInitStruct->TIM_ICSelection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	2107	TIM_ICInitStruct->TIM_ICPrescaler = TIM_ICPSC_DIV1;
mbed_official	76:aeb1df146756	2108	TIM_ICInitStruct->TIM_ICFilter = 0x00;
mbed_official	76:aeb1df146756	2109	}
mbed_official	76:aeb1df146756	2110
mbed_official	76:aeb1df146756	2111	/**
mbed_official	76:aeb1df146756	2112	* @brief Configures the TIM peripheral according to the specified
mbed_official	76:aeb1df146756	2113	* parameters in the TIM_ICInitStruct to measure an external PWM signal.
mbed_official	76:aeb1df146756	2114	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2115	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2116	* @param TIM_ICInitStruct: pointer to a TIM_ICInitTypeDef structure
mbed_official	76:aeb1df146756	2117	* that contains the configuration information for the specified TIM
mbed_official	76:aeb1df146756	2118	* peripheral.
mbed_official	76:aeb1df146756	2119	* @retval None
mbed_official	76:aeb1df146756	2120	*/
mbed_official	76:aeb1df146756	2121	void TIM_PWMIConfig(TIM_TypeDef* TIMx, TIM_ICInitTypeDef* TIM_ICInitStruct)
mbed_official	76:aeb1df146756	2122	{
mbed_official	76:aeb1df146756	2123	uint16_t icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	2124	uint16_t icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	2125	/* Check the parameters */
mbed_official	76:aeb1df146756	2126	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2127	/* Select the Opposite Input Polarity */
mbed_official	76:aeb1df146756	2128	if (TIM_ICInitStruct->TIM_ICPolarity == TIM_ICPolarity_Rising)
mbed_official	76:aeb1df146756	2129	{
mbed_official	76:aeb1df146756	2130	icoppositepolarity = TIM_ICPolarity_Falling;
mbed_official	76:aeb1df146756	2131	}
mbed_official	76:aeb1df146756	2132	else
mbed_official	76:aeb1df146756	2133	{
mbed_official	76:aeb1df146756	2134	icoppositepolarity = TIM_ICPolarity_Rising;
mbed_official	76:aeb1df146756	2135	}
mbed_official	76:aeb1df146756	2136	/* Select the Opposite Input */
mbed_official	76:aeb1df146756	2137	if (TIM_ICInitStruct->TIM_ICSelection == TIM_ICSelection_DirectTI)
mbed_official	76:aeb1df146756	2138	{
mbed_official	76:aeb1df146756	2139	icoppositeselection = TIM_ICSelection_IndirectTI;
mbed_official	76:aeb1df146756	2140	}
mbed_official	76:aeb1df146756	2141	else
mbed_official	76:aeb1df146756	2142	{
mbed_official	76:aeb1df146756	2143	icoppositeselection = TIM_ICSelection_DirectTI;
mbed_official	76:aeb1df146756	2144	}
mbed_official	76:aeb1df146756	2145	if (TIM_ICInitStruct->TIM_Channel == TIM_Channel_1)
mbed_official	76:aeb1df146756	2146	{
mbed_official	76:aeb1df146756	2147	/* TI1 Configuration */
mbed_official	76:aeb1df146756	2148	TI1_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2149	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2150	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2151	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2152	/* TI2 Configuration */
mbed_official	76:aeb1df146756	2153	TI2_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2154	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2155	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2156	}
mbed_official	76:aeb1df146756	2157	else
mbed_official	76:aeb1df146756	2158	{
mbed_official	76:aeb1df146756	2159	/* TI2 Configuration */
mbed_official	76:aeb1df146756	2160	TI2_Config(TIMx, TIM_ICInitStruct->TIM_ICPolarity, TIM_ICInitStruct->TIM_ICSelection,
mbed_official	76:aeb1df146756	2161	TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2162	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2163	TIM_SetIC2Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2164	/* TI1 Configuration */
mbed_official	76:aeb1df146756	2165	TI1_Config(TIMx, icoppositepolarity, icoppositeselection, TIM_ICInitStruct->TIM_ICFilter);
mbed_official	76:aeb1df146756	2166	/* Set the Input Capture Prescaler value */
mbed_official	76:aeb1df146756	2167	TIM_SetIC1Prescaler(TIMx, TIM_ICInitStruct->TIM_ICPrescaler);
mbed_official	76:aeb1df146756	2168	}
mbed_official	76:aeb1df146756	2169	}
mbed_official	76:aeb1df146756	2170
mbed_official	76:aeb1df146756	2171	/**
mbed_official	76:aeb1df146756	2172	* @brief Gets the TIMx Input Capture 1 value.
mbed_official	76:aeb1df146756	2173	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2174	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2175	* @retval Capture Compare 1 Register value.
mbed_official	76:aeb1df146756	2176	*/
mbed_official	76:aeb1df146756	2177	uint32_t TIM_GetCapture1(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2178	{
mbed_official	76:aeb1df146756	2179	/* Check the parameters */
mbed_official	76:aeb1df146756	2180	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2181
mbed_official	76:aeb1df146756	2182	/* Get the Capture 1 Register value */
mbed_official	76:aeb1df146756	2183	return TIMx->CCR1;
mbed_official	76:aeb1df146756	2184	}
mbed_official	76:aeb1df146756	2185
mbed_official	76:aeb1df146756	2186	/**
mbed_official	76:aeb1df146756	2187	* @brief Gets the TIMx Input Capture 2 value.
mbed_official	76:aeb1df146756	2188	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2189	* @retval Capture Compare 2 Register value.
mbed_official	76:aeb1df146756	2190	*/
mbed_official	76:aeb1df146756	2191	uint32_t TIM_GetCapture2(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2192	{
mbed_official	76:aeb1df146756	2193	/* Check the parameters */
mbed_official	76:aeb1df146756	2194	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2195
mbed_official	76:aeb1df146756	2196	/* Get the Capture 2 Register value */
mbed_official	76:aeb1df146756	2197	return TIMx->CCR2;
mbed_official	76:aeb1df146756	2198	}
mbed_official	76:aeb1df146756	2199
mbed_official	76:aeb1df146756	2200	/**
mbed_official	76:aeb1df146756	2201	* @brief Gets the TIMx Input Capture 3 value.
mbed_official	76:aeb1df146756	2202	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2203	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2204	* @retval Capture Compare 3 Register value.
mbed_official	76:aeb1df146756	2205	*/
mbed_official	76:aeb1df146756	2206	uint32_t TIM_GetCapture3(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2207	{
mbed_official	76:aeb1df146756	2208	/* Check the parameters */
mbed_official	76:aeb1df146756	2209	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2210
mbed_official	76:aeb1df146756	2211	/* Get the Capture 3 Register value */
mbed_official	76:aeb1df146756	2212	return TIMx->CCR3;
mbed_official	76:aeb1df146756	2213	}
mbed_official	76:aeb1df146756	2214
mbed_official	76:aeb1df146756	2215	/**
mbed_official	76:aeb1df146756	2216	* @brief Gets the TIMx Input Capture 4 value.
mbed_official	76:aeb1df146756	2217	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2218	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2219	* @retval Capture Compare 4 Register value.
mbed_official	76:aeb1df146756	2220	*/
mbed_official	76:aeb1df146756	2221	uint32_t TIM_GetCapture4(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2222	{
mbed_official	76:aeb1df146756	2223	/* Check the parameters */
mbed_official	76:aeb1df146756	2224	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2225
mbed_official	76:aeb1df146756	2226	/* Get the Capture 4 Register value */
mbed_official	76:aeb1df146756	2227	return TIMx->CCR4;
mbed_official	76:aeb1df146756	2228	}
mbed_official	76:aeb1df146756	2229
mbed_official	76:aeb1df146756	2230	/**
mbed_official	76:aeb1df146756	2231	* @brief Sets the TIMx Input Capture 1 prescaler.
mbed_official	76:aeb1df146756	2232	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2233	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2234	* @param TIM_ICPSC: specifies the Input Capture1 prescaler new value.
mbed_official	76:aeb1df146756	2235	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2236	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2237	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2238	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2239	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2240	* @retval None
mbed_official	76:aeb1df146756	2241	*/
mbed_official	76:aeb1df146756	2242	void TIM_SetIC1Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2243	{
mbed_official	76:aeb1df146756	2244	/* Check the parameters */
mbed_official	76:aeb1df146756	2245	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2246	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2247
mbed_official	76:aeb1df146756	2248	/* Reset the IC1PSC Bits */
mbed_official	76:aeb1df146756	2249	TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC1PSC);
mbed_official	76:aeb1df146756	2250	/* Set the IC1PSC value */
mbed_official	76:aeb1df146756	2251	TIMx->CCMR1 \|= TIM_ICPSC;
mbed_official	76:aeb1df146756	2252	}
mbed_official	76:aeb1df146756	2253
mbed_official	76:aeb1df146756	2254	/**
mbed_official	76:aeb1df146756	2255	* @brief Sets the TIMx Input Capture 2 prescaler.
mbed_official	76:aeb1df146756	2256	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2257	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2258	* @param TIM_ICPSC: specifies the Input Capture2 prescaler new value.
mbed_official	76:aeb1df146756	2259	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2260	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2261	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2262	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2263	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2264	* @retval None
mbed_official	76:aeb1df146756	2265	*/
mbed_official	76:aeb1df146756	2266	void TIM_SetIC2Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2267	{
mbed_official	76:aeb1df146756	2268	/* Check the parameters */
mbed_official	76:aeb1df146756	2269	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2270	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2271
mbed_official	76:aeb1df146756	2272	/* Reset the IC2PSC Bits */
mbed_official	76:aeb1df146756	2273	TIMx->CCMR1 &= (uint16_t)~((uint16_t)TIM_CCMR1_IC2PSC);
mbed_official	76:aeb1df146756	2274	/* Set the IC2PSC value */
mbed_official	76:aeb1df146756	2275	TIMx->CCMR1 \|= (uint16_t)(TIM_ICPSC << 8);
mbed_official	76:aeb1df146756	2276	}
mbed_official	76:aeb1df146756	2277
mbed_official	76:aeb1df146756	2278	/**
mbed_official	76:aeb1df146756	2279	* @brief Sets the TIMx Input Capture 3 prescaler.
mbed_official	76:aeb1df146756	2280	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2281	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2282	* @param TIM_ICPSC: specifies the Input Capture3 prescaler new value.
mbed_official	76:aeb1df146756	2283	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2284	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2285	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2286	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2287	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2288	* @retval None
mbed_official	76:aeb1df146756	2289	*/
mbed_official	76:aeb1df146756	2290	void TIM_SetIC3Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2291	{
mbed_official	76:aeb1df146756	2292	/* Check the parameters */
mbed_official	76:aeb1df146756	2293	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2294	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2295
mbed_official	76:aeb1df146756	2296	/* Reset the IC3PSC Bits */
mbed_official	76:aeb1df146756	2297	TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC3PSC);
mbed_official	76:aeb1df146756	2298	/* Set the IC3PSC value */
mbed_official	76:aeb1df146756	2299	TIMx->CCMR2 \|= TIM_ICPSC;
mbed_official	76:aeb1df146756	2300	}
mbed_official	76:aeb1df146756	2301
mbed_official	76:aeb1df146756	2302	/**
mbed_official	76:aeb1df146756	2303	* @brief Sets the TIMx Input Capture 4 prescaler.
mbed_official	76:aeb1df146756	2304	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2305	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2306	* @param TIM_ICPSC: specifies the Input Capture4 prescaler new value.
mbed_official	76:aeb1df146756	2307	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2308	* @arg TIM_ICPSC_DIV1: no prescaler
mbed_official	76:aeb1df146756	2309	* @arg TIM_ICPSC_DIV2: capture is done once every 2 events
mbed_official	76:aeb1df146756	2310	* @arg TIM_ICPSC_DIV4: capture is done once every 4 events
mbed_official	76:aeb1df146756	2311	* @arg TIM_ICPSC_DIV8: capture is done once every 8 events
mbed_official	76:aeb1df146756	2312	* @retval None
mbed_official	76:aeb1df146756	2313	*/
mbed_official	76:aeb1df146756	2314	void TIM_SetIC4Prescaler(TIM_TypeDef* TIMx, uint16_t TIM_ICPSC)
mbed_official	76:aeb1df146756	2315	{
mbed_official	76:aeb1df146756	2316	/* Check the parameters */
mbed_official	76:aeb1df146756	2317	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2318	assert_param(IS_TIM_IC_PRESCALER(TIM_ICPSC));
mbed_official	76:aeb1df146756	2319
mbed_official	76:aeb1df146756	2320	/* Reset the IC4PSC Bits */
mbed_official	76:aeb1df146756	2321	TIMx->CCMR2 &= (uint16_t)~((uint16_t)TIM_CCMR2_IC4PSC);
mbed_official	76:aeb1df146756	2322	/* Set the IC4PSC value */
mbed_official	76:aeb1df146756	2323	TIMx->CCMR2 \|= (uint16_t)(TIM_ICPSC << 8);
mbed_official	76:aeb1df146756	2324	}
mbed_official	76:aeb1df146756	2325
mbed_official	76:aeb1df146756	2326	/**
mbed_official	76:aeb1df146756	2327	* @}
mbed_official	76:aeb1df146756	2328	*/
mbed_official	76:aeb1df146756	2329
mbed_official	76:aeb1df146756	2330	/** @defgroup TIM_Group5 Interrupts DMA and flags management functions
mbed_official	76:aeb1df146756	2331	* @brief Interrupts, DMA and flags management functions
mbed_official	76:aeb1df146756	2332	*
mbed_official	76:aeb1df146756	2333	@verbatim
mbed_official	76:aeb1df146756	2334	===============================================================================
mbed_official	76:aeb1df146756	2335	##### Interrupts, DMA and flags management functions #####
mbed_official	76:aeb1df146756	2336	===============================================================================
mbed_official	76:aeb1df146756	2337
mbed_official	76:aeb1df146756	2338	@endverbatim
mbed_official	76:aeb1df146756	2339	* @{
mbed_official	76:aeb1df146756	2340	*/
mbed_official	76:aeb1df146756	2341
mbed_official	76:aeb1df146756	2342	/**
mbed_official	76:aeb1df146756	2343	* @brief Enables or disables the specified TIM interrupts.
mbed_official	76:aeb1df146756	2344	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIMx peripheral.
mbed_official	76:aeb1df146756	2345	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2346	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2347	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2348	* @param TIM_IT: specifies the TIM interrupts sources to be enabled or disabled.
mbed_official	76:aeb1df146756	2349	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2350	* @arg TIM_IT_Update: TIM update Interrupt source
mbed_official	76:aeb1df146756	2351	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source
mbed_official	76:aeb1df146756	2352	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source
mbed_official	76:aeb1df146756	2353	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source
mbed_official	76:aeb1df146756	2354	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source
mbed_official	76:aeb1df146756	2355	* @arg TIM_IT_COM: TIM Commutation Interrupt source
mbed_official	76:aeb1df146756	2356	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source
mbed_official	76:aeb1df146756	2357	* @arg TIM_IT_Break: TIM Break Interrupt source
mbed_official	76:aeb1df146756	2358	*
mbed_official	76:aeb1df146756	2359	* @note TIM6 and TIM7 can only generate an update interrupt.
mbed_official	76:aeb1df146756	2360	* @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1,TIM_IT_CC2 or TIM_IT_Trigger.
mbed_official	76:aeb1df146756	2361	* @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1.
mbed_official	76:aeb1df146756	2362	* @note TIM_IT_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2363	* @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2364	*
mbed_official	76:aeb1df146756	2365	* @param NewState: new state of the TIM interrupts.
mbed_official	76:aeb1df146756	2366	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2367	* @retval None
mbed_official	76:aeb1df146756	2368	*/
mbed_official	76:aeb1df146756	2369	void TIM_ITConfig(TIM_TypeDef* TIMx, uint16_t TIM_IT, FunctionalState NewState)
mbed_official	76:aeb1df146756	2370	{
mbed_official	76:aeb1df146756	2371	/* Check the parameters */
mbed_official	76:aeb1df146756	2372	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2373	assert_param(IS_TIM_IT(TIM_IT));
mbed_official	76:aeb1df146756	2374	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2375
mbed_official	76:aeb1df146756	2376	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2377	{
mbed_official	76:aeb1df146756	2378	/* Enable the Interrupt sources */
mbed_official	76:aeb1df146756	2379	TIMx->DIER \|= TIM_IT;
mbed_official	76:aeb1df146756	2380	}
mbed_official	76:aeb1df146756	2381	else
mbed_official	76:aeb1df146756	2382	{
mbed_official	76:aeb1df146756	2383	/* Disable the Interrupt sources */
mbed_official	76:aeb1df146756	2384	TIMx->DIER &= (uint16_t)~TIM_IT;
mbed_official	76:aeb1df146756	2385	}
mbed_official	76:aeb1df146756	2386	}
mbed_official	76:aeb1df146756	2387
mbed_official	76:aeb1df146756	2388	/**
mbed_official	76:aeb1df146756	2389	* @brief Configures the TIMx event to be generate by software.
mbed_official	76:aeb1df146756	2390	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the
mbed_official	76:aeb1df146756	2391	* TIM peripheral.
mbed_official	76:aeb1df146756	2392	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2393	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2394	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2395	* @param TIM_EventSource: specifies the event source.
mbed_official	76:aeb1df146756	2396	* This parameter can be one or more of the following values:
mbed_official	76:aeb1df146756	2397	* @arg TIM_EventSource_Update: Timer update Event source
mbed_official	76:aeb1df146756	2398	* @arg TIM_EventSource_CC1: Timer Capture Compare 1 Event source
mbed_official	76:aeb1df146756	2399	* @arg TIM_EventSource_CC2: Timer Capture Compare 2 Event source
mbed_official	76:aeb1df146756	2400	* @arg TIM_EventSource_CC3: Timer Capture Compare 3 Event source
mbed_official	76:aeb1df146756	2401	* @arg TIM_EventSource_CC4: Timer Capture Compare 4 Event source
mbed_official	76:aeb1df146756	2402	* @arg TIM_EventSource_COM: Timer COM event source
mbed_official	76:aeb1df146756	2403	* @arg TIM_EventSource_Trigger: Timer Trigger Event source
mbed_official	76:aeb1df146756	2404	* @arg TIM_EventSource_Break: Timer Break event source
mbed_official	76:aeb1df146756	2405	*
mbed_official	76:aeb1df146756	2406	* @note TIM6 and TIM7 can only generate an update event.
mbed_official	76:aeb1df146756	2407	* @note TIM_EventSource_COM and TIM_EventSource_Break are used only with TIM1.
mbed_official	76:aeb1df146756	2408	*
mbed_official	76:aeb1df146756	2409	* @retval None
mbed_official	76:aeb1df146756	2410	*/
mbed_official	76:aeb1df146756	2411	void TIM_GenerateEvent(TIM_TypeDef* TIMx, uint16_t TIM_EventSource)
mbed_official	76:aeb1df146756	2412	{
mbed_official	76:aeb1df146756	2413	/* Check the parameters */
mbed_official	76:aeb1df146756	2414	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2415	assert_param(IS_TIM_EVENT_SOURCE(TIM_EventSource));
mbed_official	76:aeb1df146756	2416	/* Set the event sources */
mbed_official	76:aeb1df146756	2417	TIMx->EGR = TIM_EventSource;
mbed_official	76:aeb1df146756	2418	}
mbed_official	76:aeb1df146756	2419
mbed_official	76:aeb1df146756	2420	/**
mbed_official	76:aeb1df146756	2421	* @brief Checks whether the specified TIM flag is set or not.
mbed_official	76:aeb1df146756	2422	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2423	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2424	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2425	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2426	* @param TIM_FLAG: specifies the flag to check.
mbed_official	76:aeb1df146756	2427	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2428	* @arg TIM_FLAG_Update: TIM update Flag
mbed_official	76:aeb1df146756	2429	* @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag
mbed_official	76:aeb1df146756	2430	* @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag
mbed_official	76:aeb1df146756	2431	* @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag
mbed_official	76:aeb1df146756	2432	* @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag
mbed_official	76:aeb1df146756	2433	* @arg TIM_FLAG_COM: TIM Commutation Flag
mbed_official	76:aeb1df146756	2434	* @arg TIM_FLAG_Trigger: TIM Trigger Flag
mbed_official	76:aeb1df146756	2435	* @arg TIM_FLAG_Break: TIM Break Flag
mbed_official	76:aeb1df146756	2436	* @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag
mbed_official	76:aeb1df146756	2437	* @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag
mbed_official	76:aeb1df146756	2438	* @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag
mbed_official	76:aeb1df146756	2439	* @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag
mbed_official	76:aeb1df146756	2440	*
mbed_official	76:aeb1df146756	2441	* @note TIM6 and TIM7 can have only one update flag.
mbed_official	76:aeb1df146756	2442	* @note TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1, TIM_FLAG_CC2 or TIM_FLAG_Trigger.
mbed_official	76:aeb1df146756	2443	* @note TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1.
mbed_official	76:aeb1df146756	2444	* @note TIM_FLAG_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2445	* @note TIM_FLAG_COM is used only with TIM1 TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2446	*
mbed_official	76:aeb1df146756	2447	* @retval The new state of TIM_FLAG (SET or RESET).
mbed_official	76:aeb1df146756	2448	*/
mbed_official	76:aeb1df146756	2449	FlagStatus TIM_GetFlagStatus(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official	76:aeb1df146756	2450	{
mbed_official	76:aeb1df146756	2451	ITStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	2452
mbed_official	76:aeb1df146756	2453	/* Check the parameters */
mbed_official	76:aeb1df146756	2454	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2455	assert_param(IS_TIM_GET_FLAG(TIM_FLAG));
mbed_official	76:aeb1df146756	2456
mbed_official	76:aeb1df146756	2457	if ((TIMx->SR & TIM_FLAG) != (uint16_t)RESET)
mbed_official	76:aeb1df146756	2458	{
mbed_official	76:aeb1df146756	2459	bitstatus = SET;
mbed_official	76:aeb1df146756	2460	}
mbed_official	76:aeb1df146756	2461	else
mbed_official	76:aeb1df146756	2462	{
mbed_official	76:aeb1df146756	2463	bitstatus = RESET;
mbed_official	76:aeb1df146756	2464	}
mbed_official	76:aeb1df146756	2465	return bitstatus;
mbed_official	76:aeb1df146756	2466	}
mbed_official	76:aeb1df146756	2467
mbed_official	76:aeb1df146756	2468	/**
mbed_official	76:aeb1df146756	2469	* @brief Clears the TIMx's pending flags.
mbed_official	76:aeb1df146756	2470	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2471	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2472	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2473	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2474	* @param TIM_FLAG: specifies the flag bit to clear.
mbed_official	76:aeb1df146756	2475	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2476	* @arg TIM_FLAG_Update: TIM update Flag
mbed_official	76:aeb1df146756	2477	* @arg TIM_FLAG_CC1: TIM Capture Compare 1 Flag
mbed_official	76:aeb1df146756	2478	* @arg TIM_FLAG_CC2: TIM Capture Compare 2 Flag
mbed_official	76:aeb1df146756	2479	* @arg TIM_FLAG_CC3: TIM Capture Compare 3 Flag
mbed_official	76:aeb1df146756	2480	* @arg TIM_FLAG_CC4: TIM Capture Compare 4 Flag
mbed_official	76:aeb1df146756	2481	* @arg TIM_FLAG_COM: TIM Commutation Flag
mbed_official	76:aeb1df146756	2482	* @arg TIM_FLAG_Trigger: TIM Trigger Flag
mbed_official	76:aeb1df146756	2483	* @arg TIM_FLAG_Break: TIM Break Flag
mbed_official	76:aeb1df146756	2484	* @arg TIM_FLAG_CC1OF: TIM Capture Compare 1 overcapture Flag
mbed_official	76:aeb1df146756	2485	* @arg TIM_FLAG_CC2OF: TIM Capture Compare 2 overcapture Flag
mbed_official	76:aeb1df146756	2486	* @arg TIM_FLAG_CC3OF: TIM Capture Compare 3 overcapture Flag
mbed_official	76:aeb1df146756	2487	* @arg TIM_FLAG_CC4OF: TIM Capture Compare 4 overcapture Flag
mbed_official	76:aeb1df146756	2488	*
mbed_official	76:aeb1df146756	2489	* @note TIM6 and TIM7 can have only one update flag.
mbed_official	76:aeb1df146756	2490	* @note TIM15 can have only TIM_FLAG_Update, TIM_FLAG_CC1,TIM_FLAG_CC2 or
mbed_official	76:aeb1df146756	2491	* TIM_FLAG_Trigger.
mbed_official	76:aeb1df146756	2492	* @note TIM14, TIM16 and TIM17 can have TIM_FLAG_Update or TIM_FLAG_CC1.
mbed_official	76:aeb1df146756	2493	* @note TIM_FLAG_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2494	* @note TIM_FLAG_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2495	*
mbed_official	76:aeb1df146756	2496	* @retval None
mbed_official	76:aeb1df146756	2497	*/
mbed_official	76:aeb1df146756	2498	void TIM_ClearFlag(TIM_TypeDef* TIMx, uint16_t TIM_FLAG)
mbed_official	76:aeb1df146756	2499	{
mbed_official	76:aeb1df146756	2500	/* Check the parameters */
mbed_official	76:aeb1df146756	2501	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2502	assert_param(IS_TIM_CLEAR_FLAG(TIM_FLAG));
mbed_official	76:aeb1df146756	2503
mbed_official	76:aeb1df146756	2504	/* Clear the flags */
mbed_official	76:aeb1df146756	2505	TIMx->SR = (uint16_t)~TIM_FLAG;
mbed_official	76:aeb1df146756	2506	}
mbed_official	76:aeb1df146756	2507
mbed_official	76:aeb1df146756	2508	/**
mbed_official	76:aeb1df146756	2509	* @brief Checks whether the TIM interrupt has occurred or not.
mbed_official	76:aeb1df146756	2510	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2511	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2512	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2513	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2514	* @param TIM_IT: specifies the TIM interrupt source to check.
mbed_official	76:aeb1df146756	2515	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2516	* @arg TIM_IT_Update: TIM update Interrupt source
mbed_official	76:aeb1df146756	2517	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source
mbed_official	76:aeb1df146756	2518	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source
mbed_official	76:aeb1df146756	2519	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source
mbed_official	76:aeb1df146756	2520	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source
mbed_official	76:aeb1df146756	2521	* @arg TIM_IT_COM: TIM Commutation Interrupt source
mbed_official	76:aeb1df146756	2522	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source
mbed_official	76:aeb1df146756	2523	* @arg TIM_IT_Break: TIM Break Interrupt source
mbed_official	76:aeb1df146756	2524	*
mbed_official	76:aeb1df146756	2525	* @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official	76:aeb1df146756	2526	* @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger.
mbed_official	76:aeb1df146756	2527	* @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1.
mbed_official	76:aeb1df146756	2528	* @note TIM_IT_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2529	* @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2530	*
mbed_official	76:aeb1df146756	2531	* @retval The new state of the TIM_IT(SET or RESET).
mbed_official	76:aeb1df146756	2532	*/
mbed_official	76:aeb1df146756	2533	ITStatus TIM_GetITStatus(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official	76:aeb1df146756	2534	{
mbed_official	76:aeb1df146756	2535	ITStatus bitstatus = RESET;
mbed_official	76:aeb1df146756	2536	uint16_t itstatus = 0x0, itenable = 0x0;
mbed_official	76:aeb1df146756	2537
mbed_official	76:aeb1df146756	2538	/* Check the parameters */
mbed_official	76:aeb1df146756	2539	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2540	assert_param(IS_TIM_GET_IT(TIM_IT));
mbed_official	76:aeb1df146756	2541
mbed_official	76:aeb1df146756	2542	itstatus = TIMx->SR & TIM_IT;
mbed_official	76:aeb1df146756	2543
mbed_official	76:aeb1df146756	2544	itenable = TIMx->DIER & TIM_IT;
mbed_official	76:aeb1df146756	2545	if ((itstatus != (uint16_t)RESET) && (itenable != (uint16_t)RESET))
mbed_official	76:aeb1df146756	2546	{
mbed_official	76:aeb1df146756	2547	bitstatus = SET;
mbed_official	76:aeb1df146756	2548	}
mbed_official	76:aeb1df146756	2549	else
mbed_official	76:aeb1df146756	2550	{
mbed_official	76:aeb1df146756	2551	bitstatus = RESET;
mbed_official	76:aeb1df146756	2552	}
mbed_official	76:aeb1df146756	2553	return bitstatus;
mbed_official	76:aeb1df146756	2554	}
mbed_official	76:aeb1df146756	2555
mbed_official	76:aeb1df146756	2556	/**
mbed_official	76:aeb1df146756	2557	* @brief Clears the TIMx's interrupt pending bits.
mbed_official	76:aeb1df146756	2558	* @param TIMx: where x can be 1, 2, 3, 6, 7, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2559	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2560	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2561	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2562	* @param TIM_IT: specifies the pending bit to clear.
mbed_official	76:aeb1df146756	2563	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2564	* @arg TIM_IT_Update: TIM1 update Interrupt source
mbed_official	76:aeb1df146756	2565	* @arg TIM_IT_CC1: TIM Capture Compare 1 Interrupt source
mbed_official	76:aeb1df146756	2566	* @arg TIM_IT_CC2: TIM Capture Compare 2 Interrupt source
mbed_official	76:aeb1df146756	2567	* @arg TIM_IT_CC3: TIM Capture Compare 3 Interrupt source
mbed_official	76:aeb1df146756	2568	* @arg TIM_IT_CC4: TIM Capture Compare 4 Interrupt source
mbed_official	76:aeb1df146756	2569	* @arg TIM_IT_COM: TIM Commutation Interrupt source
mbed_official	76:aeb1df146756	2570	* @arg TIM_IT_Trigger: TIM Trigger Interrupt source
mbed_official	76:aeb1df146756	2571	* @arg TIM_IT_Break: TIM Break Interrupt source
mbed_official	76:aeb1df146756	2572	*
mbed_official	76:aeb1df146756	2573	* @note TIM6 and TIM7 can generate only an update interrupt.
mbed_official	76:aeb1df146756	2574	* @note TIM15 can have only TIM_IT_Update, TIM_IT_CC1, TIM_IT_CC2 or TIM_IT_Trigger.
mbed_official	76:aeb1df146756	2575	* @note TIM14, TIM16 and TIM17 can have TIM_IT_Update or TIM_IT_CC1.
mbed_official	76:aeb1df146756	2576	* @note TIM_IT_Break is used only with TIM1 and TIM15.
mbed_official	76:aeb1df146756	2577	* @note TIM_IT_COM is used only with TIM1, TIM15, TIM16 and TIM17.
mbed_official	76:aeb1df146756	2578	*
mbed_official	76:aeb1df146756	2579	* @retval None
mbed_official	76:aeb1df146756	2580	*/
mbed_official	76:aeb1df146756	2581	void TIM_ClearITPendingBit(TIM_TypeDef* TIMx, uint16_t TIM_IT)
mbed_official	76:aeb1df146756	2582	{
mbed_official	76:aeb1df146756	2583	/* Check the parameters */
mbed_official	76:aeb1df146756	2584	assert_param(IS_TIM_ALL_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2585	assert_param(IS_TIM_IT(TIM_IT));
mbed_official	76:aeb1df146756	2586
mbed_official	76:aeb1df146756	2587	/* Clear the IT pending Bit */
mbed_official	76:aeb1df146756	2588	TIMx->SR = (uint16_t)~TIM_IT;
mbed_official	76:aeb1df146756	2589	}
mbed_official	76:aeb1df146756	2590
mbed_official	76:aeb1df146756	2591	/**
mbed_official	76:aeb1df146756	2592	* @brief Configures the TIMx's DMA interface.
mbed_official	76:aeb1df146756	2593	* @param TIMx: where x can be 1, 2, 3, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2594	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2595	* @param TIM_DMABase: DMA Base address.
mbed_official	76:aeb1df146756	2596	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2597	* @arg TIM_DMABase_CR1
mbed_official	76:aeb1df146756	2598	* @arg TIM_DMABase_CR2
mbed_official	76:aeb1df146756	2599	* @arg TIM_DMABase_SMCR
mbed_official	76:aeb1df146756	2600	* @arg TIM_DMABase_DIER
mbed_official	76:aeb1df146756	2601	* @arg TIM_DMABase_SR
mbed_official	76:aeb1df146756	2602	* @arg TIM_DMABase_EGR
mbed_official	76:aeb1df146756	2603	* @arg TIM_DMABase_CCMR1
mbed_official	76:aeb1df146756	2604	* @arg TIM_DMABase_CCMR2
mbed_official	76:aeb1df146756	2605	* @arg TIM_DMABase_CCER
mbed_official	76:aeb1df146756	2606	* @arg TIM_DMABase_CNT
mbed_official	76:aeb1df146756	2607	* @arg TIM_DMABase_PSC
mbed_official	76:aeb1df146756	2608	* @arg TIM_DMABase_ARR
mbed_official	76:aeb1df146756	2609	* @arg TIM_DMABase_CCR1
mbed_official	76:aeb1df146756	2610	* @arg TIM_DMABase_CCR2
mbed_official	76:aeb1df146756	2611	* @arg TIM_DMABase_CCR3
mbed_official	76:aeb1df146756	2612	* @arg TIM_DMABase_CCR4
mbed_official	76:aeb1df146756	2613	* @arg TIM_DMABase_DCR
mbed_official	76:aeb1df146756	2614	* @arg TIM_DMABase_OR
mbed_official	76:aeb1df146756	2615	* @param TIM_DMABurstLength: DMA Burst length. This parameter can be one value
mbed_official	76:aeb1df146756	2616	* between: TIM_DMABurstLength_1Transfer and TIM_DMABurstLength_18Transfers.
mbed_official	76:aeb1df146756	2617	* @retval None
mbed_official	76:aeb1df146756	2618	*/
mbed_official	76:aeb1df146756	2619	void TIM_DMAConfig(TIM_TypeDef* TIMx, uint16_t TIM_DMABase, uint16_t TIM_DMABurstLength)
mbed_official	76:aeb1df146756	2620	{
mbed_official	76:aeb1df146756	2621	/* Check the parameters */
mbed_official	76:aeb1df146756	2622	assert_param(IS_TIM_LIST4_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2623	assert_param(IS_TIM_DMA_BASE(TIM_DMABase));
mbed_official	76:aeb1df146756	2624	assert_param(IS_TIM_DMA_LENGTH(TIM_DMABurstLength));
mbed_official	76:aeb1df146756	2625	/* Set the DMA Base and the DMA Burst Length */
mbed_official	76:aeb1df146756	2626	TIMx->DCR = TIM_DMABase \| TIM_DMABurstLength;
mbed_official	76:aeb1df146756	2627	}
mbed_official	76:aeb1df146756	2628
mbed_official	76:aeb1df146756	2629	/**
mbed_official	76:aeb1df146756	2630	* @brief Enables or disables the TIMx's DMA Requests.
mbed_official	76:aeb1df146756	2631	* @param TIMx: where x can be 1, 2, 3, 6, 7, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2632	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2633	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2634	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2635	* @param TIM_DMASource: specifies the DMA Request sources.
mbed_official	76:aeb1df146756	2636	* This parameter can be any combination of the following values:
mbed_official	76:aeb1df146756	2637	* @arg TIM_DMA_Update: TIM update Interrupt source
mbed_official	76:aeb1df146756	2638	* @arg TIM_DMA_CC1: TIM Capture Compare 1 DMA source
mbed_official	76:aeb1df146756	2639	* @arg TIM_DMA_CC2: TIM Capture Compare 2 DMA source
mbed_official	76:aeb1df146756	2640	* @arg TIM_DMA_CC3: TIM Capture Compare 3 DMA source
mbed_official	76:aeb1df146756	2641	* @arg TIM_DMA_CC4: TIM Capture Compare 4 DMA source
mbed_official	76:aeb1df146756	2642	* @arg TIM_DMA_COM: TIM Commutation DMA source
mbed_official	76:aeb1df146756	2643	* @arg TIM_DMA_Trigger: TIM Trigger DMA source
mbed_official	76:aeb1df146756	2644	* @param NewState: new state of the DMA Request sources.
mbed_official	76:aeb1df146756	2645	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2646	* @retval None
mbed_official	76:aeb1df146756	2647	*/
mbed_official	76:aeb1df146756	2648	void TIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState)
mbed_official	76:aeb1df146756	2649	{
mbed_official	76:aeb1df146756	2650	/* Check the parameters */
mbed_official	76:aeb1df146756	2651	assert_param(IS_TIM_LIST10_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2652	assert_param(IS_TIM_DMA_SOURCE(TIM_DMASource));
mbed_official	76:aeb1df146756	2653	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2654
mbed_official	76:aeb1df146756	2655	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2656	{
mbed_official	76:aeb1df146756	2657	/* Enable the DMA sources */
mbed_official	76:aeb1df146756	2658	TIMx->DIER \|= TIM_DMASource;
mbed_official	76:aeb1df146756	2659	}
mbed_official	76:aeb1df146756	2660	else
mbed_official	76:aeb1df146756	2661	{
mbed_official	76:aeb1df146756	2662	/* Disable the DMA sources */
mbed_official	76:aeb1df146756	2663	TIMx->DIER &= (uint16_t)~TIM_DMASource;
mbed_official	76:aeb1df146756	2664	}
mbed_official	76:aeb1df146756	2665	}
mbed_official	76:aeb1df146756	2666
mbed_official	76:aeb1df146756	2667	/**
mbed_official	76:aeb1df146756	2668	* @brief Selects the TIMx peripheral Capture Compare DMA source.
mbed_official	76:aeb1df146756	2669	* @param TIMx: where x can be 1, 2, 3, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2670	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2671	* @param NewState: new state of the Capture Compare DMA source
mbed_official	76:aeb1df146756	2672	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	2673	* @retval None
mbed_official	76:aeb1df146756	2674	*/
mbed_official	76:aeb1df146756	2675	void TIM_SelectCCDMA(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	2676	{
mbed_official	76:aeb1df146756	2677	/* Check the parameters */
mbed_official	76:aeb1df146756	2678	assert_param(IS_TIM_LIST5_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2679	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	2680
mbed_official	76:aeb1df146756	2681	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	2682	{
mbed_official	76:aeb1df146756	2683	/* Set the CCDS Bit */
mbed_official	76:aeb1df146756	2684	TIMx->CR2 \|= TIM_CR2_CCDS;
mbed_official	76:aeb1df146756	2685	}
mbed_official	76:aeb1df146756	2686	else
mbed_official	76:aeb1df146756	2687	{
mbed_official	76:aeb1df146756	2688	/* Reset the CCDS Bit */
mbed_official	76:aeb1df146756	2689	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_CCDS);
mbed_official	76:aeb1df146756	2690	}
mbed_official	76:aeb1df146756	2691	}
mbed_official	76:aeb1df146756	2692
mbed_official	76:aeb1df146756	2693	/**
mbed_official	76:aeb1df146756	2694	* @}
mbed_official	76:aeb1df146756	2695	*/
mbed_official	76:aeb1df146756	2696
mbed_official	76:aeb1df146756	2697	/** @defgroup TIM_Group6 Clocks management functions
mbed_official	76:aeb1df146756	2698	* @brief Clocks management functions
mbed_official	76:aeb1df146756	2699	*
mbed_official	76:aeb1df146756	2700	@verbatim
mbed_official	76:aeb1df146756	2701	===============================================================================
mbed_official	76:aeb1df146756	2702	##### Clocks management functions #####
mbed_official	76:aeb1df146756	2703	===============================================================================
mbed_official	76:aeb1df146756	2704
mbed_official	76:aeb1df146756	2705	@endverbatim
mbed_official	76:aeb1df146756	2706	* @{
mbed_official	76:aeb1df146756	2707	*/
mbed_official	76:aeb1df146756	2708
mbed_official	76:aeb1df146756	2709	/**
mbed_official	76:aeb1df146756	2710	* @brief Configures the TIMx internal Clock
mbed_official	76:aeb1df146756	2711	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2712	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2713	* @retval None
mbed_official	76:aeb1df146756	2714	*/
mbed_official	76:aeb1df146756	2715	void TIM_InternalClockConfig(TIM_TypeDef* TIMx)
mbed_official	76:aeb1df146756	2716	{
mbed_official	76:aeb1df146756	2717	/* Check the parameters */
mbed_official	76:aeb1df146756	2718	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2719	/* Disable slave mode to clock the prescaler directly with the internal clock */
mbed_official	76:aeb1df146756	2720	TIMx->SMCR &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	2721	}
mbed_official	76:aeb1df146756	2722
mbed_official	76:aeb1df146756	2723	/**
mbed_official	76:aeb1df146756	2724	* @brief Configures the TIMx Internal Trigger as External Clock
mbed_official	76:aeb1df146756	2725	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2726	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2727	* @param TIM_ITRSource: Trigger source.
mbed_official	76:aeb1df146756	2728	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2729	* @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official	76:aeb1df146756	2730	* @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official	76:aeb1df146756	2731	* @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official	76:aeb1df146756	2732	* @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official	76:aeb1df146756	2733	* @retval None
mbed_official	76:aeb1df146756	2734	*/
mbed_official	76:aeb1df146756	2735	void TIM_ITRxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official	76:aeb1df146756	2736	{
mbed_official	76:aeb1df146756	2737	/* Check the parameters */
mbed_official	76:aeb1df146756	2738	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2739	assert_param(IS_TIM_INTERNAL_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official	76:aeb1df146756	2740	/* Select the Internal Trigger */
mbed_official	76:aeb1df146756	2741	TIM_SelectInputTrigger(TIMx, TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2742	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2743	TIMx->SMCR \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2744	}
mbed_official	76:aeb1df146756	2745
mbed_official	76:aeb1df146756	2746	/**
mbed_official	76:aeb1df146756	2747	* @brief Configures the TIMx Trigger as External Clock
mbed_official	76:aeb1df146756	2748	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2749	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2750	* @param TIM_TIxExternalCLKSource: Trigger source.
mbed_official	76:aeb1df146756	2751	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2752	* @arg TIM_TIxExternalCLK1Source_TI1ED: TI1 Edge Detector
mbed_official	76:aeb1df146756	2753	* @arg TIM_TIxExternalCLK1Source_TI1: Filtered Timer Input 1
mbed_official	76:aeb1df146756	2754	* @arg TIM_TIxExternalCLK1Source_TI2: Filtered Timer Input 2
mbed_official	76:aeb1df146756	2755	* @param TIM_ICPolarity: specifies the TIx Polarity.
mbed_official	76:aeb1df146756	2756	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2757	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	2758	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	2759	* @param ICFilter: specifies the filter value.
mbed_official	76:aeb1df146756	2760	* This parameter must be a value between 0x0 and 0xF.
mbed_official	76:aeb1df146756	2761	* @retval None
mbed_official	76:aeb1df146756	2762	*/
mbed_official	76:aeb1df146756	2763	void TIM_TIxExternalClockConfig(TIM_TypeDef* TIMx, uint16_t TIM_TIxExternalCLKSource,
mbed_official	76:aeb1df146756	2764	uint16_t TIM_ICPolarity, uint16_t ICFilter)
mbed_official	76:aeb1df146756	2765	{
mbed_official	76:aeb1df146756	2766	/* Check the parameters */
mbed_official	76:aeb1df146756	2767	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2768	assert_param(IS_TIM_IC_POLARITY(TIM_ICPolarity));
mbed_official	76:aeb1df146756	2769	assert_param(IS_TIM_IC_FILTER(ICFilter));
mbed_official	76:aeb1df146756	2770
mbed_official	76:aeb1df146756	2771	/* Configure the Timer Input Clock Source */
mbed_official	76:aeb1df146756	2772	if (TIM_TIxExternalCLKSource == TIM_TIxExternalCLK1Source_TI2)
mbed_official	76:aeb1df146756	2773	{
mbed_official	76:aeb1df146756	2774	TI2_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official	76:aeb1df146756	2775	}
mbed_official	76:aeb1df146756	2776	else
mbed_official	76:aeb1df146756	2777	{
mbed_official	76:aeb1df146756	2778	TI1_Config(TIMx, TIM_ICPolarity, TIM_ICSelection_DirectTI, ICFilter);
mbed_official	76:aeb1df146756	2779	}
mbed_official	76:aeb1df146756	2780	/* Select the Trigger source */
mbed_official	76:aeb1df146756	2781	TIM_SelectInputTrigger(TIMx, TIM_TIxExternalCLKSource);
mbed_official	76:aeb1df146756	2782	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2783	TIMx->SMCR \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2784	}
mbed_official	76:aeb1df146756	2785
mbed_official	76:aeb1df146756	2786	/**
mbed_official	76:aeb1df146756	2787	* @brief Configures the External clock Mode1
mbed_official	76:aeb1df146756	2788	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2789	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2790	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	2791	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2792	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	2793	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	2794	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	2795	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	2796	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	2797	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2798	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	2799	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	2800	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	2801	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	2802	* @retval None
mbed_official	76:aeb1df146756	2803	*/
mbed_official	76:aeb1df146756	2804	void TIM_ETRClockMode1Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	76:aeb1df146756	2805	uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	2806	{
mbed_official	76:aeb1df146756	2807	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2808
mbed_official	76:aeb1df146756	2809	/* Check the parameters */
mbed_official	76:aeb1df146756	2810	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2811	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	2812	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	2813	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	2814
mbed_official	76:aeb1df146756	2815	/* Configure the ETR Clock source */
mbed_official	76:aeb1df146756	2816	TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official	76:aeb1df146756	2817
mbed_official	76:aeb1df146756	2818	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	2819	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2820	/* Reset the SMS Bits */
mbed_official	76:aeb1df146756	2821	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	2822	/* Select the External clock mode1 */
mbed_official	76:aeb1df146756	2823	tmpsmcr \|= TIM_SlaveMode_External1;
mbed_official	76:aeb1df146756	2824	/* Select the Trigger selection : ETRF */
mbed_official	76:aeb1df146756	2825	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official	76:aeb1df146756	2826	tmpsmcr \|= TIM_TS_ETRF;
mbed_official	76:aeb1df146756	2827	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2828	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2829	}
mbed_official	76:aeb1df146756	2830
mbed_official	76:aeb1df146756	2831	/**
mbed_official	76:aeb1df146756	2832	* @brief Configures the External clock Mode2
mbed_official	76:aeb1df146756	2833	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2834	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2835	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	2836	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2837	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	2838	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	2839	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	2840	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	2841	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	2842	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2843	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	2844	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	2845	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	2846	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	2847	* @retval None
mbed_official	76:aeb1df146756	2848	*/
mbed_official	76:aeb1df146756	2849	void TIM_ETRClockMode2Config(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official	76:aeb1df146756	2850	uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	2851	{
mbed_official	76:aeb1df146756	2852	/* Check the parameters */
mbed_official	76:aeb1df146756	2853	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2854	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	2855	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	2856	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	2857
mbed_official	76:aeb1df146756	2858	/* Configure the ETR Clock source */
mbed_official	76:aeb1df146756	2859	TIM_ETRConfig(TIMx, TIM_ExtTRGPrescaler, TIM_ExtTRGPolarity, ExtTRGFilter);
mbed_official	76:aeb1df146756	2860	/* Enable the External clock mode2 */
mbed_official	76:aeb1df146756	2861	TIMx->SMCR \|= TIM_SMCR_ECE;
mbed_official	76:aeb1df146756	2862	}
mbed_official	76:aeb1df146756	2863
mbed_official	76:aeb1df146756	2864	/**
mbed_official	76:aeb1df146756	2865	* @}
mbed_official	76:aeb1df146756	2866	*/
mbed_official	76:aeb1df146756	2867
mbed_official	76:aeb1df146756	2868	/** @defgroup TIM_Group7 Synchronization management functions
mbed_official	76:aeb1df146756	2869	* @brief Synchronization management functions
mbed_official	76:aeb1df146756	2870	*
mbed_official	76:aeb1df146756	2871	@verbatim
mbed_official	76:aeb1df146756	2872	===============================================================================
mbed_official	76:aeb1df146756	2873	##### Synchronization management functions #####
mbed_official	76:aeb1df146756	2874	===============================================================================
mbed_official	76:aeb1df146756	2875	* TIM Driver: how to use it in synchronization Mode *
mbed_official	76:aeb1df146756	2876	===============================================================================
mbed_official	76:aeb1df146756	2877	[..] Case of two/several Timers
mbed_official	76:aeb1df146756	2878	(#) Configure the Master Timers using the following functions:
mbed_official	76:aeb1df146756	2879	(++) void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2880	uint16_t TIM_TRGOSource).
mbed_official	76:aeb1df146756	2881	(++) void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2882	uint16_t TIM_MasterSlaveMode);
mbed_official	76:aeb1df146756	2883	(#) Configure the Slave Timers using the following functions:
mbed_official	76:aeb1df146756	2884	(++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2885	uint16_t TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2886	(++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official	76:aeb1df146756	2887	[..] Case of Timers and external trigger(ETR pin)
mbed_official	76:aeb1df146756	2888	(#) Configure the Etrenal trigger using this function:
mbed_official	76:aeb1df146756	2889	(++) void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler,
mbed_official	76:aeb1df146756	2890	uint16_t TIM_ExtTRGPolarity, uint16_t ExtTRGFilter);
mbed_official	76:aeb1df146756	2891	(#) Configure the Slave Timers using the following functions:
mbed_official	76:aeb1df146756	2892	(++) void TIM_SelectInputTrigger(TIM_TypeDef* TIMx,
mbed_official	76:aeb1df146756	2893	uint16_t TIM_InputTriggerSource);
mbed_official	76:aeb1df146756	2894	(++) void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode);
mbed_official	76:aeb1df146756	2895
mbed_official	76:aeb1df146756	2896	@endverbatim
mbed_official	76:aeb1df146756	2897	* @{
mbed_official	76:aeb1df146756	2898	*/
mbed_official	76:aeb1df146756	2899	/**
mbed_official	76:aeb1df146756	2900	* @brief Selects the Input Trigger source
mbed_official	76:aeb1df146756	2901	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2902	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2903	* @param TIM_InputTriggerSource: The Input Trigger source.
mbed_official	76:aeb1df146756	2904	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2905	* @arg TIM_TS_ITR0: Internal Trigger 0
mbed_official	76:aeb1df146756	2906	* @arg TIM_TS_ITR1: Internal Trigger 1
mbed_official	76:aeb1df146756	2907	* @arg TIM_TS_ITR2: Internal Trigger 2
mbed_official	76:aeb1df146756	2908	* @arg TIM_TS_ITR3: Internal Trigger 3
mbed_official	76:aeb1df146756	2909	* @arg TIM_TS_TI1F_ED: TI1 Edge Detector
mbed_official	76:aeb1df146756	2910	* @arg TIM_TS_TI1FP1: Filtered Timer Input 1
mbed_official	76:aeb1df146756	2911	* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
mbed_official	76:aeb1df146756	2912	* @arg TIM_TS_ETRF: External Trigger input
mbed_official	76:aeb1df146756	2913	* @retval None
mbed_official	76:aeb1df146756	2914	*/
mbed_official	76:aeb1df146756	2915	void TIM_SelectInputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_InputTriggerSource)
mbed_official	76:aeb1df146756	2916	{
mbed_official	76:aeb1df146756	2917	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	2918
mbed_official	76:aeb1df146756	2919	/* Check the parameters */
mbed_official	76:aeb1df146756	2920	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2921	assert_param(IS_TIM_TRIGGER_SELECTION(TIM_InputTriggerSource));
mbed_official	76:aeb1df146756	2922
mbed_official	76:aeb1df146756	2923	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	2924	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	2925	/* Reset the TS Bits */
mbed_official	76:aeb1df146756	2926	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_TS));
mbed_official	76:aeb1df146756	2927	/* Set the Input Trigger source */
mbed_official	76:aeb1df146756	2928	tmpsmcr \|= TIM_InputTriggerSource;
mbed_official	76:aeb1df146756	2929	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	2930	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	2931	}
mbed_official	76:aeb1df146756	2932
mbed_official	76:aeb1df146756	2933	/**
mbed_official	76:aeb1df146756	2934	* @brief Selects the TIMx Trigger Output Mode.
mbed_official	76:aeb1df146756	2935	* @param TIMx: where x can be 1, 2, 3, 6, 7, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2936	* @note TIM7 is applicable only for STM32F072 devices
mbed_official	76:aeb1df146756	2937	* @note TIM6 is not applivable for STM32F031 devices.
mbed_official	76:aeb1df146756	2938	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2939	* @param TIM_TRGOSource: specifies the Trigger Output source.
mbed_official	76:aeb1df146756	2940	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2941	*
mbed_official	76:aeb1df146756	2942	* - For all TIMx
mbed_official	76:aeb1df146756	2943	* @arg TIM_TRGOSource_Reset: The UG bit in the TIM_EGR register is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2944	* @arg TIM_TRGOSource_Enable: The Counter Enable CEN is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2945	* @arg TIM_TRGOSource_Update: The update event is selected as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2946	*
mbed_official	76:aeb1df146756	2947	* - For all TIMx except TIM6 and TIM7
mbed_official	76:aeb1df146756	2948	* @arg TIM_TRGOSource_OC1: The trigger output sends a positive pulse when the CC1IF flag
mbed_official	76:aeb1df146756	2949	* is to be set, as soon as a capture or compare match occurs (TRGO).
mbed_official	76:aeb1df146756	2950	* @arg TIM_TRGOSource_OC1Ref: OC1REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2951	* @arg TIM_TRGOSource_OC2Ref: OC2REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2952	* @arg TIM_TRGOSource_OC3Ref: OC3REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2953	* @arg TIM_TRGOSource_OC4Ref: OC4REF signal is used as the trigger output (TRGO).
mbed_official	76:aeb1df146756	2954	*
mbed_official	76:aeb1df146756	2955	* @retval None
mbed_official	76:aeb1df146756	2956	*/
mbed_official	76:aeb1df146756	2957	void TIM_SelectOutputTrigger(TIM_TypeDef* TIMx, uint16_t TIM_TRGOSource)
mbed_official	76:aeb1df146756	2958	{
mbed_official	76:aeb1df146756	2959	/* Check the parameters */
mbed_official	76:aeb1df146756	2960	assert_param(IS_TIM_LIST9_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2961	assert_param(IS_TIM_TRGO_SOURCE(TIM_TRGOSource));
mbed_official	76:aeb1df146756	2962
mbed_official	76:aeb1df146756	2963	/* Reset the MMS Bits */
mbed_official	76:aeb1df146756	2964	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_MMS);
mbed_official	76:aeb1df146756	2965	/* Select the TRGO source */
mbed_official	76:aeb1df146756	2966	TIMx->CR2 \|= TIM_TRGOSource;
mbed_official	76:aeb1df146756	2967	}
mbed_official	76:aeb1df146756	2968
mbed_official	76:aeb1df146756	2969	/**
mbed_official	76:aeb1df146756	2970	* @brief Selects the TIMx Slave Mode.
mbed_official	76:aeb1df146756	2971	* @param TIMx: where x can be 1, 2, 3 or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2972	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2973	* @param TIM_SlaveMode: specifies the Timer Slave Mode.
mbed_official	76:aeb1df146756	2974	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	2975	* @arg TIM_SlaveMode_Reset: Rising edge of the selected trigger signal (TRGI) re-initializes
mbed_official	76:aeb1df146756	2976	* the counter and triggers an update of the registers.
mbed_official	76:aeb1df146756	2977	* @arg TIM_SlaveMode_Gated: The counter clock is enabled when the trigger signal (TRGI) is high.
mbed_official	76:aeb1df146756	2978	* @arg TIM_SlaveMode_Trigger: The counter starts at a rising edge of the trigger TRGI.
mbed_official	76:aeb1df146756	2979	* @arg TIM_SlaveMode_External1: Rising edges of the selected trigger (TRGI) clock the counter.
mbed_official	76:aeb1df146756	2980	* @retval None
mbed_official	76:aeb1df146756	2981	*/
mbed_official	76:aeb1df146756	2982	void TIM_SelectSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_SlaveMode)
mbed_official	76:aeb1df146756	2983	{
mbed_official	76:aeb1df146756	2984	/* Check the parameters */
mbed_official	76:aeb1df146756	2985	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	2986	assert_param(IS_TIM_SLAVE_MODE(TIM_SlaveMode));
mbed_official	76:aeb1df146756	2987
mbed_official	76:aeb1df146756	2988	/* Reset the SMS Bits */
mbed_official	76:aeb1df146756	2989	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_SMS);
mbed_official	76:aeb1df146756	2990	/* Select the Slave Mode */
mbed_official	76:aeb1df146756	2991	TIMx->SMCR \|= TIM_SlaveMode;
mbed_official	76:aeb1df146756	2992	}
mbed_official	76:aeb1df146756	2993
mbed_official	76:aeb1df146756	2994	/**
mbed_official	76:aeb1df146756	2995	* @brief Sets or Resets the TIMx Master/Slave Mode.
mbed_official	76:aeb1df146756	2996	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	2997	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	2998	* @param TIM_MasterSlaveMode: specifies the Timer Master Slave Mode.
mbed_official	76:aeb1df146756	2999	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3000	* @arg TIM_MasterSlaveMode_Enable: synchronization between the current timer
mbed_official	76:aeb1df146756	3001	* and its slaves (through TRGO).
mbed_official	76:aeb1df146756	3002	* @arg TIM_MasterSlaveMode_Disable: No action
mbed_official	76:aeb1df146756	3003	* @retval None
mbed_official	76:aeb1df146756	3004	*/
mbed_official	76:aeb1df146756	3005	void TIM_SelectMasterSlaveMode(TIM_TypeDef* TIMx, uint16_t TIM_MasterSlaveMode)
mbed_official	76:aeb1df146756	3006	{
mbed_official	76:aeb1df146756	3007	/* Check the parameters */
mbed_official	76:aeb1df146756	3008	assert_param(IS_TIM_LIST6_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3009	assert_param(IS_TIM_MSM_STATE(TIM_MasterSlaveMode));
mbed_official	76:aeb1df146756	3010
mbed_official	76:aeb1df146756	3011	/* Reset the MSM Bit */
mbed_official	76:aeb1df146756	3012	TIMx->SMCR &= (uint16_t)~((uint16_t)TIM_SMCR_MSM);
mbed_official	76:aeb1df146756	3013
mbed_official	76:aeb1df146756	3014	/* Set or Reset the MSM Bit */
mbed_official	76:aeb1df146756	3015	TIMx->SMCR \|= TIM_MasterSlaveMode;
mbed_official	76:aeb1df146756	3016	}
mbed_official	76:aeb1df146756	3017
mbed_official	76:aeb1df146756	3018	/**
mbed_official	76:aeb1df146756	3019	* @brief Configures the TIMx External Trigger (ETR).
mbed_official	76:aeb1df146756	3020	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3021	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3022	* @param TIM_ExtTRGPrescaler: The external Trigger Prescaler.
mbed_official	76:aeb1df146756	3023	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3024	* @arg TIM_ExtTRGPSC_OFF: ETRP Prescaler OFF.
mbed_official	76:aeb1df146756	3025	* @arg TIM_ExtTRGPSC_DIV2: ETRP frequency divided by 2.
mbed_official	76:aeb1df146756	3026	* @arg TIM_ExtTRGPSC_DIV4: ETRP frequency divided by 4.
mbed_official	76:aeb1df146756	3027	* @arg TIM_ExtTRGPSC_DIV8: ETRP frequency divided by 8.
mbed_official	76:aeb1df146756	3028	* @param TIM_ExtTRGPolarity: The external Trigger Polarity.
mbed_official	76:aeb1df146756	3029	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3030	* @arg TIM_ExtTRGPolarity_Inverted: active low or falling edge active.
mbed_official	76:aeb1df146756	3031	* @arg TIM_ExtTRGPolarity_NonInverted: active high or rising edge active.
mbed_official	76:aeb1df146756	3032	* @param ExtTRGFilter: External Trigger Filter.
mbed_official	76:aeb1df146756	3033	* This parameter must be a value between 0x00 and 0x0F
mbed_official	76:aeb1df146756	3034	* @retval None
mbed_official	76:aeb1df146756	3035	*/
mbed_official	76:aeb1df146756	3036	void TIM_ETRConfig(TIM_TypeDef* TIMx, uint16_t TIM_ExtTRGPrescaler, uint16_t TIM_ExtTRGPolarity,
mbed_official	76:aeb1df146756	3037	uint16_t ExtTRGFilter)
mbed_official	76:aeb1df146756	3038	{
mbed_official	76:aeb1df146756	3039	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	3040
mbed_official	76:aeb1df146756	3041	/* Check the parameters */
mbed_official	76:aeb1df146756	3042	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3043	assert_param(IS_TIM_EXT_PRESCALER(TIM_ExtTRGPrescaler));
mbed_official	76:aeb1df146756	3044	assert_param(IS_TIM_EXT_POLARITY(TIM_ExtTRGPolarity));
mbed_official	76:aeb1df146756	3045	assert_param(IS_TIM_EXT_FILTER(ExtTRGFilter));
mbed_official	76:aeb1df146756	3046
mbed_official	76:aeb1df146756	3047	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	3048	/* Reset the ETR Bits */
mbed_official	76:aeb1df146756	3049	tmpsmcr &= SMCR_ETR_MASK;
mbed_official	76:aeb1df146756	3050	/* Set the Prescaler, the Filter value and the Polarity */
mbed_official	76:aeb1df146756	3051	tmpsmcr \|= (uint16_t)(TIM_ExtTRGPrescaler \| (uint16_t)(TIM_ExtTRGPolarity \| (uint16_t)(ExtTRGFilter << (uint16_t)8)));
mbed_official	76:aeb1df146756	3052	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	3053	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	3054	}
mbed_official	76:aeb1df146756	3055
mbed_official	76:aeb1df146756	3056	/**
mbed_official	76:aeb1df146756	3057	* @}
mbed_official	76:aeb1df146756	3058	*/
mbed_official	76:aeb1df146756	3059
mbed_official	76:aeb1df146756	3060	/** @defgroup TIM_Group8 Specific interface management functions
mbed_official	76:aeb1df146756	3061	* @brief Specific interface management functions
mbed_official	76:aeb1df146756	3062	*
mbed_official	76:aeb1df146756	3063	@verbatim
mbed_official	76:aeb1df146756	3064	===============================================================================
mbed_official	76:aeb1df146756	3065	##### Specific interface management functions #####
mbed_official	76:aeb1df146756	3066	===============================================================================
mbed_official	76:aeb1df146756	3067
mbed_official	76:aeb1df146756	3068	@endverbatim
mbed_official	76:aeb1df146756	3069	* @{
mbed_official	76:aeb1df146756	3070	*/
mbed_official	76:aeb1df146756	3071
mbed_official	76:aeb1df146756	3072	/**
mbed_official	76:aeb1df146756	3073	* @brief Configures the TIMx Encoder Interface.
mbed_official	76:aeb1df146756	3074	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3075	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3076	* @param TIM_EncoderMode: specifies the TIMx Encoder Mode.
mbed_official	76:aeb1df146756	3077	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3078	* @arg TIM_EncoderMode_TI1: Counter counts on TI1FP1 edge depending on TI2FP2 level.
mbed_official	76:aeb1df146756	3079	* @arg TIM_EncoderMode_TI2: Counter counts on TI2FP2 edge depending on TI1FP1 level.
mbed_official	76:aeb1df146756	3080	* @arg TIM_EncoderMode_TI12: Counter counts on both TI1FP1 and TI2FP2 edges depending
mbed_official	76:aeb1df146756	3081	* on the level of the other input.
mbed_official	76:aeb1df146756	3082	* @param TIM_IC1Polarity: specifies the IC1 Polarity
mbed_official	76:aeb1df146756	3083	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	3084	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	3085	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	3086	* @param TIM_IC2Polarity: specifies the IC2 Polarity
mbed_official	76:aeb1df146756	3087	* This parmeter can be one of the following values:
mbed_official	76:aeb1df146756	3088	* @arg TIM_ICPolarity_Falling: IC Falling edge.
mbed_official	76:aeb1df146756	3089	* @arg TIM_ICPolarity_Rising: IC Rising edge.
mbed_official	76:aeb1df146756	3090	* @retval None
mbed_official	76:aeb1df146756	3091	*/
mbed_official	76:aeb1df146756	3092	void TIM_EncoderInterfaceConfig(TIM_TypeDef* TIMx, uint16_t TIM_EncoderMode,
mbed_official	76:aeb1df146756	3093	uint16_t TIM_IC1Polarity, uint16_t TIM_IC2Polarity)
mbed_official	76:aeb1df146756	3094	{
mbed_official	76:aeb1df146756	3095	uint16_t tmpsmcr = 0;
mbed_official	76:aeb1df146756	3096	uint16_t tmpccmr1 = 0;
mbed_official	76:aeb1df146756	3097	uint16_t tmpccer = 0;
mbed_official	76:aeb1df146756	3098
mbed_official	76:aeb1df146756	3099	/* Check the parameters */
mbed_official	76:aeb1df146756	3100	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3101	assert_param(IS_TIM_ENCODER_MODE(TIM_EncoderMode));
mbed_official	76:aeb1df146756	3102	assert_param(IS_TIM_IC_POLARITY(TIM_IC1Polarity));
mbed_official	76:aeb1df146756	3103	assert_param(IS_TIM_IC_POLARITY(TIM_IC2Polarity));
mbed_official	76:aeb1df146756	3104
mbed_official	76:aeb1df146756	3105	/* Get the TIMx SMCR register value */
mbed_official	76:aeb1df146756	3106	tmpsmcr = TIMx->SMCR;
mbed_official	76:aeb1df146756	3107	/* Get the TIMx CCMR1 register value */
mbed_official	76:aeb1df146756	3108	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	3109	/* Get the TIMx CCER register value */
mbed_official	76:aeb1df146756	3110	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3111	/* Set the encoder Mode */
mbed_official	76:aeb1df146756	3112	tmpsmcr &= (uint16_t)(~((uint16_t)TIM_SMCR_SMS));
mbed_official	76:aeb1df146756	3113	tmpsmcr \|= TIM_EncoderMode;
mbed_official	76:aeb1df146756	3114	/* Select the Capture Compare 1 and the Capture Compare 2 as input */
mbed_official	76:aeb1df146756	3115	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & (uint16_t)(~((uint16_t)TIM_CCMR1_CC2S)));
mbed_official	76:aeb1df146756	3116	tmpccmr1 \|= TIM_CCMR1_CC1S_0 \| TIM_CCMR1_CC2S_0;
mbed_official	76:aeb1df146756	3117	/* Set the TI1 and the TI2 Polarities */
mbed_official	76:aeb1df146756	3118	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P \| TIM_CCER_CC1NP)) & (uint16_t)~((uint16_t)(TIM_CCER_CC2P \| TIM_CCER_CC2NP));
mbed_official	76:aeb1df146756	3119	tmpccer \|= (uint16_t)(TIM_IC1Polarity \| (uint16_t)(TIM_IC2Polarity << (uint16_t)4));
mbed_official	76:aeb1df146756	3120	/* Write to TIMx SMCR */
mbed_official	76:aeb1df146756	3121	TIMx->SMCR = tmpsmcr;
mbed_official	76:aeb1df146756	3122	/* Write to TIMx CCMR1 */
mbed_official	76:aeb1df146756	3123	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	3124	/* Write to TIMx CCER */
mbed_official	76:aeb1df146756	3125	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3126	}
mbed_official	76:aeb1df146756	3127
mbed_official	76:aeb1df146756	3128	/**
mbed_official	76:aeb1df146756	3129	* @brief Enables or disables the TIMx's Hall sensor interface.
mbed_official	76:aeb1df146756	3130	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3131	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3132	* @param NewState: new state of the TIMx Hall sensor interface.
mbed_official	76:aeb1df146756	3133	* This parameter can be: ENABLE or DISABLE.
mbed_official	76:aeb1df146756	3134	* @retval None
mbed_official	76:aeb1df146756	3135	*/
mbed_official	76:aeb1df146756	3136	void TIM_SelectHallSensor(TIM_TypeDef* TIMx, FunctionalState NewState)
mbed_official	76:aeb1df146756	3137	{
mbed_official	76:aeb1df146756	3138	/* Check the parameters */
mbed_official	76:aeb1df146756	3139	assert_param(IS_TIM_LIST3_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3140	assert_param(IS_FUNCTIONAL_STATE(NewState));
mbed_official	76:aeb1df146756	3141
mbed_official	76:aeb1df146756	3142	if (NewState != DISABLE)
mbed_official	76:aeb1df146756	3143	{
mbed_official	76:aeb1df146756	3144	/* Set the TI1S Bit */
mbed_official	76:aeb1df146756	3145	TIMx->CR2 \|= TIM_CR2_TI1S;
mbed_official	76:aeb1df146756	3146	}
mbed_official	76:aeb1df146756	3147	else
mbed_official	76:aeb1df146756	3148	{
mbed_official	76:aeb1df146756	3149	/* Reset the TI1S Bit */
mbed_official	76:aeb1df146756	3150	TIMx->CR2 &= (uint16_t)~((uint16_t)TIM_CR2_TI1S);
mbed_official	76:aeb1df146756	3151	}
mbed_official	76:aeb1df146756	3152	}
mbed_official	76:aeb1df146756	3153
mbed_official	76:aeb1df146756	3154	/**
mbed_official	76:aeb1df146756	3155	* @}
mbed_official	76:aeb1df146756	3156	*/
mbed_official	76:aeb1df146756	3157
mbed_official	76:aeb1df146756	3158	/** @defgroup TIM_Group9 Specific remapping management function
mbed_official	76:aeb1df146756	3159	* @brief Specific remapping management function
mbed_official	76:aeb1df146756	3160	*
mbed_official	76:aeb1df146756	3161	@verbatim
mbed_official	76:aeb1df146756	3162	===============================================================================
mbed_official	76:aeb1df146756	3163	##### Specific remapping management function #####
mbed_official	76:aeb1df146756	3164	===============================================================================
mbed_official	76:aeb1df146756	3165
mbed_official	76:aeb1df146756	3166	@endverbatim
mbed_official	76:aeb1df146756	3167	* @{
mbed_official	76:aeb1df146756	3168	*/
mbed_official	76:aeb1df146756	3169	/**
mbed_official	76:aeb1df146756	3170	* @brief Configures the TIM14 Remapping input Capabilities.
mbed_official	76:aeb1df146756	3171	* @param TIMx: where x can be 14 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3172	* @param TIM_Remap: specifies the TIM input reampping source.
mbed_official	76:aeb1df146756	3173	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3174	* @arg TIM14_GPIO: TIM14 Channel 1 is connected to GPIO.
mbed_official	76:aeb1df146756	3175	* @arg TIM14_RTC_CLK: TIM14 Channel 1 is connected to RTC input clock.
mbed_official	76:aeb1df146756	3176	* RTC input clock can be LSE, LSI or HSE/div128.
mbed_official	76:aeb1df146756	3177	* @arg TIM14_HSE_DIV32: TIM14 Channel 1 is connected to HSE/32 clock.
mbed_official	76:aeb1df146756	3178	* @arg TIM14_MCO: TIM14 Channel 1 is connected to MCO clock.
mbed_official	76:aeb1df146756	3179	* MCO clock can be HSI14, SYSCLK, HSI, HSE or PLL/2.
mbed_official	76:aeb1df146756	3180	* @retval None
mbed_official	76:aeb1df146756	3181	*/
mbed_official	76:aeb1df146756	3182	void TIM_RemapConfig(TIM_TypeDef* TIMx, uint16_t TIM_Remap)
mbed_official	76:aeb1df146756	3183	{
mbed_official	76:aeb1df146756	3184	/* Check the parameters */
mbed_official	76:aeb1df146756	3185	assert_param(IS_TIM_LIST11_PERIPH(TIMx));
mbed_official	76:aeb1df146756	3186	assert_param(IS_TIM_REMAP(TIM_Remap));
mbed_official	76:aeb1df146756	3187
mbed_official	76:aeb1df146756	3188	/* Set the Timer remapping configuration */
mbed_official	76:aeb1df146756	3189	TIMx->OR = TIM_Remap;
mbed_official	76:aeb1df146756	3190	}
mbed_official	76:aeb1df146756	3191
mbed_official	76:aeb1df146756	3192	/**
mbed_official	76:aeb1df146756	3193	* @}
mbed_official	76:aeb1df146756	3194	*/
mbed_official	76:aeb1df146756	3195
mbed_official	76:aeb1df146756	3196	/**
mbed_official	76:aeb1df146756	3197	* @brief Configure the TI1 as Input.
mbed_official	76:aeb1df146756	3198	* @param TIMx: where x can be 1, 2, 3, 14, 15, 16 or 17 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3199	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3200	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3201	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3202	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3203	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3204	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3205	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3206	* @arg TIM_ICSelection_DirectTI: TIM Input 1 is selected to be connected to IC1.
mbed_official	76:aeb1df146756	3207	* @arg TIM_ICSelection_IndirectTI: TIM Input 1 is selected to be connected to IC2.
mbed_official	76:aeb1df146756	3208	* @arg TIM_ICSelection_TRC: TIM Input 1 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3209	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3210	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3211	* @retval None
mbed_official	76:aeb1df146756	3212	*/
mbed_official	76:aeb1df146756	3213	static void TI1_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3214	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3215	{
mbed_official	76:aeb1df146756	3216	uint16_t tmpccmr1 = 0, tmpccer = 0;
mbed_official	76:aeb1df146756	3217	/* Disable the Channel 1: Reset the CC1E Bit */
mbed_official	76:aeb1df146756	3218	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	3219	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	3220	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3221	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3222	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC1S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC1F)));
mbed_official	76:aeb1df146756	3223	tmpccmr1 \|= (uint16_t)(TIM_ICSelection \| (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official	76:aeb1df146756	3224
mbed_official	76:aeb1df146756	3225	/* Select the Polarity and set the CC1E Bit */
mbed_official	76:aeb1df146756	3226	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC1P \| TIM_CCER_CC1NP));
mbed_official	76:aeb1df146756	3227	tmpccer \|= (uint16_t)(TIM_ICPolarity \| (uint16_t)TIM_CCER_CC1E);
mbed_official	76:aeb1df146756	3228	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	76:aeb1df146756	3229	TIMx->CCMR1 = tmpccmr1;
mbed_official	76:aeb1df146756	3230	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3231	}
mbed_official	76:aeb1df146756	3232
mbed_official	76:aeb1df146756	3233	/**
mbed_official	76:aeb1df146756	3234	* @brief Configure the TI2 as Input.
mbed_official	76:aeb1df146756	3235	* @param TIMx: where x can be 1, 2, 3, or 15 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3236	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3237	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3238	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3239	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3240	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3241	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3242	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3243	* @arg TIM_ICSelection_DirectTI: TIM Input 2 is selected to be connected to IC2.
mbed_official	76:aeb1df146756	3244	* @arg TIM_ICSelection_IndirectTI: TIM Input 2 is selected to be connected to IC1.
mbed_official	76:aeb1df146756	3245	* @arg TIM_ICSelection_TRC: TIM Input 2 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3246	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3247	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3248	* @retval None
mbed_official	76:aeb1df146756	3249	*/
mbed_official	76:aeb1df146756	3250	static void TI2_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3251	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3252	{
mbed_official	76:aeb1df146756	3253	uint16_t tmpccmr1 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	3254	/* Disable the Channel 2: Reset the CC2E Bit */
mbed_official	76:aeb1df146756	3255	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC2E);
mbed_official	76:aeb1df146756	3256	tmpccmr1 = TIMx->CCMR1;
mbed_official	76:aeb1df146756	3257	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3258	tmp = (uint16_t)(TIM_ICPolarity << 4);
mbed_official	76:aeb1df146756	3259	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3260	tmpccmr1 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR1_CC2S)) & ((uint16_t)~((uint16_t)TIM_CCMR1_IC2F)));
mbed_official	76:aeb1df146756	3261	tmpccmr1 \|= (uint16_t)(TIM_ICFilter << 12);
mbed_official	76:aeb1df146756	3262	tmpccmr1 \|= (uint16_t)(TIM_ICSelection << 8);
mbed_official	76:aeb1df146756	3263	/* Select the Polarity and set the CC2E Bit */
mbed_official	76:aeb1df146756	3264	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC2P \| TIM_CCER_CC2NP));
mbed_official	76:aeb1df146756	3265	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC2E);
mbed_official	76:aeb1df146756	3266	/* Write to TIMx CCMR1 and CCER registers */
mbed_official	76:aeb1df146756	3267	TIMx->CCMR1 = tmpccmr1 ;
mbed_official	76:aeb1df146756	3268	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3269	}
mbed_official	76:aeb1df146756	3270
mbed_official	76:aeb1df146756	3271	/**
mbed_official	76:aeb1df146756	3272	* @brief Configure the TI3 as Input.
mbed_official	76:aeb1df146756	3273	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3274	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3275	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3276	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3277	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3278	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3279	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3280	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3281	* @arg TIM_ICSelection_DirectTI: TIM Input 3 is selected to be connected to IC3.
mbed_official	76:aeb1df146756	3282	* @arg TIM_ICSelection_IndirectTI: TIM Input 3 is selected to be connected to IC4.
mbed_official	76:aeb1df146756	3283	* @arg TIM_ICSelection_TRC: TIM Input 3 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3284	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3285	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3286	* @retval None
mbed_official	76:aeb1df146756	3287	*/
mbed_official	76:aeb1df146756	3288	static void TI3_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3289	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3290	{
mbed_official	76:aeb1df146756	3291	uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	3292	/* Disable the Channel 3: Reset the CC3E Bit */
mbed_official	76:aeb1df146756	3293	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC3E);
mbed_official	76:aeb1df146756	3294	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	3295	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3296	tmp = (uint16_t)(TIM_ICPolarity << 8);
mbed_official	76:aeb1df146756	3297	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3298	tmpccmr2 &= (uint16_t)(((uint16_t)~((uint16_t)TIM_CCMR2_CC3S)) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC3F)));
mbed_official	76:aeb1df146756	3299	tmpccmr2 \|= (uint16_t)(TIM_ICSelection \| (uint16_t)(TIM_ICFilter << (uint16_t)4));
mbed_official	76:aeb1df146756	3300	/* Select the Polarity and set the CC3E Bit */
mbed_official	76:aeb1df146756	3301	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC3P \| TIM_CCER_CC3NP));
mbed_official	76:aeb1df146756	3302	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC3E);
mbed_official	76:aeb1df146756	3303	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	76:aeb1df146756	3304	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	3305	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3306	}
mbed_official	76:aeb1df146756	3307
mbed_official	76:aeb1df146756	3308	/**
mbed_official	76:aeb1df146756	3309	* @brief Configure the TI4 as Input.
mbed_official	76:aeb1df146756	3310	* @param TIMx: where x can be 1, 2 or 3 to select the TIM peripheral.
mbed_official	76:aeb1df146756	3311	* @note TIM2 is not applicable for STM32F030 devices.
mbed_official	76:aeb1df146756	3312	* @param TIM_ICPolarity: The Input Polarity.
mbed_official	76:aeb1df146756	3313	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3314	* @arg TIM_ICPolarity_Rising
mbed_official	76:aeb1df146756	3315	* @arg TIM_ICPolarity_Falling
mbed_official	76:aeb1df146756	3316	* @param TIM_ICSelection: specifies the input to be used.
mbed_official	76:aeb1df146756	3317	* This parameter can be one of the following values:
mbed_official	76:aeb1df146756	3318	* @arg TIM_ICSelection_DirectTI: TIM Input 4 is selected to be connected to IC4.
mbed_official	76:aeb1df146756	3319	* @arg TIM_ICSelection_IndirectTI: TIM Input 4 is selected to be connected to IC3.
mbed_official	76:aeb1df146756	3320	* @arg TIM_ICSelection_TRC: TIM Input 4 is selected to be connected to TRC.
mbed_official	76:aeb1df146756	3321	* @param TIM_ICFilter: Specifies the Input Capture Filter.
mbed_official	76:aeb1df146756	3322	* This parameter must be a value between 0x00 and 0x0F.
mbed_official	76:aeb1df146756	3323	* @retval None
mbed_official	76:aeb1df146756	3324	*/
mbed_official	76:aeb1df146756	3325	static void TI4_Config(TIM_TypeDef* TIMx, uint16_t TIM_ICPolarity, uint16_t TIM_ICSelection,
mbed_official	76:aeb1df146756	3326	uint16_t TIM_ICFilter)
mbed_official	76:aeb1df146756	3327	{
mbed_official	76:aeb1df146756	3328	uint16_t tmpccmr2 = 0, tmpccer = 0, tmp = 0;
mbed_official	76:aeb1df146756	3329
mbed_official	76:aeb1df146756	3330	/* Disable the Channel 4: Reset the CC4E Bit */
mbed_official	76:aeb1df146756	3331	TIMx->CCER &= (uint16_t)~((uint16_t)TIM_CCER_CC4E);
mbed_official	76:aeb1df146756	3332	tmpccmr2 = TIMx->CCMR2;
mbed_official	76:aeb1df146756	3333	tmpccer = TIMx->CCER;
mbed_official	76:aeb1df146756	3334	tmp = (uint16_t)(TIM_ICPolarity << 12);
mbed_official	76:aeb1df146756	3335	/* Select the Input and set the filter */
mbed_official	76:aeb1df146756	3336	tmpccmr2 &= (uint16_t)((uint16_t)(~(uint16_t)TIM_CCMR2_CC4S) & ((uint16_t)~((uint16_t)TIM_CCMR2_IC4F)));
mbed_official	76:aeb1df146756	3337	tmpccmr2 \|= (uint16_t)(TIM_ICSelection << 8);
mbed_official	76:aeb1df146756	3338	tmpccmr2 \|= (uint16_t)(TIM_ICFilter << 12);
mbed_official	76:aeb1df146756	3339	/* Select the Polarity and set the CC4E Bit */
mbed_official	76:aeb1df146756	3340	tmpccer &= (uint16_t)~((uint16_t)(TIM_CCER_CC4P \| TIM_CCER_CC4NP));
mbed_official	76:aeb1df146756	3341	tmpccer \|= (uint16_t)(tmp \| (uint16_t)TIM_CCER_CC4E);
mbed_official	76:aeb1df146756	3342	/* Write to TIMx CCMR2 and CCER registers */
mbed_official	76:aeb1df146756	3343	TIMx->CCMR2 = tmpccmr2;
mbed_official	76:aeb1df146756	3344	TIMx->CCER = tmpccer;
mbed_official	76:aeb1df146756	3345	}
mbed_official	76:aeb1df146756	3346
mbed_official	76:aeb1df146756	3347	/**
mbed_official	76:aeb1df146756	3348	* @}
mbed_official	76:aeb1df146756	3349	*/
mbed_official	76:aeb1df146756	3350
mbed_official	76:aeb1df146756	3351	/**
mbed_official	76:aeb1df146756	3352	* @}
mbed_official	76:aeb1df146756	3353	*/
mbed_official	76:aeb1df146756	3354
mbed_official	76:aeb1df146756	3355	/**
mbed_official	76:aeb1df146756	3356	* @}
mbed_official	76:aeb1df146756	3357	*/
mbed_official	76:aeb1df146756	3358
mbed_official	76:aeb1df146756	3359	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/

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Type:	Library
Created:	08 Mar 2014
Imports:	301
Forks:	0
Commits:	115
Dependents:	0
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targets/cmsis/TARGET_STM/TARGET_NUCLEO_F030R8/stm32f0xx_tim.c@106:ced8cbb51063, 2014-02-26 (annotated)

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