Peter Drescher / SPI_TFT

Library to control a QVGA TFT connected to SPI. You can use printf to print text The lib can handle different fonts, draw lines, circles, rect and bmp

Dependents:   TFT_Test1 SourceCodePro31-SB Mandelbrot Mindwave-screen ... more

See http://mbed.org/cookbook/SPI-driven-QVGA-TFT for details.

SPI_TFT.cpp@14:ea3206e8e3bd, 2013-03-05 (annotated)

Committer:
dreschpe
Date:
Tue Mar 05 21:48:14 2013 +0000
Revision:
14:ea3206e8e3bd
Parent:
13:2c91cb947161
Child:
15:f5772cffc2b2
Add Freescale KL25Z support.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
dreschpe 8:65a4de035c3c 1 /* mbed library for 240*320 pixel display TFT based on HX8347D LCD Controller
dreschpe 8:65a4de035c3c 2 * Copyright (c) 2011 Peter Drescher - DC2PD
dreschpe 8:65a4de035c3c 3 *
dreschpe 8:65a4de035c3c 4 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
dreschpe 8:65a4de035c3c 5 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
dreschpe 8:65a4de035c3c 6 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
dreschpe 8:65a4de035c3c 7 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
dreschpe 8:65a4de035c3c 8 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
dreschpe 8:65a4de035c3c 9 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
dreschpe 8:65a4de035c3c 10 * THE SOFTWARE.
dreschpe 8:65a4de035c3c 11 */
dreschpe 8:65a4de035c3c 12
dreschpe 8:65a4de035c3c 13
dreschpe 8:65a4de035c3c 14 // fix bmp padding for Bitmap function
dreschpe 8:65a4de035c3c 15 // speed up pixel
dreschpe 8:65a4de035c3c 16 // 30.12.11 fix cls
dreschpe 8:65a4de035c3c 17 // 11.03.12 use DMA to speed up
dreschpe 8:65a4de035c3c 18 // 15.03.12 use SSEL for TFT CS to enable DMA Register writes
dreschpe 8:65a4de035c3c 19 // 06.04.12 fix SSEL CS problem
dreschpe 8:65a4de035c3c 20 // 06.04.12 use direct access to the spi register to speed up the library.
dreschpe 8:65a4de035c3c 21 // 11.09.12 switch back to using io pin as cs to avoid problems with SSEL CS.
dreschpe 13:2c91cb947161 22 // 21.09.12 fix Bug in BMP_16
dreschpe 8:65a4de035c3c 23 // 11.10.12 patch from Hans Bergles to get SPI1 working again
dreschpe 8:65a4de035c3c 24 // 03.02.13 add a switch to switch off DMA use for LPC11U24
dreschpe 13:2c91cb947161 25 // 04.03.13 add support for new Kinetis board
dreschpe 8:65a4de035c3c 26
dreschpe 8:65a4de035c3c 27 #include "SPI_TFT.h"
dreschpe 8:65a4de035c3c 28 #include "mbed.h"
dreschpe 8:65a4de035c3c 29
dreschpe 8:65a4de035c3c 30 #define BPP 16 // Bits per pixel
dreschpe 13:2c91cb947161 31
dreschpe 13:2c91cb947161 32 #if defined TARGET_LPC1768
dreschpe 14:ea3206e8e3bd 33 #define USE_DMA // we use dma to speed up
dreschpe 14:ea3206e8e3bd 34 #define NO_MBED_LIB // we write direct to the SPI register to speed up
dreschpe 8:65a4de035c3c 35 #endif
dreschpe 8:65a4de035c3c 36
dreschpe 13:2c91cb947161 37 #if defined NO_DMA // if LPC1768 user want no DMA
dreschpe 8:65a4de035c3c 38 #undef USE_DMA
dreschpe 8:65a4de035c3c 39 #endif
dreschpe 13:2c91cb947161 40
dreschpe 8:65a4de035c3c 41
dreschpe 8:65a4de035c3c 42 //extern Serial pc;
dreschpe 8:65a4de035c3c 43 //extern DigitalOut xx; // debug !!
dreschpe 8:65a4de035c3c 44
dreschpe 8:65a4de035c3c 45 SPI_TFT::SPI_TFT(PinName mosi, PinName miso, PinName sclk, PinName cs, PinName reset, const char *name)
dreschpe 8:65a4de035c3c 46 : _spi(mosi, miso, sclk), _cs(cs), _reset(reset),GraphicsDisplay(name)
dreschpe 8:65a4de035c3c 47 {
dreschpe 8:65a4de035c3c 48 orientation = 0;
dreschpe 8:65a4de035c3c 49 char_x = 0;
dreschpe 14:ea3206e8e3bd 50 #if defined TARGET_LPC1768
dreschpe 14:ea3206e8e3bd 51 if (mosi == p11 || mosi == P0_18){
dreschpe 14:ea3206e8e3bd 52 spi_port = 0; // we must know the used SPI port to setup the DMA
dreschpe 14:ea3206e8e3bd 53 fprintf(stderr, "spi_port 0 \n\r");
dreschpe 14:ea3206e8e3bd 54 }
dreschpe 14:ea3206e8e3bd 55 else {
dreschpe 14:ea3206e8e3bd 56 spi_port = 1;
dreschpe 14:ea3206e8e3bd 57 fprintf(stderr, "spi_port 1 \n\r");
dreschpe 14:ea3206e8e3bd 58 }
dreschpe 14:ea3206e8e3bd 59 #endif
dreschpe 8:65a4de035c3c 60 tft_reset();
dreschpe 8:65a4de035c3c 61 }
dreschpe 8:65a4de035c3c 62
dreschpe 8:65a4de035c3c 63 int SPI_TFT::width()
dreschpe 8:65a4de035c3c 64 {
dreschpe 8:65a4de035c3c 65 if (orientation == 0 || orientation == 2) return 240;
dreschpe 8:65a4de035c3c 66 else return 320;
dreschpe 8:65a4de035c3c 67 }
dreschpe 8:65a4de035c3c 68
dreschpe 8:65a4de035c3c 69
dreschpe 8:65a4de035c3c 70 int SPI_TFT::height()
dreschpe 8:65a4de035c3c 71 {
dreschpe 8:65a4de035c3c 72 if (orientation == 0 || orientation == 2) return 320;
dreschpe 8:65a4de035c3c 73 else return 240;
dreschpe 8:65a4de035c3c 74 }
dreschpe 8:65a4de035c3c 75
dreschpe 8:65a4de035c3c 76
dreschpe 8:65a4de035c3c 77 void SPI_TFT::set_orientation(unsigned int o)
dreschpe 8:65a4de035c3c 78 {
dreschpe 8:65a4de035c3c 79 orientation = o;
dreschpe 8:65a4de035c3c 80 switch (orientation) {
dreschpe 8:65a4de035c3c 81 case 0:
dreschpe 8:65a4de035c3c 82 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 83 break;
dreschpe 8:65a4de035c3c 84 case 1:
dreschpe 8:65a4de035c3c 85 wr_reg(0x16, 0x68);
dreschpe 8:65a4de035c3c 86 break;
dreschpe 8:65a4de035c3c 87 case 2:
dreschpe 8:65a4de035c3c 88 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 89 break;
dreschpe 8:65a4de035c3c 90 case 3:
dreschpe 8:65a4de035c3c 91 wr_reg(0x16, 0xA8);
dreschpe 8:65a4de035c3c 92 break;
dreschpe 8:65a4de035c3c 93 }
dreschpe 8:65a4de035c3c 94 WindowMax();
dreschpe 8:65a4de035c3c 95 }
dreschpe 8:65a4de035c3c 96
dreschpe 8:65a4de035c3c 97
dreschpe 8:65a4de035c3c 98 // write command to tft register
dreschpe 8:65a4de035c3c 99
dreschpe 8:65a4de035c3c 100 void SPI_TFT::wr_cmd(unsigned char cmd)
dreschpe 8:65a4de035c3c 101 {
dreschpe 8:65a4de035c3c 102 _cs = 0;
dreschpe 14:ea3206e8e3bd 103 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 104 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 105 spi_d = 0x7000 | cmd ;
dreschpe 14:ea3206e8e3bd 106 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 107 LPC_SSP0->DR = spi_d;
dreschpe 14:ea3206e8e3bd 108 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 109 do {
dreschpe 14:ea3206e8e3bd 110 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 111 } else {
dreschpe 14:ea3206e8e3bd 112 LPC_SSP1->DR = spi_d;
dreschpe 14:ea3206e8e3bd 113 do {
dreschpe 14:ea3206e8e3bd 114 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 115 }
dreschpe 14:ea3206e8e3bd 116 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 117 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 118 _spi.write(0x70);
dreschpe 14:ea3206e8e3bd 119 _spi.write(cmd);
dreschpe 14:ea3206e8e3bd 120 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 121 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 122 spi_d = 0x7000 | cmd ;
dreschpe 14:ea3206e8e3bd 123 _spi.write(spi_d); // mbed lib
dreschpe 14:ea3206e8e3bd 124 #endif
dreschpe 14:ea3206e8e3bd 125 #endif
dreschpe 8:65a4de035c3c 126 _cs = 1;
dreschpe 8:65a4de035c3c 127 }
dreschpe 8:65a4de035c3c 128
dreschpe 8:65a4de035c3c 129
dreschpe 13:2c91cb947161 130 // write data to tft register
dreschpe 8:65a4de035c3c 131 void SPI_TFT::wr_dat(unsigned char dat)
dreschpe 8:65a4de035c3c 132 {
dreschpe 14:ea3206e8e3bd 133 _cs = 0;
dreschpe 14:ea3206e8e3bd 134 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 135 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 136 spi_d = 0x7200 | dat;
dreschpe 14:ea3206e8e3bd 137 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 138 LPC_SSP0->DR = spi_d;
dreschpe 14:ea3206e8e3bd 139 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 140 do {
dreschpe 14:ea3206e8e3bd 141 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 142 } else {
dreschpe 14:ea3206e8e3bd 143 LPC_SSP1->DR = spi_d;
dreschpe 14:ea3206e8e3bd 144 do {
dreschpe 14:ea3206e8e3bd 145 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 146 }
dreschpe 14:ea3206e8e3bd 147 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 148 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 149 _spi.write(0x72);
dreschpe 14:ea3206e8e3bd 150 _spi.write(dat);
dreschpe 14:ea3206e8e3bd 151 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 152 unsigned short spi_d;
dreschpe 14:ea3206e8e3bd 153 spi_d = 0x7200 | dat;
dreschpe 14:ea3206e8e3bd 154 _spi.write(spi_d);
dreschpe 14:ea3206e8e3bd 155 #endif
dreschpe 14:ea3206e8e3bd 156 #endif
dreschpe 8:65a4de035c3c 157 _cs = 1;
dreschpe 8:65a4de035c3c 158 }
dreschpe 8:65a4de035c3c 159
dreschpe 8:65a4de035c3c 160
dreschpe 8:65a4de035c3c 161
dreschpe 8:65a4de035c3c 162 // the HX8347-D controller do not use the MISO (SDO) Signal.
dreschpe 8:65a4de035c3c 163 // This is a bug - ?
dreschpe 14:ea3206e8e3bd 164 // A read will return 0 at the moment
dreschpe 8:65a4de035c3c 165
dreschpe 8:65a4de035c3c 166 unsigned short SPI_TFT::rd_dat (void)
dreschpe 8:65a4de035c3c 167 {
dreschpe 8:65a4de035c3c 168 unsigned short val = 0;
dreschpe 8:65a4de035c3c 169
dreschpe 8:65a4de035c3c 170 //val = _spi.write(0x73ff); /* Dummy read 1 */
dreschpe 8:65a4de035c3c 171 //val = _spi.write(0x0000); /* Read D8..D15 */
dreschpe 8:65a4de035c3c 172 return (val);
dreschpe 8:65a4de035c3c 173 }
dreschpe 8:65a4de035c3c 174
dreschpe 13:2c91cb947161 175 // write to a TFT register
dreschpe 8:65a4de035c3c 176 void SPI_TFT::wr_reg (unsigned char reg, unsigned char val)
dreschpe 8:65a4de035c3c 177 {
dreschpe 8:65a4de035c3c 178 wr_cmd(reg);
dreschpe 8:65a4de035c3c 179 wr_dat(val);
dreschpe 8:65a4de035c3c 180 }
dreschpe 8:65a4de035c3c 181
dreschpe 13:2c91cb947161 182 // read from a TFT register
dreschpe 8:65a4de035c3c 183 unsigned short SPI_TFT::rd_reg (unsigned char reg)
dreschpe 8:65a4de035c3c 184 {
dreschpe 8:65a4de035c3c 185 wr_cmd(reg);
dreschpe 8:65a4de035c3c 186 return(rd_dat());
dreschpe 8:65a4de035c3c 187 }
dreschpe 8:65a4de035c3c 188
dreschpe 13:2c91cb947161 189 // setup TFT controller - this is called by constructor
dreschpe 8:65a4de035c3c 190 void SPI_TFT::tft_reset()
dreschpe 8:65a4de035c3c 191 {
dreschpe 13:2c91cb947161 192 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 13:2c91cb947161 193 _spi.format(8,3);
dreschpe 14:ea3206e8e3bd 194 fprintf(stderr, "8 Bit mode\n\r");
dreschpe 13:2c91cb947161 195 #else // 16 Bit SPI
dreschpe 8:65a4de035c3c 196 _spi.format(16,3); // 16 bit spi mode 3
dreschpe 14:ea3206e8e3bd 197 fprintf(stderr, "16 Bit mode\n\r");
dreschpe 13:2c91cb947161 198 #endif
dreschpe 8:65a4de035c3c 199 _spi.frequency(48000000); // 48 Mhz SPI clock
dreschpe 8:65a4de035c3c 200 _cs = 1; // cs high
dreschpe 8:65a4de035c3c 201 _reset = 0; // display reset
dreschpe 8:65a4de035c3c 202
dreschpe 8:65a4de035c3c 203 wait_us(50);
dreschpe 8:65a4de035c3c 204 _reset = 1; // end reset
dreschpe 8:65a4de035c3c 205 wait_ms(5);
dreschpe 8:65a4de035c3c 206
dreschpe 8:65a4de035c3c 207 /* Start Initial Sequence ----------------------------------------------------*/
dreschpe 8:65a4de035c3c 208 wr_reg(0xEA, 0x00); /* Reset Power Control 1 */
dreschpe 8:65a4de035c3c 209 wr_reg(0xEB, 0x20); /* Power Control 2 */
dreschpe 8:65a4de035c3c 210 wr_reg(0xEC, 0x0C); /* Power Control 3 */
dreschpe 8:65a4de035c3c 211 wr_reg(0xED, 0xC4); /* Power Control 4 */
dreschpe 8:65a4de035c3c 212 wr_reg(0xE8, 0x40); /* Source OPON_N */
dreschpe 8:65a4de035c3c 213 wr_reg(0xE9, 0x38); /* Source OPON_I */
dreschpe 8:65a4de035c3c 214 wr_reg(0xF1, 0x01); /* */
dreschpe 8:65a4de035c3c 215 wr_reg(0xF2, 0x10); /* */
dreschpe 8:65a4de035c3c 216 wr_reg(0x27, 0xA3); /* Display Control 2 */
dreschpe 8:65a4de035c3c 217
dreschpe 8:65a4de035c3c 218 /* Power On sequence ---------------------------------------------------------*/
dreschpe 8:65a4de035c3c 219 wr_reg(0x1B, 0x1B); /* Power Control 2 */
dreschpe 8:65a4de035c3c 220 wr_reg(0x1A, 0x01); /* Power Control 1 */
dreschpe 8:65a4de035c3c 221 wr_reg(0x24, 0x2F); /* Vcom Control 2 */
dreschpe 8:65a4de035c3c 222 wr_reg(0x25, 0x57); /* Vcom Control 3 */
dreschpe 8:65a4de035c3c 223 wr_reg(0x23, 0x8D); /* Vcom Control 1 */
dreschpe 8:65a4de035c3c 224
dreschpe 8:65a4de035c3c 225 /* Gamma settings -----------------------------------------------------------*/
dreschpe 13:2c91cb947161 226 wr_reg(0x40,0x00); // default setup
dreschpe 8:65a4de035c3c 227 wr_reg(0x41,0x00); //
dreschpe 8:65a4de035c3c 228 wr_reg(0x42,0x01); //
dreschpe 8:65a4de035c3c 229 wr_reg(0x43,0x13); //
dreschpe 8:65a4de035c3c 230 wr_reg(0x44,0x10); //
dreschpe 8:65a4de035c3c 231 wr_reg(0x45,0x26); //
dreschpe 8:65a4de035c3c 232 wr_reg(0x46,0x08); //
dreschpe 8:65a4de035c3c 233 wr_reg(0x47,0x51); //
dreschpe 8:65a4de035c3c 234 wr_reg(0x48,0x02); //
dreschpe 8:65a4de035c3c 235 wr_reg(0x49,0x12); //
dreschpe 8:65a4de035c3c 236 wr_reg(0x4A,0x18); //
dreschpe 8:65a4de035c3c 237 wr_reg(0x4B,0x19); //
dreschpe 8:65a4de035c3c 238 wr_reg(0x4C,0x14); //
dreschpe 8:65a4de035c3c 239 wr_reg(0x50,0x19); //
dreschpe 8:65a4de035c3c 240 wr_reg(0x51,0x2F); //
dreschpe 8:65a4de035c3c 241 wr_reg(0x52,0x2C); //
dreschpe 8:65a4de035c3c 242 wr_reg(0x53,0x3E); //
dreschpe 8:65a4de035c3c 243 wr_reg(0x54,0x3F); //
dreschpe 8:65a4de035c3c 244 wr_reg(0x55,0x3F); //
dreschpe 8:65a4de035c3c 245 wr_reg(0x56,0x2E); //
dreschpe 8:65a4de035c3c 246 wr_reg(0x57,0x77); //
dreschpe 8:65a4de035c3c 247 wr_reg(0x58,0x0B); //
dreschpe 8:65a4de035c3c 248 wr_reg(0x59,0x06); //
dreschpe 8:65a4de035c3c 249 wr_reg(0x5A,0x07); //
dreschpe 8:65a4de035c3c 250 wr_reg(0x5B,0x0D); //
dreschpe 8:65a4de035c3c 251 wr_reg(0x5C,0x1D); //
dreschpe 8:65a4de035c3c 252 wr_reg(0x5D,0xCC); //
dreschpe 8:65a4de035c3c 253
dreschpe 8:65a4de035c3c 254 /* Power + Osc ---------------------------------------------------------------*/
dreschpe 14:ea3206e8e3bd 255 wr_reg(0x18, 0x36); /* OSC Control 1 */
dreschpe 14:ea3206e8e3bd 256 wr_reg(0x19, 0x01); /* OSC Control 2 */
dreschpe 14:ea3206e8e3bd 257 wr_reg(0x01, 0x00); /* Display Mode Control */
dreschpe 14:ea3206e8e3bd 258 wr_reg(0x1F, 0x88); /* Power Control 6 */
dreschpe 8:65a4de035c3c 259 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 260 wr_reg(0x1F, 0x80); /* Power Control 6 */
dreschpe 14:ea3206e8e3bd 261 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 262 wr_reg(0x1F, 0x90); /* Power Control 6 */
dreschpe 8:65a4de035c3c 263 wait_ms(5); /* Delay 5 ms */
dreschpe 14:ea3206e8e3bd 264 wr_reg(0x1F, 0xD0); /* Power Control 6 */
dreschpe 8:65a4de035c3c 265 wait_ms(5); /* Delay 5 ms */
dreschpe 8:65a4de035c3c 266
dreschpe 14:ea3206e8e3bd 267 wr_reg(0x17, 0x05); /* Colmod 16Bit/Pixel */
dreschpe 8:65a4de035c3c 268
dreschpe 14:ea3206e8e3bd 269 wr_reg(0x36, 0x00); /* Panel Characteristic */
dreschpe 14:ea3206e8e3bd 270 wr_reg(0x28, 0x38); /* Display Control 3 */
dreschpe 8:65a4de035c3c 271 wait_ms(40);
dreschpe 14:ea3206e8e3bd 272 wr_reg(0x28, 0x3C); /* Display Control 3 */
dreschpe 8:65a4de035c3c 273 switch (orientation) {
dreschpe 8:65a4de035c3c 274 case 0:
dreschpe 14:ea3206e8e3bd 275 wr_reg(0x16, 0x08);
dreschpe 8:65a4de035c3c 276 break;
dreschpe 8:65a4de035c3c 277 case 2:
dreschpe 14:ea3206e8e3bd 278 wr_reg(0x16, 0xC8);
dreschpe 8:65a4de035c3c 279 break;
dreschpe 8:65a4de035c3c 280 case 3:
dreschpe 14:ea3206e8e3bd 281 wr_reg(0x16, 0xA8);
dreschpe 14:ea3206e8e3bd 282 break;
dreschpe 14:ea3206e8e3bd 283 case 1:
dreschpe 14:ea3206e8e3bd 284 default:
dreschpe 14:ea3206e8e3bd 285 wr_reg(0x16, 0x68);
dreschpe 14:ea3206e8e3bd 286 break;
dreschpe 14:ea3206e8e3bd 287
dreschpe 8:65a4de035c3c 288 }
dreschpe 13:2c91cb947161 289 #if defined USE_DMA // setup DMA channel 0
dreschpe 13:2c91cb947161 290 LPC_SC->PCONP |= (1UL << 29); // Power up the GPDMA.
dreschpe 8:65a4de035c3c 291 LPC_GPDMA->DMACConfig = 1; // enable DMA controller
dreschpe 13:2c91cb947161 292 LPC_GPDMA->DMACIntTCClear = 0x1; // Reset the Interrupt status
dreschpe 8:65a4de035c3c 293 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 294 LPC_GPDMACH0->DMACCLLI = 0;
dreschpe 8:65a4de035c3c 295 #endif
dreschpe 8:65a4de035c3c 296 WindowMax ();
dreschpe 8:65a4de035c3c 297 }
dreschpe 8:65a4de035c3c 298
dreschpe 13:2c91cb947161 299 // Set one pixel
dreschpe 8:65a4de035c3c 300 void SPI_TFT::pixel(int x, int y, int color)
dreschpe 8:65a4de035c3c 301 {
dreschpe 8:65a4de035c3c 302 wr_reg(0x03, (x >> 0));
dreschpe 8:65a4de035c3c 303 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 304 wr_reg(0x07, (y >> 0));
dreschpe 8:65a4de035c3c 305 wr_reg(0x06, (y >> 8));
dreschpe 8:65a4de035c3c 306 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 307 _cs = 0;
dreschpe 14:ea3206e8e3bd 308 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 309 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 310 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 311 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 312 LPC_SSP0->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 14:ea3206e8e3bd 313 LPC_SSP0->DR = color; // Pixel
dreschpe 14:ea3206e8e3bd 314 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 315 do {
dreschpe 14:ea3206e8e3bd 316 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 317 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 318 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 319 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 320 LPC_SSP1->CR0 |= 0x08UL; // set back to 16 bit
dreschpe 14:ea3206e8e3bd 321 LPC_SSP1->DR = color;
dreschpe 14:ea3206e8e3bd 322 // we have to wait for SPI IDLE to set CS back to high
dreschpe 14:ea3206e8e3bd 323 do {
dreschpe 14:ea3206e8e3bd 324 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 325 }
dreschpe 14:ea3206e8e3bd 326 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 327
dreschpe 14:ea3206e8e3bd 328 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 329 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 330 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 331 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 332 #else
dreschpe 14:ea3206e8e3bd 333 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 334 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 335 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 336 _spi.write(color); // Write D0..D15
dreschpe 14:ea3206e8e3bd 337 #endif
dreschpe 14:ea3206e8e3bd 338 #endif
dreschpe 8:65a4de035c3c 339 _cs = 1;
dreschpe 8:65a4de035c3c 340 }
dreschpe 8:65a4de035c3c 341
dreschpe 13:2c91cb947161 342 // define draw area
dreschpe 8:65a4de035c3c 343 void SPI_TFT::window (unsigned int x, unsigned int y, unsigned int w, unsigned int h)
dreschpe 8:65a4de035c3c 344 {
dreschpe 8:65a4de035c3c 345 wr_reg(0x03, x );
dreschpe 8:65a4de035c3c 346 wr_reg(0x02, (x >> 8));
dreschpe 8:65a4de035c3c 347 wr_reg(0x05, x+w-1 );
dreschpe 8:65a4de035c3c 348 wr_reg(0x04, (x+w-1 >> 8));
dreschpe 8:65a4de035c3c 349 wr_reg(0x07, y );
dreschpe 8:65a4de035c3c 350 wr_reg(0x06, ( y >> 8));
dreschpe 8:65a4de035c3c 351 wr_reg(0x09, ( y+h-1 ));
dreschpe 8:65a4de035c3c 352 wr_reg(0x08, ( y+h-1 >> 8));
dreschpe 8:65a4de035c3c 353 }
dreschpe 8:65a4de035c3c 354
dreschpe 13:2c91cb947161 355 // set draw area to max
dreschpe 8:65a4de035c3c 356 void SPI_TFT::WindowMax (void)
dreschpe 8:65a4de035c3c 357 {
dreschpe 8:65a4de035c3c 358 window (0, 0, width(), height());
dreschpe 8:65a4de035c3c 359 }
dreschpe 8:65a4de035c3c 360
dreschpe 8:65a4de035c3c 361
dreschpe 13:2c91cb947161 362 // clear screen
dreschpe 8:65a4de035c3c 363 void SPI_TFT::cls (void)
dreschpe 8:65a4de035c3c 364 {
dreschpe 14:ea3206e8e3bd 365 fprintf(stderr, "CLS \n\r");
dreschpe 8:65a4de035c3c 366 int pixel = ( width() * height());
dreschpe 14:ea3206e8e3bd 367 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 368 int dma_count;
dreschpe 14:ea3206e8e3bd 369 int color = _background;
dreschpe 14:ea3206e8e3bd 370 #endif
dreschpe 8:65a4de035c3c 371 WindowMax();
dreschpe 8:65a4de035c3c 372 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 373
dreschpe 14:ea3206e8e3bd 374 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 375 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 376 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 377 #endif
dreschpe 14:ea3206e8e3bd 378 _cs = 0;
dreschpe 14:ea3206e8e3bd 379 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 380 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 381 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 382 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 383 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 384 #endif
dreschpe 14:ea3206e8e3bd 385 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 386 LPC_SSP0->DR = 0x72; // start byte
dreschpe 14:ea3206e8e3bd 387 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 388 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 389 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 390 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 391 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 392 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 393 #endif
dreschpe 14:ea3206e8e3bd 394 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 395 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 396 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 397 }
dreschpe 8:65a4de035c3c 398
dreschpe 14:ea3206e8e3bd 399 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 400 // start DMA
dreschpe 14:ea3206e8e3bd 401 do {
dreschpe 14:ea3206e8e3bd 402 if (pixel > 4095) {
dreschpe 14:ea3206e8e3bd 403 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 404 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 405 } else {
dreschpe 14:ea3206e8e3bd 406 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 407 pixel = 0;
dreschpe 14:ea3206e8e3bd 408 }
dreschpe 14:ea3206e8e3bd 409 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 410 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 411 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 412 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 413 LPC_GPDMA->DMACSoftSReq = 0x1; // DMA request
dreschpe 14:ea3206e8e3bd 414 do {
dreschpe 14:ea3206e8e3bd 415 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 416 } while (pixel > 0);
dreschpe 14:ea3206e8e3bd 417 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 418 do {
dreschpe 14:ea3206e8e3bd 419 } while ((0x0010 & LPC_SSP0->SR) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 420 /* disable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 421 LPC_SSP0->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 422 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 423 do {
dreschpe 14:ea3206e8e3bd 424 } while ((0x0010 & LPC_SSP1->SR) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 425 /* disable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 426 LPC_SSP1->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 427 }
dreschpe 13:2c91cb947161 428
dreschpe 14:ea3206e8e3bd 429 #else // no DMA
dreschpe 14:ea3206e8e3bd 430 unsigned int i;
dreschpe 14:ea3206e8e3bd 431 for (i = 0; i < ( width() * height()); i++)
dreschpe 14:ea3206e8e3bd 432 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 433 #endif
dreschpe 14:ea3206e8e3bd 434
dreschpe 14:ea3206e8e3bd 435 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 436 _cs = 0;
dreschpe 14:ea3206e8e3bd 437 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 438 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 439 unsigned int i;
dreschpe 14:ea3206e8e3bd 440 for (i = 0; i < ( width() * height()); i++) {
dreschpe 14:ea3206e8e3bd 441 _spi.write(_background >> 8);
dreschpe 14:ea3206e8e3bd 442 _spi.write(_background & 0xff);
dreschpe 14:ea3206e8e3bd 443 }
dreschpe 14:ea3206e8e3bd 444 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 445 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 446 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 447 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 448 unsigned int i;
dreschpe 14:ea3206e8e3bd 449 for (i = 0; i < ( width() * height()); i++)
dreschpe 14:ea3206e8e3bd 450 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 451 #endif
dreschpe 14:ea3206e8e3bd 452 #endif
dreschpe 8:65a4de035c3c 453 _cs = 1;
dreschpe 8:65a4de035c3c 454 }
dreschpe 8:65a4de035c3c 455
dreschpe 13:2c91cb947161 456 // draw circle
dreschpe 8:65a4de035c3c 457 void SPI_TFT::circle(int x0, int y0, int r, int color)
dreschpe 8:65a4de035c3c 458 {
dreschpe 8:65a4de035c3c 459
dreschpe 8:65a4de035c3c 460 int draw_x0, draw_y0;
dreschpe 8:65a4de035c3c 461 int draw_x1, draw_y1;
dreschpe 8:65a4de035c3c 462 int draw_x2, draw_y2;
dreschpe 8:65a4de035c3c 463 int draw_x3, draw_y3;
dreschpe 8:65a4de035c3c 464 int draw_x4, draw_y4;
dreschpe 8:65a4de035c3c 465 int draw_x5, draw_y5;
dreschpe 8:65a4de035c3c 466 int draw_x6, draw_y6;
dreschpe 8:65a4de035c3c 467 int draw_x7, draw_y7;
dreschpe 8:65a4de035c3c 468 int xx, yy;
dreschpe 8:65a4de035c3c 469 int di;
dreschpe 8:65a4de035c3c 470 //WindowMax();
dreschpe 8:65a4de035c3c 471 if (r == 0) { /* no radius */
dreschpe 8:65a4de035c3c 472 return;
dreschpe 8:65a4de035c3c 473 }
dreschpe 8:65a4de035c3c 474
dreschpe 8:65a4de035c3c 475 draw_x0 = draw_x1 = x0;
dreschpe 8:65a4de035c3c 476 draw_y0 = draw_y1 = y0 + r;
dreschpe 8:65a4de035c3c 477 if (draw_y0 < height()) {
dreschpe 8:65a4de035c3c 478 pixel(draw_x0, draw_y0, color); /* 90 degree */
dreschpe 8:65a4de035c3c 479 }
dreschpe 8:65a4de035c3c 480
dreschpe 8:65a4de035c3c 481 draw_x2 = draw_x3 = x0;
dreschpe 8:65a4de035c3c 482 draw_y2 = draw_y3 = y0 - r;
dreschpe 8:65a4de035c3c 483 if (draw_y2 >= 0) {
dreschpe 8:65a4de035c3c 484 pixel(draw_x2, draw_y2, color); /* 270 degree */
dreschpe 8:65a4de035c3c 485 }
dreschpe 8:65a4de035c3c 486
dreschpe 8:65a4de035c3c 487 draw_x4 = draw_x6 = x0 + r;
dreschpe 8:65a4de035c3c 488 draw_y4 = draw_y6 = y0;
dreschpe 8:65a4de035c3c 489 if (draw_x4 < width()) {
dreschpe 8:65a4de035c3c 490 pixel(draw_x4, draw_y4, color); /* 0 degree */
dreschpe 8:65a4de035c3c 491 }
dreschpe 8:65a4de035c3c 492
dreschpe 8:65a4de035c3c 493 draw_x5 = draw_x7 = x0 - r;
dreschpe 8:65a4de035c3c 494 draw_y5 = draw_y7 = y0;
dreschpe 8:65a4de035c3c 495 if (draw_x5>=0) {
dreschpe 8:65a4de035c3c 496 pixel(draw_x5, draw_y5, color); /* 180 degree */
dreschpe 8:65a4de035c3c 497 }
dreschpe 8:65a4de035c3c 498
dreschpe 8:65a4de035c3c 499 if (r == 1) {
dreschpe 8:65a4de035c3c 500 return;
dreschpe 8:65a4de035c3c 501 }
dreschpe 8:65a4de035c3c 502
dreschpe 8:65a4de035c3c 503 di = 3 - 2*r;
dreschpe 8:65a4de035c3c 504 xx = 0;
dreschpe 8:65a4de035c3c 505 yy = r;
dreschpe 8:65a4de035c3c 506 while (xx < yy) {
dreschpe 8:65a4de035c3c 507
dreschpe 8:65a4de035c3c 508 if (di < 0) {
dreschpe 8:65a4de035c3c 509 di += 4*xx + 6;
dreschpe 8:65a4de035c3c 510 } else {
dreschpe 8:65a4de035c3c 511 di += 4*(xx - yy) + 10;
dreschpe 8:65a4de035c3c 512 yy--;
dreschpe 8:65a4de035c3c 513 draw_y0--;
dreschpe 8:65a4de035c3c 514 draw_y1--;
dreschpe 8:65a4de035c3c 515 draw_y2++;
dreschpe 8:65a4de035c3c 516 draw_y3++;
dreschpe 8:65a4de035c3c 517 draw_x4--;
dreschpe 8:65a4de035c3c 518 draw_x5++;
dreschpe 8:65a4de035c3c 519 draw_x6--;
dreschpe 8:65a4de035c3c 520 draw_x7++;
dreschpe 8:65a4de035c3c 521 }
dreschpe 8:65a4de035c3c 522 xx++;
dreschpe 8:65a4de035c3c 523 draw_x0++;
dreschpe 8:65a4de035c3c 524 draw_x1--;
dreschpe 8:65a4de035c3c 525 draw_x2++;
dreschpe 8:65a4de035c3c 526 draw_x3--;
dreschpe 8:65a4de035c3c 527 draw_y4++;
dreschpe 8:65a4de035c3c 528 draw_y5++;
dreschpe 8:65a4de035c3c 529 draw_y6--;
dreschpe 8:65a4de035c3c 530 draw_y7--;
dreschpe 8:65a4de035c3c 531
dreschpe 8:65a4de035c3c 532 if ( (draw_x0 <= width()) && (draw_y0>=0) ) {
dreschpe 8:65a4de035c3c 533 pixel(draw_x0, draw_y0, color);
dreschpe 8:65a4de035c3c 534 }
dreschpe 8:65a4de035c3c 535
dreschpe 8:65a4de035c3c 536 if ( (draw_x1 >= 0) && (draw_y1 >= 0) ) {
dreschpe 8:65a4de035c3c 537 pixel(draw_x1, draw_y1, color);
dreschpe 8:65a4de035c3c 538 }
dreschpe 8:65a4de035c3c 539
dreschpe 8:65a4de035c3c 540 if ( (draw_x2 <= width()) && (draw_y2 <= height()) ) {
dreschpe 8:65a4de035c3c 541 pixel(draw_x2, draw_y2, color);
dreschpe 8:65a4de035c3c 542 }
dreschpe 8:65a4de035c3c 543
dreschpe 8:65a4de035c3c 544 if ( (draw_x3 >=0 ) && (draw_y3 <= height()) ) {
dreschpe 8:65a4de035c3c 545 pixel(draw_x3, draw_y3, color);
dreschpe 8:65a4de035c3c 546 }
dreschpe 8:65a4de035c3c 547
dreschpe 8:65a4de035c3c 548 if ( (draw_x4 <= width()) && (draw_y4 >= 0) ) {
dreschpe 8:65a4de035c3c 549 pixel(draw_x4, draw_y4, color);
dreschpe 8:65a4de035c3c 550 }
dreschpe 8:65a4de035c3c 551
dreschpe 8:65a4de035c3c 552 if ( (draw_x5 >= 0) && (draw_y5 >= 0) ) {
dreschpe 8:65a4de035c3c 553 pixel(draw_x5, draw_y5, color);
dreschpe 8:65a4de035c3c 554 }
dreschpe 8:65a4de035c3c 555 if ( (draw_x6 <=width()) && (draw_y6 <= height()) ) {
dreschpe 8:65a4de035c3c 556 pixel(draw_x6, draw_y6, color);
dreschpe 8:65a4de035c3c 557 }
dreschpe 8:65a4de035c3c 558 if ( (draw_x7 >= 0) && (draw_y7 <= height()) ) {
dreschpe 8:65a4de035c3c 559 pixel(draw_x7, draw_y7, color);
dreschpe 8:65a4de035c3c 560 }
dreschpe 8:65a4de035c3c 561 }
dreschpe 8:65a4de035c3c 562 return;
dreschpe 8:65a4de035c3c 563 }
dreschpe 8:65a4de035c3c 564
dreschpe 8:65a4de035c3c 565 void SPI_TFT::fillcircle(int x, int y, int r, int color)
dreschpe 8:65a4de035c3c 566 {
dreschpe 8:65a4de035c3c 567 int i;
dreschpe 8:65a4de035c3c 568 for (i = 0; i <= r; i++)
dreschpe 8:65a4de035c3c 569 circle(x,y,i,color);
dreschpe 8:65a4de035c3c 570 }
dreschpe 8:65a4de035c3c 571
dreschpe 8:65a4de035c3c 572
dreschpe 13:2c91cb947161 573 // draw horizontal line
dreschpe 8:65a4de035c3c 574 void SPI_TFT::hline(int x0, int x1, int y, int color)
dreschpe 8:65a4de035c3c 575 {
dreschpe 11:9bb71766cafc 576 int w;
dreschpe 8:65a4de035c3c 577 w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 578 window(x0,y,w,1);
dreschpe 8:65a4de035c3c 579 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 580 _cs = 0;
dreschpe 14:ea3206e8e3bd 581 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 582 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 583 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 584 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 585 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 586 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 587 #endif
dreschpe 14:ea3206e8e3bd 588 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 589 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 590 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 591 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 592 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 593 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 594 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 595 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 596 #endif
dreschpe 14:ea3206e8e3bd 597 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 598 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 599 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 600 }
dreschpe 14:ea3206e8e3bd 601 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 602 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 603 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 604 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 605 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 606 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 607 LPC_GPDMA->DMACSoftSReq = 0x1; // start DMA
dreschpe 14:ea3206e8e3bd 608 do {
dreschpe 14:ea3206e8e3bd 609 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 610 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 611 do {
dreschpe 14:ea3206e8e3bd 612 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 613 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 614 do {
dreschpe 14:ea3206e8e3bd 615 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 616 }
dreschpe 14:ea3206e8e3bd 617 #else // no DMA
dreschpe 14:ea3206e8e3bd 618 int i;
dreschpe 14:ea3206e8e3bd 619 for (i=0; i<w; i++) {
dreschpe 14:ea3206e8e3bd 620 _spi.write(color);
dreschpe 14:ea3206e8e3bd 621 }
dreschpe 14:ea3206e8e3bd 622 #endif
dreschpe 14:ea3206e8e3bd 623 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 624 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 625 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 626 for (int j=0; j<w; j++) {
dreschpe 14:ea3206e8e3bd 627 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 628 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 629 }
dreschpe 14:ea3206e8e3bd 630 #else // 16 Bit SPI
dreschpe 14:ea3206e8e3bd 631 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 632 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 633 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 634 for (int j=0; j<w; j++) {
dreschpe 14:ea3206e8e3bd 635 _spi.write(color);
dreschpe 14:ea3206e8e3bd 636 }
dreschpe 14:ea3206e8e3bd 637 #endif
dreschpe 14:ea3206e8e3bd 638 #endif
dreschpe 8:65a4de035c3c 639 _cs = 1;
dreschpe 8:65a4de035c3c 640 WindowMax();
dreschpe 8:65a4de035c3c 641 return;
dreschpe 8:65a4de035c3c 642 }
dreschpe 8:65a4de035c3c 643
dreschpe 13:2c91cb947161 644 // draw vertical line
dreschpe 8:65a4de035c3c 645 void SPI_TFT::vline(int x, int y0, int y1, int color)
dreschpe 8:65a4de035c3c 646 {
dreschpe 8:65a4de035c3c 647 int h;
dreschpe 8:65a4de035c3c 648 h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 649 window(x,y0,1,h);
dreschpe 8:65a4de035c3c 650 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 651 _cs = 0;
dreschpe 14:ea3206e8e3bd 652 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 653 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 654 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 655 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 656 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 657 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 658 #endif
dreschpe 14:ea3206e8e3bd 659 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 660 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 661 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 662 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 663 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 664 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 665 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 666 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 667 #endif
dreschpe 14:ea3206e8e3bd 668 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 669 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 670 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 671 }
dreschpe 14:ea3206e8e3bd 672 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 673 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 674 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 675 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 676 LPC_GPDMACH0->DMACCControl = h | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 677 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 678 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 679 do {
dreschpe 14:ea3206e8e3bd 680 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 681
dreschpe 14:ea3206e8e3bd 682 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 683 do {
dreschpe 14:ea3206e8e3bd 684 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 685 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 686 do {
dreschpe 14:ea3206e8e3bd 687 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 688 }
dreschpe 14:ea3206e8e3bd 689 #else // no DMA
dreschpe 14:ea3206e8e3bd 690 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 691 _spi.write(color);
dreschpe 14:ea3206e8e3bd 692 }
dreschpe 14:ea3206e8e3bd 693 #endif
dreschpe 14:ea3206e8e3bd 694 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 695 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 696 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 697 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 698 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 699 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 700 }
dreschpe 14:ea3206e8e3bd 701 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 702 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 703 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 704 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 705 for (int y=0; y<h; y++) {
dreschpe 14:ea3206e8e3bd 706 _spi.write(color);
dreschpe 14:ea3206e8e3bd 707 }
dreschpe 14:ea3206e8e3bd 708 #endif
dreschpe 14:ea3206e8e3bd 709 #endif
dreschpe 8:65a4de035c3c 710 _cs = 1;
dreschpe 8:65a4de035c3c 711 WindowMax();
dreschpe 8:65a4de035c3c 712 return;
dreschpe 8:65a4de035c3c 713 }
dreschpe 8:65a4de035c3c 714
dreschpe 8:65a4de035c3c 715
dreschpe 13:2c91cb947161 716 // draw line
dreschpe 8:65a4de035c3c 717 void SPI_TFT::line(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 718 {
dreschpe 8:65a4de035c3c 719 //WindowMax();
dreschpe 8:65a4de035c3c 720 int dx = 0, dy = 0;
dreschpe 8:65a4de035c3c 721 int dx_sym = 0, dy_sym = 0;
dreschpe 8:65a4de035c3c 722 int dx_x2 = 0, dy_x2 = 0;
dreschpe 8:65a4de035c3c 723 int di = 0;
dreschpe 8:65a4de035c3c 724
dreschpe 8:65a4de035c3c 725 dx = x1-x0;
dreschpe 8:65a4de035c3c 726 dy = y1-y0;
dreschpe 8:65a4de035c3c 727
dreschpe 8:65a4de035c3c 728 if (dx == 0) { /* vertical line */
dreschpe 8:65a4de035c3c 729 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 730 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 731 return;
dreschpe 8:65a4de035c3c 732 }
dreschpe 8:65a4de035c3c 733
dreschpe 8:65a4de035c3c 734 if (dx > 0) {
dreschpe 8:65a4de035c3c 735 dx_sym = 1;
dreschpe 8:65a4de035c3c 736 } else {
dreschpe 8:65a4de035c3c 737 dx_sym = -1;
dreschpe 8:65a4de035c3c 738 }
dreschpe 8:65a4de035c3c 739 if (dy == 0) { /* horizontal line */
dreschpe 8:65a4de035c3c 740 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 741 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 742 return;
dreschpe 8:65a4de035c3c 743 }
dreschpe 8:65a4de035c3c 744
dreschpe 8:65a4de035c3c 745 if (dy > 0) {
dreschpe 8:65a4de035c3c 746 dy_sym = 1;
dreschpe 8:65a4de035c3c 747 } else {
dreschpe 8:65a4de035c3c 748 dy_sym = -1;
dreschpe 8:65a4de035c3c 749 }
dreschpe 8:65a4de035c3c 750
dreschpe 8:65a4de035c3c 751 dx = dx_sym*dx;
dreschpe 8:65a4de035c3c 752 dy = dy_sym*dy;
dreschpe 8:65a4de035c3c 753
dreschpe 8:65a4de035c3c 754 dx_x2 = dx*2;
dreschpe 8:65a4de035c3c 755 dy_x2 = dy*2;
dreschpe 8:65a4de035c3c 756
dreschpe 8:65a4de035c3c 757 if (dx >= dy) {
dreschpe 8:65a4de035c3c 758 di = dy_x2 - dx;
dreschpe 8:65a4de035c3c 759 while (x0 != x1) {
dreschpe 8:65a4de035c3c 760
dreschpe 8:65a4de035c3c 761 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 762 x0 += dx_sym;
dreschpe 8:65a4de035c3c 763 if (di<0) {
dreschpe 8:65a4de035c3c 764 di += dy_x2;
dreschpe 8:65a4de035c3c 765 } else {
dreschpe 8:65a4de035c3c 766 di += dy_x2 - dx_x2;
dreschpe 8:65a4de035c3c 767 y0 += dy_sym;
dreschpe 8:65a4de035c3c 768 }
dreschpe 8:65a4de035c3c 769 }
dreschpe 8:65a4de035c3c 770 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 771 } else {
dreschpe 8:65a4de035c3c 772 di = dx_x2 - dy;
dreschpe 8:65a4de035c3c 773 while (y0 != y1) {
dreschpe 8:65a4de035c3c 774 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 775 y0 += dy_sym;
dreschpe 8:65a4de035c3c 776 if (di < 0) {
dreschpe 8:65a4de035c3c 777 di += dx_x2;
dreschpe 8:65a4de035c3c 778 } else {
dreschpe 8:65a4de035c3c 779 di += dx_x2 - dy_x2;
dreschpe 8:65a4de035c3c 780 x0 += dx_sym;
dreschpe 8:65a4de035c3c 781 }
dreschpe 8:65a4de035c3c 782 }
dreschpe 8:65a4de035c3c 783 pixel(x0, y0, color);
dreschpe 8:65a4de035c3c 784 }
dreschpe 8:65a4de035c3c 785 return;
dreschpe 8:65a4de035c3c 786 }
dreschpe 8:65a4de035c3c 787
dreschpe 13:2c91cb947161 788 // draw rect
dreschpe 8:65a4de035c3c 789 void SPI_TFT::rect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 790 {
dreschpe 8:65a4de035c3c 791
dreschpe 8:65a4de035c3c 792 if (x1 > x0) hline(x0,x1,y0,color);
dreschpe 8:65a4de035c3c 793 else hline(x1,x0,y0,color);
dreschpe 8:65a4de035c3c 794
dreschpe 8:65a4de035c3c 795 if (y1 > y0) vline(x0,y0,y1,color);
dreschpe 8:65a4de035c3c 796 else vline(x0,y1,y0,color);
dreschpe 8:65a4de035c3c 797
dreschpe 8:65a4de035c3c 798 if (x1 > x0) hline(x0,x1,y1,color);
dreschpe 8:65a4de035c3c 799 else hline(x1,x0,y1,color);
dreschpe 8:65a4de035c3c 800
dreschpe 8:65a4de035c3c 801 if (y1 > y0) vline(x1,y0,y1,color);
dreschpe 8:65a4de035c3c 802 else vline(x1,y1,y0,color);
dreschpe 8:65a4de035c3c 803
dreschpe 8:65a4de035c3c 804 return;
dreschpe 8:65a4de035c3c 805 }
dreschpe 8:65a4de035c3c 806
dreschpe 8:65a4de035c3c 807
dreschpe 13:2c91cb947161 808 // fill rect
dreschpe 8:65a4de035c3c 809 void SPI_TFT::fillrect(int x0, int y0, int x1, int y1, int color)
dreschpe 8:65a4de035c3c 810 {
dreschpe 8:65a4de035c3c 811
dreschpe 8:65a4de035c3c 812 int h = y1 - y0 + 1;
dreschpe 8:65a4de035c3c 813 int w = x1 - x0 + 1;
dreschpe 8:65a4de035c3c 814 int pixel = h * w;
dreschpe 14:ea3206e8e3bd 815 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 816 int dma_count;
dreschpe 14:ea3206e8e3bd 817 #endif
dreschpe 8:65a4de035c3c 818 window(x0,y0,w,h);
dreschpe 8:65a4de035c3c 819 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 820 _cs = 0;
dreschpe 14:ea3206e8e3bd 821 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 822 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 823 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 824 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 825 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 826 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 827 #endif
dreschpe 14:ea3206e8e3bd 828 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 829 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 830 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 831 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 832 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 833 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 834 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 835 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 836 #endif
dreschpe 14:ea3206e8e3bd 837 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 838 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 839 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 840 }
dreschpe 14:ea3206e8e3bd 841 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 842 do {
dreschpe 14:ea3206e8e3bd 843 if (pixel > 4095) {
dreschpe 14:ea3206e8e3bd 844 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 845 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 846 } else {
dreschpe 14:ea3206e8e3bd 847 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 848 pixel = 0;
dreschpe 14:ea3206e8e3bd 849 }
dreschpe 14:ea3206e8e3bd 850 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 851 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 852 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)&color;
dreschpe 14:ea3206e8e3bd 853 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) ; // 16 bit transfer , no address increment, interrupt
dreschpe 14:ea3206e8e3bd 854 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 855 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 856 do {
dreschpe 14:ea3206e8e3bd 857 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 858
dreschpe 14:ea3206e8e3bd 859 } while (pixel > 0);
dreschpe 13:2c91cb947161 860
dreschpe 14:ea3206e8e3bd 861 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 862 do {
dreschpe 14:ea3206e8e3bd 863 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 864 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 865 do {
dreschpe 14:ea3206e8e3bd 866 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 14:ea3206e8e3bd 867 }
dreschpe 14:ea3206e8e3bd 868
dreschpe 14:ea3206e8e3bd 869 #else // no DMA
dreschpe 14:ea3206e8e3bd 870 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 871 _spi.write(color);
dreschpe 14:ea3206e8e3bd 872 }
dreschpe 14:ea3206e8e3bd 873 #endif
dreschpe 13:2c91cb947161 874
dreschpe 14:ea3206e8e3bd 875 #else // use mbed lib
dreschpe 14:ea3206e8e3bd 876 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 877 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 878 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 879 _spi.write(color >> 8);
dreschpe 14:ea3206e8e3bd 880 _spi.write(color & 0xff);
dreschpe 14:ea3206e8e3bd 881 }
dreschpe 13:2c91cb947161 882
dreschpe 14:ea3206e8e3bd 883 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 884 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 885 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 886 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 887 for (int p=0; p<pixel; p++) {
dreschpe 14:ea3206e8e3bd 888 _spi.write(color);
dreschpe 14:ea3206e8e3bd 889 }
dreschpe 14:ea3206e8e3bd 890 #endif
dreschpe 14:ea3206e8e3bd 891 #endif
dreschpe 8:65a4de035c3c 892 _cs = 1;
dreschpe 8:65a4de035c3c 893 WindowMax();
dreschpe 8:65a4de035c3c 894 return;
dreschpe 8:65a4de035c3c 895 }
dreschpe 8:65a4de035c3c 896
dreschpe 13:2c91cb947161 897 // set cursor position
dreschpe 8:65a4de035c3c 898 void SPI_TFT::locate(int x, int y)
dreschpe 8:65a4de035c3c 899 {
dreschpe 8:65a4de035c3c 900 char_x = x;
dreschpe 8:65a4de035c3c 901 char_y = y;
dreschpe 8:65a4de035c3c 902 }
dreschpe 8:65a4de035c3c 903
dreschpe 8:65a4de035c3c 904
dreschpe 13:2c91cb947161 905 // calculate num of chars in a row
dreschpe 8:65a4de035c3c 906 int SPI_TFT::columns()
dreschpe 8:65a4de035c3c 907 {
dreschpe 8:65a4de035c3c 908 return width() / font[1];
dreschpe 8:65a4de035c3c 909 }
dreschpe 8:65a4de035c3c 910
dreschpe 13:2c91cb947161 911 // calculate num of rows on the screen
dreschpe 8:65a4de035c3c 912 int SPI_TFT::rows()
dreschpe 8:65a4de035c3c 913 {
dreschpe 8:65a4de035c3c 914 return height() / font[2];
dreschpe 8:65a4de035c3c 915 }
dreschpe 8:65a4de035c3c 916
dreschpe 13:2c91cb947161 917 // print a char on the screen
dreschpe 8:65a4de035c3c 918 int SPI_TFT::_putc(int value)
dreschpe 8:65a4de035c3c 919 {
dreschpe 8:65a4de035c3c 920 if (value == '\n') { // new line
dreschpe 8:65a4de035c3c 921 char_x = 0;
dreschpe 8:65a4de035c3c 922 char_y = char_y + font[2];
dreschpe 8:65a4de035c3c 923 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 924 char_y = 0;
dreschpe 8:65a4de035c3c 925 }
dreschpe 8:65a4de035c3c 926 } else {
dreschpe 8:65a4de035c3c 927 character(char_x, char_y, value);
dreschpe 8:65a4de035c3c 928 }
dreschpe 8:65a4de035c3c 929 return value;
dreschpe 8:65a4de035c3c 930 }
dreschpe 8:65a4de035c3c 931
dreschpe 13:2c91cb947161 932 // consrtuct the char out of the font
dreschpe 8:65a4de035c3c 933 void SPI_TFT::character(int x, int y, int c)
dreschpe 8:65a4de035c3c 934 {
dreschpe 9:a63fd1ad41b0 935 unsigned int hor,vert,offset,bpl,j,i,b;
dreschpe 8:65a4de035c3c 936 unsigned char* zeichen;
dreschpe 8:65a4de035c3c 937 unsigned char z,w;
dreschpe 14:ea3206e8e3bd 938 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 939 unsigned int pixel;
dreschpe 14:ea3206e8e3bd 940 unsigned int p;
dreschpe 14:ea3206e8e3bd 941 unsigned int dma_count,dma_off;
dreschpe 14:ea3206e8e3bd 942 uint16_t *buffer;
dreschpe 14:ea3206e8e3bd 943 #endif
dreschpe 8:65a4de035c3c 944
dreschpe 8:65a4de035c3c 945 if ((c < 31) || (c > 127)) return; // test char range
dreschpe 8:65a4de035c3c 946
dreschpe 8:65a4de035c3c 947 // read font parameter from start of array
dreschpe 8:65a4de035c3c 948 offset = font[0]; // bytes / char
dreschpe 8:65a4de035c3c 949 hor = font[1]; // get hor size of font
dreschpe 8:65a4de035c3c 950 vert = font[2]; // get vert size of font
dreschpe 8:65a4de035c3c 951 bpl = font[3]; // bytes per line
dreschpe 8:65a4de035c3c 952
dreschpe 8:65a4de035c3c 953 if (char_x + hor > width()) {
dreschpe 8:65a4de035c3c 954 char_x = 0;
dreschpe 8:65a4de035c3c 955 char_y = char_y + vert;
dreschpe 8:65a4de035c3c 956 if (char_y >= height() - font[2]) {
dreschpe 8:65a4de035c3c 957 char_y = 0;
dreschpe 8:65a4de035c3c 958 }
dreschpe 8:65a4de035c3c 959 }
dreschpe 8:65a4de035c3c 960 window(char_x, char_y,hor,vert); // char box
dreschpe 8:65a4de035c3c 961 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 962
dreschpe 14:ea3206e8e3bd 963 #if defined USE_DMA
dreschpe 14:ea3206e8e3bd 964 pixel = hor * vert; // calculate buffer size
dreschpe 8:65a4de035c3c 965
dreschpe 14:ea3206e8e3bd 966 buffer = (uint16_t *) malloc (2*pixel); // we need a buffer for the 16 bit
dreschpe 14:ea3206e8e3bd 967 if (buffer == NULL) {
dreschpe 14:ea3206e8e3bd 968 //led = 1;
dreschpe 14:ea3206e8e3bd 969 //pc.printf("Malloc error !\n\r");
dreschpe 14:ea3206e8e3bd 970 return; // error no memory
dreschpe 8:65a4de035c3c 971 }
dreschpe 8:65a4de035c3c 972
dreschpe 14:ea3206e8e3bd 973 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 14:ea3206e8e3bd 974 w = zeichen[0]; // width of actual char
dreschpe 14:ea3206e8e3bd 975 p = 0;
dreschpe 14:ea3206e8e3bd 976 // construct the char into the buffer
dreschpe 14:ea3206e8e3bd 977 for (j=0; j<vert; j++) { // vert line
dreschpe 14:ea3206e8e3bd 978 for (i=0; i<hor; i++) { // horz line
dreschpe 14:ea3206e8e3bd 979 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 14:ea3206e8e3bd 980 b = 1 << (j & 0x07);
dreschpe 14:ea3206e8e3bd 981 if (( z & b ) == 0x00) {
dreschpe 14:ea3206e8e3bd 982 buffer[p] = _background;
dreschpe 14:ea3206e8e3bd 983 } else {
dreschpe 14:ea3206e8e3bd 984 buffer[p] = _foreground;
dreschpe 14:ea3206e8e3bd 985 }
dreschpe 14:ea3206e8e3bd 986 p++;
dreschpe 8:65a4de035c3c 987 }
dreschpe 8:65a4de035c3c 988 }
dreschpe 14:ea3206e8e3bd 989
dreschpe 14:ea3206e8e3bd 990 // copy the buffer with DMA SPI to display
dreschpe 14:ea3206e8e3bd 991 dma_off = 0; // offset for DMA transfer
dreschpe 14:ea3206e8e3bd 992 _cs = 0;
dreschpe 14:ea3206e8e3bd 993 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 994 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 14:ea3206e8e3bd 995 /* Enable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 996 LPC_SSP0->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 997 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 998 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 999 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 1000 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 1001 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 14:ea3206e8e3bd 1002 /* Enable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 1003 LPC_SSP1->DMACR = 0x2;
dreschpe 14:ea3206e8e3bd 1004 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 1005 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 1006 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 1007 }
dreschpe 14:ea3206e8e3bd 1008
dreschpe 14:ea3206e8e3bd 1009 // start DMA
dreschpe 14:ea3206e8e3bd 1010 do {
dreschpe 14:ea3206e8e3bd 1011 if (pixel > 4095) { // this is a giant font !
dreschpe 14:ea3206e8e3bd 1012 dma_count = 4095;
dreschpe 14:ea3206e8e3bd 1013 pixel = pixel - 4095;
dreschpe 14:ea3206e8e3bd 1014 } else {
dreschpe 14:ea3206e8e3bd 1015 dma_count = pixel;
dreschpe 14:ea3206e8e3bd 1016 pixel = 0;
dreschpe 14:ea3206e8e3bd 1017 }
dreschpe 14:ea3206e8e3bd 1018 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 14:ea3206e8e3bd 1019 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 14:ea3206e8e3bd 1020 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t) (buffer + dma_off);
dreschpe 14:ea3206e8e3bd 1021 LPC_GPDMACH0->DMACCControl = dma_count | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 14:ea3206e8e3bd 1022 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 14:ea3206e8e3bd 1023 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 14:ea3206e8e3bd 1024 do {
dreschpe 14:ea3206e8e3bd 1025 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 14:ea3206e8e3bd 1026 dma_off = dma_off + dma_count;
dreschpe 14:ea3206e8e3bd 1027 } while (pixel > 0);
dreschpe 14:ea3206e8e3bd 1028
dreschpe 14:ea3206e8e3bd 1029 free ((uint16_t *) buffer);
dreschpe 14:ea3206e8e3bd 1030
dreschpe 14:ea3206e8e3bd 1031 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 1032 do {
dreschpe 14:ea3206e8e3bd 1033 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI0 not idle
dreschpe 14:ea3206e8e3bd 1034 /* disable SSP0 for DMA. */
dreschpe 14:ea3206e8e3bd 1035 LPC_SSP0->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 1036 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 1037 do {
dreschpe 14:ea3206e8e3bd 1038 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI1 not idle
dreschpe 14:ea3206e8e3bd 1039 /* disable SSP1 for DMA. */
dreschpe 14:ea3206e8e3bd 1040 LPC_SSP1->DMACR = 0x0;
dreschpe 14:ea3206e8e3bd 1041 }
dreschpe 14:ea3206e8e3bd 1042
dreschpe 14:ea3206e8e3bd 1043 #else // no dma
dreschpe 14:ea3206e8e3bd 1044 _cs = 0;
dreschpe 14:ea3206e8e3bd 1045 #if defined NO_MBED_LIB
dreschpe 14:ea3206e8e3bd 1046 if (spi_port == 0) { // TFT on SSP0
dreschpe 14:ea3206e8e3bd 1047 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 1048 LPC_SSP0->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 1049 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 1050 } else { // TFT on SSP1
dreschpe 14:ea3206e8e3bd 1051 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 14:ea3206e8e3bd 1052 LPC_SSP1->DR = 0x72; // start Data
dreschpe 14:ea3206e8e3bd 1053 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 14:ea3206e8e3bd 1054 }
dreschpe 14:ea3206e8e3bd 1055 #else // mbed lib
dreschpe 14:ea3206e8e3bd 1056 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1057 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 1058 #else // 16 bit SPI
dreschpe 14:ea3206e8e3bd 1059 _spi.format(8,3); // 8 bit Mode 3
dreschpe 14:ea3206e8e3bd 1060 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 14:ea3206e8e3bd 1061 _spi.format(16,3); // switch back to 16 bit Mode 3
dreschpe 14:ea3206e8e3bd 1062 #endif
dreschpe 14:ea3206e8e3bd 1063 #endif
dreschpe 14:ea3206e8e3bd 1064
dreschpe 14:ea3206e8e3bd 1065 zeichen = &font[((c -32) * offset) + 4]; // start of char bitmap
dreschpe 14:ea3206e8e3bd 1066 w = zeichen[0]; // width of actual char
dreschpe 14:ea3206e8e3bd 1067 for (j=0; j<vert; j++) { // vert line
dreschpe 14:ea3206e8e3bd 1068 for (i=0; i<hor; i++) { // horz line
dreschpe 14:ea3206e8e3bd 1069 z = zeichen[bpl * i + ((j & 0xF8) >> 3)+1];
dreschpe 14:ea3206e8e3bd 1070 b = 1 << (j & 0x07);
dreschpe 14:ea3206e8e3bd 1071 if (( z & b ) == 0x00) {
dreschpe 14:ea3206e8e3bd 1072 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1073 _spi.write(_background >> 8);
dreschpe 14:ea3206e8e3bd 1074 _spi.write(_background & 0xff);
dreschpe 14:ea3206e8e3bd 1075 #else
dreschpe 14:ea3206e8e3bd 1076 _spi.write(_background);
dreschpe 14:ea3206e8e3bd 1077 #endif
dreschpe 14:ea3206e8e3bd 1078 } else {
dreschpe 14:ea3206e8e3bd 1079 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1080 _spi.write(_foreground >> 8);
dreschpe 14:ea3206e8e3bd 1081 _spi.write(_foreground & 0xff);
dreschpe 14:ea3206e8e3bd 1082 #else
dreschpe 14:ea3206e8e3bd 1083 _spi.write(_foreground);
dreschpe 14:ea3206e8e3bd 1084 #endif
dreschpe 14:ea3206e8e3bd 1085 }
dreschpe 14:ea3206e8e3bd 1086 }
dreschpe 14:ea3206e8e3bd 1087 }
dreschpe 14:ea3206e8e3bd 1088 #endif // no DMA
dreschpe 8:65a4de035c3c 1089 _cs = 1;
dreschpe 8:65a4de035c3c 1090 WindowMax();
dreschpe 8:65a4de035c3c 1091 if ((w + 2) < hor) { // x offset to next char
dreschpe 8:65a4de035c3c 1092 char_x += w + 2;
dreschpe 8:65a4de035c3c 1093 } else char_x += hor;
dreschpe 8:65a4de035c3c 1094 }
dreschpe 8:65a4de035c3c 1095
dreschpe 8:65a4de035c3c 1096
dreschpe 8:65a4de035c3c 1097 void SPI_TFT::set_font(unsigned char* f)
dreschpe 8:65a4de035c3c 1098 {
dreschpe 8:65a4de035c3c 1099 font = f;
dreschpe 8:65a4de035c3c 1100 }
dreschpe 8:65a4de035c3c 1101
dreschpe 8:65a4de035c3c 1102
dreschpe 8:65a4de035c3c 1103 void SPI_TFT::Bitmap(unsigned int x, unsigned int y, unsigned int w, unsigned int h,unsigned char *bitmap)
dreschpe 8:65a4de035c3c 1104 {
dreschpe 8:65a4de035c3c 1105 unsigned int j;
dreschpe 8:65a4de035c3c 1106 int padd;
dreschpe 14:ea3206e8e3bd 1107 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 14:ea3206e8e3bd 1108 unsigned char *bitmap_ptr = (unsigned char *)bitmap;
dreschpe 14:ea3206e8e3bd 1109 #else
dreschpe 14:ea3206e8e3bd 1110 unsigned short *bitmap_ptr = (unsigned short *)bitmap;
dreschpe 14:ea3206e8e3bd 1111 #endif
dreschpe 8:65a4de035c3c 1112 // the lines are padded to multiple of 4 bytes in a bitmap
dreschpe 8:65a4de035c3c 1113 padd = -1;
dreschpe 8:65a4de035c3c 1114 do {
dreschpe 8:65a4de035c3c 1115 padd ++;
dreschpe 8:65a4de035c3c 1116 } while (2*(w + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1117 window(x, y, w, h);
dreschpe 8:65a4de035c3c 1118 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1119 _cs = 0;
dreschpe 13:2c91cb947161 1120 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1121 if (spi_port == 0) { // TFT on SSP0
dreschpe 13:2c91cb947161 1122 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1123 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1124 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1125 LPC_SSP0->DMACR = 0x2;
dreschpe 13:2c91cb947161 1126 #endif
dreschpe 8:65a4de035c3c 1127 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1128 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1129 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1130
dreschpe 8:65a4de035c3c 1131 } else {
dreschpe 13:2c91cb947161 1132 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1133 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1134 /* Enable SSP1 for DMA. */
dreschpe 13:2c91cb947161 1135 LPC_SSP1->DMACR = 0x2;
dreschpe 13:2c91cb947161 1136 #endif
dreschpe 8:65a4de035c3c 1137 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1138 LPC_SSP1->DR = 0x72; // start Data command
dreschpe 8:65a4de035c3c 1139 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1140 }
dreschpe 8:65a4de035c3c 1141
dreschpe 8:65a4de035c3c 1142 bitmap_ptr += ((h - 1)* (w + padd));
dreschpe 13:2c91cb947161 1143 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1144 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 1145 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1146 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1147 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)bitmap_ptr;
dreschpe 8:65a4de035c3c 1148 LPC_GPDMACH0->DMACCControl = w | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1149 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1150 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1151 do {
dreschpe 8:65a4de035c3c 1152 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1153
dreschpe 8:65a4de035c3c 1154 bitmap_ptr -= w;
dreschpe 8:65a4de035c3c 1155 bitmap_ptr -= padd;
dreschpe 8:65a4de035c3c 1156 }
dreschpe 8:65a4de035c3c 1157 #else
dreschpe 8:65a4de035c3c 1158 unsigned int i;
dreschpe 8:65a4de035c3c 1159 for (j = 0; j < h; j++) { //Lines
dreschpe 8:65a4de035c3c 1160 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1161 _spi.write(*bitmap_ptr); // one line
dreschpe 8:65a4de035c3c 1162 bitmap_ptr++;
dreschpe 8:65a4de035c3c 1163 }
dreschpe 8:65a4de035c3c 1164 bitmap_ptr -= 2*w;
dreschpe 8:65a4de035c3c 1165 bitmap_ptr -= padd;
dreschpe 13:2c91cb947161 1166 }
dreschpe 13:2c91cb947161 1167 #endif
dreschpe 8:65a4de035c3c 1168 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1169 do {
dreschpe 8:65a4de035c3c 1170 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1171 } else {
dreschpe 8:65a4de035c3c 1172 do {
dreschpe 8:65a4de035c3c 1173 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1174 }
dreschpe 9:a63fd1ad41b0 1175 #else // use mbed lib
dreschpe 13:2c91cb947161 1176 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 13:2c91cb947161 1177 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 13:2c91cb947161 1178 #else
dreschpe 9:a63fd1ad41b0 1179 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1180 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1181 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 13:2c91cb947161 1182 #endif
dreschpe 9:a63fd1ad41b0 1183 unsigned int i;
dreschpe 9:a63fd1ad41b0 1184 for (j = 0; j < h; j++) { //Lines
dreschpe 9:a63fd1ad41b0 1185 for (i = 0; i < w; i++) { // copy pixel data to TFT
dreschpe 13:2c91cb947161 1186 #if defined TARGET_KL25Z // 8 Bit SPI
dreschpe 13:2c91cb947161 1187 _spi.write(*bitmap_ptr);
dreschpe 13:2c91cb947161 1188 bitmap_ptr++;
dreschpe 13:2c91cb947161 1189 _spi.write(*bitmap_ptr);
dreschpe 13:2c91cb947161 1190 bitmap_ptr++;
dreschpe 13:2c91cb947161 1191 #else
dreschpe 9:a63fd1ad41b0 1192 _spi.write(*bitmap_ptr); // one line
dreschpe 9:a63fd1ad41b0 1193 bitmap_ptr++;
dreschpe 13:2c91cb947161 1194 #endif
dreschpe 9:a63fd1ad41b0 1195 }
dreschpe 9:a63fd1ad41b0 1196 bitmap_ptr -= 2*w;
dreschpe 9:a63fd1ad41b0 1197 bitmap_ptr -= padd;
dreschpe 9:a63fd1ad41b0 1198 }
dreschpe 13:2c91cb947161 1199 #endif
dreschpe 8:65a4de035c3c 1200 _cs = 1;
dreschpe 8:65a4de035c3c 1201 WindowMax();
dreschpe 8:65a4de035c3c 1202 }
dreschpe 8:65a4de035c3c 1203
dreschpe 8:65a4de035c3c 1204
dreschpe 13:2c91cb947161 1205 // local filesystem is not implemented in kinetis board
dreschpe 13:2c91cb947161 1206 #if defined TARGET_LPC1768 || defined TARGET_LPC11U24
dreschpe 13:2c91cb947161 1207
dreschpe 13:2c91cb947161 1208
dreschpe 8:65a4de035c3c 1209 int SPI_TFT::BMP_16(unsigned int x, unsigned int y, const char *Name_BMP)
dreschpe 8:65a4de035c3c 1210 {
dreschpe 8:65a4de035c3c 1211
dreschpe 8:65a4de035c3c 1212 #define OffsetPixelWidth 18
dreschpe 8:65a4de035c3c 1213 #define OffsetPixelHeigh 22
dreschpe 8:65a4de035c3c 1214 #define OffsetFileSize 34
dreschpe 8:65a4de035c3c 1215 #define OffsetPixData 10
dreschpe 8:65a4de035c3c 1216 #define OffsetBPP 28
dreschpe 8:65a4de035c3c 1217
dreschpe 8:65a4de035c3c 1218 char filename[50];
dreschpe 8:65a4de035c3c 1219 unsigned char BMP_Header[54];
dreschpe 8:65a4de035c3c 1220 unsigned short BPP_t;
dreschpe 8:65a4de035c3c 1221 unsigned int PixelWidth,PixelHeigh,start_data;
dreschpe 8:65a4de035c3c 1222 unsigned int i,off;
dreschpe 8:65a4de035c3c 1223 int padd,j;
dreschpe 8:65a4de035c3c 1224 unsigned short *line;
dreschpe 8:65a4de035c3c 1225
dreschpe 8:65a4de035c3c 1226 // get the filename
dreschpe 8:65a4de035c3c 1227 LocalFileSystem local("local");
dreschpe 8:65a4de035c3c 1228 sprintf(&filename[0],"/local/");
dreschpe 8:65a4de035c3c 1229 i=7;
dreschpe 8:65a4de035c3c 1230 while (*Name_BMP!='\0') {
dreschpe 8:65a4de035c3c 1231 filename[i++]=*Name_BMP++;
dreschpe 8:65a4de035c3c 1232 }
dreschpe 8:65a4de035c3c 1233
dreschpe 8:65a4de035c3c 1234 fprintf(stderr, "filename : %s \n\r",filename);
dreschpe 8:65a4de035c3c 1235
dreschpe 8:65a4de035c3c 1236 FILE *Image = fopen((const char *)&filename[0], "rb"); // open the bmp file
dreschpe 8:65a4de035c3c 1237 if (!Image) {
dreschpe 8:65a4de035c3c 1238 return(0); // error file not found !
dreschpe 8:65a4de035c3c 1239 }
dreschpe 8:65a4de035c3c 1240
dreschpe 8:65a4de035c3c 1241 fread(&BMP_Header[0],1,54,Image); // get the BMP Header
dreschpe 8:65a4de035c3c 1242
dreschpe 8:65a4de035c3c 1243 if (BMP_Header[0] != 0x42 || BMP_Header[1] != 0x4D) { // check magic byte
dreschpe 8:65a4de035c3c 1244 fclose(Image);
dreschpe 8:65a4de035c3c 1245 return(-1); // error no BMP file
dreschpe 8:65a4de035c3c 1246 }
dreschpe 8:65a4de035c3c 1247
dreschpe 8:65a4de035c3c 1248 BPP_t = BMP_Header[OffsetBPP] + (BMP_Header[OffsetBPP + 1] << 8);
dreschpe 8:65a4de035c3c 1249 if (BPP_t != 0x0010) {
dreschpe 8:65a4de035c3c 1250 fclose(Image);
dreschpe 8:65a4de035c3c 1251 return(-2); // error no 16 bit BMP
dreschpe 8:65a4de035c3c 1252 }
dreschpe 8:65a4de035c3c 1253
dreschpe 8:65a4de035c3c 1254 PixelHeigh = BMP_Header[OffsetPixelHeigh] + (BMP_Header[OffsetPixelHeigh + 1] << 8) + (BMP_Header[OffsetPixelHeigh + 2] << 16) + (BMP_Header[OffsetPixelHeigh + 3] << 24);
dreschpe 8:65a4de035c3c 1255 PixelWidth = BMP_Header[OffsetPixelWidth] + (BMP_Header[OffsetPixelWidth + 1] << 8) + (BMP_Header[OffsetPixelWidth + 2] << 16) + (BMP_Header[OffsetPixelWidth + 3] << 24);
dreschpe 8:65a4de035c3c 1256 if (PixelHeigh > height() + y || PixelWidth > width() + x) {
dreschpe 8:65a4de035c3c 1257 fclose(Image);
dreschpe 8:65a4de035c3c 1258 return(-3); // to big
dreschpe 8:65a4de035c3c 1259 }
dreschpe 8:65a4de035c3c 1260
dreschpe 8:65a4de035c3c 1261 start_data = BMP_Header[OffsetPixData] + (BMP_Header[OffsetPixData + 1] << 8) + (BMP_Header[OffsetPixData + 2] << 16) + (BMP_Header[OffsetPixData + 3] << 24);
dreschpe 8:65a4de035c3c 1262
dreschpe 8:65a4de035c3c 1263 line = (unsigned short *) malloc (2 * PixelWidth); // we need a buffer for a line
dreschpe 8:65a4de035c3c 1264 if (line == NULL) {
dreschpe 8:65a4de035c3c 1265 return(-4); // error no memory
dreschpe 8:65a4de035c3c 1266 }
dreschpe 8:65a4de035c3c 1267
dreschpe 8:65a4de035c3c 1268 // the bmp lines are padded to multiple of 4 bytes
dreschpe 8:65a4de035c3c 1269 padd = -1;
dreschpe 8:65a4de035c3c 1270 do {
dreschpe 8:65a4de035c3c 1271 padd ++;
dreschpe 8:65a4de035c3c 1272 } while ((PixelWidth * 2 + padd)%4 != 0);
dreschpe 8:65a4de035c3c 1273
dreschpe 8:65a4de035c3c 1274
dreschpe 8:65a4de035c3c 1275 //fseek(Image, 70 ,SEEK_SET);
dreschpe 8:65a4de035c3c 1276 window(x, y,PixelWidth ,PixelHeigh);
dreschpe 8:65a4de035c3c 1277 wr_cmd(0x22);
dreschpe 8:65a4de035c3c 1278 _cs = 0;
dreschpe 13:2c91cb947161 1279 #if defined NO_MBED_LIB
dreschpe 8:65a4de035c3c 1280 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1281 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1282 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP0->DR; // we send to SSP0
dreschpe 8:65a4de035c3c 1283 /* Enable SSP0 for DMA. */
dreschpe 8:65a4de035c3c 1284 LPC_SSP0->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1285 #endif
dreschpe 8:65a4de035c3c 1286 LPC_SSP0->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1287 LPC_SSP0->DR = 0x72; // start Data
dreschpe 8:65a4de035c3c 1288 LPC_SSP0->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1289
dreschpe 8:65a4de035c3c 1290 } else {
dreschpe 13:2c91cb947161 1291 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1292 LPC_GPDMACH0->DMACCDestAddr = (uint32_t)&LPC_SSP1->DR; // we send to SSP1
dreschpe 8:65a4de035c3c 1293 /* Enable SSP1 for DMA. */
dreschpe 8:65a4de035c3c 1294 LPC_SSP1->DMACR = 0x2;
dreschpe 8:65a4de035c3c 1295 #endif
dreschpe 8:65a4de035c3c 1296 LPC_SSP1->CR0 &= ~(0x08UL); // set to 8 bit
dreschpe 8:65a4de035c3c 1297 LPC_SSP1->DR = 0x72; // start Data
dreschpe 13:2c91cb947161 1298 LPC_SSP1->CR0 |= 0x08UL; // set to 16 bit
dreschpe 8:65a4de035c3c 1299 }
dreschpe 8:65a4de035c3c 1300 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 8:65a4de035c3c 1301 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 8:65a4de035c3c 1302 fseek(Image, off ,SEEK_SET);
dreschpe 8:65a4de035c3c 1303 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 8:65a4de035c3c 1304 #if defined USE_DMA
dreschpe 8:65a4de035c3c 1305 LPC_GPDMA->DMACIntTCClear = 0x1;
dreschpe 8:65a4de035c3c 1306 LPC_GPDMA->DMACIntErrClr = 0x1;
dreschpe 8:65a4de035c3c 1307 LPC_GPDMACH0->DMACCSrcAddr = (uint32_t)line;
dreschpe 8:65a4de035c3c 1308 LPC_GPDMACH0->DMACCControl = PixelWidth | (1UL << 18) | (1UL << 21) | (1UL << 31) | DMA_CHANNEL_SRC_INC ; // 16 bit transfer , address increment, interrupt
dreschpe 8:65a4de035c3c 1309 LPC_GPDMACH0->DMACCConfig = DMA_CHANNEL_ENABLE | DMA_TRANSFER_TYPE_M2P | (spi_port ? DMA_DEST_SSP1_TX : DMA_DEST_SSP0_TX);
dreschpe 8:65a4de035c3c 1310 LPC_GPDMA->DMACSoftSReq = 0x1;
dreschpe 8:65a4de035c3c 1311 do {
dreschpe 8:65a4de035c3c 1312 } while ((LPC_GPDMA->DMACRawIntTCStat & 0x01) == 0); // DMA is running
dreschpe 8:65a4de035c3c 1313 #else
dreschpe 13:2c91cb947161 1314 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 8:65a4de035c3c 1315 _spi.write(line[i]); // one 16 bit pixel
dreschpe 13:2c91cb947161 1316 }
dreschpe 13:2c91cb947161 1317 #endif
dreschpe 8:65a4de035c3c 1318 }
dreschpe 8:65a4de035c3c 1319 if (spi_port == 0) { // TFT on SSP0
dreschpe 8:65a4de035c3c 1320 do {
dreschpe 8:65a4de035c3c 1321 } while ((LPC_SSP0->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1322 } else {
dreschpe 8:65a4de035c3c 1323 do {
dreschpe 8:65a4de035c3c 1324 } while ((LPC_SSP1->SR & 0x10) == 0x10); // SPI FIFO not empty
dreschpe 8:65a4de035c3c 1325 }
dreschpe 13:2c91cb947161 1326
dreschpe 9:a63fd1ad41b0 1327 #else // use mbed lib
dreschpe 9:a63fd1ad41b0 1328 _spi.format(8,3); // 8 bit Mode 3
dreschpe 9:a63fd1ad41b0 1329 _spi.write(SPI_START | SPI_WR | SPI_DATA); // Write : RS = 1, RW = 0
dreschpe 9:a63fd1ad41b0 1330 _spi.format(16,3); // switch to 16 bit Mode 3
dreschpe 9:a63fd1ad41b0 1331 for (j = PixelHeigh - 1; j >= 0; j--) { //Lines bottom up
dreschpe 9:a63fd1ad41b0 1332 off = j * (PixelWidth * 2 + padd) + start_data; // start of line
dreschpe 9:a63fd1ad41b0 1333 fseek(Image, off ,SEEK_SET);
dreschpe 9:a63fd1ad41b0 1334 fread(line,1,PixelWidth * 2,Image); // read a line - slow !
dreschpe 9:a63fd1ad41b0 1335 for (i = 0; i < PixelWidth; i++) { // copy pixel data to TFT
dreschpe 9:a63fd1ad41b0 1336 _spi.write(line[i]); // one 16 bit pixel
dreschpe 13:2c91cb947161 1337 }
dreschpe 13:2c91cb947161 1338 }
dreschpe 13:2c91cb947161 1339 #endif
dreschpe 8:65a4de035c3c 1340 _cs = 1;
dreschpe 8:65a4de035c3c 1341 free (line);
dreschpe 8:65a4de035c3c 1342 fclose(Image);
dreschpe 8:65a4de035c3c 1343 WindowMax();
dreschpe 8:65a4de035c3c 1344 return(1);
dreschpe 13:2c91cb947161 1345 }
dreschpe 13:2c91cb947161 1346
dreschpe 13:2c91cb947161 1347 #endif