mbed - mbed library

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mbed library

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/MK64F12/MK64F12_ftfe.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:: bogdanm
Date:: Fri Sep 12 16:41:52 2014 +0100
Revision:: 89:552587b429a1
Parent:: TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device/MK64F12/MK64F12_ftfe.h@82:6473597d706e

Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	82:6473597d706e	1	/*
bogdanm	82:6473597d706e	2	* Copyright (c) 2014, Freescale Semiconductor, Inc.
bogdanm	82:6473597d706e	3	* All rights reserved.
bogdanm	82:6473597d706e	4	*
bogdanm	82:6473597d706e	5	* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED
bogdanm	82:6473597d706e	6	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
bogdanm	82:6473597d706e	7	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
bogdanm	82:6473597d706e	8	* SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
bogdanm	82:6473597d706e	9	* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
bogdanm	82:6473597d706e	10	* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm	82:6473597d706e	11	* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm	82:6473597d706e	12	* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
bogdanm	82:6473597d706e	13	* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
bogdanm	82:6473597d706e	14	* OF SUCH DAMAGE.
bogdanm	82:6473597d706e	15	*/
bogdanm	82:6473597d706e	16	/*
bogdanm	82:6473597d706e	17	* WARNING! DO NOT EDIT THIS FILE DIRECTLY!
bogdanm	82:6473597d706e	18	*
bogdanm	82:6473597d706e	19	* This file was generated automatically and any changes may be lost.
bogdanm	82:6473597d706e	20	*/
bogdanm	82:6473597d706e	21	#ifndef __HW_FTFE_REGISTERS_H__
bogdanm	82:6473597d706e	22	#define __HW_FTFE_REGISTERS_H__
bogdanm	82:6473597d706e	23
bogdanm	82:6473597d706e	24	#include "regs.h"
bogdanm	82:6473597d706e	25
bogdanm	82:6473597d706e	26	/*
bogdanm	82:6473597d706e	27	* MK64F12 FTFE
bogdanm	82:6473597d706e	28	*
bogdanm	82:6473597d706e	29	* Flash Memory Interface
bogdanm	82:6473597d706e	30	*
bogdanm	82:6473597d706e	31	* Registers defined in this header file:
bogdanm	82:6473597d706e	32	* - HW_FTFE_FSTAT - Flash Status Register
bogdanm	82:6473597d706e	33	* - HW_FTFE_FCNFG - Flash Configuration Register
bogdanm	82:6473597d706e	34	* - HW_FTFE_FSEC - Flash Security Register
bogdanm	82:6473597d706e	35	* - HW_FTFE_FOPT - Flash Option Register
bogdanm	82:6473597d706e	36	* - HW_FTFE_FCCOB3 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	37	* - HW_FTFE_FCCOB2 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	38	* - HW_FTFE_FCCOB1 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	39	* - HW_FTFE_FCCOB0 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	40	* - HW_FTFE_FCCOB7 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	41	* - HW_FTFE_FCCOB6 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	42	* - HW_FTFE_FCCOB5 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	43	* - HW_FTFE_FCCOB4 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	44	* - HW_FTFE_FCCOBB - Flash Common Command Object Registers
bogdanm	82:6473597d706e	45	* - HW_FTFE_FCCOBA - Flash Common Command Object Registers
bogdanm	82:6473597d706e	46	* - HW_FTFE_FCCOB9 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	47	* - HW_FTFE_FCCOB8 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	48	* - HW_FTFE_FPROT3 - Program Flash Protection Registers
bogdanm	82:6473597d706e	49	* - HW_FTFE_FPROT2 - Program Flash Protection Registers
bogdanm	82:6473597d706e	50	* - HW_FTFE_FPROT1 - Program Flash Protection Registers
bogdanm	82:6473597d706e	51	* - HW_FTFE_FPROT0 - Program Flash Protection Registers
bogdanm	82:6473597d706e	52	* - HW_FTFE_FEPROT - EEPROM Protection Register
bogdanm	82:6473597d706e	53	* - HW_FTFE_FDPROT - Data Flash Protection Register
bogdanm	82:6473597d706e	54	*
bogdanm	82:6473597d706e	55	* - hw_ftfe_t - Struct containing all module registers.
bogdanm	82:6473597d706e	56	*/
bogdanm	82:6473597d706e	57
bogdanm	82:6473597d706e	58	//! @name Module base addresses
bogdanm	82:6473597d706e	59	//@{
bogdanm	82:6473597d706e	60	#ifndef REGS_FTFE_BASE
bogdanm	82:6473597d706e	61	#define HW_FTFE_INSTANCE_COUNT (1U) //!< Number of instances of the FTFE module.
bogdanm	82:6473597d706e	62	#define REGS_FTFE_BASE (0x40020000U) //!< Base address for FTFE.
bogdanm	82:6473597d706e	63	#endif
bogdanm	82:6473597d706e	64	//@}
bogdanm	82:6473597d706e	65
bogdanm	82:6473597d706e	66	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	67	// HW_FTFE_FSTAT - Flash Status Register
bogdanm	82:6473597d706e	68	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	69
bogdanm	82:6473597d706e	70	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	71	/*!
bogdanm	82:6473597d706e	72	* @brief HW_FTFE_FSTAT - Flash Status Register (RW)
bogdanm	82:6473597d706e	73	*
bogdanm	82:6473597d706e	74	* Reset value: 0x00U
bogdanm	82:6473597d706e	75	*
bogdanm	82:6473597d706e	76	* The FSTAT register reports the operational status of the FTFE module. The
bogdanm	82:6473597d706e	77	* CCIF, RDCOLERR, ACCERR, and FPVIOL bits are readable and writable. The MGSTAT0
bogdanm	82:6473597d706e	78	* bit is read only. The unassigned bits read 0 and are not writable. When set, the
bogdanm	82:6473597d706e	79	* Access Error (ACCERR) and Flash Protection Violation (FPVIOL) bits in this
bogdanm	82:6473597d706e	80	* register prevent the launch of any more commands or writes to the FlexRAM (when
bogdanm	82:6473597d706e	81	* EEERDY is set) until the flag is cleared (by writing a one to it).
bogdanm	82:6473597d706e	82	*/
bogdanm	82:6473597d706e	83	typedef union _hw_ftfe_fstat
bogdanm	82:6473597d706e	84	{
bogdanm	82:6473597d706e	85	uint8_t U;
bogdanm	82:6473597d706e	86	struct _hw_ftfe_fstat_bitfields
bogdanm	82:6473597d706e	87	{
bogdanm	82:6473597d706e	88	uint8_t MGSTAT0 : 1; //!< [0] Memory Controller Command Completion
bogdanm	82:6473597d706e	89	//! Status Flag
bogdanm	82:6473597d706e	90	uint8_t RESERVED0 : 3; //!< [3:1]
bogdanm	82:6473597d706e	91	uint8_t FPVIOL : 1; //!< [4] Flash Protection Violation Flag
bogdanm	82:6473597d706e	92	uint8_t ACCERR : 1; //!< [5] Flash Access Error Flag
bogdanm	82:6473597d706e	93	uint8_t RDCOLERR : 1; //!< [6] FTFE Read Collision Error Flag
bogdanm	82:6473597d706e	94	uint8_t CCIF : 1; //!< [7] Command Complete Interrupt Flag
bogdanm	82:6473597d706e	95	} B;
bogdanm	82:6473597d706e	96	} hw_ftfe_fstat_t;
bogdanm	82:6473597d706e	97	#endif
bogdanm	82:6473597d706e	98
bogdanm	82:6473597d706e	99	/*!
bogdanm	82:6473597d706e	100	* @name Constants and macros for entire FTFE_FSTAT register
bogdanm	82:6473597d706e	101	*/
bogdanm	82:6473597d706e	102	//@{
bogdanm	82:6473597d706e	103	#define HW_FTFE_FSTAT_ADDR (REGS_FTFE_BASE + 0x0U)
bogdanm	82:6473597d706e	104
bogdanm	82:6473597d706e	105	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	106	#define HW_FTFE_FSTAT ((__IO hw_ftfe_fstat_t ) HW_FTFE_FSTAT_ADDR)
bogdanm	82:6473597d706e	107	#define HW_FTFE_FSTAT_RD() (HW_FTFE_FSTAT.U)
bogdanm	82:6473597d706e	108	#define HW_FTFE_FSTAT_WR(v) (HW_FTFE_FSTAT.U = (v))
bogdanm	82:6473597d706e	109	#define HW_FTFE_FSTAT_SET(v) (HW_FTFE_FSTAT_WR(HW_FTFE_FSTAT_RD() \| (v)))
bogdanm	82:6473597d706e	110	#define HW_FTFE_FSTAT_CLR(v) (HW_FTFE_FSTAT_WR(HW_FTFE_FSTAT_RD() & ~(v)))
bogdanm	82:6473597d706e	111	#define HW_FTFE_FSTAT_TOG(v) (HW_FTFE_FSTAT_WR(HW_FTFE_FSTAT_RD() ^ (v)))
bogdanm	82:6473597d706e	112	#endif
bogdanm	82:6473597d706e	113	//@}
bogdanm	82:6473597d706e	114
bogdanm	82:6473597d706e	115	/*
bogdanm	82:6473597d706e	116	* Constants & macros for individual FTFE_FSTAT bitfields
bogdanm	82:6473597d706e	117	*/
bogdanm	82:6473597d706e	118
bogdanm	82:6473597d706e	119	/*!
bogdanm	82:6473597d706e	120	* @name Register FTFE_FSTAT, field MGSTAT0[0] (RO)
bogdanm	82:6473597d706e	121	*
bogdanm	82:6473597d706e	122	* The MGSTAT0 status flag is set if an error is detected during execution of an
bogdanm	82:6473597d706e	123	* FTFE command or during the flash reset sequence. As a status flag, this bit
bogdanm	82:6473597d706e	124	* cannot (and need not) be cleared by the user like the other error flags in this
bogdanm	82:6473597d706e	125	* register. The value of the MGSTAT0 bit for "command-N" is valid only at the
bogdanm	82:6473597d706e	126	* end of the "command-N" execution when CCIF=1 and before the next command has
bogdanm	82:6473597d706e	127	* been launched. At some point during the execution of "command-N+1," the previous
bogdanm	82:6473597d706e	128	* result is discarded and any previous error is cleared.
bogdanm	82:6473597d706e	129	*/
bogdanm	82:6473597d706e	130	//@{
bogdanm	82:6473597d706e	131	#define BP_FTFE_FSTAT_MGSTAT0 (0U) //!< Bit position for FTFE_FSTAT_MGSTAT0.
bogdanm	82:6473597d706e	132	#define BM_FTFE_FSTAT_MGSTAT0 (0x01U) //!< Bit mask for FTFE_FSTAT_MGSTAT0.
bogdanm	82:6473597d706e	133	#define BS_FTFE_FSTAT_MGSTAT0 (1U) //!< Bit field size in bits for FTFE_FSTAT_MGSTAT0.
bogdanm	82:6473597d706e	134
bogdanm	82:6473597d706e	135	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	136	//! @brief Read current value of the FTFE_FSTAT_MGSTAT0 field.
bogdanm	82:6473597d706e	137	#define BR_FTFE_FSTAT_MGSTAT0 (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_MGSTAT0))
bogdanm	82:6473597d706e	138	#endif
bogdanm	82:6473597d706e	139	//@}
bogdanm	82:6473597d706e	140
bogdanm	82:6473597d706e	141	/*!
bogdanm	82:6473597d706e	142	* @name Register FTFE_FSTAT, field FPVIOL[4] (W1C)
bogdanm	82:6473597d706e	143	*
bogdanm	82:6473597d706e	144	* The FPVIOL error bit indicates an attempt was made to program or erase an
bogdanm	82:6473597d706e	145	* address in a protected area of program flash or data flash memory during a
bogdanm	82:6473597d706e	146	* command write sequence or a write was attempted to a protected area of the FlexRAM
bogdanm	82:6473597d706e	147	* while enabled for EEPROM. While FPVIOL is set, the CCIF flag cannot be cleared
bogdanm	82:6473597d706e	148	* to launch a command. The FPVIOL bit is cleared by writing a 1 to it. Writing a
bogdanm	82:6473597d706e	149	* 0 to the FPVIOL bit has no effect.
bogdanm	82:6473597d706e	150	*
bogdanm	82:6473597d706e	151	* Values:
bogdanm	82:6473597d706e	152	* - 0 - No protection violation detected
bogdanm	82:6473597d706e	153	* - 1 - Protection violation detected
bogdanm	82:6473597d706e	154	*/
bogdanm	82:6473597d706e	155	//@{
bogdanm	82:6473597d706e	156	#define BP_FTFE_FSTAT_FPVIOL (4U) //!< Bit position for FTFE_FSTAT_FPVIOL.
bogdanm	82:6473597d706e	157	#define BM_FTFE_FSTAT_FPVIOL (0x10U) //!< Bit mask for FTFE_FSTAT_FPVIOL.
bogdanm	82:6473597d706e	158	#define BS_FTFE_FSTAT_FPVIOL (1U) //!< Bit field size in bits for FTFE_FSTAT_FPVIOL.
bogdanm	82:6473597d706e	159
bogdanm	82:6473597d706e	160	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	161	//! @brief Read current value of the FTFE_FSTAT_FPVIOL field.
bogdanm	82:6473597d706e	162	#define BR_FTFE_FSTAT_FPVIOL (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_FPVIOL))
bogdanm	82:6473597d706e	163	#endif
bogdanm	82:6473597d706e	164
bogdanm	82:6473597d706e	165	//! @brief Format value for bitfield FTFE_FSTAT_FPVIOL.
bogdanm	82:6473597d706e	166	#define BF_FTFE_FSTAT_FPVIOL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FSTAT_FPVIOL), uint8_t) & BM_FTFE_FSTAT_FPVIOL)
bogdanm	82:6473597d706e	167
bogdanm	82:6473597d706e	168	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	169	//! @brief Set the FPVIOL field to a new value.
bogdanm	82:6473597d706e	170	#define BW_FTFE_FSTAT_FPVIOL(v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_FPVIOL) = (v))
bogdanm	82:6473597d706e	171	#endif
bogdanm	82:6473597d706e	172	//@}
bogdanm	82:6473597d706e	173
bogdanm	82:6473597d706e	174	/*!
bogdanm	82:6473597d706e	175	* @name Register FTFE_FSTAT, field ACCERR[5] (W1C)
bogdanm	82:6473597d706e	176	*
bogdanm	82:6473597d706e	177	* The ACCERR error bit indicates an illegal access has occurred to an FTFE
bogdanm	82:6473597d706e	178	* resource caused by a violation of the command write sequence or issuing an illegal
bogdanm	82:6473597d706e	179	* FTFE command. While ACCERR is set, the CCIF flag cannot be cleared to launch
bogdanm	82:6473597d706e	180	* a command. The ACCERR bit is cleared by writing a 1 to it. Writing a 0 to the
bogdanm	82:6473597d706e	181	* ACCERR bit has no effect.
bogdanm	82:6473597d706e	182	*
bogdanm	82:6473597d706e	183	* Values:
bogdanm	82:6473597d706e	184	* - 0 - No access error detected
bogdanm	82:6473597d706e	185	* - 1 - Access error detected
bogdanm	82:6473597d706e	186	*/
bogdanm	82:6473597d706e	187	//@{
bogdanm	82:6473597d706e	188	#define BP_FTFE_FSTAT_ACCERR (5U) //!< Bit position for FTFE_FSTAT_ACCERR.
bogdanm	82:6473597d706e	189	#define BM_FTFE_FSTAT_ACCERR (0x20U) //!< Bit mask for FTFE_FSTAT_ACCERR.
bogdanm	82:6473597d706e	190	#define BS_FTFE_FSTAT_ACCERR (1U) //!< Bit field size in bits for FTFE_FSTAT_ACCERR.
bogdanm	82:6473597d706e	191
bogdanm	82:6473597d706e	192	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	193	//! @brief Read current value of the FTFE_FSTAT_ACCERR field.
bogdanm	82:6473597d706e	194	#define BR_FTFE_FSTAT_ACCERR (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_ACCERR))
bogdanm	82:6473597d706e	195	#endif
bogdanm	82:6473597d706e	196
bogdanm	82:6473597d706e	197	//! @brief Format value for bitfield FTFE_FSTAT_ACCERR.
bogdanm	82:6473597d706e	198	#define BF_FTFE_FSTAT_ACCERR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FSTAT_ACCERR), uint8_t) & BM_FTFE_FSTAT_ACCERR)
bogdanm	82:6473597d706e	199
bogdanm	82:6473597d706e	200	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	201	//! @brief Set the ACCERR field to a new value.
bogdanm	82:6473597d706e	202	#define BW_FTFE_FSTAT_ACCERR(v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_ACCERR) = (v))
bogdanm	82:6473597d706e	203	#endif
bogdanm	82:6473597d706e	204	//@}
bogdanm	82:6473597d706e	205
bogdanm	82:6473597d706e	206	/*!
bogdanm	82:6473597d706e	207	* @name Register FTFE_FSTAT, field RDCOLERR[6] (W1C)
bogdanm	82:6473597d706e	208	*
bogdanm	82:6473597d706e	209	* The RDCOLERR error bit indicates that the MCU attempted a read from an FTFE
bogdanm	82:6473597d706e	210	* resource that was being manipulated by an FTFE command (CCIF=0). Any
bogdanm	82:6473597d706e	211	* simultaneous access is detected as a collision error by the block arbitration logic. The
bogdanm	82:6473597d706e	212	* read data in this case cannot be guaranteed. The RDCOLERR bit is cleared by
bogdanm	82:6473597d706e	213	* writing a 1 to it. Writing a 0 to RDCOLERR has no effect.
bogdanm	82:6473597d706e	214	*
bogdanm	82:6473597d706e	215	* Values:
bogdanm	82:6473597d706e	216	* - 0 - No collision error detected
bogdanm	82:6473597d706e	217	* - 1 - Collision error detected
bogdanm	82:6473597d706e	218	*/
bogdanm	82:6473597d706e	219	//@{
bogdanm	82:6473597d706e	220	#define BP_FTFE_FSTAT_RDCOLERR (6U) //!< Bit position for FTFE_FSTAT_RDCOLERR.
bogdanm	82:6473597d706e	221	#define BM_FTFE_FSTAT_RDCOLERR (0x40U) //!< Bit mask for FTFE_FSTAT_RDCOLERR.
bogdanm	82:6473597d706e	222	#define BS_FTFE_FSTAT_RDCOLERR (1U) //!< Bit field size in bits for FTFE_FSTAT_RDCOLERR.
bogdanm	82:6473597d706e	223
bogdanm	82:6473597d706e	224	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	225	//! @brief Read current value of the FTFE_FSTAT_RDCOLERR field.
bogdanm	82:6473597d706e	226	#define BR_FTFE_FSTAT_RDCOLERR (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_RDCOLERR))
bogdanm	82:6473597d706e	227	#endif
bogdanm	82:6473597d706e	228
bogdanm	82:6473597d706e	229	//! @brief Format value for bitfield FTFE_FSTAT_RDCOLERR.
bogdanm	82:6473597d706e	230	#define BF_FTFE_FSTAT_RDCOLERR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FSTAT_RDCOLERR), uint8_t) & BM_FTFE_FSTAT_RDCOLERR)
bogdanm	82:6473597d706e	231
bogdanm	82:6473597d706e	232	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	233	//! @brief Set the RDCOLERR field to a new value.
bogdanm	82:6473597d706e	234	#define BW_FTFE_FSTAT_RDCOLERR(v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_RDCOLERR) = (v))
bogdanm	82:6473597d706e	235	#endif
bogdanm	82:6473597d706e	236	//@}
bogdanm	82:6473597d706e	237
bogdanm	82:6473597d706e	238	/*!
bogdanm	82:6473597d706e	239	* @name Register FTFE_FSTAT, field CCIF[7] (W1C)
bogdanm	82:6473597d706e	240	*
bogdanm	82:6473597d706e	241	* The CCIF flag indicates that a FTFE command or EEPROM file system operation
bogdanm	82:6473597d706e	242	* has completed. The CCIF flag is cleared by writing a 1 to CCIF to launch a
bogdanm	82:6473597d706e	243	* command, and CCIF stays low until command completion or command violation. The
bogdanm	82:6473597d706e	244	* CCIF flag is also cleared by a successful write to FlexRAM while enabled for EEE,
bogdanm	82:6473597d706e	245	* and CCIF stays low until the EEPROM file system has created the associated
bogdanm	82:6473597d706e	246	* EEPROM data record. The CCIF bit is reset to 0 but is set to 1 by the memory
bogdanm	82:6473597d706e	247	* controller at the end of the reset initialization sequence. Depending on how
bogdanm	82:6473597d706e	248	* quickly the read occurs after reset release, the user may or may not see the 0
bogdanm	82:6473597d706e	249	* hardware reset value.
bogdanm	82:6473597d706e	250	*
bogdanm	82:6473597d706e	251	* Values:
bogdanm	82:6473597d706e	252	* - 0 - FTFE command or EEPROM file system operation in progress
bogdanm	82:6473597d706e	253	* - 1 - FTFE command or EEPROM file system operation has completed
bogdanm	82:6473597d706e	254	*/
bogdanm	82:6473597d706e	255	//@{
bogdanm	82:6473597d706e	256	#define BP_FTFE_FSTAT_CCIF (7U) //!< Bit position for FTFE_FSTAT_CCIF.
bogdanm	82:6473597d706e	257	#define BM_FTFE_FSTAT_CCIF (0x80U) //!< Bit mask for FTFE_FSTAT_CCIF.
bogdanm	82:6473597d706e	258	#define BS_FTFE_FSTAT_CCIF (1U) //!< Bit field size in bits for FTFE_FSTAT_CCIF.
bogdanm	82:6473597d706e	259
bogdanm	82:6473597d706e	260	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	261	//! @brief Read current value of the FTFE_FSTAT_CCIF field.
bogdanm	82:6473597d706e	262	#define BR_FTFE_FSTAT_CCIF (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_CCIF))
bogdanm	82:6473597d706e	263	#endif
bogdanm	82:6473597d706e	264
bogdanm	82:6473597d706e	265	//! @brief Format value for bitfield FTFE_FSTAT_CCIF.
bogdanm	82:6473597d706e	266	#define BF_FTFE_FSTAT_CCIF(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FSTAT_CCIF), uint8_t) & BM_FTFE_FSTAT_CCIF)
bogdanm	82:6473597d706e	267
bogdanm	82:6473597d706e	268	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	269	//! @brief Set the CCIF field to a new value.
bogdanm	82:6473597d706e	270	#define BW_FTFE_FSTAT_CCIF(v) (BITBAND_ACCESS8(HW_FTFE_FSTAT_ADDR, BP_FTFE_FSTAT_CCIF) = (v))
bogdanm	82:6473597d706e	271	#endif
bogdanm	82:6473597d706e	272	//@}
bogdanm	82:6473597d706e	273
bogdanm	82:6473597d706e	274	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	275	// HW_FTFE_FCNFG - Flash Configuration Register
bogdanm	82:6473597d706e	276	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	277
bogdanm	82:6473597d706e	278	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	279	/*!
bogdanm	82:6473597d706e	280	* @brief HW_FTFE_FCNFG - Flash Configuration Register (RW)
bogdanm	82:6473597d706e	281	*
bogdanm	82:6473597d706e	282	* Reset value: 0x00U
bogdanm	82:6473597d706e	283	*
bogdanm	82:6473597d706e	284	* This register provides information on the current functional state of the
bogdanm	82:6473597d706e	285	* FTFE module. The erase control bits (ERSAREQ and ERSSUSP) have write
bogdanm	82:6473597d706e	286	* restrictions. SWAP, PFLSH, RAMRDY, and EEERDY are read-only status bits. The unassigned
bogdanm	82:6473597d706e	287	* bits read as noted and are not writable. The reset values for the SWAP, PFLSH,
bogdanm	82:6473597d706e	288	* RAMRDY, and EEERDY bits are determined during the reset sequence.
bogdanm	82:6473597d706e	289	*/
bogdanm	82:6473597d706e	290	typedef union _hw_ftfe_fcnfg
bogdanm	82:6473597d706e	291	{
bogdanm	82:6473597d706e	292	uint8_t U;
bogdanm	82:6473597d706e	293	struct _hw_ftfe_fcnfg_bitfields
bogdanm	82:6473597d706e	294	{
bogdanm	82:6473597d706e	295	uint8_t EEERDY : 1; //!< [0]
bogdanm	82:6473597d706e	296	uint8_t RAMRDY : 1; //!< [1] RAM Ready
bogdanm	82:6473597d706e	297	uint8_t PFLSH : 1; //!< [2] FTFE configuration
bogdanm	82:6473597d706e	298	uint8_t SWAP : 1; //!< [3] Swap
bogdanm	82:6473597d706e	299	uint8_t ERSSUSP : 1; //!< [4] Erase Suspend
bogdanm	82:6473597d706e	300	uint8_t ERSAREQ : 1; //!< [5] Erase All Request
bogdanm	82:6473597d706e	301	uint8_t RDCOLLIE : 1; //!< [6] Read Collision Error Interrupt Enable
bogdanm	82:6473597d706e	302	uint8_t CCIE : 1; //!< [7] Command Complete Interrupt Enable
bogdanm	82:6473597d706e	303	} B;
bogdanm	82:6473597d706e	304	} hw_ftfe_fcnfg_t;
bogdanm	82:6473597d706e	305	#endif
bogdanm	82:6473597d706e	306
bogdanm	82:6473597d706e	307	/*!
bogdanm	82:6473597d706e	308	* @name Constants and macros for entire FTFE_FCNFG register
bogdanm	82:6473597d706e	309	*/
bogdanm	82:6473597d706e	310	//@{
bogdanm	82:6473597d706e	311	#define HW_FTFE_FCNFG_ADDR (REGS_FTFE_BASE + 0x1U)
bogdanm	82:6473597d706e	312
bogdanm	82:6473597d706e	313	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	314	#define HW_FTFE_FCNFG ((__IO hw_ftfe_fcnfg_t ) HW_FTFE_FCNFG_ADDR)
bogdanm	82:6473597d706e	315	#define HW_FTFE_FCNFG_RD() (HW_FTFE_FCNFG.U)
bogdanm	82:6473597d706e	316	#define HW_FTFE_FCNFG_WR(v) (HW_FTFE_FCNFG.U = (v))
bogdanm	82:6473597d706e	317	#define HW_FTFE_FCNFG_SET(v) (HW_FTFE_FCNFG_WR(HW_FTFE_FCNFG_RD() \| (v)))
bogdanm	82:6473597d706e	318	#define HW_FTFE_FCNFG_CLR(v) (HW_FTFE_FCNFG_WR(HW_FTFE_FCNFG_RD() & ~(v)))
bogdanm	82:6473597d706e	319	#define HW_FTFE_FCNFG_TOG(v) (HW_FTFE_FCNFG_WR(HW_FTFE_FCNFG_RD() ^ (v)))
bogdanm	82:6473597d706e	320	#endif
bogdanm	82:6473597d706e	321	//@}
bogdanm	82:6473597d706e	322
bogdanm	82:6473597d706e	323	/*
bogdanm	82:6473597d706e	324	* Constants & macros for individual FTFE_FCNFG bitfields
bogdanm	82:6473597d706e	325	*/
bogdanm	82:6473597d706e	326
bogdanm	82:6473597d706e	327	/*!
bogdanm	82:6473597d706e	328	* @name Register FTFE_FCNFG, field EEERDY[0] (RO)
bogdanm	82:6473597d706e	329	*
bogdanm	82:6473597d706e	330	* For devices with FlexNVM: This flag indicates if the EEPROM backup data has
bogdanm	82:6473597d706e	331	* been copied to the FlexRAM and is therefore available for read access. During
bogdanm	82:6473597d706e	332	* the reset sequence, the EEERDY flag remains clear while CCIF=0 and only sets if
bogdanm	82:6473597d706e	333	* the FlexNVM block is partitioned for EEPROM. For devices without FlexNVM:
bogdanm	82:6473597d706e	334	* This bit is reserved.
bogdanm	82:6473597d706e	335	*
bogdanm	82:6473597d706e	336	* Values:
bogdanm	82:6473597d706e	337	* - 0 - For devices with FlexNVM: FlexRAM is not available for EEPROM operation.
bogdanm	82:6473597d706e	338	* - 1 - For devices with FlexNVM: FlexRAM is available for EEPROM operations
bogdanm	82:6473597d706e	339	* where: reads from the FlexRAM return data previously written to the FlexRAM
bogdanm	82:6473597d706e	340	* in EEPROM mode and writes launch an EEPROM operation to store the written
bogdanm	82:6473597d706e	341	* data in the FlexRAM and EEPROM backup.
bogdanm	82:6473597d706e	342	*/
bogdanm	82:6473597d706e	343	//@{
bogdanm	82:6473597d706e	344	#define BP_FTFE_FCNFG_EEERDY (0U) //!< Bit position for FTFE_FCNFG_EEERDY.
bogdanm	82:6473597d706e	345	#define BM_FTFE_FCNFG_EEERDY (0x01U) //!< Bit mask for FTFE_FCNFG_EEERDY.
bogdanm	82:6473597d706e	346	#define BS_FTFE_FCNFG_EEERDY (1U) //!< Bit field size in bits for FTFE_FCNFG_EEERDY.
bogdanm	82:6473597d706e	347
bogdanm	82:6473597d706e	348	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	349	//! @brief Read current value of the FTFE_FCNFG_EEERDY field.
bogdanm	82:6473597d706e	350	#define BR_FTFE_FCNFG_EEERDY (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_EEERDY))
bogdanm	82:6473597d706e	351	#endif
bogdanm	82:6473597d706e	352	//@}
bogdanm	82:6473597d706e	353
bogdanm	82:6473597d706e	354	/*!
bogdanm	82:6473597d706e	355	* @name Register FTFE_FCNFG, field RAMRDY[1] (RO)
bogdanm	82:6473597d706e	356	*
bogdanm	82:6473597d706e	357	* This flag indicates the current status of the FlexRAM/ programming
bogdanm	82:6473597d706e	358	* acceleration RAM. For devices with FlexNVM: The state of the RAMRDY flag is normally
bogdanm	82:6473597d706e	359	* controlled by the Set FlexRAM Function command. During the reset sequence, the
bogdanm	82:6473597d706e	360	* RAMRDY flag is cleared if the FlexNVM block is partitioned for EEPROM and will
bogdanm	82:6473597d706e	361	* be set if the FlexNVM block is not partitioned for EEPROM . The RAMRDY flag is
bogdanm	82:6473597d706e	362	* cleared if the Program Partition command is run to partition the FlexNVM block
bogdanm	82:6473597d706e	363	* for EEPROM. The RAMRDY flag sets after completion of the Erase All Blocks
bogdanm	82:6473597d706e	364	* command or execution of the erase-all operation triggered external to the FTFE.
bogdanm	82:6473597d706e	365	* For devices without FlexNVM: This bit should always be set.
bogdanm	82:6473597d706e	366	*
bogdanm	82:6473597d706e	367	* Values:
bogdanm	82:6473597d706e	368	* - 0 - For devices with FlexNVM: FlexRAM is not available for traditional RAM
bogdanm	82:6473597d706e	369	* access. For devices without FlexNVM: Programming acceleration RAM is not
bogdanm	82:6473597d706e	370	* available.
bogdanm	82:6473597d706e	371	* - 1 - For devices with FlexNVM: FlexRAM is available as traditional RAM only;
bogdanm	82:6473597d706e	372	* writes to the FlexRAM do not trigger EEPROM operations. For devices
bogdanm	82:6473597d706e	373	* without FlexNVM: Programming acceleration RAM is available.
bogdanm	82:6473597d706e	374	*/
bogdanm	82:6473597d706e	375	//@{
bogdanm	82:6473597d706e	376	#define BP_FTFE_FCNFG_RAMRDY (1U) //!< Bit position for FTFE_FCNFG_RAMRDY.
bogdanm	82:6473597d706e	377	#define BM_FTFE_FCNFG_RAMRDY (0x02U) //!< Bit mask for FTFE_FCNFG_RAMRDY.
bogdanm	82:6473597d706e	378	#define BS_FTFE_FCNFG_RAMRDY (1U) //!< Bit field size in bits for FTFE_FCNFG_RAMRDY.
bogdanm	82:6473597d706e	379
bogdanm	82:6473597d706e	380	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	381	//! @brief Read current value of the FTFE_FCNFG_RAMRDY field.
bogdanm	82:6473597d706e	382	#define BR_FTFE_FCNFG_RAMRDY (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_RAMRDY))
bogdanm	82:6473597d706e	383	#endif
bogdanm	82:6473597d706e	384	//@}
bogdanm	82:6473597d706e	385
bogdanm	82:6473597d706e	386	/*!
bogdanm	82:6473597d706e	387	* @name Register FTFE_FCNFG, field PFLSH[2] (RO)
bogdanm	82:6473597d706e	388	*
bogdanm	82:6473597d706e	389	* Values:
bogdanm	82:6473597d706e	390	* - 0 - For devices with FlexNVM: FTFE configuration supports two program flash
bogdanm	82:6473597d706e	391	* blocks and two FlexNVM blocks For devices with program flash only:
bogdanm	82:6473597d706e	392	* Reserved
bogdanm	82:6473597d706e	393	* - 1 - For devices with FlexNVM: Reserved For devices with program flash only:
bogdanm	82:6473597d706e	394	* FTFE configuration supports four program flash blocks
bogdanm	82:6473597d706e	395	*/
bogdanm	82:6473597d706e	396	//@{
bogdanm	82:6473597d706e	397	#define BP_FTFE_FCNFG_PFLSH (2U) //!< Bit position for FTFE_FCNFG_PFLSH.
bogdanm	82:6473597d706e	398	#define BM_FTFE_FCNFG_PFLSH (0x04U) //!< Bit mask for FTFE_FCNFG_PFLSH.
bogdanm	82:6473597d706e	399	#define BS_FTFE_FCNFG_PFLSH (1U) //!< Bit field size in bits for FTFE_FCNFG_PFLSH.
bogdanm	82:6473597d706e	400
bogdanm	82:6473597d706e	401	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	402	//! @brief Read current value of the FTFE_FCNFG_PFLSH field.
bogdanm	82:6473597d706e	403	#define BR_FTFE_FCNFG_PFLSH (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_PFLSH))
bogdanm	82:6473597d706e	404	#endif
bogdanm	82:6473597d706e	405	//@}
bogdanm	82:6473597d706e	406
bogdanm	82:6473597d706e	407	/*!
bogdanm	82:6473597d706e	408	* @name Register FTFE_FCNFG, field SWAP[3] (RO)
bogdanm	82:6473597d706e	409	*
bogdanm	82:6473597d706e	410	* The SWAP flag indicates which half of the program flash space is located at
bogdanm	82:6473597d706e	411	* relative address 0x0000. The state of the SWAP flag is set by the FTFE during
bogdanm	82:6473597d706e	412	* the reset sequence. See for information on swap management.
bogdanm	82:6473597d706e	413	*
bogdanm	82:6473597d706e	414	* Values:
bogdanm	82:6473597d706e	415	* - 0 - For devices with FlexNVM: Program flash 0 block is located at relative
bogdanm	82:6473597d706e	416	* address 0x0000 For devices with program flash only: Program flash 0 block
bogdanm	82:6473597d706e	417	* is located at relative address 0x0000
bogdanm	82:6473597d706e	418	* - 1 - For devices with FlexNVM: Reserved For devices with program flash only:
bogdanm	82:6473597d706e	419	* Program flash 1 block is located at relative address 0x0000
bogdanm	82:6473597d706e	420	*/
bogdanm	82:6473597d706e	421	//@{
bogdanm	82:6473597d706e	422	#define BP_FTFE_FCNFG_SWAP (3U) //!< Bit position for FTFE_FCNFG_SWAP.
bogdanm	82:6473597d706e	423	#define BM_FTFE_FCNFG_SWAP (0x08U) //!< Bit mask for FTFE_FCNFG_SWAP.
bogdanm	82:6473597d706e	424	#define BS_FTFE_FCNFG_SWAP (1U) //!< Bit field size in bits for FTFE_FCNFG_SWAP.
bogdanm	82:6473597d706e	425
bogdanm	82:6473597d706e	426	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	427	//! @brief Read current value of the FTFE_FCNFG_SWAP field.
bogdanm	82:6473597d706e	428	#define BR_FTFE_FCNFG_SWAP (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_SWAP))
bogdanm	82:6473597d706e	429	#endif
bogdanm	82:6473597d706e	430	//@}
bogdanm	82:6473597d706e	431
bogdanm	82:6473597d706e	432	/*!
bogdanm	82:6473597d706e	433	* @name Register FTFE_FCNFG, field ERSSUSP[4] (RW)
bogdanm	82:6473597d706e	434	*
bogdanm	82:6473597d706e	435	* The ERSSUSP bit allows the user to suspend (interrupt) the Erase Flash Sector
bogdanm	82:6473597d706e	436	* command while it is executing.
bogdanm	82:6473597d706e	437	*
bogdanm	82:6473597d706e	438	* Values:
bogdanm	82:6473597d706e	439	* - 0 - No suspend requested
bogdanm	82:6473597d706e	440	* - 1 - Suspend the current Erase Flash Sector command execution.
bogdanm	82:6473597d706e	441	*/
bogdanm	82:6473597d706e	442	//@{
bogdanm	82:6473597d706e	443	#define BP_FTFE_FCNFG_ERSSUSP (4U) //!< Bit position for FTFE_FCNFG_ERSSUSP.
bogdanm	82:6473597d706e	444	#define BM_FTFE_FCNFG_ERSSUSP (0x10U) //!< Bit mask for FTFE_FCNFG_ERSSUSP.
bogdanm	82:6473597d706e	445	#define BS_FTFE_FCNFG_ERSSUSP (1U) //!< Bit field size in bits for FTFE_FCNFG_ERSSUSP.
bogdanm	82:6473597d706e	446
bogdanm	82:6473597d706e	447	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	448	//! @brief Read current value of the FTFE_FCNFG_ERSSUSP field.
bogdanm	82:6473597d706e	449	#define BR_FTFE_FCNFG_ERSSUSP (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_ERSSUSP))
bogdanm	82:6473597d706e	450	#endif
bogdanm	82:6473597d706e	451
bogdanm	82:6473597d706e	452	//! @brief Format value for bitfield FTFE_FCNFG_ERSSUSP.
bogdanm	82:6473597d706e	453	#define BF_FTFE_FCNFG_ERSSUSP(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCNFG_ERSSUSP), uint8_t) & BM_FTFE_FCNFG_ERSSUSP)
bogdanm	82:6473597d706e	454
bogdanm	82:6473597d706e	455	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	456	//! @brief Set the ERSSUSP field to a new value.
bogdanm	82:6473597d706e	457	#define BW_FTFE_FCNFG_ERSSUSP(v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_ERSSUSP) = (v))
bogdanm	82:6473597d706e	458	#endif
bogdanm	82:6473597d706e	459	//@}
bogdanm	82:6473597d706e	460
bogdanm	82:6473597d706e	461	/*!
bogdanm	82:6473597d706e	462	* @name Register FTFE_FCNFG, field ERSAREQ[5] (RO)
bogdanm	82:6473597d706e	463	*
bogdanm	82:6473597d706e	464	* This bit issues a request to the memory controller to execute the Erase All
bogdanm	82:6473597d706e	465	* Blocks command and release security. ERSAREQ is not directly writable but is
bogdanm	82:6473597d706e	466	* under indirect user control. Refer to the device's Chip Configuration details on
bogdanm	82:6473597d706e	467	* how to request this command. The ERSAREQ bit sets when an erase all request
bogdanm	82:6473597d706e	468	* is triggered external to the FTFE and CCIF is set (no command is currently
bogdanm	82:6473597d706e	469	* being executed). ERSAREQ is cleared by the FTFE when the operation completes.
bogdanm	82:6473597d706e	470	*
bogdanm	82:6473597d706e	471	* Values:
bogdanm	82:6473597d706e	472	* - 0 - No request or request complete
bogdanm	82:6473597d706e	473	* - 1 - Request to: run the Erase All Blocks command, verify the erased state,
bogdanm	82:6473597d706e	474	* program the security byte in the Flash Configuration Field to the unsecure
bogdanm	82:6473597d706e	475	* state, and release MCU security by setting the FSEC[SEC] field to the
bogdanm	82:6473597d706e	476	* unsecure state.
bogdanm	82:6473597d706e	477	*/
bogdanm	82:6473597d706e	478	//@{
bogdanm	82:6473597d706e	479	#define BP_FTFE_FCNFG_ERSAREQ (5U) //!< Bit position for FTFE_FCNFG_ERSAREQ.
bogdanm	82:6473597d706e	480	#define BM_FTFE_FCNFG_ERSAREQ (0x20U) //!< Bit mask for FTFE_FCNFG_ERSAREQ.
bogdanm	82:6473597d706e	481	#define BS_FTFE_FCNFG_ERSAREQ (1U) //!< Bit field size in bits for FTFE_FCNFG_ERSAREQ.
bogdanm	82:6473597d706e	482
bogdanm	82:6473597d706e	483	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	484	//! @brief Read current value of the FTFE_FCNFG_ERSAREQ field.
bogdanm	82:6473597d706e	485	#define BR_FTFE_FCNFG_ERSAREQ (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_ERSAREQ))
bogdanm	82:6473597d706e	486	#endif
bogdanm	82:6473597d706e	487	//@}
bogdanm	82:6473597d706e	488
bogdanm	82:6473597d706e	489	/*!
bogdanm	82:6473597d706e	490	* @name Register FTFE_FCNFG, field RDCOLLIE[6] (RW)
bogdanm	82:6473597d706e	491	*
bogdanm	82:6473597d706e	492	* The RDCOLLIE bit controls interrupt generation when an FTFE read collision
bogdanm	82:6473597d706e	493	* error occurs.
bogdanm	82:6473597d706e	494	*
bogdanm	82:6473597d706e	495	* Values:
bogdanm	82:6473597d706e	496	* - 0 - Read collision error interrupt disabled
bogdanm	82:6473597d706e	497	* - 1 - Read collision error interrupt enabled. An interrupt request is
bogdanm	82:6473597d706e	498	* generated whenever an FTFE read collision error is detected (see the description
bogdanm	82:6473597d706e	499	* of FSTAT[RDCOLERR]).
bogdanm	82:6473597d706e	500	*/
bogdanm	82:6473597d706e	501	//@{
bogdanm	82:6473597d706e	502	#define BP_FTFE_FCNFG_RDCOLLIE (6U) //!< Bit position for FTFE_FCNFG_RDCOLLIE.
bogdanm	82:6473597d706e	503	#define BM_FTFE_FCNFG_RDCOLLIE (0x40U) //!< Bit mask for FTFE_FCNFG_RDCOLLIE.
bogdanm	82:6473597d706e	504	#define BS_FTFE_FCNFG_RDCOLLIE (1U) //!< Bit field size in bits for FTFE_FCNFG_RDCOLLIE.
bogdanm	82:6473597d706e	505
bogdanm	82:6473597d706e	506	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	507	//! @brief Read current value of the FTFE_FCNFG_RDCOLLIE field.
bogdanm	82:6473597d706e	508	#define BR_FTFE_FCNFG_RDCOLLIE (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_RDCOLLIE))
bogdanm	82:6473597d706e	509	#endif
bogdanm	82:6473597d706e	510
bogdanm	82:6473597d706e	511	//! @brief Format value for bitfield FTFE_FCNFG_RDCOLLIE.
bogdanm	82:6473597d706e	512	#define BF_FTFE_FCNFG_RDCOLLIE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCNFG_RDCOLLIE), uint8_t) & BM_FTFE_FCNFG_RDCOLLIE)
bogdanm	82:6473597d706e	513
bogdanm	82:6473597d706e	514	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	515	//! @brief Set the RDCOLLIE field to a new value.
bogdanm	82:6473597d706e	516	#define BW_FTFE_FCNFG_RDCOLLIE(v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_RDCOLLIE) = (v))
bogdanm	82:6473597d706e	517	#endif
bogdanm	82:6473597d706e	518	//@}
bogdanm	82:6473597d706e	519
bogdanm	82:6473597d706e	520	/*!
bogdanm	82:6473597d706e	521	* @name Register FTFE_FCNFG, field CCIE[7] (RW)
bogdanm	82:6473597d706e	522	*
bogdanm	82:6473597d706e	523	* The CCIE bit controls interrupt generation when an FTFE command completes.
bogdanm	82:6473597d706e	524	*
bogdanm	82:6473597d706e	525	* Values:
bogdanm	82:6473597d706e	526	* - 0 - Command complete interrupt disabled
bogdanm	82:6473597d706e	527	* - 1 - Command complete interrupt enabled. An interrupt request is generated
bogdanm	82:6473597d706e	528	* whenever the FSTAT[CCIF] flag is set.
bogdanm	82:6473597d706e	529	*/
bogdanm	82:6473597d706e	530	//@{
bogdanm	82:6473597d706e	531	#define BP_FTFE_FCNFG_CCIE (7U) //!< Bit position for FTFE_FCNFG_CCIE.
bogdanm	82:6473597d706e	532	#define BM_FTFE_FCNFG_CCIE (0x80U) //!< Bit mask for FTFE_FCNFG_CCIE.
bogdanm	82:6473597d706e	533	#define BS_FTFE_FCNFG_CCIE (1U) //!< Bit field size in bits for FTFE_FCNFG_CCIE.
bogdanm	82:6473597d706e	534
bogdanm	82:6473597d706e	535	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	536	//! @brief Read current value of the FTFE_FCNFG_CCIE field.
bogdanm	82:6473597d706e	537	#define BR_FTFE_FCNFG_CCIE (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_CCIE))
bogdanm	82:6473597d706e	538	#endif
bogdanm	82:6473597d706e	539
bogdanm	82:6473597d706e	540	//! @brief Format value for bitfield FTFE_FCNFG_CCIE.
bogdanm	82:6473597d706e	541	#define BF_FTFE_FCNFG_CCIE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCNFG_CCIE), uint8_t) & BM_FTFE_FCNFG_CCIE)
bogdanm	82:6473597d706e	542
bogdanm	82:6473597d706e	543	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	544	//! @brief Set the CCIE field to a new value.
bogdanm	82:6473597d706e	545	#define BW_FTFE_FCNFG_CCIE(v) (BITBAND_ACCESS8(HW_FTFE_FCNFG_ADDR, BP_FTFE_FCNFG_CCIE) = (v))
bogdanm	82:6473597d706e	546	#endif
bogdanm	82:6473597d706e	547	//@}
bogdanm	82:6473597d706e	548
bogdanm	82:6473597d706e	549	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	550	// HW_FTFE_FSEC - Flash Security Register
bogdanm	82:6473597d706e	551	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	552
bogdanm	82:6473597d706e	553	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	554	/*!
bogdanm	82:6473597d706e	555	* @brief HW_FTFE_FSEC - Flash Security Register (RO)
bogdanm	82:6473597d706e	556	*
bogdanm	82:6473597d706e	557	* Reset value: 0x00U
bogdanm	82:6473597d706e	558	*
bogdanm	82:6473597d706e	559	* This read-only register holds all bits associated with the security of the
bogdanm	82:6473597d706e	560	* MCU and FTFE module. During the reset sequence, the register is loaded with the
bogdanm	82:6473597d706e	561	* contents of the flash security byte in the Flash Configuration Field located
bogdanm	82:6473597d706e	562	* in program flash memory. The Flash basis for the values is signified by X in
bogdanm	82:6473597d706e	563	* the reset value.
bogdanm	82:6473597d706e	564	*/
bogdanm	82:6473597d706e	565	typedef union _hw_ftfe_fsec
bogdanm	82:6473597d706e	566	{
bogdanm	82:6473597d706e	567	uint8_t U;
bogdanm	82:6473597d706e	568	struct _hw_ftfe_fsec_bitfields
bogdanm	82:6473597d706e	569	{
bogdanm	82:6473597d706e	570	uint8_t SEC : 2; //!< [1:0] Flash Security
bogdanm	82:6473597d706e	571	uint8_t FSLACC : 2; //!< [3:2] Freescale Failure Analysis Access Code
bogdanm	82:6473597d706e	572	uint8_t MEEN : 2; //!< [5:4] Mass Erase Enable Bits
bogdanm	82:6473597d706e	573	uint8_t KEYEN : 2; //!< [7:6] Backdoor Key Security Enable
bogdanm	82:6473597d706e	574	} B;
bogdanm	82:6473597d706e	575	} hw_ftfe_fsec_t;
bogdanm	82:6473597d706e	576	#endif
bogdanm	82:6473597d706e	577
bogdanm	82:6473597d706e	578	/*!
bogdanm	82:6473597d706e	579	* @name Constants and macros for entire FTFE_FSEC register
bogdanm	82:6473597d706e	580	*/
bogdanm	82:6473597d706e	581	//@{
bogdanm	82:6473597d706e	582	#define HW_FTFE_FSEC_ADDR (REGS_FTFE_BASE + 0x2U)
bogdanm	82:6473597d706e	583
bogdanm	82:6473597d706e	584	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	585	#define HW_FTFE_FSEC ((__I hw_ftfe_fsec_t ) HW_FTFE_FSEC_ADDR)
bogdanm	82:6473597d706e	586	#define HW_FTFE_FSEC_RD() (HW_FTFE_FSEC.U)
bogdanm	82:6473597d706e	587	#endif
bogdanm	82:6473597d706e	588	//@}
bogdanm	82:6473597d706e	589
bogdanm	82:6473597d706e	590	/*
bogdanm	82:6473597d706e	591	* Constants & macros for individual FTFE_FSEC bitfields
bogdanm	82:6473597d706e	592	*/
bogdanm	82:6473597d706e	593
bogdanm	82:6473597d706e	594	/*!
bogdanm	82:6473597d706e	595	* @name Register FTFE_FSEC, field SEC[1:0] (RO)
bogdanm	82:6473597d706e	596	*
bogdanm	82:6473597d706e	597	* These bits define the security state of the MCU. In the secure state, the MCU
bogdanm	82:6473597d706e	598	* limits access to FTFE module resources. The limitations are defined per
bogdanm	82:6473597d706e	599	* device and are detailed in the Chip Configuration details. If the FTFE module is
bogdanm	82:6473597d706e	600	* unsecured using backdoor key access, the SEC bits are forced to 10b.
bogdanm	82:6473597d706e	601	*
bogdanm	82:6473597d706e	602	* Values:
bogdanm	82:6473597d706e	603	* - 00 - MCU security status is secure
bogdanm	82:6473597d706e	604	* - 01 - MCU security status is secure
bogdanm	82:6473597d706e	605	* - 10 - MCU security status is unsecure (The standard shipping condition of
bogdanm	82:6473597d706e	606	* the FTFE is unsecure.)
bogdanm	82:6473597d706e	607	* - 11 - MCU security status is secure
bogdanm	82:6473597d706e	608	*/
bogdanm	82:6473597d706e	609	//@{
bogdanm	82:6473597d706e	610	#define BP_FTFE_FSEC_SEC (0U) //!< Bit position for FTFE_FSEC_SEC.
bogdanm	82:6473597d706e	611	#define BM_FTFE_FSEC_SEC (0x03U) //!< Bit mask for FTFE_FSEC_SEC.
bogdanm	82:6473597d706e	612	#define BS_FTFE_FSEC_SEC (2U) //!< Bit field size in bits for FTFE_FSEC_SEC.
bogdanm	82:6473597d706e	613
bogdanm	82:6473597d706e	614	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	615	//! @brief Read current value of the FTFE_FSEC_SEC field.
bogdanm	82:6473597d706e	616	#define BR_FTFE_FSEC_SEC (HW_FTFE_FSEC.B.SEC)
bogdanm	82:6473597d706e	617	#endif
bogdanm	82:6473597d706e	618	//@}
bogdanm	82:6473597d706e	619
bogdanm	82:6473597d706e	620	/*!
bogdanm	82:6473597d706e	621	* @name Register FTFE_FSEC, field FSLACC[3:2] (RO)
bogdanm	82:6473597d706e	622	*
bogdanm	82:6473597d706e	623	* These bits enable or disable access to the flash memory contents during
bogdanm	82:6473597d706e	624	* returned part failure analysis at Freescale. When SEC is secure and FSLACC is
bogdanm	82:6473597d706e	625	* denied, access to the program flash contents is denied and any failure analysis
bogdanm	82:6473597d706e	626	* performed by Freescale factory test must begin with a full erase to unsecure the
bogdanm	82:6473597d706e	627	* part. When access is granted (SEC is unsecure, or SEC is secure and FSLACC is
bogdanm	82:6473597d706e	628	* granted), Freescale factory testing has visibility of the current flash
bogdanm	82:6473597d706e	629	* contents. The state of the FSLACC bits is only relevant when the SEC bits are set to
bogdanm	82:6473597d706e	630	* secure. When the SEC field is set to unsecure, the FSLACC setting does not
bogdanm	82:6473597d706e	631	* matter.
bogdanm	82:6473597d706e	632	*
bogdanm	82:6473597d706e	633	* Values:
bogdanm	82:6473597d706e	634	* - 00 - Freescale factory access granted
bogdanm	82:6473597d706e	635	* - 01 - Freescale factory access denied
bogdanm	82:6473597d706e	636	* - 10 - Freescale factory access denied
bogdanm	82:6473597d706e	637	* - 11 - Freescale factory access granted
bogdanm	82:6473597d706e	638	*/
bogdanm	82:6473597d706e	639	//@{
bogdanm	82:6473597d706e	640	#define BP_FTFE_FSEC_FSLACC (2U) //!< Bit position for FTFE_FSEC_FSLACC.
bogdanm	82:6473597d706e	641	#define BM_FTFE_FSEC_FSLACC (0x0CU) //!< Bit mask for FTFE_FSEC_FSLACC.
bogdanm	82:6473597d706e	642	#define BS_FTFE_FSEC_FSLACC (2U) //!< Bit field size in bits for FTFE_FSEC_FSLACC.
bogdanm	82:6473597d706e	643
bogdanm	82:6473597d706e	644	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	645	//! @brief Read current value of the FTFE_FSEC_FSLACC field.
bogdanm	82:6473597d706e	646	#define BR_FTFE_FSEC_FSLACC (HW_FTFE_FSEC.B.FSLACC)
bogdanm	82:6473597d706e	647	#endif
bogdanm	82:6473597d706e	648	//@}
bogdanm	82:6473597d706e	649
bogdanm	82:6473597d706e	650	/*!
bogdanm	82:6473597d706e	651	* @name Register FTFE_FSEC, field MEEN[5:4] (RO)
bogdanm	82:6473597d706e	652	*
bogdanm	82:6473597d706e	653	* Enables and disables mass erase capability of the FTFE module. The state of
bogdanm	82:6473597d706e	654	* the MEEN bits is only relevant when the SEC bits are set to secure outside of
bogdanm	82:6473597d706e	655	* NVM Normal Mode. When the SEC field is set to unsecure, the MEEN setting does
bogdanm	82:6473597d706e	656	* not matter.
bogdanm	82:6473597d706e	657	*
bogdanm	82:6473597d706e	658	* Values:
bogdanm	82:6473597d706e	659	* - 00 - Mass erase is enabled
bogdanm	82:6473597d706e	660	* - 01 - Mass erase is enabled
bogdanm	82:6473597d706e	661	* - 10 - Mass erase is disabled
bogdanm	82:6473597d706e	662	* - 11 - Mass erase is enabled
bogdanm	82:6473597d706e	663	*/
bogdanm	82:6473597d706e	664	//@{
bogdanm	82:6473597d706e	665	#define BP_FTFE_FSEC_MEEN (4U) //!< Bit position for FTFE_FSEC_MEEN.
bogdanm	82:6473597d706e	666	#define BM_FTFE_FSEC_MEEN (0x30U) //!< Bit mask for FTFE_FSEC_MEEN.
bogdanm	82:6473597d706e	667	#define BS_FTFE_FSEC_MEEN (2U) //!< Bit field size in bits for FTFE_FSEC_MEEN.
bogdanm	82:6473597d706e	668
bogdanm	82:6473597d706e	669	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	670	//! @brief Read current value of the FTFE_FSEC_MEEN field.
bogdanm	82:6473597d706e	671	#define BR_FTFE_FSEC_MEEN (HW_FTFE_FSEC.B.MEEN)
bogdanm	82:6473597d706e	672	#endif
bogdanm	82:6473597d706e	673	//@}
bogdanm	82:6473597d706e	674
bogdanm	82:6473597d706e	675	/*!
bogdanm	82:6473597d706e	676	* @name Register FTFE_FSEC, field KEYEN[7:6] (RO)
bogdanm	82:6473597d706e	677	*
bogdanm	82:6473597d706e	678	* These bits enable and disable backdoor key access to the FTFE module.
bogdanm	82:6473597d706e	679	*
bogdanm	82:6473597d706e	680	* Values:
bogdanm	82:6473597d706e	681	* - 00 - Backdoor key access disabled
bogdanm	82:6473597d706e	682	* - 01 - Backdoor key access disabled (preferred KEYEN state to disable
bogdanm	82:6473597d706e	683	* backdoor key access)
bogdanm	82:6473597d706e	684	* - 10 - Backdoor key access enabled
bogdanm	82:6473597d706e	685	* - 11 - Backdoor key access disabled
bogdanm	82:6473597d706e	686	*/
bogdanm	82:6473597d706e	687	//@{
bogdanm	82:6473597d706e	688	#define BP_FTFE_FSEC_KEYEN (6U) //!< Bit position for FTFE_FSEC_KEYEN.
bogdanm	82:6473597d706e	689	#define BM_FTFE_FSEC_KEYEN (0xC0U) //!< Bit mask for FTFE_FSEC_KEYEN.
bogdanm	82:6473597d706e	690	#define BS_FTFE_FSEC_KEYEN (2U) //!< Bit field size in bits for FTFE_FSEC_KEYEN.
bogdanm	82:6473597d706e	691
bogdanm	82:6473597d706e	692	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	693	//! @brief Read current value of the FTFE_FSEC_KEYEN field.
bogdanm	82:6473597d706e	694	#define BR_FTFE_FSEC_KEYEN (HW_FTFE_FSEC.B.KEYEN)
bogdanm	82:6473597d706e	695	#endif
bogdanm	82:6473597d706e	696	//@}
bogdanm	82:6473597d706e	697
bogdanm	82:6473597d706e	698	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	699	// HW_FTFE_FOPT - Flash Option Register
bogdanm	82:6473597d706e	700	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	701
bogdanm	82:6473597d706e	702	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	703	/*!
bogdanm	82:6473597d706e	704	* @brief HW_FTFE_FOPT - Flash Option Register (RO)
bogdanm	82:6473597d706e	705	*
bogdanm	82:6473597d706e	706	* Reset value: 0x00U
bogdanm	82:6473597d706e	707	*
bogdanm	82:6473597d706e	708	* The flash option register allows the MCU to customize its operations by
bogdanm	82:6473597d706e	709	* examining the state of these read-only bits, which are loaded from NVM at reset.
bogdanm	82:6473597d706e	710	* The function of the bits is defined in the device's Chip Configuration details.
bogdanm	82:6473597d706e	711	* All bits in the register are read-only. During the reset sequence, the
bogdanm	82:6473597d706e	712	* register is loaded from the flash nonvolatile option byte in the Flash Configuration
bogdanm	82:6473597d706e	713	* Field located in program flash memory. The flash basis for the values is
bogdanm	82:6473597d706e	714	* signified by X in the reset value.
bogdanm	82:6473597d706e	715	*/
bogdanm	82:6473597d706e	716	typedef union _hw_ftfe_fopt
bogdanm	82:6473597d706e	717	{
bogdanm	82:6473597d706e	718	uint8_t U;
bogdanm	82:6473597d706e	719	struct _hw_ftfe_fopt_bitfields
bogdanm	82:6473597d706e	720	{
bogdanm	82:6473597d706e	721	uint8_t OPT : 8; //!< [7:0] Nonvolatile Option
bogdanm	82:6473597d706e	722	} B;
bogdanm	82:6473597d706e	723	} hw_ftfe_fopt_t;
bogdanm	82:6473597d706e	724	#endif
bogdanm	82:6473597d706e	725
bogdanm	82:6473597d706e	726	/*!
bogdanm	82:6473597d706e	727	* @name Constants and macros for entire FTFE_FOPT register
bogdanm	82:6473597d706e	728	*/
bogdanm	82:6473597d706e	729	//@{
bogdanm	82:6473597d706e	730	#define HW_FTFE_FOPT_ADDR (REGS_FTFE_BASE + 0x3U)
bogdanm	82:6473597d706e	731
bogdanm	82:6473597d706e	732	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	733	#define HW_FTFE_FOPT ((__I hw_ftfe_fopt_t ) HW_FTFE_FOPT_ADDR)
bogdanm	82:6473597d706e	734	#define HW_FTFE_FOPT_RD() (HW_FTFE_FOPT.U)
bogdanm	82:6473597d706e	735	#endif
bogdanm	82:6473597d706e	736	//@}
bogdanm	82:6473597d706e	737
bogdanm	82:6473597d706e	738	/*
bogdanm	82:6473597d706e	739	* Constants & macros for individual FTFE_FOPT bitfields
bogdanm	82:6473597d706e	740	*/
bogdanm	82:6473597d706e	741
bogdanm	82:6473597d706e	742	/*!
bogdanm	82:6473597d706e	743	* @name Register FTFE_FOPT, field OPT[7:0] (RO)
bogdanm	82:6473597d706e	744	*
bogdanm	82:6473597d706e	745	* These bits are loaded from flash to this register at reset. Refer to the
bogdanm	82:6473597d706e	746	* device's Chip Configuration details for the definition and use of these bits.
bogdanm	82:6473597d706e	747	*/
bogdanm	82:6473597d706e	748	//@{
bogdanm	82:6473597d706e	749	#define BP_FTFE_FOPT_OPT (0U) //!< Bit position for FTFE_FOPT_OPT.
bogdanm	82:6473597d706e	750	#define BM_FTFE_FOPT_OPT (0xFFU) //!< Bit mask for FTFE_FOPT_OPT.
bogdanm	82:6473597d706e	751	#define BS_FTFE_FOPT_OPT (8U) //!< Bit field size in bits for FTFE_FOPT_OPT.
bogdanm	82:6473597d706e	752
bogdanm	82:6473597d706e	753	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	754	//! @brief Read current value of the FTFE_FOPT_OPT field.
bogdanm	82:6473597d706e	755	#define BR_FTFE_FOPT_OPT (HW_FTFE_FOPT.U)
bogdanm	82:6473597d706e	756	#endif
bogdanm	82:6473597d706e	757	//@}
bogdanm	82:6473597d706e	758
bogdanm	82:6473597d706e	759	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	760	// HW_FTFE_FCCOB3 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	761	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	762
bogdanm	82:6473597d706e	763	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	764	/*!
bogdanm	82:6473597d706e	765	* @brief HW_FTFE_FCCOB3 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	766	*
bogdanm	82:6473597d706e	767	* Reset value: 0x00U
bogdanm	82:6473597d706e	768	*
bogdanm	82:6473597d706e	769	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	770	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	771	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	772	*/
bogdanm	82:6473597d706e	773	typedef union _hw_ftfe_fccob3
bogdanm	82:6473597d706e	774	{
bogdanm	82:6473597d706e	775	uint8_t U;
bogdanm	82:6473597d706e	776	struct _hw_ftfe_fccob3_bitfields
bogdanm	82:6473597d706e	777	{
bogdanm	82:6473597d706e	778	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	779	} B;
bogdanm	82:6473597d706e	780	} hw_ftfe_fccob3_t;
bogdanm	82:6473597d706e	781	#endif
bogdanm	82:6473597d706e	782
bogdanm	82:6473597d706e	783	/*!
bogdanm	82:6473597d706e	784	* @name Constants and macros for entire FTFE_FCCOB3 register
bogdanm	82:6473597d706e	785	*/
bogdanm	82:6473597d706e	786	//@{
bogdanm	82:6473597d706e	787	#define HW_FTFE_FCCOB3_ADDR (REGS_FTFE_BASE + 0x4U)
bogdanm	82:6473597d706e	788
bogdanm	82:6473597d706e	789	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	790	#define HW_FTFE_FCCOB3 ((__IO hw_ftfe_fccob3_t ) HW_FTFE_FCCOB3_ADDR)
bogdanm	82:6473597d706e	791	#define HW_FTFE_FCCOB3_RD() (HW_FTFE_FCCOB3.U)
bogdanm	82:6473597d706e	792	#define HW_FTFE_FCCOB3_WR(v) (HW_FTFE_FCCOB3.U = (v))
bogdanm	82:6473597d706e	793	#define HW_FTFE_FCCOB3_SET(v) (HW_FTFE_FCCOB3_WR(HW_FTFE_FCCOB3_RD() \| (v)))
bogdanm	82:6473597d706e	794	#define HW_FTFE_FCCOB3_CLR(v) (HW_FTFE_FCCOB3_WR(HW_FTFE_FCCOB3_RD() & ~(v)))
bogdanm	82:6473597d706e	795	#define HW_FTFE_FCCOB3_TOG(v) (HW_FTFE_FCCOB3_WR(HW_FTFE_FCCOB3_RD() ^ (v)))
bogdanm	82:6473597d706e	796	#endif
bogdanm	82:6473597d706e	797	//@}
bogdanm	82:6473597d706e	798
bogdanm	82:6473597d706e	799	/*
bogdanm	82:6473597d706e	800	* Constants & macros for individual FTFE_FCCOB3 bitfields
bogdanm	82:6473597d706e	801	*/
bogdanm	82:6473597d706e	802
bogdanm	82:6473597d706e	803	/*!
bogdanm	82:6473597d706e	804	* @name Register FTFE_FCCOB3, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	805	*
bogdanm	82:6473597d706e	806	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	807	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	808	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	809	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	810	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	811	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	812	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	813	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	814	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	815	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	816	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	817	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	818	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	819	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	820	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	821	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	822	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	823	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	824	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	825	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	826	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	827	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	828	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	829	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	830	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	831	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	832	*/
bogdanm	82:6473597d706e	833	//@{
bogdanm	82:6473597d706e	834	#define BP_FTFE_FCCOB3_CCOBn (0U) //!< Bit position for FTFE_FCCOB3_CCOBn.
bogdanm	82:6473597d706e	835	#define BM_FTFE_FCCOB3_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB3_CCOBn.
bogdanm	82:6473597d706e	836	#define BS_FTFE_FCCOB3_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB3_CCOBn.
bogdanm	82:6473597d706e	837
bogdanm	82:6473597d706e	838	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	839	//! @brief Read current value of the FTFE_FCCOB3_CCOBn field.
bogdanm	82:6473597d706e	840	#define BR_FTFE_FCCOB3_CCOBn (HW_FTFE_FCCOB3.U)
bogdanm	82:6473597d706e	841	#endif
bogdanm	82:6473597d706e	842
bogdanm	82:6473597d706e	843	//! @brief Format value for bitfield FTFE_FCCOB3_CCOBn.
bogdanm	82:6473597d706e	844	#define BF_FTFE_FCCOB3_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB3_CCOBn), uint8_t) & BM_FTFE_FCCOB3_CCOBn)
bogdanm	82:6473597d706e	845
bogdanm	82:6473597d706e	846	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	847	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	848	#define BW_FTFE_FCCOB3_CCOBn(v) (HW_FTFE_FCCOB3_WR(v))
bogdanm	82:6473597d706e	849	#endif
bogdanm	82:6473597d706e	850	//@}
bogdanm	82:6473597d706e	851
bogdanm	82:6473597d706e	852	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	853	// HW_FTFE_FCCOB2 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	854	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	855
bogdanm	82:6473597d706e	856	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	857	/*!
bogdanm	82:6473597d706e	858	* @brief HW_FTFE_FCCOB2 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	859	*
bogdanm	82:6473597d706e	860	* Reset value: 0x00U
bogdanm	82:6473597d706e	861	*
bogdanm	82:6473597d706e	862	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	863	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	864	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	865	*/
bogdanm	82:6473597d706e	866	typedef union _hw_ftfe_fccob2
bogdanm	82:6473597d706e	867	{
bogdanm	82:6473597d706e	868	uint8_t U;
bogdanm	82:6473597d706e	869	struct _hw_ftfe_fccob2_bitfields
bogdanm	82:6473597d706e	870	{
bogdanm	82:6473597d706e	871	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	872	} B;
bogdanm	82:6473597d706e	873	} hw_ftfe_fccob2_t;
bogdanm	82:6473597d706e	874	#endif
bogdanm	82:6473597d706e	875
bogdanm	82:6473597d706e	876	/*!
bogdanm	82:6473597d706e	877	* @name Constants and macros for entire FTFE_FCCOB2 register
bogdanm	82:6473597d706e	878	*/
bogdanm	82:6473597d706e	879	//@{
bogdanm	82:6473597d706e	880	#define HW_FTFE_FCCOB2_ADDR (REGS_FTFE_BASE + 0x5U)
bogdanm	82:6473597d706e	881
bogdanm	82:6473597d706e	882	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	883	#define HW_FTFE_FCCOB2 ((__IO hw_ftfe_fccob2_t ) HW_FTFE_FCCOB2_ADDR)
bogdanm	82:6473597d706e	884	#define HW_FTFE_FCCOB2_RD() (HW_FTFE_FCCOB2.U)
bogdanm	82:6473597d706e	885	#define HW_FTFE_FCCOB2_WR(v) (HW_FTFE_FCCOB2.U = (v))
bogdanm	82:6473597d706e	886	#define HW_FTFE_FCCOB2_SET(v) (HW_FTFE_FCCOB2_WR(HW_FTFE_FCCOB2_RD() \| (v)))
bogdanm	82:6473597d706e	887	#define HW_FTFE_FCCOB2_CLR(v) (HW_FTFE_FCCOB2_WR(HW_FTFE_FCCOB2_RD() & ~(v)))
bogdanm	82:6473597d706e	888	#define HW_FTFE_FCCOB2_TOG(v) (HW_FTFE_FCCOB2_WR(HW_FTFE_FCCOB2_RD() ^ (v)))
bogdanm	82:6473597d706e	889	#endif
bogdanm	82:6473597d706e	890	//@}
bogdanm	82:6473597d706e	891
bogdanm	82:6473597d706e	892	/*
bogdanm	82:6473597d706e	893	* Constants & macros for individual FTFE_FCCOB2 bitfields
bogdanm	82:6473597d706e	894	*/
bogdanm	82:6473597d706e	895
bogdanm	82:6473597d706e	896	/*!
bogdanm	82:6473597d706e	897	* @name Register FTFE_FCCOB2, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	898	*
bogdanm	82:6473597d706e	899	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	900	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	901	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	902	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	903	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	904	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	905	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	906	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	907	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	908	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	909	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	910	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	911	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	912	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	913	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	914	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	915	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	916	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	917	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	918	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	919	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	920	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	921	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	922	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	923	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	924	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	925	*/
bogdanm	82:6473597d706e	926	//@{
bogdanm	82:6473597d706e	927	#define BP_FTFE_FCCOB2_CCOBn (0U) //!< Bit position for FTFE_FCCOB2_CCOBn.
bogdanm	82:6473597d706e	928	#define BM_FTFE_FCCOB2_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB2_CCOBn.
bogdanm	82:6473597d706e	929	#define BS_FTFE_FCCOB2_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB2_CCOBn.
bogdanm	82:6473597d706e	930
bogdanm	82:6473597d706e	931	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	932	//! @brief Read current value of the FTFE_FCCOB2_CCOBn field.
bogdanm	82:6473597d706e	933	#define BR_FTFE_FCCOB2_CCOBn (HW_FTFE_FCCOB2.U)
bogdanm	82:6473597d706e	934	#endif
bogdanm	82:6473597d706e	935
bogdanm	82:6473597d706e	936	//! @brief Format value for bitfield FTFE_FCCOB2_CCOBn.
bogdanm	82:6473597d706e	937	#define BF_FTFE_FCCOB2_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB2_CCOBn), uint8_t) & BM_FTFE_FCCOB2_CCOBn)
bogdanm	82:6473597d706e	938
bogdanm	82:6473597d706e	939	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	940	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	941	#define BW_FTFE_FCCOB2_CCOBn(v) (HW_FTFE_FCCOB2_WR(v))
bogdanm	82:6473597d706e	942	#endif
bogdanm	82:6473597d706e	943	//@}
bogdanm	82:6473597d706e	944
bogdanm	82:6473597d706e	945	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	946	// HW_FTFE_FCCOB1 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	947	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	948
bogdanm	82:6473597d706e	949	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	950	/*!
bogdanm	82:6473597d706e	951	* @brief HW_FTFE_FCCOB1 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	952	*
bogdanm	82:6473597d706e	953	* Reset value: 0x00U
bogdanm	82:6473597d706e	954	*
bogdanm	82:6473597d706e	955	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	956	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	957	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	958	*/
bogdanm	82:6473597d706e	959	typedef union _hw_ftfe_fccob1
bogdanm	82:6473597d706e	960	{
bogdanm	82:6473597d706e	961	uint8_t U;
bogdanm	82:6473597d706e	962	struct _hw_ftfe_fccob1_bitfields
bogdanm	82:6473597d706e	963	{
bogdanm	82:6473597d706e	964	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	965	} B;
bogdanm	82:6473597d706e	966	} hw_ftfe_fccob1_t;
bogdanm	82:6473597d706e	967	#endif
bogdanm	82:6473597d706e	968
bogdanm	82:6473597d706e	969	/*!
bogdanm	82:6473597d706e	970	* @name Constants and macros for entire FTFE_FCCOB1 register
bogdanm	82:6473597d706e	971	*/
bogdanm	82:6473597d706e	972	//@{
bogdanm	82:6473597d706e	973	#define HW_FTFE_FCCOB1_ADDR (REGS_FTFE_BASE + 0x6U)
bogdanm	82:6473597d706e	974
bogdanm	82:6473597d706e	975	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	976	#define HW_FTFE_FCCOB1 ((__IO hw_ftfe_fccob1_t ) HW_FTFE_FCCOB1_ADDR)
bogdanm	82:6473597d706e	977	#define HW_FTFE_FCCOB1_RD() (HW_FTFE_FCCOB1.U)
bogdanm	82:6473597d706e	978	#define HW_FTFE_FCCOB1_WR(v) (HW_FTFE_FCCOB1.U = (v))
bogdanm	82:6473597d706e	979	#define HW_FTFE_FCCOB1_SET(v) (HW_FTFE_FCCOB1_WR(HW_FTFE_FCCOB1_RD() \| (v)))
bogdanm	82:6473597d706e	980	#define HW_FTFE_FCCOB1_CLR(v) (HW_FTFE_FCCOB1_WR(HW_FTFE_FCCOB1_RD() & ~(v)))
bogdanm	82:6473597d706e	981	#define HW_FTFE_FCCOB1_TOG(v) (HW_FTFE_FCCOB1_WR(HW_FTFE_FCCOB1_RD() ^ (v)))
bogdanm	82:6473597d706e	982	#endif
bogdanm	82:6473597d706e	983	//@}
bogdanm	82:6473597d706e	984
bogdanm	82:6473597d706e	985	/*
bogdanm	82:6473597d706e	986	* Constants & macros for individual FTFE_FCCOB1 bitfields
bogdanm	82:6473597d706e	987	*/
bogdanm	82:6473597d706e	988
bogdanm	82:6473597d706e	989	/*!
bogdanm	82:6473597d706e	990	* @name Register FTFE_FCCOB1, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	991	*
bogdanm	82:6473597d706e	992	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	993	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	994	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	995	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	996	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	997	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	998	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	999	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1000	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1001	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1002	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1003	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1004	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1005	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1006	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1007	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1008	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1009	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1010	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1011	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1012	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1013	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1014	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1015	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1016	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1017	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1018	*/
bogdanm	82:6473597d706e	1019	//@{
bogdanm	82:6473597d706e	1020	#define BP_FTFE_FCCOB1_CCOBn (0U) //!< Bit position for FTFE_FCCOB1_CCOBn.
bogdanm	82:6473597d706e	1021	#define BM_FTFE_FCCOB1_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB1_CCOBn.
bogdanm	82:6473597d706e	1022	#define BS_FTFE_FCCOB1_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB1_CCOBn.
bogdanm	82:6473597d706e	1023
bogdanm	82:6473597d706e	1024	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1025	//! @brief Read current value of the FTFE_FCCOB1_CCOBn field.
bogdanm	82:6473597d706e	1026	#define BR_FTFE_FCCOB1_CCOBn (HW_FTFE_FCCOB1.U)
bogdanm	82:6473597d706e	1027	#endif
bogdanm	82:6473597d706e	1028
bogdanm	82:6473597d706e	1029	//! @brief Format value for bitfield FTFE_FCCOB1_CCOBn.
bogdanm	82:6473597d706e	1030	#define BF_FTFE_FCCOB1_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB1_CCOBn), uint8_t) & BM_FTFE_FCCOB1_CCOBn)
bogdanm	82:6473597d706e	1031
bogdanm	82:6473597d706e	1032	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1033	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1034	#define BW_FTFE_FCCOB1_CCOBn(v) (HW_FTFE_FCCOB1_WR(v))
bogdanm	82:6473597d706e	1035	#endif
bogdanm	82:6473597d706e	1036	//@}
bogdanm	82:6473597d706e	1037
bogdanm	82:6473597d706e	1038	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1039	// HW_FTFE_FCCOB0 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1040	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1041
bogdanm	82:6473597d706e	1042	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1043	/*!
bogdanm	82:6473597d706e	1044	* @brief HW_FTFE_FCCOB0 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1045	*
bogdanm	82:6473597d706e	1046	* Reset value: 0x00U
bogdanm	82:6473597d706e	1047	*
bogdanm	82:6473597d706e	1048	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1049	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1050	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1051	*/
bogdanm	82:6473597d706e	1052	typedef union _hw_ftfe_fccob0
bogdanm	82:6473597d706e	1053	{
bogdanm	82:6473597d706e	1054	uint8_t U;
bogdanm	82:6473597d706e	1055	struct _hw_ftfe_fccob0_bitfields
bogdanm	82:6473597d706e	1056	{
bogdanm	82:6473597d706e	1057	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1058	} B;
bogdanm	82:6473597d706e	1059	} hw_ftfe_fccob0_t;
bogdanm	82:6473597d706e	1060	#endif
bogdanm	82:6473597d706e	1061
bogdanm	82:6473597d706e	1062	/*!
bogdanm	82:6473597d706e	1063	* @name Constants and macros for entire FTFE_FCCOB0 register
bogdanm	82:6473597d706e	1064	*/
bogdanm	82:6473597d706e	1065	//@{
bogdanm	82:6473597d706e	1066	#define HW_FTFE_FCCOB0_ADDR (REGS_FTFE_BASE + 0x7U)
bogdanm	82:6473597d706e	1067
bogdanm	82:6473597d706e	1068	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1069	#define HW_FTFE_FCCOB0 ((__IO hw_ftfe_fccob0_t ) HW_FTFE_FCCOB0_ADDR)
bogdanm	82:6473597d706e	1070	#define HW_FTFE_FCCOB0_RD() (HW_FTFE_FCCOB0.U)
bogdanm	82:6473597d706e	1071	#define HW_FTFE_FCCOB0_WR(v) (HW_FTFE_FCCOB0.U = (v))
bogdanm	82:6473597d706e	1072	#define HW_FTFE_FCCOB0_SET(v) (HW_FTFE_FCCOB0_WR(HW_FTFE_FCCOB0_RD() \| (v)))
bogdanm	82:6473597d706e	1073	#define HW_FTFE_FCCOB0_CLR(v) (HW_FTFE_FCCOB0_WR(HW_FTFE_FCCOB0_RD() & ~(v)))
bogdanm	82:6473597d706e	1074	#define HW_FTFE_FCCOB0_TOG(v) (HW_FTFE_FCCOB0_WR(HW_FTFE_FCCOB0_RD() ^ (v)))
bogdanm	82:6473597d706e	1075	#endif
bogdanm	82:6473597d706e	1076	//@}
bogdanm	82:6473597d706e	1077
bogdanm	82:6473597d706e	1078	/*
bogdanm	82:6473597d706e	1079	* Constants & macros for individual FTFE_FCCOB0 bitfields
bogdanm	82:6473597d706e	1080	*/
bogdanm	82:6473597d706e	1081
bogdanm	82:6473597d706e	1082	/*!
bogdanm	82:6473597d706e	1083	* @name Register FTFE_FCCOB0, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1084	*
bogdanm	82:6473597d706e	1085	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1086	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1087	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1088	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1089	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1090	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1091	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1092	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1093	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1094	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1095	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1096	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1097	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1098	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1099	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1100	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1101	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1102	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1103	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1104	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1105	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1106	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1107	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1108	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1109	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1110	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1111	*/
bogdanm	82:6473597d706e	1112	//@{
bogdanm	82:6473597d706e	1113	#define BP_FTFE_FCCOB0_CCOBn (0U) //!< Bit position for FTFE_FCCOB0_CCOBn.
bogdanm	82:6473597d706e	1114	#define BM_FTFE_FCCOB0_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB0_CCOBn.
bogdanm	82:6473597d706e	1115	#define BS_FTFE_FCCOB0_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB0_CCOBn.
bogdanm	82:6473597d706e	1116
bogdanm	82:6473597d706e	1117	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1118	//! @brief Read current value of the FTFE_FCCOB0_CCOBn field.
bogdanm	82:6473597d706e	1119	#define BR_FTFE_FCCOB0_CCOBn (HW_FTFE_FCCOB0.U)
bogdanm	82:6473597d706e	1120	#endif
bogdanm	82:6473597d706e	1121
bogdanm	82:6473597d706e	1122	//! @brief Format value for bitfield FTFE_FCCOB0_CCOBn.
bogdanm	82:6473597d706e	1123	#define BF_FTFE_FCCOB0_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB0_CCOBn), uint8_t) & BM_FTFE_FCCOB0_CCOBn)
bogdanm	82:6473597d706e	1124
bogdanm	82:6473597d706e	1125	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1126	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1127	#define BW_FTFE_FCCOB0_CCOBn(v) (HW_FTFE_FCCOB0_WR(v))
bogdanm	82:6473597d706e	1128	#endif
bogdanm	82:6473597d706e	1129	//@}
bogdanm	82:6473597d706e	1130
bogdanm	82:6473597d706e	1131	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1132	// HW_FTFE_FCCOB7 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1133	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1134
bogdanm	82:6473597d706e	1135	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1136	/*!
bogdanm	82:6473597d706e	1137	* @brief HW_FTFE_FCCOB7 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1138	*
bogdanm	82:6473597d706e	1139	* Reset value: 0x00U
bogdanm	82:6473597d706e	1140	*
bogdanm	82:6473597d706e	1141	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1142	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1143	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1144	*/
bogdanm	82:6473597d706e	1145	typedef union _hw_ftfe_fccob7
bogdanm	82:6473597d706e	1146	{
bogdanm	82:6473597d706e	1147	uint8_t U;
bogdanm	82:6473597d706e	1148	struct _hw_ftfe_fccob7_bitfields
bogdanm	82:6473597d706e	1149	{
bogdanm	82:6473597d706e	1150	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1151	} B;
bogdanm	82:6473597d706e	1152	} hw_ftfe_fccob7_t;
bogdanm	82:6473597d706e	1153	#endif
bogdanm	82:6473597d706e	1154
bogdanm	82:6473597d706e	1155	/*!
bogdanm	82:6473597d706e	1156	* @name Constants and macros for entire FTFE_FCCOB7 register
bogdanm	82:6473597d706e	1157	*/
bogdanm	82:6473597d706e	1158	//@{
bogdanm	82:6473597d706e	1159	#define HW_FTFE_FCCOB7_ADDR (REGS_FTFE_BASE + 0x8U)
bogdanm	82:6473597d706e	1160
bogdanm	82:6473597d706e	1161	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1162	#define HW_FTFE_FCCOB7 ((__IO hw_ftfe_fccob7_t ) HW_FTFE_FCCOB7_ADDR)
bogdanm	82:6473597d706e	1163	#define HW_FTFE_FCCOB7_RD() (HW_FTFE_FCCOB7.U)
bogdanm	82:6473597d706e	1164	#define HW_FTFE_FCCOB7_WR(v) (HW_FTFE_FCCOB7.U = (v))
bogdanm	82:6473597d706e	1165	#define HW_FTFE_FCCOB7_SET(v) (HW_FTFE_FCCOB7_WR(HW_FTFE_FCCOB7_RD() \| (v)))
bogdanm	82:6473597d706e	1166	#define HW_FTFE_FCCOB7_CLR(v) (HW_FTFE_FCCOB7_WR(HW_FTFE_FCCOB7_RD() & ~(v)))
bogdanm	82:6473597d706e	1167	#define HW_FTFE_FCCOB7_TOG(v) (HW_FTFE_FCCOB7_WR(HW_FTFE_FCCOB7_RD() ^ (v)))
bogdanm	82:6473597d706e	1168	#endif
bogdanm	82:6473597d706e	1169	//@}
bogdanm	82:6473597d706e	1170
bogdanm	82:6473597d706e	1171	/*
bogdanm	82:6473597d706e	1172	* Constants & macros for individual FTFE_FCCOB7 bitfields
bogdanm	82:6473597d706e	1173	*/
bogdanm	82:6473597d706e	1174
bogdanm	82:6473597d706e	1175	/*!
bogdanm	82:6473597d706e	1176	* @name Register FTFE_FCCOB7, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1177	*
bogdanm	82:6473597d706e	1178	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1179	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1180	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1181	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1182	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1183	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1184	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1185	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1186	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1187	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1188	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1189	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1190	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1191	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1192	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1193	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1194	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1195	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1196	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1197	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1198	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1199	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1200	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1201	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1202	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1203	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1204	*/
bogdanm	82:6473597d706e	1205	//@{
bogdanm	82:6473597d706e	1206	#define BP_FTFE_FCCOB7_CCOBn (0U) //!< Bit position for FTFE_FCCOB7_CCOBn.
bogdanm	82:6473597d706e	1207	#define BM_FTFE_FCCOB7_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB7_CCOBn.
bogdanm	82:6473597d706e	1208	#define BS_FTFE_FCCOB7_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB7_CCOBn.
bogdanm	82:6473597d706e	1209
bogdanm	82:6473597d706e	1210	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1211	//! @brief Read current value of the FTFE_FCCOB7_CCOBn field.
bogdanm	82:6473597d706e	1212	#define BR_FTFE_FCCOB7_CCOBn (HW_FTFE_FCCOB7.U)
bogdanm	82:6473597d706e	1213	#endif
bogdanm	82:6473597d706e	1214
bogdanm	82:6473597d706e	1215	//! @brief Format value for bitfield FTFE_FCCOB7_CCOBn.
bogdanm	82:6473597d706e	1216	#define BF_FTFE_FCCOB7_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB7_CCOBn), uint8_t) & BM_FTFE_FCCOB7_CCOBn)
bogdanm	82:6473597d706e	1217
bogdanm	82:6473597d706e	1218	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1219	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1220	#define BW_FTFE_FCCOB7_CCOBn(v) (HW_FTFE_FCCOB7_WR(v))
bogdanm	82:6473597d706e	1221	#endif
bogdanm	82:6473597d706e	1222	//@}
bogdanm	82:6473597d706e	1223
bogdanm	82:6473597d706e	1224	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1225	// HW_FTFE_FCCOB6 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1226	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1227
bogdanm	82:6473597d706e	1228	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1229	/*!
bogdanm	82:6473597d706e	1230	* @brief HW_FTFE_FCCOB6 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1231	*
bogdanm	82:6473597d706e	1232	* Reset value: 0x00U
bogdanm	82:6473597d706e	1233	*
bogdanm	82:6473597d706e	1234	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1235	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1236	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1237	*/
bogdanm	82:6473597d706e	1238	typedef union _hw_ftfe_fccob6
bogdanm	82:6473597d706e	1239	{
bogdanm	82:6473597d706e	1240	uint8_t U;
bogdanm	82:6473597d706e	1241	struct _hw_ftfe_fccob6_bitfields
bogdanm	82:6473597d706e	1242	{
bogdanm	82:6473597d706e	1243	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1244	} B;
bogdanm	82:6473597d706e	1245	} hw_ftfe_fccob6_t;
bogdanm	82:6473597d706e	1246	#endif
bogdanm	82:6473597d706e	1247
bogdanm	82:6473597d706e	1248	/*!
bogdanm	82:6473597d706e	1249	* @name Constants and macros for entire FTFE_FCCOB6 register
bogdanm	82:6473597d706e	1250	*/
bogdanm	82:6473597d706e	1251	//@{
bogdanm	82:6473597d706e	1252	#define HW_FTFE_FCCOB6_ADDR (REGS_FTFE_BASE + 0x9U)
bogdanm	82:6473597d706e	1253
bogdanm	82:6473597d706e	1254	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1255	#define HW_FTFE_FCCOB6 ((__IO hw_ftfe_fccob6_t ) HW_FTFE_FCCOB6_ADDR)
bogdanm	82:6473597d706e	1256	#define HW_FTFE_FCCOB6_RD() (HW_FTFE_FCCOB6.U)
bogdanm	82:6473597d706e	1257	#define HW_FTFE_FCCOB6_WR(v) (HW_FTFE_FCCOB6.U = (v))
bogdanm	82:6473597d706e	1258	#define HW_FTFE_FCCOB6_SET(v) (HW_FTFE_FCCOB6_WR(HW_FTFE_FCCOB6_RD() \| (v)))
bogdanm	82:6473597d706e	1259	#define HW_FTFE_FCCOB6_CLR(v) (HW_FTFE_FCCOB6_WR(HW_FTFE_FCCOB6_RD() & ~(v)))
bogdanm	82:6473597d706e	1260	#define HW_FTFE_FCCOB6_TOG(v) (HW_FTFE_FCCOB6_WR(HW_FTFE_FCCOB6_RD() ^ (v)))
bogdanm	82:6473597d706e	1261	#endif
bogdanm	82:6473597d706e	1262	//@}
bogdanm	82:6473597d706e	1263
bogdanm	82:6473597d706e	1264	/*
bogdanm	82:6473597d706e	1265	* Constants & macros for individual FTFE_FCCOB6 bitfields
bogdanm	82:6473597d706e	1266	*/
bogdanm	82:6473597d706e	1267
bogdanm	82:6473597d706e	1268	/*!
bogdanm	82:6473597d706e	1269	* @name Register FTFE_FCCOB6, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1270	*
bogdanm	82:6473597d706e	1271	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1272	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1273	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1274	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1275	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1276	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1277	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1278	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1279	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1280	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1281	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1282	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1283	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1284	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1285	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1286	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1287	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1288	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1289	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1290	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1291	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1292	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1293	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1294	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1295	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1296	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1297	*/
bogdanm	82:6473597d706e	1298	//@{
bogdanm	82:6473597d706e	1299	#define BP_FTFE_FCCOB6_CCOBn (0U) //!< Bit position for FTFE_FCCOB6_CCOBn.
bogdanm	82:6473597d706e	1300	#define BM_FTFE_FCCOB6_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB6_CCOBn.
bogdanm	82:6473597d706e	1301	#define BS_FTFE_FCCOB6_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB6_CCOBn.
bogdanm	82:6473597d706e	1302
bogdanm	82:6473597d706e	1303	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1304	//! @brief Read current value of the FTFE_FCCOB6_CCOBn field.
bogdanm	82:6473597d706e	1305	#define BR_FTFE_FCCOB6_CCOBn (HW_FTFE_FCCOB6.U)
bogdanm	82:6473597d706e	1306	#endif
bogdanm	82:6473597d706e	1307
bogdanm	82:6473597d706e	1308	//! @brief Format value for bitfield FTFE_FCCOB6_CCOBn.
bogdanm	82:6473597d706e	1309	#define BF_FTFE_FCCOB6_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB6_CCOBn), uint8_t) & BM_FTFE_FCCOB6_CCOBn)
bogdanm	82:6473597d706e	1310
bogdanm	82:6473597d706e	1311	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1312	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1313	#define BW_FTFE_FCCOB6_CCOBn(v) (HW_FTFE_FCCOB6_WR(v))
bogdanm	82:6473597d706e	1314	#endif
bogdanm	82:6473597d706e	1315	//@}
bogdanm	82:6473597d706e	1316
bogdanm	82:6473597d706e	1317	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1318	// HW_FTFE_FCCOB5 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1319	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1320
bogdanm	82:6473597d706e	1321	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1322	/*!
bogdanm	82:6473597d706e	1323	* @brief HW_FTFE_FCCOB5 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1324	*
bogdanm	82:6473597d706e	1325	* Reset value: 0x00U
bogdanm	82:6473597d706e	1326	*
bogdanm	82:6473597d706e	1327	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1328	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1329	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1330	*/
bogdanm	82:6473597d706e	1331	typedef union _hw_ftfe_fccob5
bogdanm	82:6473597d706e	1332	{
bogdanm	82:6473597d706e	1333	uint8_t U;
bogdanm	82:6473597d706e	1334	struct _hw_ftfe_fccob5_bitfields
bogdanm	82:6473597d706e	1335	{
bogdanm	82:6473597d706e	1336	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1337	} B;
bogdanm	82:6473597d706e	1338	} hw_ftfe_fccob5_t;
bogdanm	82:6473597d706e	1339	#endif
bogdanm	82:6473597d706e	1340
bogdanm	82:6473597d706e	1341	/*!
bogdanm	82:6473597d706e	1342	* @name Constants and macros for entire FTFE_FCCOB5 register
bogdanm	82:6473597d706e	1343	*/
bogdanm	82:6473597d706e	1344	//@{
bogdanm	82:6473597d706e	1345	#define HW_FTFE_FCCOB5_ADDR (REGS_FTFE_BASE + 0xAU)
bogdanm	82:6473597d706e	1346
bogdanm	82:6473597d706e	1347	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1348	#define HW_FTFE_FCCOB5 ((__IO hw_ftfe_fccob5_t ) HW_FTFE_FCCOB5_ADDR)
bogdanm	82:6473597d706e	1349	#define HW_FTFE_FCCOB5_RD() (HW_FTFE_FCCOB5.U)
bogdanm	82:6473597d706e	1350	#define HW_FTFE_FCCOB5_WR(v) (HW_FTFE_FCCOB5.U = (v))
bogdanm	82:6473597d706e	1351	#define HW_FTFE_FCCOB5_SET(v) (HW_FTFE_FCCOB5_WR(HW_FTFE_FCCOB5_RD() \| (v)))
bogdanm	82:6473597d706e	1352	#define HW_FTFE_FCCOB5_CLR(v) (HW_FTFE_FCCOB5_WR(HW_FTFE_FCCOB5_RD() & ~(v)))
bogdanm	82:6473597d706e	1353	#define HW_FTFE_FCCOB5_TOG(v) (HW_FTFE_FCCOB5_WR(HW_FTFE_FCCOB5_RD() ^ (v)))
bogdanm	82:6473597d706e	1354	#endif
bogdanm	82:6473597d706e	1355	//@}
bogdanm	82:6473597d706e	1356
bogdanm	82:6473597d706e	1357	/*
bogdanm	82:6473597d706e	1358	* Constants & macros for individual FTFE_FCCOB5 bitfields
bogdanm	82:6473597d706e	1359	*/
bogdanm	82:6473597d706e	1360
bogdanm	82:6473597d706e	1361	/*!
bogdanm	82:6473597d706e	1362	* @name Register FTFE_FCCOB5, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1363	*
bogdanm	82:6473597d706e	1364	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1365	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1366	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1367	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1368	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1369	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1370	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1371	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1372	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1373	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1374	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1375	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1376	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1377	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1378	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1379	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1380	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1381	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1382	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1383	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1384	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1385	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1386	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1387	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1388	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1389	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1390	*/
bogdanm	82:6473597d706e	1391	//@{
bogdanm	82:6473597d706e	1392	#define BP_FTFE_FCCOB5_CCOBn (0U) //!< Bit position for FTFE_FCCOB5_CCOBn.
bogdanm	82:6473597d706e	1393	#define BM_FTFE_FCCOB5_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB5_CCOBn.
bogdanm	82:6473597d706e	1394	#define BS_FTFE_FCCOB5_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB5_CCOBn.
bogdanm	82:6473597d706e	1395
bogdanm	82:6473597d706e	1396	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1397	//! @brief Read current value of the FTFE_FCCOB5_CCOBn field.
bogdanm	82:6473597d706e	1398	#define BR_FTFE_FCCOB5_CCOBn (HW_FTFE_FCCOB5.U)
bogdanm	82:6473597d706e	1399	#endif
bogdanm	82:6473597d706e	1400
bogdanm	82:6473597d706e	1401	//! @brief Format value for bitfield FTFE_FCCOB5_CCOBn.
bogdanm	82:6473597d706e	1402	#define BF_FTFE_FCCOB5_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB5_CCOBn), uint8_t) & BM_FTFE_FCCOB5_CCOBn)
bogdanm	82:6473597d706e	1403
bogdanm	82:6473597d706e	1404	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1405	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1406	#define BW_FTFE_FCCOB5_CCOBn(v) (HW_FTFE_FCCOB5_WR(v))
bogdanm	82:6473597d706e	1407	#endif
bogdanm	82:6473597d706e	1408	//@}
bogdanm	82:6473597d706e	1409
bogdanm	82:6473597d706e	1410	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1411	// HW_FTFE_FCCOB4 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1412	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1413
bogdanm	82:6473597d706e	1414	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1415	/*!
bogdanm	82:6473597d706e	1416	* @brief HW_FTFE_FCCOB4 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1417	*
bogdanm	82:6473597d706e	1418	* Reset value: 0x00U
bogdanm	82:6473597d706e	1419	*
bogdanm	82:6473597d706e	1420	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1421	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1422	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1423	*/
bogdanm	82:6473597d706e	1424	typedef union _hw_ftfe_fccob4
bogdanm	82:6473597d706e	1425	{
bogdanm	82:6473597d706e	1426	uint8_t U;
bogdanm	82:6473597d706e	1427	struct _hw_ftfe_fccob4_bitfields
bogdanm	82:6473597d706e	1428	{
bogdanm	82:6473597d706e	1429	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1430	} B;
bogdanm	82:6473597d706e	1431	} hw_ftfe_fccob4_t;
bogdanm	82:6473597d706e	1432	#endif
bogdanm	82:6473597d706e	1433
bogdanm	82:6473597d706e	1434	/*!
bogdanm	82:6473597d706e	1435	* @name Constants and macros for entire FTFE_FCCOB4 register
bogdanm	82:6473597d706e	1436	*/
bogdanm	82:6473597d706e	1437	//@{
bogdanm	82:6473597d706e	1438	#define HW_FTFE_FCCOB4_ADDR (REGS_FTFE_BASE + 0xBU)
bogdanm	82:6473597d706e	1439
bogdanm	82:6473597d706e	1440	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1441	#define HW_FTFE_FCCOB4 ((__IO hw_ftfe_fccob4_t ) HW_FTFE_FCCOB4_ADDR)
bogdanm	82:6473597d706e	1442	#define HW_FTFE_FCCOB4_RD() (HW_FTFE_FCCOB4.U)
bogdanm	82:6473597d706e	1443	#define HW_FTFE_FCCOB4_WR(v) (HW_FTFE_FCCOB4.U = (v))
bogdanm	82:6473597d706e	1444	#define HW_FTFE_FCCOB4_SET(v) (HW_FTFE_FCCOB4_WR(HW_FTFE_FCCOB4_RD() \| (v)))
bogdanm	82:6473597d706e	1445	#define HW_FTFE_FCCOB4_CLR(v) (HW_FTFE_FCCOB4_WR(HW_FTFE_FCCOB4_RD() & ~(v)))
bogdanm	82:6473597d706e	1446	#define HW_FTFE_FCCOB4_TOG(v) (HW_FTFE_FCCOB4_WR(HW_FTFE_FCCOB4_RD() ^ (v)))
bogdanm	82:6473597d706e	1447	#endif
bogdanm	82:6473597d706e	1448	//@}
bogdanm	82:6473597d706e	1449
bogdanm	82:6473597d706e	1450	/*
bogdanm	82:6473597d706e	1451	* Constants & macros for individual FTFE_FCCOB4 bitfields
bogdanm	82:6473597d706e	1452	*/
bogdanm	82:6473597d706e	1453
bogdanm	82:6473597d706e	1454	/*!
bogdanm	82:6473597d706e	1455	* @name Register FTFE_FCCOB4, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1456	*
bogdanm	82:6473597d706e	1457	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1458	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1459	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1460	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1461	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1462	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1463	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1464	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1465	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1466	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1467	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1468	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1469	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1470	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1471	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1472	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1473	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1474	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1475	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1476	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1477	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1478	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1479	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1480	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1481	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1482	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1483	*/
bogdanm	82:6473597d706e	1484	//@{
bogdanm	82:6473597d706e	1485	#define BP_FTFE_FCCOB4_CCOBn (0U) //!< Bit position for FTFE_FCCOB4_CCOBn.
bogdanm	82:6473597d706e	1486	#define BM_FTFE_FCCOB4_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB4_CCOBn.
bogdanm	82:6473597d706e	1487	#define BS_FTFE_FCCOB4_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB4_CCOBn.
bogdanm	82:6473597d706e	1488
bogdanm	82:6473597d706e	1489	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1490	//! @brief Read current value of the FTFE_FCCOB4_CCOBn field.
bogdanm	82:6473597d706e	1491	#define BR_FTFE_FCCOB4_CCOBn (HW_FTFE_FCCOB4.U)
bogdanm	82:6473597d706e	1492	#endif
bogdanm	82:6473597d706e	1493
bogdanm	82:6473597d706e	1494	//! @brief Format value for bitfield FTFE_FCCOB4_CCOBn.
bogdanm	82:6473597d706e	1495	#define BF_FTFE_FCCOB4_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB4_CCOBn), uint8_t) & BM_FTFE_FCCOB4_CCOBn)
bogdanm	82:6473597d706e	1496
bogdanm	82:6473597d706e	1497	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1498	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1499	#define BW_FTFE_FCCOB4_CCOBn(v) (HW_FTFE_FCCOB4_WR(v))
bogdanm	82:6473597d706e	1500	#endif
bogdanm	82:6473597d706e	1501	//@}
bogdanm	82:6473597d706e	1502
bogdanm	82:6473597d706e	1503	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1504	// HW_FTFE_FCCOBB - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1505	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1506
bogdanm	82:6473597d706e	1507	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1508	/*!
bogdanm	82:6473597d706e	1509	* @brief HW_FTFE_FCCOBB - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1510	*
bogdanm	82:6473597d706e	1511	* Reset value: 0x00U
bogdanm	82:6473597d706e	1512	*
bogdanm	82:6473597d706e	1513	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1514	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1515	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1516	*/
bogdanm	82:6473597d706e	1517	typedef union _hw_ftfe_fccobb
bogdanm	82:6473597d706e	1518	{
bogdanm	82:6473597d706e	1519	uint8_t U;
bogdanm	82:6473597d706e	1520	struct _hw_ftfe_fccobb_bitfields
bogdanm	82:6473597d706e	1521	{
bogdanm	82:6473597d706e	1522	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1523	} B;
bogdanm	82:6473597d706e	1524	} hw_ftfe_fccobb_t;
bogdanm	82:6473597d706e	1525	#endif
bogdanm	82:6473597d706e	1526
bogdanm	82:6473597d706e	1527	/*!
bogdanm	82:6473597d706e	1528	* @name Constants and macros for entire FTFE_FCCOBB register
bogdanm	82:6473597d706e	1529	*/
bogdanm	82:6473597d706e	1530	//@{
bogdanm	82:6473597d706e	1531	#define HW_FTFE_FCCOBB_ADDR (REGS_FTFE_BASE + 0xCU)
bogdanm	82:6473597d706e	1532
bogdanm	82:6473597d706e	1533	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1534	#define HW_FTFE_FCCOBB ((__IO hw_ftfe_fccobb_t ) HW_FTFE_FCCOBB_ADDR)
bogdanm	82:6473597d706e	1535	#define HW_FTFE_FCCOBB_RD() (HW_FTFE_FCCOBB.U)
bogdanm	82:6473597d706e	1536	#define HW_FTFE_FCCOBB_WR(v) (HW_FTFE_FCCOBB.U = (v))
bogdanm	82:6473597d706e	1537	#define HW_FTFE_FCCOBB_SET(v) (HW_FTFE_FCCOBB_WR(HW_FTFE_FCCOBB_RD() \| (v)))
bogdanm	82:6473597d706e	1538	#define HW_FTFE_FCCOBB_CLR(v) (HW_FTFE_FCCOBB_WR(HW_FTFE_FCCOBB_RD() & ~(v)))
bogdanm	82:6473597d706e	1539	#define HW_FTFE_FCCOBB_TOG(v) (HW_FTFE_FCCOBB_WR(HW_FTFE_FCCOBB_RD() ^ (v)))
bogdanm	82:6473597d706e	1540	#endif
bogdanm	82:6473597d706e	1541	//@}
bogdanm	82:6473597d706e	1542
bogdanm	82:6473597d706e	1543	/*
bogdanm	82:6473597d706e	1544	* Constants & macros for individual FTFE_FCCOBB bitfields
bogdanm	82:6473597d706e	1545	*/
bogdanm	82:6473597d706e	1546
bogdanm	82:6473597d706e	1547	/*!
bogdanm	82:6473597d706e	1548	* @name Register FTFE_FCCOBB, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1549	*
bogdanm	82:6473597d706e	1550	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1551	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1552	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1553	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1554	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1555	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1556	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1557	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1558	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1559	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1560	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1561	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1562	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1563	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1564	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1565	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1566	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1567	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1568	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1569	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1570	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1571	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1572	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1573	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1574	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1575	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1576	*/
bogdanm	82:6473597d706e	1577	//@{
bogdanm	82:6473597d706e	1578	#define BP_FTFE_FCCOBB_CCOBn (0U) //!< Bit position for FTFE_FCCOBB_CCOBn.
bogdanm	82:6473597d706e	1579	#define BM_FTFE_FCCOBB_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOBB_CCOBn.
bogdanm	82:6473597d706e	1580	#define BS_FTFE_FCCOBB_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOBB_CCOBn.
bogdanm	82:6473597d706e	1581
bogdanm	82:6473597d706e	1582	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1583	//! @brief Read current value of the FTFE_FCCOBB_CCOBn field.
bogdanm	82:6473597d706e	1584	#define BR_FTFE_FCCOBB_CCOBn (HW_FTFE_FCCOBB.U)
bogdanm	82:6473597d706e	1585	#endif
bogdanm	82:6473597d706e	1586
bogdanm	82:6473597d706e	1587	//! @brief Format value for bitfield FTFE_FCCOBB_CCOBn.
bogdanm	82:6473597d706e	1588	#define BF_FTFE_FCCOBB_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOBB_CCOBn), uint8_t) & BM_FTFE_FCCOBB_CCOBn)
bogdanm	82:6473597d706e	1589
bogdanm	82:6473597d706e	1590	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1591	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1592	#define BW_FTFE_FCCOBB_CCOBn(v) (HW_FTFE_FCCOBB_WR(v))
bogdanm	82:6473597d706e	1593	#endif
bogdanm	82:6473597d706e	1594	//@}
bogdanm	82:6473597d706e	1595
bogdanm	82:6473597d706e	1596	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1597	// HW_FTFE_FCCOBA - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1598	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1599
bogdanm	82:6473597d706e	1600	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1601	/*!
bogdanm	82:6473597d706e	1602	* @brief HW_FTFE_FCCOBA - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1603	*
bogdanm	82:6473597d706e	1604	* Reset value: 0x00U
bogdanm	82:6473597d706e	1605	*
bogdanm	82:6473597d706e	1606	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1607	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1608	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1609	*/
bogdanm	82:6473597d706e	1610	typedef union _hw_ftfe_fccoba
bogdanm	82:6473597d706e	1611	{
bogdanm	82:6473597d706e	1612	uint8_t U;
bogdanm	82:6473597d706e	1613	struct _hw_ftfe_fccoba_bitfields
bogdanm	82:6473597d706e	1614	{
bogdanm	82:6473597d706e	1615	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1616	} B;
bogdanm	82:6473597d706e	1617	} hw_ftfe_fccoba_t;
bogdanm	82:6473597d706e	1618	#endif
bogdanm	82:6473597d706e	1619
bogdanm	82:6473597d706e	1620	/*!
bogdanm	82:6473597d706e	1621	* @name Constants and macros for entire FTFE_FCCOBA register
bogdanm	82:6473597d706e	1622	*/
bogdanm	82:6473597d706e	1623	//@{
bogdanm	82:6473597d706e	1624	#define HW_FTFE_FCCOBA_ADDR (REGS_FTFE_BASE + 0xDU)
bogdanm	82:6473597d706e	1625
bogdanm	82:6473597d706e	1626	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1627	#define HW_FTFE_FCCOBA ((__IO hw_ftfe_fccoba_t ) HW_FTFE_FCCOBA_ADDR)
bogdanm	82:6473597d706e	1628	#define HW_FTFE_FCCOBA_RD() (HW_FTFE_FCCOBA.U)
bogdanm	82:6473597d706e	1629	#define HW_FTFE_FCCOBA_WR(v) (HW_FTFE_FCCOBA.U = (v))
bogdanm	82:6473597d706e	1630	#define HW_FTFE_FCCOBA_SET(v) (HW_FTFE_FCCOBA_WR(HW_FTFE_FCCOBA_RD() \| (v)))
bogdanm	82:6473597d706e	1631	#define HW_FTFE_FCCOBA_CLR(v) (HW_FTFE_FCCOBA_WR(HW_FTFE_FCCOBA_RD() & ~(v)))
bogdanm	82:6473597d706e	1632	#define HW_FTFE_FCCOBA_TOG(v) (HW_FTFE_FCCOBA_WR(HW_FTFE_FCCOBA_RD() ^ (v)))
bogdanm	82:6473597d706e	1633	#endif
bogdanm	82:6473597d706e	1634	//@}
bogdanm	82:6473597d706e	1635
bogdanm	82:6473597d706e	1636	/*
bogdanm	82:6473597d706e	1637	* Constants & macros for individual FTFE_FCCOBA bitfields
bogdanm	82:6473597d706e	1638	*/
bogdanm	82:6473597d706e	1639
bogdanm	82:6473597d706e	1640	/*!
bogdanm	82:6473597d706e	1641	* @name Register FTFE_FCCOBA, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1642	*
bogdanm	82:6473597d706e	1643	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1644	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1645	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1646	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1647	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1648	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1649	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1650	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1651	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1652	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1653	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1654	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1655	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1656	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1657	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1658	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1659	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1660	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1661	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1662	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1663	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1664	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1665	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1666	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1667	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1668	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1669	*/
bogdanm	82:6473597d706e	1670	//@{
bogdanm	82:6473597d706e	1671	#define BP_FTFE_FCCOBA_CCOBn (0U) //!< Bit position for FTFE_FCCOBA_CCOBn.
bogdanm	82:6473597d706e	1672	#define BM_FTFE_FCCOBA_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOBA_CCOBn.
bogdanm	82:6473597d706e	1673	#define BS_FTFE_FCCOBA_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOBA_CCOBn.
bogdanm	82:6473597d706e	1674
bogdanm	82:6473597d706e	1675	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1676	//! @brief Read current value of the FTFE_FCCOBA_CCOBn field.
bogdanm	82:6473597d706e	1677	#define BR_FTFE_FCCOBA_CCOBn (HW_FTFE_FCCOBA.U)
bogdanm	82:6473597d706e	1678	#endif
bogdanm	82:6473597d706e	1679
bogdanm	82:6473597d706e	1680	//! @brief Format value for bitfield FTFE_FCCOBA_CCOBn.
bogdanm	82:6473597d706e	1681	#define BF_FTFE_FCCOBA_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOBA_CCOBn), uint8_t) & BM_FTFE_FCCOBA_CCOBn)
bogdanm	82:6473597d706e	1682
bogdanm	82:6473597d706e	1683	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1684	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1685	#define BW_FTFE_FCCOBA_CCOBn(v) (HW_FTFE_FCCOBA_WR(v))
bogdanm	82:6473597d706e	1686	#endif
bogdanm	82:6473597d706e	1687	//@}
bogdanm	82:6473597d706e	1688
bogdanm	82:6473597d706e	1689	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1690	// HW_FTFE_FCCOB9 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1691	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1692
bogdanm	82:6473597d706e	1693	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1694	/*!
bogdanm	82:6473597d706e	1695	* @brief HW_FTFE_FCCOB9 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1696	*
bogdanm	82:6473597d706e	1697	* Reset value: 0x00U
bogdanm	82:6473597d706e	1698	*
bogdanm	82:6473597d706e	1699	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1700	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1701	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1702	*/
bogdanm	82:6473597d706e	1703	typedef union _hw_ftfe_fccob9
bogdanm	82:6473597d706e	1704	{
bogdanm	82:6473597d706e	1705	uint8_t U;
bogdanm	82:6473597d706e	1706	struct _hw_ftfe_fccob9_bitfields
bogdanm	82:6473597d706e	1707	{
bogdanm	82:6473597d706e	1708	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1709	} B;
bogdanm	82:6473597d706e	1710	} hw_ftfe_fccob9_t;
bogdanm	82:6473597d706e	1711	#endif
bogdanm	82:6473597d706e	1712
bogdanm	82:6473597d706e	1713	/*!
bogdanm	82:6473597d706e	1714	* @name Constants and macros for entire FTFE_FCCOB9 register
bogdanm	82:6473597d706e	1715	*/
bogdanm	82:6473597d706e	1716	//@{
bogdanm	82:6473597d706e	1717	#define HW_FTFE_FCCOB9_ADDR (REGS_FTFE_BASE + 0xEU)
bogdanm	82:6473597d706e	1718
bogdanm	82:6473597d706e	1719	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1720	#define HW_FTFE_FCCOB9 ((__IO hw_ftfe_fccob9_t ) HW_FTFE_FCCOB9_ADDR)
bogdanm	82:6473597d706e	1721	#define HW_FTFE_FCCOB9_RD() (HW_FTFE_FCCOB9.U)
bogdanm	82:6473597d706e	1722	#define HW_FTFE_FCCOB9_WR(v) (HW_FTFE_FCCOB9.U = (v))
bogdanm	82:6473597d706e	1723	#define HW_FTFE_FCCOB9_SET(v) (HW_FTFE_FCCOB9_WR(HW_FTFE_FCCOB9_RD() \| (v)))
bogdanm	82:6473597d706e	1724	#define HW_FTFE_FCCOB9_CLR(v) (HW_FTFE_FCCOB9_WR(HW_FTFE_FCCOB9_RD() & ~(v)))
bogdanm	82:6473597d706e	1725	#define HW_FTFE_FCCOB9_TOG(v) (HW_FTFE_FCCOB9_WR(HW_FTFE_FCCOB9_RD() ^ (v)))
bogdanm	82:6473597d706e	1726	#endif
bogdanm	82:6473597d706e	1727	//@}
bogdanm	82:6473597d706e	1728
bogdanm	82:6473597d706e	1729	/*
bogdanm	82:6473597d706e	1730	* Constants & macros for individual FTFE_FCCOB9 bitfields
bogdanm	82:6473597d706e	1731	*/
bogdanm	82:6473597d706e	1732
bogdanm	82:6473597d706e	1733	/*!
bogdanm	82:6473597d706e	1734	* @name Register FTFE_FCCOB9, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1735	*
bogdanm	82:6473597d706e	1736	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1737	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1738	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1739	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1740	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1741	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1742	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1743	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1744	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1745	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1746	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1747	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1748	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1749	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1750	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1751	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1752	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1753	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1754	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1755	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1756	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1757	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1758	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1759	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1760	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1761	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1762	*/
bogdanm	82:6473597d706e	1763	//@{
bogdanm	82:6473597d706e	1764	#define BP_FTFE_FCCOB9_CCOBn (0U) //!< Bit position for FTFE_FCCOB9_CCOBn.
bogdanm	82:6473597d706e	1765	#define BM_FTFE_FCCOB9_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB9_CCOBn.
bogdanm	82:6473597d706e	1766	#define BS_FTFE_FCCOB9_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB9_CCOBn.
bogdanm	82:6473597d706e	1767
bogdanm	82:6473597d706e	1768	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1769	//! @brief Read current value of the FTFE_FCCOB9_CCOBn field.
bogdanm	82:6473597d706e	1770	#define BR_FTFE_FCCOB9_CCOBn (HW_FTFE_FCCOB9.U)
bogdanm	82:6473597d706e	1771	#endif
bogdanm	82:6473597d706e	1772
bogdanm	82:6473597d706e	1773	//! @brief Format value for bitfield FTFE_FCCOB9_CCOBn.
bogdanm	82:6473597d706e	1774	#define BF_FTFE_FCCOB9_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB9_CCOBn), uint8_t) & BM_FTFE_FCCOB9_CCOBn)
bogdanm	82:6473597d706e	1775
bogdanm	82:6473597d706e	1776	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1777	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1778	#define BW_FTFE_FCCOB9_CCOBn(v) (HW_FTFE_FCCOB9_WR(v))
bogdanm	82:6473597d706e	1779	#endif
bogdanm	82:6473597d706e	1780	//@}
bogdanm	82:6473597d706e	1781
bogdanm	82:6473597d706e	1782	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1783	// HW_FTFE_FCCOB8 - Flash Common Command Object Registers
bogdanm	82:6473597d706e	1784	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1785
bogdanm	82:6473597d706e	1786	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1787	/*!
bogdanm	82:6473597d706e	1788	* @brief HW_FTFE_FCCOB8 - Flash Common Command Object Registers (RW)
bogdanm	82:6473597d706e	1789	*
bogdanm	82:6473597d706e	1790	* Reset value: 0x00U
bogdanm	82:6473597d706e	1791	*
bogdanm	82:6473597d706e	1792	* The FCCOB register group provides 12 bytes for command codes and parameters.
bogdanm	82:6473597d706e	1793	* The individual bytes within the set append a 0-B hex identifier to the FCCOB
bogdanm	82:6473597d706e	1794	* register name: FCCOB0, FCCOB1, ..., FCCOBB.
bogdanm	82:6473597d706e	1795	*/
bogdanm	82:6473597d706e	1796	typedef union _hw_ftfe_fccob8
bogdanm	82:6473597d706e	1797	{
bogdanm	82:6473597d706e	1798	uint8_t U;
bogdanm	82:6473597d706e	1799	struct _hw_ftfe_fccob8_bitfields
bogdanm	82:6473597d706e	1800	{
bogdanm	82:6473597d706e	1801	uint8_t CCOBn : 8; //!< [7:0]
bogdanm	82:6473597d706e	1802	} B;
bogdanm	82:6473597d706e	1803	} hw_ftfe_fccob8_t;
bogdanm	82:6473597d706e	1804	#endif
bogdanm	82:6473597d706e	1805
bogdanm	82:6473597d706e	1806	/*!
bogdanm	82:6473597d706e	1807	* @name Constants and macros for entire FTFE_FCCOB8 register
bogdanm	82:6473597d706e	1808	*/
bogdanm	82:6473597d706e	1809	//@{
bogdanm	82:6473597d706e	1810	#define HW_FTFE_FCCOB8_ADDR (REGS_FTFE_BASE + 0xFU)
bogdanm	82:6473597d706e	1811
bogdanm	82:6473597d706e	1812	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1813	#define HW_FTFE_FCCOB8 ((__IO hw_ftfe_fccob8_t ) HW_FTFE_FCCOB8_ADDR)
bogdanm	82:6473597d706e	1814	#define HW_FTFE_FCCOB8_RD() (HW_FTFE_FCCOB8.U)
bogdanm	82:6473597d706e	1815	#define HW_FTFE_FCCOB8_WR(v) (HW_FTFE_FCCOB8.U = (v))
bogdanm	82:6473597d706e	1816	#define HW_FTFE_FCCOB8_SET(v) (HW_FTFE_FCCOB8_WR(HW_FTFE_FCCOB8_RD() \| (v)))
bogdanm	82:6473597d706e	1817	#define HW_FTFE_FCCOB8_CLR(v) (HW_FTFE_FCCOB8_WR(HW_FTFE_FCCOB8_RD() & ~(v)))
bogdanm	82:6473597d706e	1818	#define HW_FTFE_FCCOB8_TOG(v) (HW_FTFE_FCCOB8_WR(HW_FTFE_FCCOB8_RD() ^ (v)))
bogdanm	82:6473597d706e	1819	#endif
bogdanm	82:6473597d706e	1820	//@}
bogdanm	82:6473597d706e	1821
bogdanm	82:6473597d706e	1822	/*
bogdanm	82:6473597d706e	1823	* Constants & macros for individual FTFE_FCCOB8 bitfields
bogdanm	82:6473597d706e	1824	*/
bogdanm	82:6473597d706e	1825
bogdanm	82:6473597d706e	1826	/*!
bogdanm	82:6473597d706e	1827	* @name Register FTFE_FCCOB8, field CCOBn[7:0] (RW)
bogdanm	82:6473597d706e	1828	*
bogdanm	82:6473597d706e	1829	* The FCCOB register provides a command code and relevant parameters to the
bogdanm	82:6473597d706e	1830	* memory controller. The individual registers that compose the FCCOB data set can
bogdanm	82:6473597d706e	1831	* be written in any order, but you must provide all needed values, which vary
bogdanm	82:6473597d706e	1832	* from command to command. First, set up all required FCCOB fields and then
bogdanm	82:6473597d706e	1833	* initiate the command's execution by writing a 1 to the FSTAT[CCIF] bit. This clears
bogdanm	82:6473597d706e	1834	* the CCIF bit, which locks all FCCOB parameter fields and they cannot be changed
bogdanm	82:6473597d706e	1835	* by the user until the command completes (CCIF returns to 1). No command
bogdanm	82:6473597d706e	1836	* buffering or queueing is provided; the next command can be loaded only after the
bogdanm	82:6473597d706e	1837	* current command completes. Some commands return information to the FCCOB
bogdanm	82:6473597d706e	1838	* registers. Any values returned to FCCOB are available for reading after the
bogdanm	82:6473597d706e	1839	* FSTAT[CCIF] flag returns to 1 by the memory controller. The following table shows a
bogdanm	82:6473597d706e	1840	* generic FTFE command format. The first FCCOB register, FCCOB0, always contains
bogdanm	82:6473597d706e	1841	* the command code. This 8-bit value defines the command to be executed. The
bogdanm	82:6473597d706e	1842	* command code is followed by the parameters required for this specific FTFE command,
bogdanm	82:6473597d706e	1843	* typically an address and/or data values. The command parameter table is
bogdanm	82:6473597d706e	1844	* written in terms of FCCOB Number (which is equivalent to the byte number). This
bogdanm	82:6473597d706e	1845	* number is a reference to the FCCOB register name and is not the register address.
bogdanm	82:6473597d706e	1846	* FCCOB NumberRefers to FCCOB register name, not register address Typical
bogdanm	82:6473597d706e	1847	* Command Parameter Contents [7:0] 0 FCMD (a code that defines the FTFE command) 1
bogdanm	82:6473597d706e	1848	* Flash address [23:16] 2 Flash address [15:8] 3 Flash address [7:0] 4 Data Byte 0
bogdanm	82:6473597d706e	1849	* 5 Data Byte 1 6 Data Byte 2 7 Data Byte 3 8 Data Byte 4 9 Data Byte 5 A Data
bogdanm	82:6473597d706e	1850	* Byte 6 B Data Byte 7 FCCOB Endianness and Multi-Byte Access: The FCCOB
bogdanm	82:6473597d706e	1851	* register group uses a big endian addressing convention. For all command parameter
bogdanm	82:6473597d706e	1852	* fields larger than 1 byte, the most significant data resides in the lowest FCCOB
bogdanm	82:6473597d706e	1853	* register number. The FCCOB register group may be read and written as
bogdanm	82:6473597d706e	1854	* individual bytes, aligned words (2 bytes) or aligned longwords (4 bytes).
bogdanm	82:6473597d706e	1855	*/
bogdanm	82:6473597d706e	1856	//@{
bogdanm	82:6473597d706e	1857	#define BP_FTFE_FCCOB8_CCOBn (0U) //!< Bit position for FTFE_FCCOB8_CCOBn.
bogdanm	82:6473597d706e	1858	#define BM_FTFE_FCCOB8_CCOBn (0xFFU) //!< Bit mask for FTFE_FCCOB8_CCOBn.
bogdanm	82:6473597d706e	1859	#define BS_FTFE_FCCOB8_CCOBn (8U) //!< Bit field size in bits for FTFE_FCCOB8_CCOBn.
bogdanm	82:6473597d706e	1860
bogdanm	82:6473597d706e	1861	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1862	//! @brief Read current value of the FTFE_FCCOB8_CCOBn field.
bogdanm	82:6473597d706e	1863	#define BR_FTFE_FCCOB8_CCOBn (HW_FTFE_FCCOB8.U)
bogdanm	82:6473597d706e	1864	#endif
bogdanm	82:6473597d706e	1865
bogdanm	82:6473597d706e	1866	//! @brief Format value for bitfield FTFE_FCCOB8_CCOBn.
bogdanm	82:6473597d706e	1867	#define BF_FTFE_FCCOB8_CCOBn(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FCCOB8_CCOBn), uint8_t) & BM_FTFE_FCCOB8_CCOBn)
bogdanm	82:6473597d706e	1868
bogdanm	82:6473597d706e	1869	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1870	//! @brief Set the CCOBn field to a new value.
bogdanm	82:6473597d706e	1871	#define BW_FTFE_FCCOB8_CCOBn(v) (HW_FTFE_FCCOB8_WR(v))
bogdanm	82:6473597d706e	1872	#endif
bogdanm	82:6473597d706e	1873	//@}
bogdanm	82:6473597d706e	1874
bogdanm	82:6473597d706e	1875	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1876	// HW_FTFE_FPROT3 - Program Flash Protection Registers
bogdanm	82:6473597d706e	1877	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1878
bogdanm	82:6473597d706e	1879	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1880	/*!
bogdanm	82:6473597d706e	1881	* @brief HW_FTFE_FPROT3 - Program Flash Protection Registers (RW)
bogdanm	82:6473597d706e	1882	*
bogdanm	82:6473597d706e	1883	* Reset value: 0x00U
bogdanm	82:6473597d706e	1884	*
bogdanm	82:6473597d706e	1885	* The FPROT registers define which program flash regions are protected from
bogdanm	82:6473597d706e	1886	* program and erase operations. Protected flash regions cannot have their content
bogdanm	82:6473597d706e	1887	* changed; that is, these regions cannot be programmed and cannot be erased by
bogdanm	82:6473597d706e	1888	* any FTFE command. Unprotected regions can be changed by program and erase
bogdanm	82:6473597d706e	1889	* operations. The four FPROT registers allow up to 32 protectable regions of equal
bogdanm	82:6473597d706e	1890	* memory size. Program flash protection register Program flash protection bits
bogdanm	82:6473597d706e	1891	* FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During
bogdanm	82:6473597d706e	1892	* the reset sequence, the FPROT registers are loaded with the contents of the
bogdanm	82:6473597d706e	1893	* program flash protection bytes in the Flash Configuration Field as indicated in
bogdanm	82:6473597d706e	1894	* the following table. Program flash protection register Flash Configuration Field
bogdanm	82:6473597d706e	1895	* offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To
bogdanm	82:6473597d706e	1896	* change the program flash protection that is loaded during the reset sequence,
bogdanm	82:6473597d706e	1897	* unprotect the sector of program flash memory that contains the Flash
bogdanm	82:6473597d706e	1898	* Configuration Field. Then, reprogram the program flash protection byte.
bogdanm	82:6473597d706e	1899	*/
bogdanm	82:6473597d706e	1900	typedef union _hw_ftfe_fprot3
bogdanm	82:6473597d706e	1901	{
bogdanm	82:6473597d706e	1902	uint8_t U;
bogdanm	82:6473597d706e	1903	struct _hw_ftfe_fprot3_bitfields
bogdanm	82:6473597d706e	1904	{
bogdanm	82:6473597d706e	1905	uint8_t PROT : 8; //!< [7:0] Program Flash Region Protect
bogdanm	82:6473597d706e	1906	} B;
bogdanm	82:6473597d706e	1907	} hw_ftfe_fprot3_t;
bogdanm	82:6473597d706e	1908	#endif
bogdanm	82:6473597d706e	1909
bogdanm	82:6473597d706e	1910	/*!
bogdanm	82:6473597d706e	1911	* @name Constants and macros for entire FTFE_FPROT3 register
bogdanm	82:6473597d706e	1912	*/
bogdanm	82:6473597d706e	1913	//@{
bogdanm	82:6473597d706e	1914	#define HW_FTFE_FPROT3_ADDR (REGS_FTFE_BASE + 0x10U)
bogdanm	82:6473597d706e	1915
bogdanm	82:6473597d706e	1916	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1917	#define HW_FTFE_FPROT3 ((__IO hw_ftfe_fprot3_t ) HW_FTFE_FPROT3_ADDR)
bogdanm	82:6473597d706e	1918	#define HW_FTFE_FPROT3_RD() (HW_FTFE_FPROT3.U)
bogdanm	82:6473597d706e	1919	#define HW_FTFE_FPROT3_WR(v) (HW_FTFE_FPROT3.U = (v))
bogdanm	82:6473597d706e	1920	#define HW_FTFE_FPROT3_SET(v) (HW_FTFE_FPROT3_WR(HW_FTFE_FPROT3_RD() \| (v)))
bogdanm	82:6473597d706e	1921	#define HW_FTFE_FPROT3_CLR(v) (HW_FTFE_FPROT3_WR(HW_FTFE_FPROT3_RD() & ~(v)))
bogdanm	82:6473597d706e	1922	#define HW_FTFE_FPROT3_TOG(v) (HW_FTFE_FPROT3_WR(HW_FTFE_FPROT3_RD() ^ (v)))
bogdanm	82:6473597d706e	1923	#endif
bogdanm	82:6473597d706e	1924	//@}
bogdanm	82:6473597d706e	1925
bogdanm	82:6473597d706e	1926	/*
bogdanm	82:6473597d706e	1927	* Constants & macros for individual FTFE_FPROT3 bitfields
bogdanm	82:6473597d706e	1928	*/
bogdanm	82:6473597d706e	1929
bogdanm	82:6473597d706e	1930	/*!
bogdanm	82:6473597d706e	1931	* @name Register FTFE_FPROT3, field PROT[7:0] (RW)
bogdanm	82:6473597d706e	1932	*
bogdanm	82:6473597d706e	1933	* Each program flash region can be protected from program and erase operations
bogdanm	82:6473597d706e	1934	* by setting the associated PROT bit. In NVM Normal mode: The protection can
bogdanm	82:6473597d706e	1935	* only be increased, meaning that currently unprotected memory can be protected,
bogdanm	82:6473597d706e	1936	* but currently protected memory cannot be unprotected. Since unprotected regions
bogdanm	82:6473597d706e	1937	* are marked with a 1 and protected regions use a 0, only writes changing 1s to
bogdanm	82:6473597d706e	1938	* 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit
bogdanm	82:6473597d706e	1939	* basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with
bogdanm	82:6473597d706e	1940	* 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are
bogdanm	82:6473597d706e	1941	* writable without restriction. Unprotected areas can be protected and protected
bogdanm	82:6473597d706e	1942	* areas can be unprotected. The user must never write to any FPROT register while
bogdanm	82:6473597d706e	1943	* a command is running (CCIF=0). Trying to alter data in any protected area in
bogdanm	82:6473597d706e	1944	* the program flash memory results in a protection violation error and sets the
bogdanm	82:6473597d706e	1945	* FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible
bogdanm	82:6473597d706e	1946	* if it contains any protected region.
bogdanm	82:6473597d706e	1947	*
bogdanm	82:6473597d706e	1948	* Values:
bogdanm	82:6473597d706e	1949	* - 0 - Program flash region is protected.
bogdanm	82:6473597d706e	1950	* - 1 - Program flash region is not protected
bogdanm	82:6473597d706e	1951	*/
bogdanm	82:6473597d706e	1952	//@{
bogdanm	82:6473597d706e	1953	#define BP_FTFE_FPROT3_PROT (0U) //!< Bit position for FTFE_FPROT3_PROT.
bogdanm	82:6473597d706e	1954	#define BM_FTFE_FPROT3_PROT (0xFFU) //!< Bit mask for FTFE_FPROT3_PROT.
bogdanm	82:6473597d706e	1955	#define BS_FTFE_FPROT3_PROT (8U) //!< Bit field size in bits for FTFE_FPROT3_PROT.
bogdanm	82:6473597d706e	1956
bogdanm	82:6473597d706e	1957	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1958	//! @brief Read current value of the FTFE_FPROT3_PROT field.
bogdanm	82:6473597d706e	1959	#define BR_FTFE_FPROT3_PROT (HW_FTFE_FPROT3.U)
bogdanm	82:6473597d706e	1960	#endif
bogdanm	82:6473597d706e	1961
bogdanm	82:6473597d706e	1962	//! @brief Format value for bitfield FTFE_FPROT3_PROT.
bogdanm	82:6473597d706e	1963	#define BF_FTFE_FPROT3_PROT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FPROT3_PROT), uint8_t) & BM_FTFE_FPROT3_PROT)
bogdanm	82:6473597d706e	1964
bogdanm	82:6473597d706e	1965	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1966	//! @brief Set the PROT field to a new value.
bogdanm	82:6473597d706e	1967	#define BW_FTFE_FPROT3_PROT(v) (HW_FTFE_FPROT3_WR(v))
bogdanm	82:6473597d706e	1968	#endif
bogdanm	82:6473597d706e	1969	//@}
bogdanm	82:6473597d706e	1970
bogdanm	82:6473597d706e	1971	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1972	// HW_FTFE_FPROT2 - Program Flash Protection Registers
bogdanm	82:6473597d706e	1973	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1974
bogdanm	82:6473597d706e	1975	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1976	/*!
bogdanm	82:6473597d706e	1977	* @brief HW_FTFE_FPROT2 - Program Flash Protection Registers (RW)
bogdanm	82:6473597d706e	1978	*
bogdanm	82:6473597d706e	1979	* Reset value: 0x00U
bogdanm	82:6473597d706e	1980	*
bogdanm	82:6473597d706e	1981	* The FPROT registers define which program flash regions are protected from
bogdanm	82:6473597d706e	1982	* program and erase operations. Protected flash regions cannot have their content
bogdanm	82:6473597d706e	1983	* changed; that is, these regions cannot be programmed and cannot be erased by
bogdanm	82:6473597d706e	1984	* any FTFE command. Unprotected regions can be changed by program and erase
bogdanm	82:6473597d706e	1985	* operations. The four FPROT registers allow up to 32 protectable regions of equal
bogdanm	82:6473597d706e	1986	* memory size. Program flash protection register Program flash protection bits
bogdanm	82:6473597d706e	1987	* FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During
bogdanm	82:6473597d706e	1988	* the reset sequence, the FPROT registers are loaded with the contents of the
bogdanm	82:6473597d706e	1989	* program flash protection bytes in the Flash Configuration Field as indicated in
bogdanm	82:6473597d706e	1990	* the following table. Program flash protection register Flash Configuration Field
bogdanm	82:6473597d706e	1991	* offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To
bogdanm	82:6473597d706e	1992	* change the program flash protection that is loaded during the reset sequence,
bogdanm	82:6473597d706e	1993	* unprotect the sector of program flash memory that contains the Flash
bogdanm	82:6473597d706e	1994	* Configuration Field. Then, reprogram the program flash protection byte.
bogdanm	82:6473597d706e	1995	*/
bogdanm	82:6473597d706e	1996	typedef union _hw_ftfe_fprot2
bogdanm	82:6473597d706e	1997	{
bogdanm	82:6473597d706e	1998	uint8_t U;
bogdanm	82:6473597d706e	1999	struct _hw_ftfe_fprot2_bitfields
bogdanm	82:6473597d706e	2000	{
bogdanm	82:6473597d706e	2001	uint8_t PROT : 8; //!< [7:0] Program Flash Region Protect
bogdanm	82:6473597d706e	2002	} B;
bogdanm	82:6473597d706e	2003	} hw_ftfe_fprot2_t;
bogdanm	82:6473597d706e	2004	#endif
bogdanm	82:6473597d706e	2005
bogdanm	82:6473597d706e	2006	/*!
bogdanm	82:6473597d706e	2007	* @name Constants and macros for entire FTFE_FPROT2 register
bogdanm	82:6473597d706e	2008	*/
bogdanm	82:6473597d706e	2009	//@{
bogdanm	82:6473597d706e	2010	#define HW_FTFE_FPROT2_ADDR (REGS_FTFE_BASE + 0x11U)
bogdanm	82:6473597d706e	2011
bogdanm	82:6473597d706e	2012	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2013	#define HW_FTFE_FPROT2 ((__IO hw_ftfe_fprot2_t ) HW_FTFE_FPROT2_ADDR)
bogdanm	82:6473597d706e	2014	#define HW_FTFE_FPROT2_RD() (HW_FTFE_FPROT2.U)
bogdanm	82:6473597d706e	2015	#define HW_FTFE_FPROT2_WR(v) (HW_FTFE_FPROT2.U = (v))
bogdanm	82:6473597d706e	2016	#define HW_FTFE_FPROT2_SET(v) (HW_FTFE_FPROT2_WR(HW_FTFE_FPROT2_RD() \| (v)))
bogdanm	82:6473597d706e	2017	#define HW_FTFE_FPROT2_CLR(v) (HW_FTFE_FPROT2_WR(HW_FTFE_FPROT2_RD() & ~(v)))
bogdanm	82:6473597d706e	2018	#define HW_FTFE_FPROT2_TOG(v) (HW_FTFE_FPROT2_WR(HW_FTFE_FPROT2_RD() ^ (v)))
bogdanm	82:6473597d706e	2019	#endif
bogdanm	82:6473597d706e	2020	//@}
bogdanm	82:6473597d706e	2021
bogdanm	82:6473597d706e	2022	/*
bogdanm	82:6473597d706e	2023	* Constants & macros for individual FTFE_FPROT2 bitfields
bogdanm	82:6473597d706e	2024	*/
bogdanm	82:6473597d706e	2025
bogdanm	82:6473597d706e	2026	/*!
bogdanm	82:6473597d706e	2027	* @name Register FTFE_FPROT2, field PROT[7:0] (RW)
bogdanm	82:6473597d706e	2028	*
bogdanm	82:6473597d706e	2029	* Each program flash region can be protected from program and erase operations
bogdanm	82:6473597d706e	2030	* by setting the associated PROT bit. In NVM Normal mode: The protection can
bogdanm	82:6473597d706e	2031	* only be increased, meaning that currently unprotected memory can be protected,
bogdanm	82:6473597d706e	2032	* but currently protected memory cannot be unprotected. Since unprotected regions
bogdanm	82:6473597d706e	2033	* are marked with a 1 and protected regions use a 0, only writes changing 1s to
bogdanm	82:6473597d706e	2034	* 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit
bogdanm	82:6473597d706e	2035	* basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with
bogdanm	82:6473597d706e	2036	* 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are
bogdanm	82:6473597d706e	2037	* writable without restriction. Unprotected areas can be protected and protected
bogdanm	82:6473597d706e	2038	* areas can be unprotected. The user must never write to any FPROT register while
bogdanm	82:6473597d706e	2039	* a command is running (CCIF=0). Trying to alter data in any protected area in
bogdanm	82:6473597d706e	2040	* the program flash memory results in a protection violation error and sets the
bogdanm	82:6473597d706e	2041	* FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible
bogdanm	82:6473597d706e	2042	* if it contains any protected region.
bogdanm	82:6473597d706e	2043	*
bogdanm	82:6473597d706e	2044	* Values:
bogdanm	82:6473597d706e	2045	* - 0 - Program flash region is protected.
bogdanm	82:6473597d706e	2046	* - 1 - Program flash region is not protected
bogdanm	82:6473597d706e	2047	*/
bogdanm	82:6473597d706e	2048	//@{
bogdanm	82:6473597d706e	2049	#define BP_FTFE_FPROT2_PROT (0U) //!< Bit position for FTFE_FPROT2_PROT.
bogdanm	82:6473597d706e	2050	#define BM_FTFE_FPROT2_PROT (0xFFU) //!< Bit mask for FTFE_FPROT2_PROT.
bogdanm	82:6473597d706e	2051	#define BS_FTFE_FPROT2_PROT (8U) //!< Bit field size in bits for FTFE_FPROT2_PROT.
bogdanm	82:6473597d706e	2052
bogdanm	82:6473597d706e	2053	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2054	//! @brief Read current value of the FTFE_FPROT2_PROT field.
bogdanm	82:6473597d706e	2055	#define BR_FTFE_FPROT2_PROT (HW_FTFE_FPROT2.U)
bogdanm	82:6473597d706e	2056	#endif
bogdanm	82:6473597d706e	2057
bogdanm	82:6473597d706e	2058	//! @brief Format value for bitfield FTFE_FPROT2_PROT.
bogdanm	82:6473597d706e	2059	#define BF_FTFE_FPROT2_PROT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FPROT2_PROT), uint8_t) & BM_FTFE_FPROT2_PROT)
bogdanm	82:6473597d706e	2060
bogdanm	82:6473597d706e	2061	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2062	//! @brief Set the PROT field to a new value.
bogdanm	82:6473597d706e	2063	#define BW_FTFE_FPROT2_PROT(v) (HW_FTFE_FPROT2_WR(v))
bogdanm	82:6473597d706e	2064	#endif
bogdanm	82:6473597d706e	2065	//@}
bogdanm	82:6473597d706e	2066
bogdanm	82:6473597d706e	2067	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2068	// HW_FTFE_FPROT1 - Program Flash Protection Registers
bogdanm	82:6473597d706e	2069	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2070
bogdanm	82:6473597d706e	2071	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2072	/*!
bogdanm	82:6473597d706e	2073	* @brief HW_FTFE_FPROT1 - Program Flash Protection Registers (RW)
bogdanm	82:6473597d706e	2074	*
bogdanm	82:6473597d706e	2075	* Reset value: 0x00U
bogdanm	82:6473597d706e	2076	*
bogdanm	82:6473597d706e	2077	* The FPROT registers define which program flash regions are protected from
bogdanm	82:6473597d706e	2078	* program and erase operations. Protected flash regions cannot have their content
bogdanm	82:6473597d706e	2079	* changed; that is, these regions cannot be programmed and cannot be erased by
bogdanm	82:6473597d706e	2080	* any FTFE command. Unprotected regions can be changed by program and erase
bogdanm	82:6473597d706e	2081	* operations. The four FPROT registers allow up to 32 protectable regions of equal
bogdanm	82:6473597d706e	2082	* memory size. Program flash protection register Program flash protection bits
bogdanm	82:6473597d706e	2083	* FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During
bogdanm	82:6473597d706e	2084	* the reset sequence, the FPROT registers are loaded with the contents of the
bogdanm	82:6473597d706e	2085	* program flash protection bytes in the Flash Configuration Field as indicated in
bogdanm	82:6473597d706e	2086	* the following table. Program flash protection register Flash Configuration Field
bogdanm	82:6473597d706e	2087	* offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To
bogdanm	82:6473597d706e	2088	* change the program flash protection that is loaded during the reset sequence,
bogdanm	82:6473597d706e	2089	* unprotect the sector of program flash memory that contains the Flash
bogdanm	82:6473597d706e	2090	* Configuration Field. Then, reprogram the program flash protection byte.
bogdanm	82:6473597d706e	2091	*/
bogdanm	82:6473597d706e	2092	typedef union _hw_ftfe_fprot1
bogdanm	82:6473597d706e	2093	{
bogdanm	82:6473597d706e	2094	uint8_t U;
bogdanm	82:6473597d706e	2095	struct _hw_ftfe_fprot1_bitfields
bogdanm	82:6473597d706e	2096	{
bogdanm	82:6473597d706e	2097	uint8_t PROT : 8; //!< [7:0] Program Flash Region Protect
bogdanm	82:6473597d706e	2098	} B;
bogdanm	82:6473597d706e	2099	} hw_ftfe_fprot1_t;
bogdanm	82:6473597d706e	2100	#endif
bogdanm	82:6473597d706e	2101
bogdanm	82:6473597d706e	2102	/*!
bogdanm	82:6473597d706e	2103	* @name Constants and macros for entire FTFE_FPROT1 register
bogdanm	82:6473597d706e	2104	*/
bogdanm	82:6473597d706e	2105	//@{
bogdanm	82:6473597d706e	2106	#define HW_FTFE_FPROT1_ADDR (REGS_FTFE_BASE + 0x12U)
bogdanm	82:6473597d706e	2107
bogdanm	82:6473597d706e	2108	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2109	#define HW_FTFE_FPROT1 ((__IO hw_ftfe_fprot1_t ) HW_FTFE_FPROT1_ADDR)
bogdanm	82:6473597d706e	2110	#define HW_FTFE_FPROT1_RD() (HW_FTFE_FPROT1.U)
bogdanm	82:6473597d706e	2111	#define HW_FTFE_FPROT1_WR(v) (HW_FTFE_FPROT1.U = (v))
bogdanm	82:6473597d706e	2112	#define HW_FTFE_FPROT1_SET(v) (HW_FTFE_FPROT1_WR(HW_FTFE_FPROT1_RD() \| (v)))
bogdanm	82:6473597d706e	2113	#define HW_FTFE_FPROT1_CLR(v) (HW_FTFE_FPROT1_WR(HW_FTFE_FPROT1_RD() & ~(v)))
bogdanm	82:6473597d706e	2114	#define HW_FTFE_FPROT1_TOG(v) (HW_FTFE_FPROT1_WR(HW_FTFE_FPROT1_RD() ^ (v)))
bogdanm	82:6473597d706e	2115	#endif
bogdanm	82:6473597d706e	2116	//@}
bogdanm	82:6473597d706e	2117
bogdanm	82:6473597d706e	2118	/*
bogdanm	82:6473597d706e	2119	* Constants & macros for individual FTFE_FPROT1 bitfields
bogdanm	82:6473597d706e	2120	*/
bogdanm	82:6473597d706e	2121
bogdanm	82:6473597d706e	2122	/*!
bogdanm	82:6473597d706e	2123	* @name Register FTFE_FPROT1, field PROT[7:0] (RW)
bogdanm	82:6473597d706e	2124	*
bogdanm	82:6473597d706e	2125	* Each program flash region can be protected from program and erase operations
bogdanm	82:6473597d706e	2126	* by setting the associated PROT bit. In NVM Normal mode: The protection can
bogdanm	82:6473597d706e	2127	* only be increased, meaning that currently unprotected memory can be protected,
bogdanm	82:6473597d706e	2128	* but currently protected memory cannot be unprotected. Since unprotected regions
bogdanm	82:6473597d706e	2129	* are marked with a 1 and protected regions use a 0, only writes changing 1s to
bogdanm	82:6473597d706e	2130	* 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit
bogdanm	82:6473597d706e	2131	* basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with
bogdanm	82:6473597d706e	2132	* 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are
bogdanm	82:6473597d706e	2133	* writable without restriction. Unprotected areas can be protected and protected
bogdanm	82:6473597d706e	2134	* areas can be unprotected. The user must never write to any FPROT register while
bogdanm	82:6473597d706e	2135	* a command is running (CCIF=0). Trying to alter data in any protected area in
bogdanm	82:6473597d706e	2136	* the program flash memory results in a protection violation error and sets the
bogdanm	82:6473597d706e	2137	* FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible
bogdanm	82:6473597d706e	2138	* if it contains any protected region.
bogdanm	82:6473597d706e	2139	*
bogdanm	82:6473597d706e	2140	* Values:
bogdanm	82:6473597d706e	2141	* - 0 - Program flash region is protected.
bogdanm	82:6473597d706e	2142	* - 1 - Program flash region is not protected
bogdanm	82:6473597d706e	2143	*/
bogdanm	82:6473597d706e	2144	//@{
bogdanm	82:6473597d706e	2145	#define BP_FTFE_FPROT1_PROT (0U) //!< Bit position for FTFE_FPROT1_PROT.
bogdanm	82:6473597d706e	2146	#define BM_FTFE_FPROT1_PROT (0xFFU) //!< Bit mask for FTFE_FPROT1_PROT.
bogdanm	82:6473597d706e	2147	#define BS_FTFE_FPROT1_PROT (8U) //!< Bit field size in bits for FTFE_FPROT1_PROT.
bogdanm	82:6473597d706e	2148
bogdanm	82:6473597d706e	2149	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2150	//! @brief Read current value of the FTFE_FPROT1_PROT field.
bogdanm	82:6473597d706e	2151	#define BR_FTFE_FPROT1_PROT (HW_FTFE_FPROT1.U)
bogdanm	82:6473597d706e	2152	#endif
bogdanm	82:6473597d706e	2153
bogdanm	82:6473597d706e	2154	//! @brief Format value for bitfield FTFE_FPROT1_PROT.
bogdanm	82:6473597d706e	2155	#define BF_FTFE_FPROT1_PROT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FPROT1_PROT), uint8_t) & BM_FTFE_FPROT1_PROT)
bogdanm	82:6473597d706e	2156
bogdanm	82:6473597d706e	2157	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2158	//! @brief Set the PROT field to a new value.
bogdanm	82:6473597d706e	2159	#define BW_FTFE_FPROT1_PROT(v) (HW_FTFE_FPROT1_WR(v))
bogdanm	82:6473597d706e	2160	#endif
bogdanm	82:6473597d706e	2161	//@}
bogdanm	82:6473597d706e	2162
bogdanm	82:6473597d706e	2163	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2164	// HW_FTFE_FPROT0 - Program Flash Protection Registers
bogdanm	82:6473597d706e	2165	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2166
bogdanm	82:6473597d706e	2167	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2168	/*!
bogdanm	82:6473597d706e	2169	* @brief HW_FTFE_FPROT0 - Program Flash Protection Registers (RW)
bogdanm	82:6473597d706e	2170	*
bogdanm	82:6473597d706e	2171	* Reset value: 0x00U
bogdanm	82:6473597d706e	2172	*
bogdanm	82:6473597d706e	2173	* The FPROT registers define which program flash regions are protected from
bogdanm	82:6473597d706e	2174	* program and erase operations. Protected flash regions cannot have their content
bogdanm	82:6473597d706e	2175	* changed; that is, these regions cannot be programmed and cannot be erased by
bogdanm	82:6473597d706e	2176	* any FTFE command. Unprotected regions can be changed by program and erase
bogdanm	82:6473597d706e	2177	* operations. The four FPROT registers allow up to 32 protectable regions of equal
bogdanm	82:6473597d706e	2178	* memory size. Program flash protection register Program flash protection bits
bogdanm	82:6473597d706e	2179	* FPROT0 PROT[31:24] FPROT1 PROT[23:16] FPROT2 PROT[15:8] FPROT3 PROT[7:0] During
bogdanm	82:6473597d706e	2180	* the reset sequence, the FPROT registers are loaded with the contents of the
bogdanm	82:6473597d706e	2181	* program flash protection bytes in the Flash Configuration Field as indicated in
bogdanm	82:6473597d706e	2182	* the following table. Program flash protection register Flash Configuration Field
bogdanm	82:6473597d706e	2183	* offset address FPROT0 0x000B FPROT1 0x000A FPROT2 0x0009 FPROT3 0x0008 To
bogdanm	82:6473597d706e	2184	* change the program flash protection that is loaded during the reset sequence,
bogdanm	82:6473597d706e	2185	* unprotect the sector of program flash memory that contains the Flash
bogdanm	82:6473597d706e	2186	* Configuration Field. Then, reprogram the program flash protection byte.
bogdanm	82:6473597d706e	2187	*/
bogdanm	82:6473597d706e	2188	typedef union _hw_ftfe_fprot0
bogdanm	82:6473597d706e	2189	{
bogdanm	82:6473597d706e	2190	uint8_t U;
bogdanm	82:6473597d706e	2191	struct _hw_ftfe_fprot0_bitfields
bogdanm	82:6473597d706e	2192	{
bogdanm	82:6473597d706e	2193	uint8_t PROT : 8; //!< [7:0] Program Flash Region Protect
bogdanm	82:6473597d706e	2194	} B;
bogdanm	82:6473597d706e	2195	} hw_ftfe_fprot0_t;
bogdanm	82:6473597d706e	2196	#endif
bogdanm	82:6473597d706e	2197
bogdanm	82:6473597d706e	2198	/*!
bogdanm	82:6473597d706e	2199	* @name Constants and macros for entire FTFE_FPROT0 register
bogdanm	82:6473597d706e	2200	*/
bogdanm	82:6473597d706e	2201	//@{
bogdanm	82:6473597d706e	2202	#define HW_FTFE_FPROT0_ADDR (REGS_FTFE_BASE + 0x13U)
bogdanm	82:6473597d706e	2203
bogdanm	82:6473597d706e	2204	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2205	#define HW_FTFE_FPROT0 ((__IO hw_ftfe_fprot0_t ) HW_FTFE_FPROT0_ADDR)
bogdanm	82:6473597d706e	2206	#define HW_FTFE_FPROT0_RD() (HW_FTFE_FPROT0.U)
bogdanm	82:6473597d706e	2207	#define HW_FTFE_FPROT0_WR(v) (HW_FTFE_FPROT0.U = (v))
bogdanm	82:6473597d706e	2208	#define HW_FTFE_FPROT0_SET(v) (HW_FTFE_FPROT0_WR(HW_FTFE_FPROT0_RD() \| (v)))
bogdanm	82:6473597d706e	2209	#define HW_FTFE_FPROT0_CLR(v) (HW_FTFE_FPROT0_WR(HW_FTFE_FPROT0_RD() & ~(v)))
bogdanm	82:6473597d706e	2210	#define HW_FTFE_FPROT0_TOG(v) (HW_FTFE_FPROT0_WR(HW_FTFE_FPROT0_RD() ^ (v)))
bogdanm	82:6473597d706e	2211	#endif
bogdanm	82:6473597d706e	2212	//@}
bogdanm	82:6473597d706e	2213
bogdanm	82:6473597d706e	2214	/*
bogdanm	82:6473597d706e	2215	* Constants & macros for individual FTFE_FPROT0 bitfields
bogdanm	82:6473597d706e	2216	*/
bogdanm	82:6473597d706e	2217
bogdanm	82:6473597d706e	2218	/*!
bogdanm	82:6473597d706e	2219	* @name Register FTFE_FPROT0, field PROT[7:0] (RW)
bogdanm	82:6473597d706e	2220	*
bogdanm	82:6473597d706e	2221	* Each program flash region can be protected from program and erase operations
bogdanm	82:6473597d706e	2222	* by setting the associated PROT bit. In NVM Normal mode: The protection can
bogdanm	82:6473597d706e	2223	* only be increased, meaning that currently unprotected memory can be protected,
bogdanm	82:6473597d706e	2224	* but currently protected memory cannot be unprotected. Since unprotected regions
bogdanm	82:6473597d706e	2225	* are marked with a 1 and protected regions use a 0, only writes changing 1s to
bogdanm	82:6473597d706e	2226	* 0s are accepted. This 1-to-0 transition check is performed on a bit-by-bit
bogdanm	82:6473597d706e	2227	* basis. Those FPROT bits with 1-to-0 transitions are accepted while all bits with
bogdanm	82:6473597d706e	2228	* 0-to-1 transitions are ignored. In NVM Special mode: All bits of FPROT are
bogdanm	82:6473597d706e	2229	* writable without restriction. Unprotected areas can be protected and protected
bogdanm	82:6473597d706e	2230	* areas can be unprotected. The user must never write to any FPROT register while
bogdanm	82:6473597d706e	2231	* a command is running (CCIF=0). Trying to alter data in any protected area in
bogdanm	82:6473597d706e	2232	* the program flash memory results in a protection violation error and sets the
bogdanm	82:6473597d706e	2233	* FSTAT[FPVIOL] bit. A full block erase of a program flash block is not possible
bogdanm	82:6473597d706e	2234	* if it contains any protected region.
bogdanm	82:6473597d706e	2235	*
bogdanm	82:6473597d706e	2236	* Values:
bogdanm	82:6473597d706e	2237	* - 0 - Program flash region is protected.
bogdanm	82:6473597d706e	2238	* - 1 - Program flash region is not protected
bogdanm	82:6473597d706e	2239	*/
bogdanm	82:6473597d706e	2240	//@{
bogdanm	82:6473597d706e	2241	#define BP_FTFE_FPROT0_PROT (0U) //!< Bit position for FTFE_FPROT0_PROT.
bogdanm	82:6473597d706e	2242	#define BM_FTFE_FPROT0_PROT (0xFFU) //!< Bit mask for FTFE_FPROT0_PROT.
bogdanm	82:6473597d706e	2243	#define BS_FTFE_FPROT0_PROT (8U) //!< Bit field size in bits for FTFE_FPROT0_PROT.
bogdanm	82:6473597d706e	2244
bogdanm	82:6473597d706e	2245	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2246	//! @brief Read current value of the FTFE_FPROT0_PROT field.
bogdanm	82:6473597d706e	2247	#define BR_FTFE_FPROT0_PROT (HW_FTFE_FPROT0.U)
bogdanm	82:6473597d706e	2248	#endif
bogdanm	82:6473597d706e	2249
bogdanm	82:6473597d706e	2250	//! @brief Format value for bitfield FTFE_FPROT0_PROT.
bogdanm	82:6473597d706e	2251	#define BF_FTFE_FPROT0_PROT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FPROT0_PROT), uint8_t) & BM_FTFE_FPROT0_PROT)
bogdanm	82:6473597d706e	2252
bogdanm	82:6473597d706e	2253	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2254	//! @brief Set the PROT field to a new value.
bogdanm	82:6473597d706e	2255	#define BW_FTFE_FPROT0_PROT(v) (HW_FTFE_FPROT0_WR(v))
bogdanm	82:6473597d706e	2256	#endif
bogdanm	82:6473597d706e	2257	//@}
bogdanm	82:6473597d706e	2258
bogdanm	82:6473597d706e	2259	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2260	// HW_FTFE_FEPROT - EEPROM Protection Register
bogdanm	82:6473597d706e	2261	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2262
bogdanm	82:6473597d706e	2263	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2264	/*!
bogdanm	82:6473597d706e	2265	* @brief HW_FTFE_FEPROT - EEPROM Protection Register (RW)
bogdanm	82:6473597d706e	2266	*
bogdanm	82:6473597d706e	2267	* Reset value: 0x00U
bogdanm	82:6473597d706e	2268	*
bogdanm	82:6473597d706e	2269	* For devices with FlexNVM: The FEPROT register defines which EEPROM regions of
bogdanm	82:6473597d706e	2270	* the FlexRAM are protected against program and erase operations. Protected
bogdanm	82:6473597d706e	2271	* EEPROM regions cannot have their content changed by writing to it. Unprotected
bogdanm	82:6473597d706e	2272	* regions can be changed by writing to the FlexRAM. For devices with program flash
bogdanm	82:6473597d706e	2273	* only: This register is reserved and not used.
bogdanm	82:6473597d706e	2274	*/
bogdanm	82:6473597d706e	2275	typedef union _hw_ftfe_feprot
bogdanm	82:6473597d706e	2276	{
bogdanm	82:6473597d706e	2277	uint8_t U;
bogdanm	82:6473597d706e	2278	struct _hw_ftfe_feprot_bitfields
bogdanm	82:6473597d706e	2279	{
bogdanm	82:6473597d706e	2280	uint8_t EPROT : 8; //!< [7:0] EEPROM Region Protect
bogdanm	82:6473597d706e	2281	} B;
bogdanm	82:6473597d706e	2282	} hw_ftfe_feprot_t;
bogdanm	82:6473597d706e	2283	#endif
bogdanm	82:6473597d706e	2284
bogdanm	82:6473597d706e	2285	/*!
bogdanm	82:6473597d706e	2286	* @name Constants and macros for entire FTFE_FEPROT register
bogdanm	82:6473597d706e	2287	*/
bogdanm	82:6473597d706e	2288	//@{
bogdanm	82:6473597d706e	2289	#define HW_FTFE_FEPROT_ADDR (REGS_FTFE_BASE + 0x16U)
bogdanm	82:6473597d706e	2290
bogdanm	82:6473597d706e	2291	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2292	#define HW_FTFE_FEPROT ((__IO hw_ftfe_feprot_t ) HW_FTFE_FEPROT_ADDR)
bogdanm	82:6473597d706e	2293	#define HW_FTFE_FEPROT_RD() (HW_FTFE_FEPROT.U)
bogdanm	82:6473597d706e	2294	#define HW_FTFE_FEPROT_WR(v) (HW_FTFE_FEPROT.U = (v))
bogdanm	82:6473597d706e	2295	#define HW_FTFE_FEPROT_SET(v) (HW_FTFE_FEPROT_WR(HW_FTFE_FEPROT_RD() \| (v)))
bogdanm	82:6473597d706e	2296	#define HW_FTFE_FEPROT_CLR(v) (HW_FTFE_FEPROT_WR(HW_FTFE_FEPROT_RD() & ~(v)))
bogdanm	82:6473597d706e	2297	#define HW_FTFE_FEPROT_TOG(v) (HW_FTFE_FEPROT_WR(HW_FTFE_FEPROT_RD() ^ (v)))
bogdanm	82:6473597d706e	2298	#endif
bogdanm	82:6473597d706e	2299	//@}
bogdanm	82:6473597d706e	2300
bogdanm	82:6473597d706e	2301	/*
bogdanm	82:6473597d706e	2302	* Constants & macros for individual FTFE_FEPROT bitfields
bogdanm	82:6473597d706e	2303	*/
bogdanm	82:6473597d706e	2304
bogdanm	82:6473597d706e	2305	/*!
bogdanm	82:6473597d706e	2306	* @name Register FTFE_FEPROT, field EPROT[7:0] (RW)
bogdanm	82:6473597d706e	2307	*
bogdanm	82:6473597d706e	2308	* For devices with program flash only: Reserved For devices with FlexNVM:
bogdanm	82:6473597d706e	2309	* Individual EEPROM regions can be protected from alteration by setting the
bogdanm	82:6473597d706e	2310	* associated EPROT bit. The EPROT bits are not used when the FlexNVM Partition Code is
bogdanm	82:6473597d706e	2311	* set to data flash only. When the FlexNVM Partition Code is set to data flash and
bogdanm	82:6473597d706e	2312	* EEPROM or EEPROM only, each EPROT bit covers one-eighth of the configured
bogdanm	82:6473597d706e	2313	* EEPROM data (see the EEPROM Data Set Size parameter description). In NVM Normal
bogdanm	82:6473597d706e	2314	* mode: The protection can only be increased. This means that
bogdanm	82:6473597d706e	2315	* currently-unprotected memory can be protected, but currently-protected memory cannot be
bogdanm	82:6473597d706e	2316	* unprotected. Since unprotected regions are marked with a 1 and protected regions use a
bogdanm	82:6473597d706e	2317	* 0, only writes changing 1s to 0s are accepted. This 1-to-0 transition check is
bogdanm	82:6473597d706e	2318	* performed on a bit-by-bit basis. Those FEPROT bits with 1-to-0 transitions
bogdanm	82:6473597d706e	2319	* are accepted while all bits with 0-to-1 transitions are ignored. In NVM Special
bogdanm	82:6473597d706e	2320	* mode: All bits of the FEPROT register are writable without restriction.
bogdanm	82:6473597d706e	2321	* Unprotected areas can be protected and protected areas can be unprotected. Never
bogdanm	82:6473597d706e	2322	* write to the FEPROT register while a command is running (CCIF=0). Reset: During
bogdanm	82:6473597d706e	2323	* the reset sequence, the FEPROT register is loaded with the contents of the
bogdanm	82:6473597d706e	2324	* FlexRAM protection byte in the Flash Configuration Field located in program flash.
bogdanm	82:6473597d706e	2325	* The flash basis for the reset values is signified by X in the register
bogdanm	82:6473597d706e	2326	* diagram. To change the EEPROM protection that will be loaded during the reset
bogdanm	82:6473597d706e	2327	* sequence, the sector of program flash that contains the Flash Configuration Field
bogdanm	82:6473597d706e	2328	* must be unprotected; then the EEPROM protection byte must be erased and
bogdanm	82:6473597d706e	2329	* reprogrammed. Trying to alter data by writing to any protected area in the EEPROM
bogdanm	82:6473597d706e	2330	* results in a protection violation error and sets the FSTAT[FPVIOL] bit.
bogdanm	82:6473597d706e	2331	*
bogdanm	82:6473597d706e	2332	* Values:
bogdanm	82:6473597d706e	2333	* - 0 - For devices with program flash only: Reserved For devices with FlexNVM:
bogdanm	82:6473597d706e	2334	* EEPROM region is protected
bogdanm	82:6473597d706e	2335	* - 1 - For devices with program flash only: Reserved For devices with FlexNVM:
bogdanm	82:6473597d706e	2336	* EEPROM region is not protected
bogdanm	82:6473597d706e	2337	*/
bogdanm	82:6473597d706e	2338	//@{
bogdanm	82:6473597d706e	2339	#define BP_FTFE_FEPROT_EPROT (0U) //!< Bit position for FTFE_FEPROT_EPROT.
bogdanm	82:6473597d706e	2340	#define BM_FTFE_FEPROT_EPROT (0xFFU) //!< Bit mask for FTFE_FEPROT_EPROT.
bogdanm	82:6473597d706e	2341	#define BS_FTFE_FEPROT_EPROT (8U) //!< Bit field size in bits for FTFE_FEPROT_EPROT.
bogdanm	82:6473597d706e	2342
bogdanm	82:6473597d706e	2343	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2344	//! @brief Read current value of the FTFE_FEPROT_EPROT field.
bogdanm	82:6473597d706e	2345	#define BR_FTFE_FEPROT_EPROT (HW_FTFE_FEPROT.U)
bogdanm	82:6473597d706e	2346	#endif
bogdanm	82:6473597d706e	2347
bogdanm	82:6473597d706e	2348	//! @brief Format value for bitfield FTFE_FEPROT_EPROT.
bogdanm	82:6473597d706e	2349	#define BF_FTFE_FEPROT_EPROT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FEPROT_EPROT), uint8_t) & BM_FTFE_FEPROT_EPROT)
bogdanm	82:6473597d706e	2350
bogdanm	82:6473597d706e	2351	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2352	//! @brief Set the EPROT field to a new value.
bogdanm	82:6473597d706e	2353	#define BW_FTFE_FEPROT_EPROT(v) (HW_FTFE_FEPROT_WR(v))
bogdanm	82:6473597d706e	2354	#endif
bogdanm	82:6473597d706e	2355	//@}
bogdanm	82:6473597d706e	2356
bogdanm	82:6473597d706e	2357	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2358	// HW_FTFE_FDPROT - Data Flash Protection Register
bogdanm	82:6473597d706e	2359	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2360
bogdanm	82:6473597d706e	2361	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2362	/*!
bogdanm	82:6473597d706e	2363	* @brief HW_FTFE_FDPROT - Data Flash Protection Register (RW)
bogdanm	82:6473597d706e	2364	*
bogdanm	82:6473597d706e	2365	* Reset value: 0x00U
bogdanm	82:6473597d706e	2366	*
bogdanm	82:6473597d706e	2367	* The FDPROT register defines which data flash regions are protected against
bogdanm	82:6473597d706e	2368	* program and erase operations. Protected Flash regions cannot have their content
bogdanm	82:6473597d706e	2369	* changed; that is, these regions cannot be programmed and cannot be erased by
bogdanm	82:6473597d706e	2370	* any FTFE command. Unprotected regions can be changed by both program and erase
bogdanm	82:6473597d706e	2371	* operations.
bogdanm	82:6473597d706e	2372	*/
bogdanm	82:6473597d706e	2373	typedef union _hw_ftfe_fdprot
bogdanm	82:6473597d706e	2374	{
bogdanm	82:6473597d706e	2375	uint8_t U;
bogdanm	82:6473597d706e	2376	struct _hw_ftfe_fdprot_bitfields
bogdanm	82:6473597d706e	2377	{
bogdanm	82:6473597d706e	2378	uint8_t DPROT : 8; //!< [7:0] Data Flash Region Protect
bogdanm	82:6473597d706e	2379	} B;
bogdanm	82:6473597d706e	2380	} hw_ftfe_fdprot_t;
bogdanm	82:6473597d706e	2381	#endif
bogdanm	82:6473597d706e	2382
bogdanm	82:6473597d706e	2383	/*!
bogdanm	82:6473597d706e	2384	* @name Constants and macros for entire FTFE_FDPROT register
bogdanm	82:6473597d706e	2385	*/
bogdanm	82:6473597d706e	2386	//@{
bogdanm	82:6473597d706e	2387	#define HW_FTFE_FDPROT_ADDR (REGS_FTFE_BASE + 0x17U)
bogdanm	82:6473597d706e	2388
bogdanm	82:6473597d706e	2389	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2390	#define HW_FTFE_FDPROT ((__IO hw_ftfe_fdprot_t ) HW_FTFE_FDPROT_ADDR)
bogdanm	82:6473597d706e	2391	#define HW_FTFE_FDPROT_RD() (HW_FTFE_FDPROT.U)
bogdanm	82:6473597d706e	2392	#define HW_FTFE_FDPROT_WR(v) (HW_FTFE_FDPROT.U = (v))
bogdanm	82:6473597d706e	2393	#define HW_FTFE_FDPROT_SET(v) (HW_FTFE_FDPROT_WR(HW_FTFE_FDPROT_RD() \| (v)))
bogdanm	82:6473597d706e	2394	#define HW_FTFE_FDPROT_CLR(v) (HW_FTFE_FDPROT_WR(HW_FTFE_FDPROT_RD() & ~(v)))
bogdanm	82:6473597d706e	2395	#define HW_FTFE_FDPROT_TOG(v) (HW_FTFE_FDPROT_WR(HW_FTFE_FDPROT_RD() ^ (v)))
bogdanm	82:6473597d706e	2396	#endif
bogdanm	82:6473597d706e	2397	//@}
bogdanm	82:6473597d706e	2398
bogdanm	82:6473597d706e	2399	/*
bogdanm	82:6473597d706e	2400	* Constants & macros for individual FTFE_FDPROT bitfields
bogdanm	82:6473597d706e	2401	*/
bogdanm	82:6473597d706e	2402
bogdanm	82:6473597d706e	2403	/*!
bogdanm	82:6473597d706e	2404	* @name Register FTFE_FDPROT, field DPROT[7:0] (RW)
bogdanm	82:6473597d706e	2405	*
bogdanm	82:6473597d706e	2406	* Individual data flash regions can be protected from program and erase
bogdanm	82:6473597d706e	2407	* operations by setting the associated DPROT bit. Each DPROT bit protects one-eighth of
bogdanm	82:6473597d706e	2408	* the partitioned data flash memory space. The granularity of data flash
bogdanm	82:6473597d706e	2409	* protection cannot be less than the data flash sector size. If an unused DPROT bit is
bogdanm	82:6473597d706e	2410	* set, the Erase all Blocks command does not execute and sets the FSTAT[FPVIOL]
bogdanm	82:6473597d706e	2411	* bit. In NVM Normal mode: The protection can only be increased, meaning that
bogdanm	82:6473597d706e	2412	* currently unprotected memory can be protected but currently protected memory
bogdanm	82:6473597d706e	2413	* cannot be unprotected. Since unprotected regions are marked with a 1 and
bogdanm	82:6473597d706e	2414	* protected regions use a 0, only writes changing 1s to 0s are accepted. This 1-to-0
bogdanm	82:6473597d706e	2415	* transition check is performed on a bit-by-bit basis. Those FDPROT bits with
bogdanm	82:6473597d706e	2416	* 1-to-0 transitions are accepted while all bits with 0-to-1 transitions are
bogdanm	82:6473597d706e	2417	* ignored. In NVM Special mode: All bits of the FDPROT register are writable without
bogdanm	82:6473597d706e	2418	* restriction. Unprotected areas can be protected and protected areas can be
bogdanm	82:6473597d706e	2419	* unprotected. The user must never write to the FDPROT register while a command is
bogdanm	82:6473597d706e	2420	* running (CCIF=0). Reset: During the reset sequence, the FDPROT register is
bogdanm	82:6473597d706e	2421	* loaded with the contents of the data flash protection byte in the Flash
bogdanm	82:6473597d706e	2422	* Configuration Field located in program flash memory. The flash basis for the reset values
bogdanm	82:6473597d706e	2423	* is signified by X in the register diagram. To change the data flash
bogdanm	82:6473597d706e	2424	* protection that will be loaded during the reset sequence, unprotect the sector of
bogdanm	82:6473597d706e	2425	* program flash that contains the Flash Configuration Field. Then, erase and
bogdanm	82:6473597d706e	2426	* reprogram the data flash protection byte. Trying to alter data with the program and
bogdanm	82:6473597d706e	2427	* erase commands in any protected area in the data flash memory results in a
bogdanm	82:6473597d706e	2428	* protection violation error and sets the FSTAT[FPVIOL] bit. A block erase of any
bogdanm	82:6473597d706e	2429	* data flash memory block (see the Erase Flash Block command description) is not
bogdanm	82:6473597d706e	2430	* possible if the data flash block contains any protected region or if the FlexNVM
bogdanm	82:6473597d706e	2431	* memory has been partitioned for EEPROM.
bogdanm	82:6473597d706e	2432	*
bogdanm	82:6473597d706e	2433	* Values:
bogdanm	82:6473597d706e	2434	* - 0 - Data Flash region is protected
bogdanm	82:6473597d706e	2435	* - 1 - Data Flash region is not protected
bogdanm	82:6473597d706e	2436	*/
bogdanm	82:6473597d706e	2437	//@{
bogdanm	82:6473597d706e	2438	#define BP_FTFE_FDPROT_DPROT (0U) //!< Bit position for FTFE_FDPROT_DPROT.
bogdanm	82:6473597d706e	2439	#define BM_FTFE_FDPROT_DPROT (0xFFU) //!< Bit mask for FTFE_FDPROT_DPROT.
bogdanm	82:6473597d706e	2440	#define BS_FTFE_FDPROT_DPROT (8U) //!< Bit field size in bits for FTFE_FDPROT_DPROT.
bogdanm	82:6473597d706e	2441
bogdanm	82:6473597d706e	2442	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2443	//! @brief Read current value of the FTFE_FDPROT_DPROT field.
bogdanm	82:6473597d706e	2444	#define BR_FTFE_FDPROT_DPROT (HW_FTFE_FDPROT.U)
bogdanm	82:6473597d706e	2445	#endif
bogdanm	82:6473597d706e	2446
bogdanm	82:6473597d706e	2447	//! @brief Format value for bitfield FTFE_FDPROT_DPROT.
bogdanm	82:6473597d706e	2448	#define BF_FTFE_FDPROT_DPROT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_FTFE_FDPROT_DPROT), uint8_t) & BM_FTFE_FDPROT_DPROT)
bogdanm	82:6473597d706e	2449
bogdanm	82:6473597d706e	2450	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2451	//! @brief Set the DPROT field to a new value.
bogdanm	82:6473597d706e	2452	#define BW_FTFE_FDPROT_DPROT(v) (HW_FTFE_FDPROT_WR(v))
bogdanm	82:6473597d706e	2453	#endif
bogdanm	82:6473597d706e	2454	//@}
bogdanm	82:6473597d706e	2455
bogdanm	82:6473597d706e	2456	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2457	// hw_ftfe_t - module struct
bogdanm	82:6473597d706e	2458	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	2459	/*!
bogdanm	82:6473597d706e	2460	* @brief All FTFE module registers.
bogdanm	82:6473597d706e	2461	*/
bogdanm	82:6473597d706e	2462	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	2463	#pragma pack(1)
bogdanm	82:6473597d706e	2464	typedef struct _hw_ftfe
bogdanm	82:6473597d706e	2465	{
bogdanm	82:6473597d706e	2466	__IO hw_ftfe_fstat_t FSTAT; //!< [0x0] Flash Status Register
bogdanm	82:6473597d706e	2467	__IO hw_ftfe_fcnfg_t FCNFG; //!< [0x1] Flash Configuration Register
bogdanm	82:6473597d706e	2468	__I hw_ftfe_fsec_t FSEC; //!< [0x2] Flash Security Register
bogdanm	82:6473597d706e	2469	__I hw_ftfe_fopt_t FOPT; //!< [0x3] Flash Option Register
bogdanm	82:6473597d706e	2470	__IO hw_ftfe_fccob3_t FCCOB3; //!< [0x4] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2471	__IO hw_ftfe_fccob2_t FCCOB2; //!< [0x5] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2472	__IO hw_ftfe_fccob1_t FCCOB1; //!< [0x6] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2473	__IO hw_ftfe_fccob0_t FCCOB0; //!< [0x7] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2474	__IO hw_ftfe_fccob7_t FCCOB7; //!< [0x8] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2475	__IO hw_ftfe_fccob6_t FCCOB6; //!< [0x9] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2476	__IO hw_ftfe_fccob5_t FCCOB5; //!< [0xA] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2477	__IO hw_ftfe_fccob4_t FCCOB4; //!< [0xB] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2478	__IO hw_ftfe_fccobb_t FCCOBB; //!< [0xC] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2479	__IO hw_ftfe_fccoba_t FCCOBA; //!< [0xD] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2480	__IO hw_ftfe_fccob9_t FCCOB9; //!< [0xE] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2481	__IO hw_ftfe_fccob8_t FCCOB8; //!< [0xF] Flash Common Command Object Registers
bogdanm	82:6473597d706e	2482	__IO hw_ftfe_fprot3_t FPROT3; //!< [0x10] Program Flash Protection Registers
bogdanm	82:6473597d706e	2483	__IO hw_ftfe_fprot2_t FPROT2; //!< [0x11] Program Flash Protection Registers
bogdanm	82:6473597d706e	2484	__IO hw_ftfe_fprot1_t FPROT1; //!< [0x12] Program Flash Protection Registers
bogdanm	82:6473597d706e	2485	__IO hw_ftfe_fprot0_t FPROT0; //!< [0x13] Program Flash Protection Registers
bogdanm	82:6473597d706e	2486	uint8_t _reserved0[2];
bogdanm	82:6473597d706e	2487	__IO hw_ftfe_feprot_t FEPROT; //!< [0x16] EEPROM Protection Register
bogdanm	82:6473597d706e	2488	__IO hw_ftfe_fdprot_t FDPROT; //!< [0x17] Data Flash Protection Register
bogdanm	82:6473597d706e	2489	} hw_ftfe_t;
bogdanm	82:6473597d706e	2490	#pragma pack()
bogdanm	82:6473597d706e	2491
bogdanm	82:6473597d706e	2492	//! @brief Macro to access all FTFE registers.
bogdanm	82:6473597d706e	2493	//! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
bogdanm	82:6473597d706e	2494	//! use the '&' operator, like <code>&HW_FTFE</code>.
bogdanm	82:6473597d706e	2495	#define HW_FTFE ((hw_ftfe_t ) REGS_FTFE_BASE)
bogdanm	82:6473597d706e	2496	#endif
bogdanm	82:6473597d706e	2497
bogdanm	82:6473597d706e	2498	#endif // __HW_FTFE_REGISTERS_H__
bogdanm	82:6473597d706e	2499	// v22/130726/0.9
bogdanm	82:6473597d706e	2500	// EOF

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Type:	Library
Created:	25 Jun 2015
Imports:	24
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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/MK64F12/MK64F12_ftfe.h@89:552587b429a1, 2014-09-12 (annotated)

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