mbed - mbed library

Users » JulienKern » Code » mbed

mbed library

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/MK64F12/MK64F12_crc.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:: bogdanm
Date:: Fri Sep 12 16:41:52 2014 +0100
Revision:: 89:552587b429a1
Parent:: TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device/MK64F12/MK64F12_crc.h@82:6473597d706e

Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	82:6473597d706e	1	/*
bogdanm	82:6473597d706e	2	* Copyright (c) 2014, Freescale Semiconductor, Inc.
bogdanm	82:6473597d706e	3	* All rights reserved.
bogdanm	82:6473597d706e	4	*
bogdanm	82:6473597d706e	5	* THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED
bogdanm	82:6473597d706e	6	* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
bogdanm	82:6473597d706e	7	* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
bogdanm	82:6473597d706e	8	* SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
bogdanm	82:6473597d706e	9	* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
bogdanm	82:6473597d706e	10	* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm	82:6473597d706e	11	* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm	82:6473597d706e	12	* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
bogdanm	82:6473597d706e	13	* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
bogdanm	82:6473597d706e	14	* OF SUCH DAMAGE.
bogdanm	82:6473597d706e	15	*/
bogdanm	82:6473597d706e	16	/*
bogdanm	82:6473597d706e	17	* WARNING! DO NOT EDIT THIS FILE DIRECTLY!
bogdanm	82:6473597d706e	18	*
bogdanm	82:6473597d706e	19	* This file was generated automatically and any changes may be lost.
bogdanm	82:6473597d706e	20	*/
bogdanm	82:6473597d706e	21	#ifndef __HW_CRC_REGISTERS_H__
bogdanm	82:6473597d706e	22	#define __HW_CRC_REGISTERS_H__
bogdanm	82:6473597d706e	23
bogdanm	82:6473597d706e	24	#include "regs.h"
bogdanm	82:6473597d706e	25
bogdanm	82:6473597d706e	26	/*
bogdanm	82:6473597d706e	27	* MK64F12 CRC
bogdanm	82:6473597d706e	28	*
bogdanm	82:6473597d706e	29	* Cyclic Redundancy Check
bogdanm	82:6473597d706e	30	*
bogdanm	82:6473597d706e	31	* Registers defined in this header file:
bogdanm	82:6473597d706e	32	* - HW_CRC_DATAL - CRC_DATAL register.
bogdanm	82:6473597d706e	33	* - HW_CRC_DATAH - CRC_DATAH register.
bogdanm	82:6473597d706e	34	* - HW_CRC_DATALL - CRC_DATALL register.
bogdanm	82:6473597d706e	35	* - HW_CRC_DATALU - CRC_DATALU register.
bogdanm	82:6473597d706e	36	* - HW_CRC_DATAHL - CRC_DATAHL register.
bogdanm	82:6473597d706e	37	* - HW_CRC_DATAHU - CRC_DATAHU register.
bogdanm	82:6473597d706e	38	* - HW_CRC_DATA - CRC Data register
bogdanm	82:6473597d706e	39	* - HW_CRC_GPOLY - CRC Polynomial register
bogdanm	82:6473597d706e	40	* - HW_CRC_GPOLYL - CRC_GPOLYL register.
bogdanm	82:6473597d706e	41	* - HW_CRC_GPOLYH - CRC_GPOLYH register.
bogdanm	82:6473597d706e	42	* - HW_CRC_GPOLYLL - CRC_GPOLYLL register.
bogdanm	82:6473597d706e	43	* - HW_CRC_GPOLYLU - CRC_GPOLYLU register.
bogdanm	82:6473597d706e	44	* - HW_CRC_GPOLYHL - CRC_GPOLYHL register.
bogdanm	82:6473597d706e	45	* - HW_CRC_GPOLYHU - CRC_GPOLYHU register.
bogdanm	82:6473597d706e	46	* - HW_CRC_CTRL - CRC Control register
bogdanm	82:6473597d706e	47	* - HW_CRC_CTRLHU - CRC_CTRLHU register.
bogdanm	82:6473597d706e	48	*
bogdanm	82:6473597d706e	49	* - hw_crc_t - Struct containing all module registers.
bogdanm	82:6473597d706e	50	*/
bogdanm	82:6473597d706e	51
bogdanm	82:6473597d706e	52	//! @name Module base addresses
bogdanm	82:6473597d706e	53	//@{
bogdanm	82:6473597d706e	54	#ifndef REGS_CRC_BASE
bogdanm	82:6473597d706e	55	#define HW_CRC_INSTANCE_COUNT (1U) //!< Number of instances of the CRC module.
bogdanm	82:6473597d706e	56	#define REGS_CRC_BASE (0x40032000U) //!< Base address for CRC.
bogdanm	82:6473597d706e	57	#endif
bogdanm	82:6473597d706e	58	//@}
bogdanm	82:6473597d706e	59
bogdanm	82:6473597d706e	60	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	61	// HW_CRC_DATAL - CRC_DATAL register.
bogdanm	82:6473597d706e	62	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	63
bogdanm	82:6473597d706e	64	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	65	/*!
bogdanm	82:6473597d706e	66	* @brief HW_CRC_DATAL - CRC_DATAL register. (RW)
bogdanm	82:6473597d706e	67	*
bogdanm	82:6473597d706e	68	* Reset value: 0xFFFFU
bogdanm	82:6473597d706e	69	*/
bogdanm	82:6473597d706e	70	typedef union _hw_crc_datal
bogdanm	82:6473597d706e	71	{
bogdanm	82:6473597d706e	72	uint16_t U;
bogdanm	82:6473597d706e	73	struct _hw_crc_datal_bitfields
bogdanm	82:6473597d706e	74	{
bogdanm	82:6473597d706e	75	uint16_t DATAL : 16; //!< [15:0] DATAL stores the lower 16 bits of
bogdanm	82:6473597d706e	76	//! the 16/32 bit CRC
bogdanm	82:6473597d706e	77	} B;
bogdanm	82:6473597d706e	78	} hw_crc_datal_t;
bogdanm	82:6473597d706e	79	#endif
bogdanm	82:6473597d706e	80
bogdanm	82:6473597d706e	81	/*!
bogdanm	82:6473597d706e	82	* @name Constants and macros for entire CRC_DATAL register
bogdanm	82:6473597d706e	83	*/
bogdanm	82:6473597d706e	84	//@{
bogdanm	82:6473597d706e	85	#define HW_CRC_DATAL_ADDR (REGS_CRC_BASE + 0x0U)
bogdanm	82:6473597d706e	86
bogdanm	82:6473597d706e	87	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	88	#define HW_CRC_DATAL ((__IO hw_crc_datal_t ) HW_CRC_DATAL_ADDR)
bogdanm	82:6473597d706e	89	#define HW_CRC_DATAL_RD() (HW_CRC_DATAL.U)
bogdanm	82:6473597d706e	90	#define HW_CRC_DATAL_WR(v) (HW_CRC_DATAL.U = (v))
bogdanm	82:6473597d706e	91	#define HW_CRC_DATAL_SET(v) (HW_CRC_DATAL_WR(HW_CRC_DATAL_RD() \| (v)))
bogdanm	82:6473597d706e	92	#define HW_CRC_DATAL_CLR(v) (HW_CRC_DATAL_WR(HW_CRC_DATAL_RD() & ~(v)))
bogdanm	82:6473597d706e	93	#define HW_CRC_DATAL_TOG(v) (HW_CRC_DATAL_WR(HW_CRC_DATAL_RD() ^ (v)))
bogdanm	82:6473597d706e	94	#endif
bogdanm	82:6473597d706e	95	//@}
bogdanm	82:6473597d706e	96
bogdanm	82:6473597d706e	97	/*
bogdanm	82:6473597d706e	98	* Constants & macros for individual CRC_DATAL bitfields
bogdanm	82:6473597d706e	99	*/
bogdanm	82:6473597d706e	100
bogdanm	82:6473597d706e	101	/*!
bogdanm	82:6473597d706e	102	* @name Register CRC_DATAL, field DATAL[15:0] (RW)
bogdanm	82:6473597d706e	103	*/
bogdanm	82:6473597d706e	104	//@{
bogdanm	82:6473597d706e	105	#define BP_CRC_DATAL_DATAL (0U) //!< Bit position for CRC_DATAL_DATAL.
bogdanm	82:6473597d706e	106	#define BM_CRC_DATAL_DATAL (0xFFFFU) //!< Bit mask for CRC_DATAL_DATAL.
bogdanm	82:6473597d706e	107	#define BS_CRC_DATAL_DATAL (16U) //!< Bit field size in bits for CRC_DATAL_DATAL.
bogdanm	82:6473597d706e	108
bogdanm	82:6473597d706e	109	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	110	//! @brief Read current value of the CRC_DATAL_DATAL field.
bogdanm	82:6473597d706e	111	#define BR_CRC_DATAL_DATAL (HW_CRC_DATAL.U)
bogdanm	82:6473597d706e	112	#endif
bogdanm	82:6473597d706e	113
bogdanm	82:6473597d706e	114	//! @brief Format value for bitfield CRC_DATAL_DATAL.
bogdanm	82:6473597d706e	115	#define BF_CRC_DATAL_DATAL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint16_t) << BP_CRC_DATAL_DATAL), uint16_t) & BM_CRC_DATAL_DATAL)
bogdanm	82:6473597d706e	116
bogdanm	82:6473597d706e	117	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	118	//! @brief Set the DATAL field to a new value.
bogdanm	82:6473597d706e	119	#define BW_CRC_DATAL_DATAL(v) (HW_CRC_DATAL_WR(v))
bogdanm	82:6473597d706e	120	#endif
bogdanm	82:6473597d706e	121	//@}
bogdanm	82:6473597d706e	122	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	123	// HW_CRC_DATAH - CRC_DATAH register.
bogdanm	82:6473597d706e	124	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	125
bogdanm	82:6473597d706e	126	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	127	/*!
bogdanm	82:6473597d706e	128	* @brief HW_CRC_DATAH - CRC_DATAH register. (RW)
bogdanm	82:6473597d706e	129	*
bogdanm	82:6473597d706e	130	* Reset value: 0xFFFFU
bogdanm	82:6473597d706e	131	*/
bogdanm	82:6473597d706e	132	typedef union _hw_crc_datah
bogdanm	82:6473597d706e	133	{
bogdanm	82:6473597d706e	134	uint16_t U;
bogdanm	82:6473597d706e	135	struct _hw_crc_datah_bitfields
bogdanm	82:6473597d706e	136	{
bogdanm	82:6473597d706e	137	uint16_t DATAH : 16; //!< [15:0] DATAH stores the high 16 bits of the
bogdanm	82:6473597d706e	138	//! 16/32 bit CRC
bogdanm	82:6473597d706e	139	} B;
bogdanm	82:6473597d706e	140	} hw_crc_datah_t;
bogdanm	82:6473597d706e	141	#endif
bogdanm	82:6473597d706e	142
bogdanm	82:6473597d706e	143	/*!
bogdanm	82:6473597d706e	144	* @name Constants and macros for entire CRC_DATAH register
bogdanm	82:6473597d706e	145	*/
bogdanm	82:6473597d706e	146	//@{
bogdanm	82:6473597d706e	147	#define HW_CRC_DATAH_ADDR (REGS_CRC_BASE + 0x2U)
bogdanm	82:6473597d706e	148
bogdanm	82:6473597d706e	149	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	150	#define HW_CRC_DATAH ((__IO hw_crc_datah_t ) HW_CRC_DATAH_ADDR)
bogdanm	82:6473597d706e	151	#define HW_CRC_DATAH_RD() (HW_CRC_DATAH.U)
bogdanm	82:6473597d706e	152	#define HW_CRC_DATAH_WR(v) (HW_CRC_DATAH.U = (v))
bogdanm	82:6473597d706e	153	#define HW_CRC_DATAH_SET(v) (HW_CRC_DATAH_WR(HW_CRC_DATAH_RD() \| (v)))
bogdanm	82:6473597d706e	154	#define HW_CRC_DATAH_CLR(v) (HW_CRC_DATAH_WR(HW_CRC_DATAH_RD() & ~(v)))
bogdanm	82:6473597d706e	155	#define HW_CRC_DATAH_TOG(v) (HW_CRC_DATAH_WR(HW_CRC_DATAH_RD() ^ (v)))
bogdanm	82:6473597d706e	156	#endif
bogdanm	82:6473597d706e	157	//@}
bogdanm	82:6473597d706e	158
bogdanm	82:6473597d706e	159	/*
bogdanm	82:6473597d706e	160	* Constants & macros for individual CRC_DATAH bitfields
bogdanm	82:6473597d706e	161	*/
bogdanm	82:6473597d706e	162
bogdanm	82:6473597d706e	163	/*!
bogdanm	82:6473597d706e	164	* @name Register CRC_DATAH, field DATAH[15:0] (RW)
bogdanm	82:6473597d706e	165	*/
bogdanm	82:6473597d706e	166	//@{
bogdanm	82:6473597d706e	167	#define BP_CRC_DATAH_DATAH (0U) //!< Bit position for CRC_DATAH_DATAH.
bogdanm	82:6473597d706e	168	#define BM_CRC_DATAH_DATAH (0xFFFFU) //!< Bit mask for CRC_DATAH_DATAH.
bogdanm	82:6473597d706e	169	#define BS_CRC_DATAH_DATAH (16U) //!< Bit field size in bits for CRC_DATAH_DATAH.
bogdanm	82:6473597d706e	170
bogdanm	82:6473597d706e	171	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	172	//! @brief Read current value of the CRC_DATAH_DATAH field.
bogdanm	82:6473597d706e	173	#define BR_CRC_DATAH_DATAH (HW_CRC_DATAH.U)
bogdanm	82:6473597d706e	174	#endif
bogdanm	82:6473597d706e	175
bogdanm	82:6473597d706e	176	//! @brief Format value for bitfield CRC_DATAH_DATAH.
bogdanm	82:6473597d706e	177	#define BF_CRC_DATAH_DATAH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint16_t) << BP_CRC_DATAH_DATAH), uint16_t) & BM_CRC_DATAH_DATAH)
bogdanm	82:6473597d706e	178
bogdanm	82:6473597d706e	179	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	180	//! @brief Set the DATAH field to a new value.
bogdanm	82:6473597d706e	181	#define BW_CRC_DATAH_DATAH(v) (HW_CRC_DATAH_WR(v))
bogdanm	82:6473597d706e	182	#endif
bogdanm	82:6473597d706e	183	//@}
bogdanm	82:6473597d706e	184	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	185	// HW_CRC_DATALL - CRC_DATALL register.
bogdanm	82:6473597d706e	186	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	187
bogdanm	82:6473597d706e	188	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	189	/*!
bogdanm	82:6473597d706e	190	* @brief HW_CRC_DATALL - CRC_DATALL register. (RW)
bogdanm	82:6473597d706e	191	*
bogdanm	82:6473597d706e	192	* Reset value: 0xFFU
bogdanm	82:6473597d706e	193	*/
bogdanm	82:6473597d706e	194	typedef union _hw_crc_datall
bogdanm	82:6473597d706e	195	{
bogdanm	82:6473597d706e	196	uint8_t U;
bogdanm	82:6473597d706e	197	struct _hw_crc_datall_bitfields
bogdanm	82:6473597d706e	198	{
bogdanm	82:6473597d706e	199	uint8_t DATALL : 8; //!< [7:0] CRCLL stores the first 8 bits of the
bogdanm	82:6473597d706e	200	//! 32 bit DATA
bogdanm	82:6473597d706e	201	} B;
bogdanm	82:6473597d706e	202	} hw_crc_datall_t;
bogdanm	82:6473597d706e	203	#endif
bogdanm	82:6473597d706e	204
bogdanm	82:6473597d706e	205	/*!
bogdanm	82:6473597d706e	206	* @name Constants and macros for entire CRC_DATALL register
bogdanm	82:6473597d706e	207	*/
bogdanm	82:6473597d706e	208	//@{
bogdanm	82:6473597d706e	209	#define HW_CRC_DATALL_ADDR (REGS_CRC_BASE + 0x0U)
bogdanm	82:6473597d706e	210
bogdanm	82:6473597d706e	211	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	212	#define HW_CRC_DATALL ((__IO hw_crc_datall_t ) HW_CRC_DATALL_ADDR)
bogdanm	82:6473597d706e	213	#define HW_CRC_DATALL_RD() (HW_CRC_DATALL.U)
bogdanm	82:6473597d706e	214	#define HW_CRC_DATALL_WR(v) (HW_CRC_DATALL.U = (v))
bogdanm	82:6473597d706e	215	#define HW_CRC_DATALL_SET(v) (HW_CRC_DATALL_WR(HW_CRC_DATALL_RD() \| (v)))
bogdanm	82:6473597d706e	216	#define HW_CRC_DATALL_CLR(v) (HW_CRC_DATALL_WR(HW_CRC_DATALL_RD() & ~(v)))
bogdanm	82:6473597d706e	217	#define HW_CRC_DATALL_TOG(v) (HW_CRC_DATALL_WR(HW_CRC_DATALL_RD() ^ (v)))
bogdanm	82:6473597d706e	218	#endif
bogdanm	82:6473597d706e	219	//@}
bogdanm	82:6473597d706e	220
bogdanm	82:6473597d706e	221	/*
bogdanm	82:6473597d706e	222	* Constants & macros for individual CRC_DATALL bitfields
bogdanm	82:6473597d706e	223	*/
bogdanm	82:6473597d706e	224
bogdanm	82:6473597d706e	225	/*!
bogdanm	82:6473597d706e	226	* @name Register CRC_DATALL, field DATALL[7:0] (RW)
bogdanm	82:6473597d706e	227	*/
bogdanm	82:6473597d706e	228	//@{
bogdanm	82:6473597d706e	229	#define BP_CRC_DATALL_DATALL (0U) //!< Bit position for CRC_DATALL_DATALL.
bogdanm	82:6473597d706e	230	#define BM_CRC_DATALL_DATALL (0xFFU) //!< Bit mask for CRC_DATALL_DATALL.
bogdanm	82:6473597d706e	231	#define BS_CRC_DATALL_DATALL (8U) //!< Bit field size in bits for CRC_DATALL_DATALL.
bogdanm	82:6473597d706e	232
bogdanm	82:6473597d706e	233	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	234	//! @brief Read current value of the CRC_DATALL_DATALL field.
bogdanm	82:6473597d706e	235	#define BR_CRC_DATALL_DATALL (HW_CRC_DATALL.U)
bogdanm	82:6473597d706e	236	#endif
bogdanm	82:6473597d706e	237
bogdanm	82:6473597d706e	238	//! @brief Format value for bitfield CRC_DATALL_DATALL.
bogdanm	82:6473597d706e	239	#define BF_CRC_DATALL_DATALL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_DATALL_DATALL), uint8_t) & BM_CRC_DATALL_DATALL)
bogdanm	82:6473597d706e	240
bogdanm	82:6473597d706e	241	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	242	//! @brief Set the DATALL field to a new value.
bogdanm	82:6473597d706e	243	#define BW_CRC_DATALL_DATALL(v) (HW_CRC_DATALL_WR(v))
bogdanm	82:6473597d706e	244	#endif
bogdanm	82:6473597d706e	245	//@}
bogdanm	82:6473597d706e	246	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	247	// HW_CRC_DATALU - CRC_DATALU register.
bogdanm	82:6473597d706e	248	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	249
bogdanm	82:6473597d706e	250	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	251	/*!
bogdanm	82:6473597d706e	252	* @brief HW_CRC_DATALU - CRC_DATALU register. (RW)
bogdanm	82:6473597d706e	253	*
bogdanm	82:6473597d706e	254	* Reset value: 0xFFU
bogdanm	82:6473597d706e	255	*/
bogdanm	82:6473597d706e	256	typedef union _hw_crc_datalu
bogdanm	82:6473597d706e	257	{
bogdanm	82:6473597d706e	258	uint8_t U;
bogdanm	82:6473597d706e	259	struct _hw_crc_datalu_bitfields
bogdanm	82:6473597d706e	260	{
bogdanm	82:6473597d706e	261	uint8_t DATALU : 8; //!< [7:0] DATALL stores the second 8 bits of the
bogdanm	82:6473597d706e	262	//! 32 bit CRC
bogdanm	82:6473597d706e	263	} B;
bogdanm	82:6473597d706e	264	} hw_crc_datalu_t;
bogdanm	82:6473597d706e	265	#endif
bogdanm	82:6473597d706e	266
bogdanm	82:6473597d706e	267	/*!
bogdanm	82:6473597d706e	268	* @name Constants and macros for entire CRC_DATALU register
bogdanm	82:6473597d706e	269	*/
bogdanm	82:6473597d706e	270	//@{
bogdanm	82:6473597d706e	271	#define HW_CRC_DATALU_ADDR (REGS_CRC_BASE + 0x1U)
bogdanm	82:6473597d706e	272
bogdanm	82:6473597d706e	273	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	274	#define HW_CRC_DATALU ((__IO hw_crc_datalu_t ) HW_CRC_DATALU_ADDR)
bogdanm	82:6473597d706e	275	#define HW_CRC_DATALU_RD() (HW_CRC_DATALU.U)
bogdanm	82:6473597d706e	276	#define HW_CRC_DATALU_WR(v) (HW_CRC_DATALU.U = (v))
bogdanm	82:6473597d706e	277	#define HW_CRC_DATALU_SET(v) (HW_CRC_DATALU_WR(HW_CRC_DATALU_RD() \| (v)))
bogdanm	82:6473597d706e	278	#define HW_CRC_DATALU_CLR(v) (HW_CRC_DATALU_WR(HW_CRC_DATALU_RD() & ~(v)))
bogdanm	82:6473597d706e	279	#define HW_CRC_DATALU_TOG(v) (HW_CRC_DATALU_WR(HW_CRC_DATALU_RD() ^ (v)))
bogdanm	82:6473597d706e	280	#endif
bogdanm	82:6473597d706e	281	//@}
bogdanm	82:6473597d706e	282
bogdanm	82:6473597d706e	283	/*
bogdanm	82:6473597d706e	284	* Constants & macros for individual CRC_DATALU bitfields
bogdanm	82:6473597d706e	285	*/
bogdanm	82:6473597d706e	286
bogdanm	82:6473597d706e	287	/*!
bogdanm	82:6473597d706e	288	* @name Register CRC_DATALU, field DATALU[7:0] (RW)
bogdanm	82:6473597d706e	289	*/
bogdanm	82:6473597d706e	290	//@{
bogdanm	82:6473597d706e	291	#define BP_CRC_DATALU_DATALU (0U) //!< Bit position for CRC_DATALU_DATALU.
bogdanm	82:6473597d706e	292	#define BM_CRC_DATALU_DATALU (0xFFU) //!< Bit mask for CRC_DATALU_DATALU.
bogdanm	82:6473597d706e	293	#define BS_CRC_DATALU_DATALU (8U) //!< Bit field size in bits for CRC_DATALU_DATALU.
bogdanm	82:6473597d706e	294
bogdanm	82:6473597d706e	295	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	296	//! @brief Read current value of the CRC_DATALU_DATALU field.
bogdanm	82:6473597d706e	297	#define BR_CRC_DATALU_DATALU (HW_CRC_DATALU.U)
bogdanm	82:6473597d706e	298	#endif
bogdanm	82:6473597d706e	299
bogdanm	82:6473597d706e	300	//! @brief Format value for bitfield CRC_DATALU_DATALU.
bogdanm	82:6473597d706e	301	#define BF_CRC_DATALU_DATALU(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_DATALU_DATALU), uint8_t) & BM_CRC_DATALU_DATALU)
bogdanm	82:6473597d706e	302
bogdanm	82:6473597d706e	303	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	304	//! @brief Set the DATALU field to a new value.
bogdanm	82:6473597d706e	305	#define BW_CRC_DATALU_DATALU(v) (HW_CRC_DATALU_WR(v))
bogdanm	82:6473597d706e	306	#endif
bogdanm	82:6473597d706e	307	//@}
bogdanm	82:6473597d706e	308	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	309	// HW_CRC_DATAHL - CRC_DATAHL register.
bogdanm	82:6473597d706e	310	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	311
bogdanm	82:6473597d706e	312	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	313	/*!
bogdanm	82:6473597d706e	314	* @brief HW_CRC_DATAHL - CRC_DATAHL register. (RW)
bogdanm	82:6473597d706e	315	*
bogdanm	82:6473597d706e	316	* Reset value: 0xFFU
bogdanm	82:6473597d706e	317	*/
bogdanm	82:6473597d706e	318	typedef union _hw_crc_datahl
bogdanm	82:6473597d706e	319	{
bogdanm	82:6473597d706e	320	uint8_t U;
bogdanm	82:6473597d706e	321	struct _hw_crc_datahl_bitfields
bogdanm	82:6473597d706e	322	{
bogdanm	82:6473597d706e	323	uint8_t DATAHL : 8; //!< [7:0] DATAHL stores the third 8 bits of the
bogdanm	82:6473597d706e	324	//! 32 bit CRC
bogdanm	82:6473597d706e	325	} B;
bogdanm	82:6473597d706e	326	} hw_crc_datahl_t;
bogdanm	82:6473597d706e	327	#endif
bogdanm	82:6473597d706e	328
bogdanm	82:6473597d706e	329	/*!
bogdanm	82:6473597d706e	330	* @name Constants and macros for entire CRC_DATAHL register
bogdanm	82:6473597d706e	331	*/
bogdanm	82:6473597d706e	332	//@{
bogdanm	82:6473597d706e	333	#define HW_CRC_DATAHL_ADDR (REGS_CRC_BASE + 0x2U)
bogdanm	82:6473597d706e	334
bogdanm	82:6473597d706e	335	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	336	#define HW_CRC_DATAHL ((__IO hw_crc_datahl_t ) HW_CRC_DATAHL_ADDR)
bogdanm	82:6473597d706e	337	#define HW_CRC_DATAHL_RD() (HW_CRC_DATAHL.U)
bogdanm	82:6473597d706e	338	#define HW_CRC_DATAHL_WR(v) (HW_CRC_DATAHL.U = (v))
bogdanm	82:6473597d706e	339	#define HW_CRC_DATAHL_SET(v) (HW_CRC_DATAHL_WR(HW_CRC_DATAHL_RD() \| (v)))
bogdanm	82:6473597d706e	340	#define HW_CRC_DATAHL_CLR(v) (HW_CRC_DATAHL_WR(HW_CRC_DATAHL_RD() & ~(v)))
bogdanm	82:6473597d706e	341	#define HW_CRC_DATAHL_TOG(v) (HW_CRC_DATAHL_WR(HW_CRC_DATAHL_RD() ^ (v)))
bogdanm	82:6473597d706e	342	#endif
bogdanm	82:6473597d706e	343	//@}
bogdanm	82:6473597d706e	344
bogdanm	82:6473597d706e	345	/*
bogdanm	82:6473597d706e	346	* Constants & macros for individual CRC_DATAHL bitfields
bogdanm	82:6473597d706e	347	*/
bogdanm	82:6473597d706e	348
bogdanm	82:6473597d706e	349	/*!
bogdanm	82:6473597d706e	350	* @name Register CRC_DATAHL, field DATAHL[7:0] (RW)
bogdanm	82:6473597d706e	351	*/
bogdanm	82:6473597d706e	352	//@{
bogdanm	82:6473597d706e	353	#define BP_CRC_DATAHL_DATAHL (0U) //!< Bit position for CRC_DATAHL_DATAHL.
bogdanm	82:6473597d706e	354	#define BM_CRC_DATAHL_DATAHL (0xFFU) //!< Bit mask for CRC_DATAHL_DATAHL.
bogdanm	82:6473597d706e	355	#define BS_CRC_DATAHL_DATAHL (8U) //!< Bit field size in bits for CRC_DATAHL_DATAHL.
bogdanm	82:6473597d706e	356
bogdanm	82:6473597d706e	357	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	358	//! @brief Read current value of the CRC_DATAHL_DATAHL field.
bogdanm	82:6473597d706e	359	#define BR_CRC_DATAHL_DATAHL (HW_CRC_DATAHL.U)
bogdanm	82:6473597d706e	360	#endif
bogdanm	82:6473597d706e	361
bogdanm	82:6473597d706e	362	//! @brief Format value for bitfield CRC_DATAHL_DATAHL.
bogdanm	82:6473597d706e	363	#define BF_CRC_DATAHL_DATAHL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_DATAHL_DATAHL), uint8_t) & BM_CRC_DATAHL_DATAHL)
bogdanm	82:6473597d706e	364
bogdanm	82:6473597d706e	365	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	366	//! @brief Set the DATAHL field to a new value.
bogdanm	82:6473597d706e	367	#define BW_CRC_DATAHL_DATAHL(v) (HW_CRC_DATAHL_WR(v))
bogdanm	82:6473597d706e	368	#endif
bogdanm	82:6473597d706e	369	//@}
bogdanm	82:6473597d706e	370	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	371	// HW_CRC_DATAHU - CRC_DATAHU register.
bogdanm	82:6473597d706e	372	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	373
bogdanm	82:6473597d706e	374	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	375	/*!
bogdanm	82:6473597d706e	376	* @brief HW_CRC_DATAHU - CRC_DATAHU register. (RW)
bogdanm	82:6473597d706e	377	*
bogdanm	82:6473597d706e	378	* Reset value: 0xFFU
bogdanm	82:6473597d706e	379	*/
bogdanm	82:6473597d706e	380	typedef union _hw_crc_datahu
bogdanm	82:6473597d706e	381	{
bogdanm	82:6473597d706e	382	uint8_t U;
bogdanm	82:6473597d706e	383	struct _hw_crc_datahu_bitfields
bogdanm	82:6473597d706e	384	{
bogdanm	82:6473597d706e	385	uint8_t DATAHU : 8; //!< [7:0] DATAHU stores the fourth 8 bits of the
bogdanm	82:6473597d706e	386	//! 32 bit CRC
bogdanm	82:6473597d706e	387	} B;
bogdanm	82:6473597d706e	388	} hw_crc_datahu_t;
bogdanm	82:6473597d706e	389	#endif
bogdanm	82:6473597d706e	390
bogdanm	82:6473597d706e	391	/*!
bogdanm	82:6473597d706e	392	* @name Constants and macros for entire CRC_DATAHU register
bogdanm	82:6473597d706e	393	*/
bogdanm	82:6473597d706e	394	//@{
bogdanm	82:6473597d706e	395	#define HW_CRC_DATAHU_ADDR (REGS_CRC_BASE + 0x3U)
bogdanm	82:6473597d706e	396
bogdanm	82:6473597d706e	397	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	398	#define HW_CRC_DATAHU ((__IO hw_crc_datahu_t ) HW_CRC_DATAHU_ADDR)
bogdanm	82:6473597d706e	399	#define HW_CRC_DATAHU_RD() (HW_CRC_DATAHU.U)
bogdanm	82:6473597d706e	400	#define HW_CRC_DATAHU_WR(v) (HW_CRC_DATAHU.U = (v))
bogdanm	82:6473597d706e	401	#define HW_CRC_DATAHU_SET(v) (HW_CRC_DATAHU_WR(HW_CRC_DATAHU_RD() \| (v)))
bogdanm	82:6473597d706e	402	#define HW_CRC_DATAHU_CLR(v) (HW_CRC_DATAHU_WR(HW_CRC_DATAHU_RD() & ~(v)))
bogdanm	82:6473597d706e	403	#define HW_CRC_DATAHU_TOG(v) (HW_CRC_DATAHU_WR(HW_CRC_DATAHU_RD() ^ (v)))
bogdanm	82:6473597d706e	404	#endif
bogdanm	82:6473597d706e	405	//@}
bogdanm	82:6473597d706e	406
bogdanm	82:6473597d706e	407	/*
bogdanm	82:6473597d706e	408	* Constants & macros for individual CRC_DATAHU bitfields
bogdanm	82:6473597d706e	409	*/
bogdanm	82:6473597d706e	410
bogdanm	82:6473597d706e	411	/*!
bogdanm	82:6473597d706e	412	* @name Register CRC_DATAHU, field DATAHU[7:0] (RW)
bogdanm	82:6473597d706e	413	*/
bogdanm	82:6473597d706e	414	//@{
bogdanm	82:6473597d706e	415	#define BP_CRC_DATAHU_DATAHU (0U) //!< Bit position for CRC_DATAHU_DATAHU.
bogdanm	82:6473597d706e	416	#define BM_CRC_DATAHU_DATAHU (0xFFU) //!< Bit mask for CRC_DATAHU_DATAHU.
bogdanm	82:6473597d706e	417	#define BS_CRC_DATAHU_DATAHU (8U) //!< Bit field size in bits for CRC_DATAHU_DATAHU.
bogdanm	82:6473597d706e	418
bogdanm	82:6473597d706e	419	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	420	//! @brief Read current value of the CRC_DATAHU_DATAHU field.
bogdanm	82:6473597d706e	421	#define BR_CRC_DATAHU_DATAHU (HW_CRC_DATAHU.U)
bogdanm	82:6473597d706e	422	#endif
bogdanm	82:6473597d706e	423
bogdanm	82:6473597d706e	424	//! @brief Format value for bitfield CRC_DATAHU_DATAHU.
bogdanm	82:6473597d706e	425	#define BF_CRC_DATAHU_DATAHU(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_DATAHU_DATAHU), uint8_t) & BM_CRC_DATAHU_DATAHU)
bogdanm	82:6473597d706e	426
bogdanm	82:6473597d706e	427	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	428	//! @brief Set the DATAHU field to a new value.
bogdanm	82:6473597d706e	429	#define BW_CRC_DATAHU_DATAHU(v) (HW_CRC_DATAHU_WR(v))
bogdanm	82:6473597d706e	430	#endif
bogdanm	82:6473597d706e	431	//@}
bogdanm	82:6473597d706e	432	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	433	// HW_CRC_DATA - CRC Data register
bogdanm	82:6473597d706e	434	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	435
bogdanm	82:6473597d706e	436	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	437	/*!
bogdanm	82:6473597d706e	438	* @brief HW_CRC_DATA - CRC Data register (RW)
bogdanm	82:6473597d706e	439	*
bogdanm	82:6473597d706e	440	* Reset value: 0xFFFFFFFFU
bogdanm	82:6473597d706e	441	*
bogdanm	82:6473597d706e	442	* The CRC Data register contains the value of the seed, data, and checksum.
bogdanm	82:6473597d706e	443	* When CTRL[WAS] is set, any write to the data register is regarded as the seed
bogdanm	82:6473597d706e	444	* value. When CTRL[WAS] is cleared, any write to the data register is regarded as
bogdanm	82:6473597d706e	445	* data for general CRC computation. In 16-bit CRC mode, the HU and HL fields are
bogdanm	82:6473597d706e	446	* not used for programming the seed value, and reads of these fields return an
bogdanm	82:6473597d706e	447	* indeterminate value. In 32-bit CRC mode, all fields are used for programming
bogdanm	82:6473597d706e	448	* the seed value. When programming data values, the values can be written 8 bits,
bogdanm	82:6473597d706e	449	* 16 bits, or 32 bits at a time, provided all bytes are contiguous; with MSB of
bogdanm	82:6473597d706e	450	* data value written first. After all data values are written, the CRC result
bogdanm	82:6473597d706e	451	* can be read from this data register. In 16-bit CRC mode, the CRC result is
bogdanm	82:6473597d706e	452	* available in the LU and LL fields. In 32-bit CRC mode, all fields contain the
bogdanm	82:6473597d706e	453	* result. Reads of this register at any time return the intermediate CRC value,
bogdanm	82:6473597d706e	454	* provided the CRC module is configured.
bogdanm	82:6473597d706e	455	*/
bogdanm	82:6473597d706e	456	typedef union _hw_crc_data
bogdanm	82:6473597d706e	457	{
bogdanm	82:6473597d706e	458	uint32_t U;
bogdanm	82:6473597d706e	459	struct _hw_crc_data_bitfields
bogdanm	82:6473597d706e	460	{
bogdanm	82:6473597d706e	461	uint32_t LL : 8; //!< [7:0] CRC Low Lower Byte
bogdanm	82:6473597d706e	462	uint32_t LU : 8; //!< [15:8] CRC Low Upper Byte
bogdanm	82:6473597d706e	463	uint32_t HL : 8; //!< [23:16] CRC High Lower Byte
bogdanm	82:6473597d706e	464	uint32_t HU : 8; //!< [31:24] CRC High Upper Byte
bogdanm	82:6473597d706e	465	} B;
bogdanm	82:6473597d706e	466	} hw_crc_data_t;
bogdanm	82:6473597d706e	467	#endif
bogdanm	82:6473597d706e	468
bogdanm	82:6473597d706e	469	/*!
bogdanm	82:6473597d706e	470	* @name Constants and macros for entire CRC_DATA register
bogdanm	82:6473597d706e	471	*/
bogdanm	82:6473597d706e	472	//@{
bogdanm	82:6473597d706e	473	#define HW_CRC_DATA_ADDR (REGS_CRC_BASE + 0x0U)
bogdanm	82:6473597d706e	474
bogdanm	82:6473597d706e	475	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	476	#define HW_CRC_DATA ((__IO hw_crc_data_t ) HW_CRC_DATA_ADDR)
bogdanm	82:6473597d706e	477	#define HW_CRC_DATA_RD() (HW_CRC_DATA.U)
bogdanm	82:6473597d706e	478	#define HW_CRC_DATA_WR(v) (HW_CRC_DATA.U = (v))
bogdanm	82:6473597d706e	479	#define HW_CRC_DATA_SET(v) (HW_CRC_DATA_WR(HW_CRC_DATA_RD() \| (v)))
bogdanm	82:6473597d706e	480	#define HW_CRC_DATA_CLR(v) (HW_CRC_DATA_WR(HW_CRC_DATA_RD() & ~(v)))
bogdanm	82:6473597d706e	481	#define HW_CRC_DATA_TOG(v) (HW_CRC_DATA_WR(HW_CRC_DATA_RD() ^ (v)))
bogdanm	82:6473597d706e	482	#endif
bogdanm	82:6473597d706e	483	//@}
bogdanm	82:6473597d706e	484
bogdanm	82:6473597d706e	485	/*
bogdanm	82:6473597d706e	486	* Constants & macros for individual CRC_DATA bitfields
bogdanm	82:6473597d706e	487	*/
bogdanm	82:6473597d706e	488
bogdanm	82:6473597d706e	489	/*!
bogdanm	82:6473597d706e	490	* @name Register CRC_DATA, field LL[7:0] (RW)
bogdanm	82:6473597d706e	491	*
bogdanm	82:6473597d706e	492	* When CTRL[WAS] is 1, values written to this field are part of the seed value.
bogdanm	82:6473597d706e	493	* When CTRL[WAS] is 0, data written to this field is used for CRC checksum
bogdanm	82:6473597d706e	494	* generation.
bogdanm	82:6473597d706e	495	*/
bogdanm	82:6473597d706e	496	//@{
bogdanm	82:6473597d706e	497	#define BP_CRC_DATA_LL (0U) //!< Bit position for CRC_DATA_LL.
bogdanm	82:6473597d706e	498	#define BM_CRC_DATA_LL (0x000000FFU) //!< Bit mask for CRC_DATA_LL.
bogdanm	82:6473597d706e	499	#define BS_CRC_DATA_LL (8U) //!< Bit field size in bits for CRC_DATA_LL.
bogdanm	82:6473597d706e	500
bogdanm	82:6473597d706e	501	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	502	//! @brief Read current value of the CRC_DATA_LL field.
bogdanm	82:6473597d706e	503	#define BR_CRC_DATA_LL (HW_CRC_DATA.B.LL)
bogdanm	82:6473597d706e	504	#endif
bogdanm	82:6473597d706e	505
bogdanm	82:6473597d706e	506	//! @brief Format value for bitfield CRC_DATA_LL.
bogdanm	82:6473597d706e	507	#define BF_CRC_DATA_LL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_DATA_LL), uint32_t) & BM_CRC_DATA_LL)
bogdanm	82:6473597d706e	508
bogdanm	82:6473597d706e	509	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	510	//! @brief Set the LL field to a new value.
bogdanm	82:6473597d706e	511	#define BW_CRC_DATA_LL(v) (HW_CRC_DATA_WR((HW_CRC_DATA_RD() & ~BM_CRC_DATA_LL) \| BF_CRC_DATA_LL(v)))
bogdanm	82:6473597d706e	512	#endif
bogdanm	82:6473597d706e	513	//@}
bogdanm	82:6473597d706e	514
bogdanm	82:6473597d706e	515	/*!
bogdanm	82:6473597d706e	516	* @name Register CRC_DATA, field LU[15:8] (RW)
bogdanm	82:6473597d706e	517	*
bogdanm	82:6473597d706e	518	* When CTRL[WAS] is 1, values written to this field are part of the seed value.
bogdanm	82:6473597d706e	519	* When CTRL[WAS] is 0, data written to this field is used for CRC checksum
bogdanm	82:6473597d706e	520	* generation.
bogdanm	82:6473597d706e	521	*/
bogdanm	82:6473597d706e	522	//@{
bogdanm	82:6473597d706e	523	#define BP_CRC_DATA_LU (8U) //!< Bit position for CRC_DATA_LU.
bogdanm	82:6473597d706e	524	#define BM_CRC_DATA_LU (0x0000FF00U) //!< Bit mask for CRC_DATA_LU.
bogdanm	82:6473597d706e	525	#define BS_CRC_DATA_LU (8U) //!< Bit field size in bits for CRC_DATA_LU.
bogdanm	82:6473597d706e	526
bogdanm	82:6473597d706e	527	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	528	//! @brief Read current value of the CRC_DATA_LU field.
bogdanm	82:6473597d706e	529	#define BR_CRC_DATA_LU (HW_CRC_DATA.B.LU)
bogdanm	82:6473597d706e	530	#endif
bogdanm	82:6473597d706e	531
bogdanm	82:6473597d706e	532	//! @brief Format value for bitfield CRC_DATA_LU.
bogdanm	82:6473597d706e	533	#define BF_CRC_DATA_LU(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_DATA_LU), uint32_t) & BM_CRC_DATA_LU)
bogdanm	82:6473597d706e	534
bogdanm	82:6473597d706e	535	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	536	//! @brief Set the LU field to a new value.
bogdanm	82:6473597d706e	537	#define BW_CRC_DATA_LU(v) (HW_CRC_DATA_WR((HW_CRC_DATA_RD() & ~BM_CRC_DATA_LU) \| BF_CRC_DATA_LU(v)))
bogdanm	82:6473597d706e	538	#endif
bogdanm	82:6473597d706e	539	//@}
bogdanm	82:6473597d706e	540
bogdanm	82:6473597d706e	541	/*!
bogdanm	82:6473597d706e	542	* @name Register CRC_DATA, field HL[23:16] (RW)
bogdanm	82:6473597d706e	543	*
bogdanm	82:6473597d706e	544	* In 16-bit CRC mode (CTRL[TCRC] is 0), this field is not used for programming
bogdanm	82:6473597d706e	545	* a seed value. In 32-bit CRC mode (CTRL[TCRC] is 1), values written to this
bogdanm	82:6473597d706e	546	* field are part of the seed value when CTRL[WAS] is 1. When CTRL[WAS] is 0, data
bogdanm	82:6473597d706e	547	* written to this field is used for CRC checksum generation in both 16-bit and
bogdanm	82:6473597d706e	548	* 32-bit CRC modes.
bogdanm	82:6473597d706e	549	*/
bogdanm	82:6473597d706e	550	//@{
bogdanm	82:6473597d706e	551	#define BP_CRC_DATA_HL (16U) //!< Bit position for CRC_DATA_HL.
bogdanm	82:6473597d706e	552	#define BM_CRC_DATA_HL (0x00FF0000U) //!< Bit mask for CRC_DATA_HL.
bogdanm	82:6473597d706e	553	#define BS_CRC_DATA_HL (8U) //!< Bit field size in bits for CRC_DATA_HL.
bogdanm	82:6473597d706e	554
bogdanm	82:6473597d706e	555	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	556	//! @brief Read current value of the CRC_DATA_HL field.
bogdanm	82:6473597d706e	557	#define BR_CRC_DATA_HL (HW_CRC_DATA.B.HL)
bogdanm	82:6473597d706e	558	#endif
bogdanm	82:6473597d706e	559
bogdanm	82:6473597d706e	560	//! @brief Format value for bitfield CRC_DATA_HL.
bogdanm	82:6473597d706e	561	#define BF_CRC_DATA_HL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_DATA_HL), uint32_t) & BM_CRC_DATA_HL)
bogdanm	82:6473597d706e	562
bogdanm	82:6473597d706e	563	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	564	//! @brief Set the HL field to a new value.
bogdanm	82:6473597d706e	565	#define BW_CRC_DATA_HL(v) (HW_CRC_DATA_WR((HW_CRC_DATA_RD() & ~BM_CRC_DATA_HL) \| BF_CRC_DATA_HL(v)))
bogdanm	82:6473597d706e	566	#endif
bogdanm	82:6473597d706e	567	//@}
bogdanm	82:6473597d706e	568
bogdanm	82:6473597d706e	569	/*!
bogdanm	82:6473597d706e	570	* @name Register CRC_DATA, field HU[31:24] (RW)
bogdanm	82:6473597d706e	571	*
bogdanm	82:6473597d706e	572	* In 16-bit CRC mode (CTRL[TCRC] is 0), this field is not used for programming
bogdanm	82:6473597d706e	573	* a seed value. In 32-bit CRC mode (CTRL[TCRC] is 1), values written to this
bogdanm	82:6473597d706e	574	* field are part of the seed value when CTRL[WAS] is 1. When CTRL[WAS] is 0, data
bogdanm	82:6473597d706e	575	* written to this field is used for CRC checksum generation in both 16-bit and
bogdanm	82:6473597d706e	576	* 32-bit CRC modes.
bogdanm	82:6473597d706e	577	*/
bogdanm	82:6473597d706e	578	//@{
bogdanm	82:6473597d706e	579	#define BP_CRC_DATA_HU (24U) //!< Bit position for CRC_DATA_HU.
bogdanm	82:6473597d706e	580	#define BM_CRC_DATA_HU (0xFF000000U) //!< Bit mask for CRC_DATA_HU.
bogdanm	82:6473597d706e	581	#define BS_CRC_DATA_HU (8U) //!< Bit field size in bits for CRC_DATA_HU.
bogdanm	82:6473597d706e	582
bogdanm	82:6473597d706e	583	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	584	//! @brief Read current value of the CRC_DATA_HU field.
bogdanm	82:6473597d706e	585	#define BR_CRC_DATA_HU (HW_CRC_DATA.B.HU)
bogdanm	82:6473597d706e	586	#endif
bogdanm	82:6473597d706e	587
bogdanm	82:6473597d706e	588	//! @brief Format value for bitfield CRC_DATA_HU.
bogdanm	82:6473597d706e	589	#define BF_CRC_DATA_HU(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_DATA_HU), uint32_t) & BM_CRC_DATA_HU)
bogdanm	82:6473597d706e	590
bogdanm	82:6473597d706e	591	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	592	//! @brief Set the HU field to a new value.
bogdanm	82:6473597d706e	593	#define BW_CRC_DATA_HU(v) (HW_CRC_DATA_WR((HW_CRC_DATA_RD() & ~BM_CRC_DATA_HU) \| BF_CRC_DATA_HU(v)))
bogdanm	82:6473597d706e	594	#endif
bogdanm	82:6473597d706e	595	//@}
bogdanm	82:6473597d706e	596
bogdanm	82:6473597d706e	597	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	598	// HW_CRC_GPOLY - CRC Polynomial register
bogdanm	82:6473597d706e	599	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	600
bogdanm	82:6473597d706e	601	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	602	/*!
bogdanm	82:6473597d706e	603	* @brief HW_CRC_GPOLY - CRC Polynomial register (RW)
bogdanm	82:6473597d706e	604	*
bogdanm	82:6473597d706e	605	* Reset value: 0x00001021U
bogdanm	82:6473597d706e	606	*
bogdanm	82:6473597d706e	607	* This register contains the value of the polynomial for the CRC calculation.
bogdanm	82:6473597d706e	608	* The HIGH field contains the upper 16 bits of the CRC polynomial, which are used
bogdanm	82:6473597d706e	609	* only in 32-bit CRC mode. Writes to the HIGH field are ignored in 16-bit CRC
bogdanm	82:6473597d706e	610	* mode. The LOW field contains the lower 16 bits of the CRC polynomial, which are
bogdanm	82:6473597d706e	611	* used in both 16- and 32-bit CRC modes.
bogdanm	82:6473597d706e	612	*/
bogdanm	82:6473597d706e	613	typedef union _hw_crc_gpoly
bogdanm	82:6473597d706e	614	{
bogdanm	82:6473597d706e	615	uint32_t U;
bogdanm	82:6473597d706e	616	struct _hw_crc_gpoly_bitfields
bogdanm	82:6473597d706e	617	{
bogdanm	82:6473597d706e	618	uint32_t LOW : 16; //!< [15:0] Low Polynominal Half-word
bogdanm	82:6473597d706e	619	uint32_t HIGH : 16; //!< [31:16] High Polynominal Half-word
bogdanm	82:6473597d706e	620	} B;
bogdanm	82:6473597d706e	621	} hw_crc_gpoly_t;
bogdanm	82:6473597d706e	622	#endif
bogdanm	82:6473597d706e	623
bogdanm	82:6473597d706e	624	/*!
bogdanm	82:6473597d706e	625	* @name Constants and macros for entire CRC_GPOLY register
bogdanm	82:6473597d706e	626	*/
bogdanm	82:6473597d706e	627	//@{
bogdanm	82:6473597d706e	628	#define HW_CRC_GPOLY_ADDR (REGS_CRC_BASE + 0x4U)
bogdanm	82:6473597d706e	629
bogdanm	82:6473597d706e	630	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	631	#define HW_CRC_GPOLY ((__IO hw_crc_gpoly_t ) HW_CRC_GPOLY_ADDR)
bogdanm	82:6473597d706e	632	#define HW_CRC_GPOLY_RD() (HW_CRC_GPOLY.U)
bogdanm	82:6473597d706e	633	#define HW_CRC_GPOLY_WR(v) (HW_CRC_GPOLY.U = (v))
bogdanm	82:6473597d706e	634	#define HW_CRC_GPOLY_SET(v) (HW_CRC_GPOLY_WR(HW_CRC_GPOLY_RD() \| (v)))
bogdanm	82:6473597d706e	635	#define HW_CRC_GPOLY_CLR(v) (HW_CRC_GPOLY_WR(HW_CRC_GPOLY_RD() & ~(v)))
bogdanm	82:6473597d706e	636	#define HW_CRC_GPOLY_TOG(v) (HW_CRC_GPOLY_WR(HW_CRC_GPOLY_RD() ^ (v)))
bogdanm	82:6473597d706e	637	#endif
bogdanm	82:6473597d706e	638	//@}
bogdanm	82:6473597d706e	639
bogdanm	82:6473597d706e	640	/*
bogdanm	82:6473597d706e	641	* Constants & macros for individual CRC_GPOLY bitfields
bogdanm	82:6473597d706e	642	*/
bogdanm	82:6473597d706e	643
bogdanm	82:6473597d706e	644	/*!
bogdanm	82:6473597d706e	645	* @name Register CRC_GPOLY, field LOW[15:0] (RW)
bogdanm	82:6473597d706e	646	*
bogdanm	82:6473597d706e	647	* Writable and readable in both 32-bit and 16-bit CRC modes.
bogdanm	82:6473597d706e	648	*/
bogdanm	82:6473597d706e	649	//@{
bogdanm	82:6473597d706e	650	#define BP_CRC_GPOLY_LOW (0U) //!< Bit position for CRC_GPOLY_LOW.
bogdanm	82:6473597d706e	651	#define BM_CRC_GPOLY_LOW (0x0000FFFFU) //!< Bit mask for CRC_GPOLY_LOW.
bogdanm	82:6473597d706e	652	#define BS_CRC_GPOLY_LOW (16U) //!< Bit field size in bits for CRC_GPOLY_LOW.
bogdanm	82:6473597d706e	653
bogdanm	82:6473597d706e	654	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	655	//! @brief Read current value of the CRC_GPOLY_LOW field.
bogdanm	82:6473597d706e	656	#define BR_CRC_GPOLY_LOW (HW_CRC_GPOLY.B.LOW)
bogdanm	82:6473597d706e	657	#endif
bogdanm	82:6473597d706e	658
bogdanm	82:6473597d706e	659	//! @brief Format value for bitfield CRC_GPOLY_LOW.
bogdanm	82:6473597d706e	660	#define BF_CRC_GPOLY_LOW(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_GPOLY_LOW), uint32_t) & BM_CRC_GPOLY_LOW)
bogdanm	82:6473597d706e	661
bogdanm	82:6473597d706e	662	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	663	//! @brief Set the LOW field to a new value.
bogdanm	82:6473597d706e	664	#define BW_CRC_GPOLY_LOW(v) (HW_CRC_GPOLY_WR((HW_CRC_GPOLY_RD() & ~BM_CRC_GPOLY_LOW) \| BF_CRC_GPOLY_LOW(v)))
bogdanm	82:6473597d706e	665	#endif
bogdanm	82:6473597d706e	666	//@}
bogdanm	82:6473597d706e	667
bogdanm	82:6473597d706e	668	/*!
bogdanm	82:6473597d706e	669	* @name Register CRC_GPOLY, field HIGH[31:16] (RW)
bogdanm	82:6473597d706e	670	*
bogdanm	82:6473597d706e	671	* Writable and readable in 32-bit CRC mode (CTRL[TCRC] is 1). This field is not
bogdanm	82:6473597d706e	672	* writable in 16-bit CRC mode (CTRL[TCRC] is 0).
bogdanm	82:6473597d706e	673	*/
bogdanm	82:6473597d706e	674	//@{
bogdanm	82:6473597d706e	675	#define BP_CRC_GPOLY_HIGH (16U) //!< Bit position for CRC_GPOLY_HIGH.
bogdanm	82:6473597d706e	676	#define BM_CRC_GPOLY_HIGH (0xFFFF0000U) //!< Bit mask for CRC_GPOLY_HIGH.
bogdanm	82:6473597d706e	677	#define BS_CRC_GPOLY_HIGH (16U) //!< Bit field size in bits for CRC_GPOLY_HIGH.
bogdanm	82:6473597d706e	678
bogdanm	82:6473597d706e	679	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	680	//! @brief Read current value of the CRC_GPOLY_HIGH field.
bogdanm	82:6473597d706e	681	#define BR_CRC_GPOLY_HIGH (HW_CRC_GPOLY.B.HIGH)
bogdanm	82:6473597d706e	682	#endif
bogdanm	82:6473597d706e	683
bogdanm	82:6473597d706e	684	//! @brief Format value for bitfield CRC_GPOLY_HIGH.
bogdanm	82:6473597d706e	685	#define BF_CRC_GPOLY_HIGH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_GPOLY_HIGH), uint32_t) & BM_CRC_GPOLY_HIGH)
bogdanm	82:6473597d706e	686
bogdanm	82:6473597d706e	687	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	688	//! @brief Set the HIGH field to a new value.
bogdanm	82:6473597d706e	689	#define BW_CRC_GPOLY_HIGH(v) (HW_CRC_GPOLY_WR((HW_CRC_GPOLY_RD() & ~BM_CRC_GPOLY_HIGH) \| BF_CRC_GPOLY_HIGH(v)))
bogdanm	82:6473597d706e	690	#endif
bogdanm	82:6473597d706e	691	//@}
bogdanm	82:6473597d706e	692	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	693	// HW_CRC_GPOLYL - CRC_GPOLYL register.
bogdanm	82:6473597d706e	694	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	695
bogdanm	82:6473597d706e	696	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	697	/*!
bogdanm	82:6473597d706e	698	* @brief HW_CRC_GPOLYL - CRC_GPOLYL register. (RW)
bogdanm	82:6473597d706e	699	*
bogdanm	82:6473597d706e	700	* Reset value: 0xFFFFU
bogdanm	82:6473597d706e	701	*/
bogdanm	82:6473597d706e	702	typedef union _hw_crc_gpolyl
bogdanm	82:6473597d706e	703	{
bogdanm	82:6473597d706e	704	uint16_t U;
bogdanm	82:6473597d706e	705	struct _hw_crc_gpolyl_bitfields
bogdanm	82:6473597d706e	706	{
bogdanm	82:6473597d706e	707	uint16_t GPOLYL : 16; //!< [15:0] POLYL stores the lower 16 bits of
bogdanm	82:6473597d706e	708	//! the 16/32 bit CRC polynomial value
bogdanm	82:6473597d706e	709	} B;
bogdanm	82:6473597d706e	710	} hw_crc_gpolyl_t;
bogdanm	82:6473597d706e	711	#endif
bogdanm	82:6473597d706e	712
bogdanm	82:6473597d706e	713	/*!
bogdanm	82:6473597d706e	714	* @name Constants and macros for entire CRC_GPOLYL register
bogdanm	82:6473597d706e	715	*/
bogdanm	82:6473597d706e	716	//@{
bogdanm	82:6473597d706e	717	#define HW_CRC_GPOLYL_ADDR (REGS_CRC_BASE + 0x4U)
bogdanm	82:6473597d706e	718
bogdanm	82:6473597d706e	719	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	720	#define HW_CRC_GPOLYL ((__IO hw_crc_gpolyl_t ) HW_CRC_GPOLYL_ADDR)
bogdanm	82:6473597d706e	721	#define HW_CRC_GPOLYL_RD() (HW_CRC_GPOLYL.U)
bogdanm	82:6473597d706e	722	#define HW_CRC_GPOLYL_WR(v) (HW_CRC_GPOLYL.U = (v))
bogdanm	82:6473597d706e	723	#define HW_CRC_GPOLYL_SET(v) (HW_CRC_GPOLYL_WR(HW_CRC_GPOLYL_RD() \| (v)))
bogdanm	82:6473597d706e	724	#define HW_CRC_GPOLYL_CLR(v) (HW_CRC_GPOLYL_WR(HW_CRC_GPOLYL_RD() & ~(v)))
bogdanm	82:6473597d706e	725	#define HW_CRC_GPOLYL_TOG(v) (HW_CRC_GPOLYL_WR(HW_CRC_GPOLYL_RD() ^ (v)))
bogdanm	82:6473597d706e	726	#endif
bogdanm	82:6473597d706e	727	//@}
bogdanm	82:6473597d706e	728
bogdanm	82:6473597d706e	729	/*
bogdanm	82:6473597d706e	730	* Constants & macros for individual CRC_GPOLYL bitfields
bogdanm	82:6473597d706e	731	*/
bogdanm	82:6473597d706e	732
bogdanm	82:6473597d706e	733	/*!
bogdanm	82:6473597d706e	734	* @name Register CRC_GPOLYL, field GPOLYL[15:0] (RW)
bogdanm	82:6473597d706e	735	*/
bogdanm	82:6473597d706e	736	//@{
bogdanm	82:6473597d706e	737	#define BP_CRC_GPOLYL_GPOLYL (0U) //!< Bit position for CRC_GPOLYL_GPOLYL.
bogdanm	82:6473597d706e	738	#define BM_CRC_GPOLYL_GPOLYL (0xFFFFU) //!< Bit mask for CRC_GPOLYL_GPOLYL.
bogdanm	82:6473597d706e	739	#define BS_CRC_GPOLYL_GPOLYL (16U) //!< Bit field size in bits for CRC_GPOLYL_GPOLYL.
bogdanm	82:6473597d706e	740
bogdanm	82:6473597d706e	741	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	742	//! @brief Read current value of the CRC_GPOLYL_GPOLYL field.
bogdanm	82:6473597d706e	743	#define BR_CRC_GPOLYL_GPOLYL (HW_CRC_GPOLYL.U)
bogdanm	82:6473597d706e	744	#endif
bogdanm	82:6473597d706e	745
bogdanm	82:6473597d706e	746	//! @brief Format value for bitfield CRC_GPOLYL_GPOLYL.
bogdanm	82:6473597d706e	747	#define BF_CRC_GPOLYL_GPOLYL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint16_t) << BP_CRC_GPOLYL_GPOLYL), uint16_t) & BM_CRC_GPOLYL_GPOLYL)
bogdanm	82:6473597d706e	748
bogdanm	82:6473597d706e	749	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	750	//! @brief Set the GPOLYL field to a new value.
bogdanm	82:6473597d706e	751	#define BW_CRC_GPOLYL_GPOLYL(v) (HW_CRC_GPOLYL_WR(v))
bogdanm	82:6473597d706e	752	#endif
bogdanm	82:6473597d706e	753	//@}
bogdanm	82:6473597d706e	754	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	755	// HW_CRC_GPOLYH - CRC_GPOLYH register.
bogdanm	82:6473597d706e	756	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	757
bogdanm	82:6473597d706e	758	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	759	/*!
bogdanm	82:6473597d706e	760	* @brief HW_CRC_GPOLYH - CRC_GPOLYH register. (RW)
bogdanm	82:6473597d706e	761	*
bogdanm	82:6473597d706e	762	* Reset value: 0xFFFFU
bogdanm	82:6473597d706e	763	*/
bogdanm	82:6473597d706e	764	typedef union _hw_crc_gpolyh
bogdanm	82:6473597d706e	765	{
bogdanm	82:6473597d706e	766	uint16_t U;
bogdanm	82:6473597d706e	767	struct _hw_crc_gpolyh_bitfields
bogdanm	82:6473597d706e	768	{
bogdanm	82:6473597d706e	769	uint16_t GPOLYH : 16; //!< [15:0] POLYH stores the high 16 bits of
bogdanm	82:6473597d706e	770	//! the 16/32 bit CRC polynomial value
bogdanm	82:6473597d706e	771	} B;
bogdanm	82:6473597d706e	772	} hw_crc_gpolyh_t;
bogdanm	82:6473597d706e	773	#endif
bogdanm	82:6473597d706e	774
bogdanm	82:6473597d706e	775	/*!
bogdanm	82:6473597d706e	776	* @name Constants and macros for entire CRC_GPOLYH register
bogdanm	82:6473597d706e	777	*/
bogdanm	82:6473597d706e	778	//@{
bogdanm	82:6473597d706e	779	#define HW_CRC_GPOLYH_ADDR (REGS_CRC_BASE + 0x6U)
bogdanm	82:6473597d706e	780
bogdanm	82:6473597d706e	781	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	782	#define HW_CRC_GPOLYH ((__IO hw_crc_gpolyh_t ) HW_CRC_GPOLYH_ADDR)
bogdanm	82:6473597d706e	783	#define HW_CRC_GPOLYH_RD() (HW_CRC_GPOLYH.U)
bogdanm	82:6473597d706e	784	#define HW_CRC_GPOLYH_WR(v) (HW_CRC_GPOLYH.U = (v))
bogdanm	82:6473597d706e	785	#define HW_CRC_GPOLYH_SET(v) (HW_CRC_GPOLYH_WR(HW_CRC_GPOLYH_RD() \| (v)))
bogdanm	82:6473597d706e	786	#define HW_CRC_GPOLYH_CLR(v) (HW_CRC_GPOLYH_WR(HW_CRC_GPOLYH_RD() & ~(v)))
bogdanm	82:6473597d706e	787	#define HW_CRC_GPOLYH_TOG(v) (HW_CRC_GPOLYH_WR(HW_CRC_GPOLYH_RD() ^ (v)))
bogdanm	82:6473597d706e	788	#endif
bogdanm	82:6473597d706e	789	//@}
bogdanm	82:6473597d706e	790
bogdanm	82:6473597d706e	791	/*
bogdanm	82:6473597d706e	792	* Constants & macros for individual CRC_GPOLYH bitfields
bogdanm	82:6473597d706e	793	*/
bogdanm	82:6473597d706e	794
bogdanm	82:6473597d706e	795	/*!
bogdanm	82:6473597d706e	796	* @name Register CRC_GPOLYH, field GPOLYH[15:0] (RW)
bogdanm	82:6473597d706e	797	*/
bogdanm	82:6473597d706e	798	//@{
bogdanm	82:6473597d706e	799	#define BP_CRC_GPOLYH_GPOLYH (0U) //!< Bit position for CRC_GPOLYH_GPOLYH.
bogdanm	82:6473597d706e	800	#define BM_CRC_GPOLYH_GPOLYH (0xFFFFU) //!< Bit mask for CRC_GPOLYH_GPOLYH.
bogdanm	82:6473597d706e	801	#define BS_CRC_GPOLYH_GPOLYH (16U) //!< Bit field size in bits for CRC_GPOLYH_GPOLYH.
bogdanm	82:6473597d706e	802
bogdanm	82:6473597d706e	803	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	804	//! @brief Read current value of the CRC_GPOLYH_GPOLYH field.
bogdanm	82:6473597d706e	805	#define BR_CRC_GPOLYH_GPOLYH (HW_CRC_GPOLYH.U)
bogdanm	82:6473597d706e	806	#endif
bogdanm	82:6473597d706e	807
bogdanm	82:6473597d706e	808	//! @brief Format value for bitfield CRC_GPOLYH_GPOLYH.
bogdanm	82:6473597d706e	809	#define BF_CRC_GPOLYH_GPOLYH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint16_t) << BP_CRC_GPOLYH_GPOLYH), uint16_t) & BM_CRC_GPOLYH_GPOLYH)
bogdanm	82:6473597d706e	810
bogdanm	82:6473597d706e	811	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	812	//! @brief Set the GPOLYH field to a new value.
bogdanm	82:6473597d706e	813	#define BW_CRC_GPOLYH_GPOLYH(v) (HW_CRC_GPOLYH_WR(v))
bogdanm	82:6473597d706e	814	#endif
bogdanm	82:6473597d706e	815	//@}
bogdanm	82:6473597d706e	816	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	817	// HW_CRC_GPOLYLL - CRC_GPOLYLL register.
bogdanm	82:6473597d706e	818	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	819
bogdanm	82:6473597d706e	820	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	821	/*!
bogdanm	82:6473597d706e	822	* @brief HW_CRC_GPOLYLL - CRC_GPOLYLL register. (RW)
bogdanm	82:6473597d706e	823	*
bogdanm	82:6473597d706e	824	* Reset value: 0xFFU
bogdanm	82:6473597d706e	825	*/
bogdanm	82:6473597d706e	826	typedef union _hw_crc_gpolyll
bogdanm	82:6473597d706e	827	{
bogdanm	82:6473597d706e	828	uint8_t U;
bogdanm	82:6473597d706e	829	struct _hw_crc_gpolyll_bitfields
bogdanm	82:6473597d706e	830	{
bogdanm	82:6473597d706e	831	uint8_t GPOLYLL : 8; //!< [7:0] POLYLL stores the first 8 bits of the
bogdanm	82:6473597d706e	832	//! 32 bit CRC
bogdanm	82:6473597d706e	833	} B;
bogdanm	82:6473597d706e	834	} hw_crc_gpolyll_t;
bogdanm	82:6473597d706e	835	#endif
bogdanm	82:6473597d706e	836
bogdanm	82:6473597d706e	837	/*!
bogdanm	82:6473597d706e	838	* @name Constants and macros for entire CRC_GPOLYLL register
bogdanm	82:6473597d706e	839	*/
bogdanm	82:6473597d706e	840	//@{
bogdanm	82:6473597d706e	841	#define HW_CRC_GPOLYLL_ADDR (REGS_CRC_BASE + 0x4U)
bogdanm	82:6473597d706e	842
bogdanm	82:6473597d706e	843	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	844	#define HW_CRC_GPOLYLL ((__IO hw_crc_gpolyll_t ) HW_CRC_GPOLYLL_ADDR)
bogdanm	82:6473597d706e	845	#define HW_CRC_GPOLYLL_RD() (HW_CRC_GPOLYLL.U)
bogdanm	82:6473597d706e	846	#define HW_CRC_GPOLYLL_WR(v) (HW_CRC_GPOLYLL.U = (v))
bogdanm	82:6473597d706e	847	#define HW_CRC_GPOLYLL_SET(v) (HW_CRC_GPOLYLL_WR(HW_CRC_GPOLYLL_RD() \| (v)))
bogdanm	82:6473597d706e	848	#define HW_CRC_GPOLYLL_CLR(v) (HW_CRC_GPOLYLL_WR(HW_CRC_GPOLYLL_RD() & ~(v)))
bogdanm	82:6473597d706e	849	#define HW_CRC_GPOLYLL_TOG(v) (HW_CRC_GPOLYLL_WR(HW_CRC_GPOLYLL_RD() ^ (v)))
bogdanm	82:6473597d706e	850	#endif
bogdanm	82:6473597d706e	851	//@}
bogdanm	82:6473597d706e	852
bogdanm	82:6473597d706e	853	/*
bogdanm	82:6473597d706e	854	* Constants & macros for individual CRC_GPOLYLL bitfields
bogdanm	82:6473597d706e	855	*/
bogdanm	82:6473597d706e	856
bogdanm	82:6473597d706e	857	/*!
bogdanm	82:6473597d706e	858	* @name Register CRC_GPOLYLL, field GPOLYLL[7:0] (RW)
bogdanm	82:6473597d706e	859	*/
bogdanm	82:6473597d706e	860	//@{
bogdanm	82:6473597d706e	861	#define BP_CRC_GPOLYLL_GPOLYLL (0U) //!< Bit position for CRC_GPOLYLL_GPOLYLL.
bogdanm	82:6473597d706e	862	#define BM_CRC_GPOLYLL_GPOLYLL (0xFFU) //!< Bit mask for CRC_GPOLYLL_GPOLYLL.
bogdanm	82:6473597d706e	863	#define BS_CRC_GPOLYLL_GPOLYLL (8U) //!< Bit field size in bits for CRC_GPOLYLL_GPOLYLL.
bogdanm	82:6473597d706e	864
bogdanm	82:6473597d706e	865	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	866	//! @brief Read current value of the CRC_GPOLYLL_GPOLYLL field.
bogdanm	82:6473597d706e	867	#define BR_CRC_GPOLYLL_GPOLYLL (HW_CRC_GPOLYLL.U)
bogdanm	82:6473597d706e	868	#endif
bogdanm	82:6473597d706e	869
bogdanm	82:6473597d706e	870	//! @brief Format value for bitfield CRC_GPOLYLL_GPOLYLL.
bogdanm	82:6473597d706e	871	#define BF_CRC_GPOLYLL_GPOLYLL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_GPOLYLL_GPOLYLL), uint8_t) & BM_CRC_GPOLYLL_GPOLYLL)
bogdanm	82:6473597d706e	872
bogdanm	82:6473597d706e	873	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	874	//! @brief Set the GPOLYLL field to a new value.
bogdanm	82:6473597d706e	875	#define BW_CRC_GPOLYLL_GPOLYLL(v) (HW_CRC_GPOLYLL_WR(v))
bogdanm	82:6473597d706e	876	#endif
bogdanm	82:6473597d706e	877	//@}
bogdanm	82:6473597d706e	878	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	879	// HW_CRC_GPOLYLU - CRC_GPOLYLU register.
bogdanm	82:6473597d706e	880	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	881
bogdanm	82:6473597d706e	882	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	883	/*!
bogdanm	82:6473597d706e	884	* @brief HW_CRC_GPOLYLU - CRC_GPOLYLU register. (RW)
bogdanm	82:6473597d706e	885	*
bogdanm	82:6473597d706e	886	* Reset value: 0xFFU
bogdanm	82:6473597d706e	887	*/
bogdanm	82:6473597d706e	888	typedef union _hw_crc_gpolylu
bogdanm	82:6473597d706e	889	{
bogdanm	82:6473597d706e	890	uint8_t U;
bogdanm	82:6473597d706e	891	struct _hw_crc_gpolylu_bitfields
bogdanm	82:6473597d706e	892	{
bogdanm	82:6473597d706e	893	uint8_t GPOLYLU : 8; //!< [7:0] POLYLL stores the second 8 bits of
bogdanm	82:6473597d706e	894	//! the 32 bit CRC
bogdanm	82:6473597d706e	895	} B;
bogdanm	82:6473597d706e	896	} hw_crc_gpolylu_t;
bogdanm	82:6473597d706e	897	#endif
bogdanm	82:6473597d706e	898
bogdanm	82:6473597d706e	899	/*!
bogdanm	82:6473597d706e	900	* @name Constants and macros for entire CRC_GPOLYLU register
bogdanm	82:6473597d706e	901	*/
bogdanm	82:6473597d706e	902	//@{
bogdanm	82:6473597d706e	903	#define HW_CRC_GPOLYLU_ADDR (REGS_CRC_BASE + 0x5U)
bogdanm	82:6473597d706e	904
bogdanm	82:6473597d706e	905	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	906	#define HW_CRC_GPOLYLU ((__IO hw_crc_gpolylu_t ) HW_CRC_GPOLYLU_ADDR)
bogdanm	82:6473597d706e	907	#define HW_CRC_GPOLYLU_RD() (HW_CRC_GPOLYLU.U)
bogdanm	82:6473597d706e	908	#define HW_CRC_GPOLYLU_WR(v) (HW_CRC_GPOLYLU.U = (v))
bogdanm	82:6473597d706e	909	#define HW_CRC_GPOLYLU_SET(v) (HW_CRC_GPOLYLU_WR(HW_CRC_GPOLYLU_RD() \| (v)))
bogdanm	82:6473597d706e	910	#define HW_CRC_GPOLYLU_CLR(v) (HW_CRC_GPOLYLU_WR(HW_CRC_GPOLYLU_RD() & ~(v)))
bogdanm	82:6473597d706e	911	#define HW_CRC_GPOLYLU_TOG(v) (HW_CRC_GPOLYLU_WR(HW_CRC_GPOLYLU_RD() ^ (v)))
bogdanm	82:6473597d706e	912	#endif
bogdanm	82:6473597d706e	913	//@}
bogdanm	82:6473597d706e	914
bogdanm	82:6473597d706e	915	/*
bogdanm	82:6473597d706e	916	* Constants & macros for individual CRC_GPOLYLU bitfields
bogdanm	82:6473597d706e	917	*/
bogdanm	82:6473597d706e	918
bogdanm	82:6473597d706e	919	/*!
bogdanm	82:6473597d706e	920	* @name Register CRC_GPOLYLU, field GPOLYLU[7:0] (RW)
bogdanm	82:6473597d706e	921	*/
bogdanm	82:6473597d706e	922	//@{
bogdanm	82:6473597d706e	923	#define BP_CRC_GPOLYLU_GPOLYLU (0U) //!< Bit position for CRC_GPOLYLU_GPOLYLU.
bogdanm	82:6473597d706e	924	#define BM_CRC_GPOLYLU_GPOLYLU (0xFFU) //!< Bit mask for CRC_GPOLYLU_GPOLYLU.
bogdanm	82:6473597d706e	925	#define BS_CRC_GPOLYLU_GPOLYLU (8U) //!< Bit field size in bits for CRC_GPOLYLU_GPOLYLU.
bogdanm	82:6473597d706e	926
bogdanm	82:6473597d706e	927	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	928	//! @brief Read current value of the CRC_GPOLYLU_GPOLYLU field.
bogdanm	82:6473597d706e	929	#define BR_CRC_GPOLYLU_GPOLYLU (HW_CRC_GPOLYLU.U)
bogdanm	82:6473597d706e	930	#endif
bogdanm	82:6473597d706e	931
bogdanm	82:6473597d706e	932	//! @brief Format value for bitfield CRC_GPOLYLU_GPOLYLU.
bogdanm	82:6473597d706e	933	#define BF_CRC_GPOLYLU_GPOLYLU(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_GPOLYLU_GPOLYLU), uint8_t) & BM_CRC_GPOLYLU_GPOLYLU)
bogdanm	82:6473597d706e	934
bogdanm	82:6473597d706e	935	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	936	//! @brief Set the GPOLYLU field to a new value.
bogdanm	82:6473597d706e	937	#define BW_CRC_GPOLYLU_GPOLYLU(v) (HW_CRC_GPOLYLU_WR(v))
bogdanm	82:6473597d706e	938	#endif
bogdanm	82:6473597d706e	939	//@}
bogdanm	82:6473597d706e	940	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	941	// HW_CRC_GPOLYHL - CRC_GPOLYHL register.
bogdanm	82:6473597d706e	942	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	943
bogdanm	82:6473597d706e	944	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	945	/*!
bogdanm	82:6473597d706e	946	* @brief HW_CRC_GPOLYHL - CRC_GPOLYHL register. (RW)
bogdanm	82:6473597d706e	947	*
bogdanm	82:6473597d706e	948	* Reset value: 0xFFU
bogdanm	82:6473597d706e	949	*/
bogdanm	82:6473597d706e	950	typedef union _hw_crc_gpolyhl
bogdanm	82:6473597d706e	951	{
bogdanm	82:6473597d706e	952	uint8_t U;
bogdanm	82:6473597d706e	953	struct _hw_crc_gpolyhl_bitfields
bogdanm	82:6473597d706e	954	{
bogdanm	82:6473597d706e	955	uint8_t GPOLYHL : 8; //!< [7:0] POLYHL stores the third 8 bits of the
bogdanm	82:6473597d706e	956	//! 32 bit CRC
bogdanm	82:6473597d706e	957	} B;
bogdanm	82:6473597d706e	958	} hw_crc_gpolyhl_t;
bogdanm	82:6473597d706e	959	#endif
bogdanm	82:6473597d706e	960
bogdanm	82:6473597d706e	961	/*!
bogdanm	82:6473597d706e	962	* @name Constants and macros for entire CRC_GPOLYHL register
bogdanm	82:6473597d706e	963	*/
bogdanm	82:6473597d706e	964	//@{
bogdanm	82:6473597d706e	965	#define HW_CRC_GPOLYHL_ADDR (REGS_CRC_BASE + 0x6U)
bogdanm	82:6473597d706e	966
bogdanm	82:6473597d706e	967	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	968	#define HW_CRC_GPOLYHL ((__IO hw_crc_gpolyhl_t ) HW_CRC_GPOLYHL_ADDR)
bogdanm	82:6473597d706e	969	#define HW_CRC_GPOLYHL_RD() (HW_CRC_GPOLYHL.U)
bogdanm	82:6473597d706e	970	#define HW_CRC_GPOLYHL_WR(v) (HW_CRC_GPOLYHL.U = (v))
bogdanm	82:6473597d706e	971	#define HW_CRC_GPOLYHL_SET(v) (HW_CRC_GPOLYHL_WR(HW_CRC_GPOLYHL_RD() \| (v)))
bogdanm	82:6473597d706e	972	#define HW_CRC_GPOLYHL_CLR(v) (HW_CRC_GPOLYHL_WR(HW_CRC_GPOLYHL_RD() & ~(v)))
bogdanm	82:6473597d706e	973	#define HW_CRC_GPOLYHL_TOG(v) (HW_CRC_GPOLYHL_WR(HW_CRC_GPOLYHL_RD() ^ (v)))
bogdanm	82:6473597d706e	974	#endif
bogdanm	82:6473597d706e	975	//@}
bogdanm	82:6473597d706e	976
bogdanm	82:6473597d706e	977	/*
bogdanm	82:6473597d706e	978	* Constants & macros for individual CRC_GPOLYHL bitfields
bogdanm	82:6473597d706e	979	*/
bogdanm	82:6473597d706e	980
bogdanm	82:6473597d706e	981	/*!
bogdanm	82:6473597d706e	982	* @name Register CRC_GPOLYHL, field GPOLYHL[7:0] (RW)
bogdanm	82:6473597d706e	983	*/
bogdanm	82:6473597d706e	984	//@{
bogdanm	82:6473597d706e	985	#define BP_CRC_GPOLYHL_GPOLYHL (0U) //!< Bit position for CRC_GPOLYHL_GPOLYHL.
bogdanm	82:6473597d706e	986	#define BM_CRC_GPOLYHL_GPOLYHL (0xFFU) //!< Bit mask for CRC_GPOLYHL_GPOLYHL.
bogdanm	82:6473597d706e	987	#define BS_CRC_GPOLYHL_GPOLYHL (8U) //!< Bit field size in bits for CRC_GPOLYHL_GPOLYHL.
bogdanm	82:6473597d706e	988
bogdanm	82:6473597d706e	989	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	990	//! @brief Read current value of the CRC_GPOLYHL_GPOLYHL field.
bogdanm	82:6473597d706e	991	#define BR_CRC_GPOLYHL_GPOLYHL (HW_CRC_GPOLYHL.U)
bogdanm	82:6473597d706e	992	#endif
bogdanm	82:6473597d706e	993
bogdanm	82:6473597d706e	994	//! @brief Format value for bitfield CRC_GPOLYHL_GPOLYHL.
bogdanm	82:6473597d706e	995	#define BF_CRC_GPOLYHL_GPOLYHL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_GPOLYHL_GPOLYHL), uint8_t) & BM_CRC_GPOLYHL_GPOLYHL)
bogdanm	82:6473597d706e	996
bogdanm	82:6473597d706e	997	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	998	//! @brief Set the GPOLYHL field to a new value.
bogdanm	82:6473597d706e	999	#define BW_CRC_GPOLYHL_GPOLYHL(v) (HW_CRC_GPOLYHL_WR(v))
bogdanm	82:6473597d706e	1000	#endif
bogdanm	82:6473597d706e	1001	//@}
bogdanm	82:6473597d706e	1002	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1003	// HW_CRC_GPOLYHU - CRC_GPOLYHU register.
bogdanm	82:6473597d706e	1004	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1005
bogdanm	82:6473597d706e	1006	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1007	/*!
bogdanm	82:6473597d706e	1008	* @brief HW_CRC_GPOLYHU - CRC_GPOLYHU register. (RW)
bogdanm	82:6473597d706e	1009	*
bogdanm	82:6473597d706e	1010	* Reset value: 0xFFU
bogdanm	82:6473597d706e	1011	*/
bogdanm	82:6473597d706e	1012	typedef union _hw_crc_gpolyhu
bogdanm	82:6473597d706e	1013	{
bogdanm	82:6473597d706e	1014	uint8_t U;
bogdanm	82:6473597d706e	1015	struct _hw_crc_gpolyhu_bitfields
bogdanm	82:6473597d706e	1016	{
bogdanm	82:6473597d706e	1017	uint8_t GPOLYHU : 8; //!< [7:0] POLYHU stores the fourth 8 bits of
bogdanm	82:6473597d706e	1018	//! the 32 bit CRC
bogdanm	82:6473597d706e	1019	} B;
bogdanm	82:6473597d706e	1020	} hw_crc_gpolyhu_t;
bogdanm	82:6473597d706e	1021	#endif
bogdanm	82:6473597d706e	1022
bogdanm	82:6473597d706e	1023	/*!
bogdanm	82:6473597d706e	1024	* @name Constants and macros for entire CRC_GPOLYHU register
bogdanm	82:6473597d706e	1025	*/
bogdanm	82:6473597d706e	1026	//@{
bogdanm	82:6473597d706e	1027	#define HW_CRC_GPOLYHU_ADDR (REGS_CRC_BASE + 0x7U)
bogdanm	82:6473597d706e	1028
bogdanm	82:6473597d706e	1029	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1030	#define HW_CRC_GPOLYHU ((__IO hw_crc_gpolyhu_t ) HW_CRC_GPOLYHU_ADDR)
bogdanm	82:6473597d706e	1031	#define HW_CRC_GPOLYHU_RD() (HW_CRC_GPOLYHU.U)
bogdanm	82:6473597d706e	1032	#define HW_CRC_GPOLYHU_WR(v) (HW_CRC_GPOLYHU.U = (v))
bogdanm	82:6473597d706e	1033	#define HW_CRC_GPOLYHU_SET(v) (HW_CRC_GPOLYHU_WR(HW_CRC_GPOLYHU_RD() \| (v)))
bogdanm	82:6473597d706e	1034	#define HW_CRC_GPOLYHU_CLR(v) (HW_CRC_GPOLYHU_WR(HW_CRC_GPOLYHU_RD() & ~(v)))
bogdanm	82:6473597d706e	1035	#define HW_CRC_GPOLYHU_TOG(v) (HW_CRC_GPOLYHU_WR(HW_CRC_GPOLYHU_RD() ^ (v)))
bogdanm	82:6473597d706e	1036	#endif
bogdanm	82:6473597d706e	1037	//@}
bogdanm	82:6473597d706e	1038
bogdanm	82:6473597d706e	1039	/*
bogdanm	82:6473597d706e	1040	* Constants & macros for individual CRC_GPOLYHU bitfields
bogdanm	82:6473597d706e	1041	*/
bogdanm	82:6473597d706e	1042
bogdanm	82:6473597d706e	1043	/*!
bogdanm	82:6473597d706e	1044	* @name Register CRC_GPOLYHU, field GPOLYHU[7:0] (RW)
bogdanm	82:6473597d706e	1045	*/
bogdanm	82:6473597d706e	1046	//@{
bogdanm	82:6473597d706e	1047	#define BP_CRC_GPOLYHU_GPOLYHU (0U) //!< Bit position for CRC_GPOLYHU_GPOLYHU.
bogdanm	82:6473597d706e	1048	#define BM_CRC_GPOLYHU_GPOLYHU (0xFFU) //!< Bit mask for CRC_GPOLYHU_GPOLYHU.
bogdanm	82:6473597d706e	1049	#define BS_CRC_GPOLYHU_GPOLYHU (8U) //!< Bit field size in bits for CRC_GPOLYHU_GPOLYHU.
bogdanm	82:6473597d706e	1050
bogdanm	82:6473597d706e	1051	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1052	//! @brief Read current value of the CRC_GPOLYHU_GPOLYHU field.
bogdanm	82:6473597d706e	1053	#define BR_CRC_GPOLYHU_GPOLYHU (HW_CRC_GPOLYHU.U)
bogdanm	82:6473597d706e	1054	#endif
bogdanm	82:6473597d706e	1055
bogdanm	82:6473597d706e	1056	//! @brief Format value for bitfield CRC_GPOLYHU_GPOLYHU.
bogdanm	82:6473597d706e	1057	#define BF_CRC_GPOLYHU_GPOLYHU(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_GPOLYHU_GPOLYHU), uint8_t) & BM_CRC_GPOLYHU_GPOLYHU)
bogdanm	82:6473597d706e	1058
bogdanm	82:6473597d706e	1059	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1060	//! @brief Set the GPOLYHU field to a new value.
bogdanm	82:6473597d706e	1061	#define BW_CRC_GPOLYHU_GPOLYHU(v) (HW_CRC_GPOLYHU_WR(v))
bogdanm	82:6473597d706e	1062	#endif
bogdanm	82:6473597d706e	1063	//@}
bogdanm	82:6473597d706e	1064
bogdanm	82:6473597d706e	1065	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1066	// HW_CRC_CTRL - CRC Control register
bogdanm	82:6473597d706e	1067	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1068
bogdanm	82:6473597d706e	1069	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1070	/*!
bogdanm	82:6473597d706e	1071	* @brief HW_CRC_CTRL - CRC Control register (RW)
bogdanm	82:6473597d706e	1072	*
bogdanm	82:6473597d706e	1073	* Reset value: 0x00000000U
bogdanm	82:6473597d706e	1074	*
bogdanm	82:6473597d706e	1075	* This register controls the configuration and working of the CRC module.
bogdanm	82:6473597d706e	1076	* Appropriate bits must be set before starting a new CRC calculation. A new CRC
bogdanm	82:6473597d706e	1077	* calculation is initialized by asserting CTRL[WAS] and then writing the seed into
bogdanm	82:6473597d706e	1078	* the CRC data register.
bogdanm	82:6473597d706e	1079	*/
bogdanm	82:6473597d706e	1080	typedef union _hw_crc_ctrl
bogdanm	82:6473597d706e	1081	{
bogdanm	82:6473597d706e	1082	uint32_t U;
bogdanm	82:6473597d706e	1083	struct _hw_crc_ctrl_bitfields
bogdanm	82:6473597d706e	1084	{
bogdanm	82:6473597d706e	1085	uint32_t RESERVED0 : 24; //!< [23:0]
bogdanm	82:6473597d706e	1086	uint32_t TCRC : 1; //!< [24]
bogdanm	82:6473597d706e	1087	uint32_t WAS : 1; //!< [25] Write CRC Data Register As Seed
bogdanm	82:6473597d706e	1088	uint32_t FXOR : 1; //!< [26] Complement Read Of CRC Data Register
bogdanm	82:6473597d706e	1089	uint32_t RESERVED1 : 1; //!< [27]
bogdanm	82:6473597d706e	1090	uint32_t TOTR : 2; //!< [29:28] Type Of Transpose For Read
bogdanm	82:6473597d706e	1091	uint32_t TOT : 2; //!< [31:30] Type Of Transpose For Writes
bogdanm	82:6473597d706e	1092	} B;
bogdanm	82:6473597d706e	1093	} hw_crc_ctrl_t;
bogdanm	82:6473597d706e	1094	#endif
bogdanm	82:6473597d706e	1095
bogdanm	82:6473597d706e	1096	/*!
bogdanm	82:6473597d706e	1097	* @name Constants and macros for entire CRC_CTRL register
bogdanm	82:6473597d706e	1098	*/
bogdanm	82:6473597d706e	1099	//@{
bogdanm	82:6473597d706e	1100	#define HW_CRC_CTRL_ADDR (REGS_CRC_BASE + 0x8U)
bogdanm	82:6473597d706e	1101
bogdanm	82:6473597d706e	1102	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1103	#define HW_CRC_CTRL ((__IO hw_crc_ctrl_t ) HW_CRC_CTRL_ADDR)
bogdanm	82:6473597d706e	1104	#define HW_CRC_CTRL_RD() (HW_CRC_CTRL.U)
bogdanm	82:6473597d706e	1105	#define HW_CRC_CTRL_WR(v) (HW_CRC_CTRL.U = (v))
bogdanm	82:6473597d706e	1106	#define HW_CRC_CTRL_SET(v) (HW_CRC_CTRL_WR(HW_CRC_CTRL_RD() \| (v)))
bogdanm	82:6473597d706e	1107	#define HW_CRC_CTRL_CLR(v) (HW_CRC_CTRL_WR(HW_CRC_CTRL_RD() & ~(v)))
bogdanm	82:6473597d706e	1108	#define HW_CRC_CTRL_TOG(v) (HW_CRC_CTRL_WR(HW_CRC_CTRL_RD() ^ (v)))
bogdanm	82:6473597d706e	1109	#endif
bogdanm	82:6473597d706e	1110	//@}
bogdanm	82:6473597d706e	1111
bogdanm	82:6473597d706e	1112	/*
bogdanm	82:6473597d706e	1113	* Constants & macros for individual CRC_CTRL bitfields
bogdanm	82:6473597d706e	1114	*/
bogdanm	82:6473597d706e	1115
bogdanm	82:6473597d706e	1116	/*!
bogdanm	82:6473597d706e	1117	* @name Register CRC_CTRL, field TCRC[24] (RW)
bogdanm	82:6473597d706e	1118	*
bogdanm	82:6473597d706e	1119	* Width of CRC protocol.
bogdanm	82:6473597d706e	1120	*
bogdanm	82:6473597d706e	1121	* Values:
bogdanm	82:6473597d706e	1122	* - 0 - 16-bit CRC protocol.
bogdanm	82:6473597d706e	1123	* - 1 - 32-bit CRC protocol.
bogdanm	82:6473597d706e	1124	*/
bogdanm	82:6473597d706e	1125	//@{
bogdanm	82:6473597d706e	1126	#define BP_CRC_CTRL_TCRC (24U) //!< Bit position for CRC_CTRL_TCRC.
bogdanm	82:6473597d706e	1127	#define BM_CRC_CTRL_TCRC (0x01000000U) //!< Bit mask for CRC_CTRL_TCRC.
bogdanm	82:6473597d706e	1128	#define BS_CRC_CTRL_TCRC (1U) //!< Bit field size in bits for CRC_CTRL_TCRC.
bogdanm	82:6473597d706e	1129
bogdanm	82:6473597d706e	1130	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1131	//! @brief Read current value of the CRC_CTRL_TCRC field.
bogdanm	82:6473597d706e	1132	#define BR_CRC_CTRL_TCRC (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR, BP_CRC_CTRL_TCRC))
bogdanm	82:6473597d706e	1133	#endif
bogdanm	82:6473597d706e	1134
bogdanm	82:6473597d706e	1135	//! @brief Format value for bitfield CRC_CTRL_TCRC.
bogdanm	82:6473597d706e	1136	#define BF_CRC_CTRL_TCRC(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_CTRL_TCRC), uint32_t) & BM_CRC_CTRL_TCRC)
bogdanm	82:6473597d706e	1137
bogdanm	82:6473597d706e	1138	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1139	//! @brief Set the TCRC field to a new value.
bogdanm	82:6473597d706e	1140	#define BW_CRC_CTRL_TCRC(v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR, BP_CRC_CTRL_TCRC) = (v))
bogdanm	82:6473597d706e	1141	#endif
bogdanm	82:6473597d706e	1142	//@}
bogdanm	82:6473597d706e	1143
bogdanm	82:6473597d706e	1144	/*!
bogdanm	82:6473597d706e	1145	* @name Register CRC_CTRL, field WAS[25] (RW)
bogdanm	82:6473597d706e	1146	*
bogdanm	82:6473597d706e	1147	* When asserted, a value written to the CRC data register is considered a seed
bogdanm	82:6473597d706e	1148	* value. When deasserted, a value written to the CRC data register is taken as
bogdanm	82:6473597d706e	1149	* data for CRC computation.
bogdanm	82:6473597d706e	1150	*
bogdanm	82:6473597d706e	1151	* Values:
bogdanm	82:6473597d706e	1152	* - 0 - Writes to the CRC data register are data values.
bogdanm	82:6473597d706e	1153	* - 1 - Writes to the CRC data register are seed values.
bogdanm	82:6473597d706e	1154	*/
bogdanm	82:6473597d706e	1155	//@{
bogdanm	82:6473597d706e	1156	#define BP_CRC_CTRL_WAS (25U) //!< Bit position for CRC_CTRL_WAS.
bogdanm	82:6473597d706e	1157	#define BM_CRC_CTRL_WAS (0x02000000U) //!< Bit mask for CRC_CTRL_WAS.
bogdanm	82:6473597d706e	1158	#define BS_CRC_CTRL_WAS (1U) //!< Bit field size in bits for CRC_CTRL_WAS.
bogdanm	82:6473597d706e	1159
bogdanm	82:6473597d706e	1160	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1161	//! @brief Read current value of the CRC_CTRL_WAS field.
bogdanm	82:6473597d706e	1162	#define BR_CRC_CTRL_WAS (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR, BP_CRC_CTRL_WAS))
bogdanm	82:6473597d706e	1163	#endif
bogdanm	82:6473597d706e	1164
bogdanm	82:6473597d706e	1165	//! @brief Format value for bitfield CRC_CTRL_WAS.
bogdanm	82:6473597d706e	1166	#define BF_CRC_CTRL_WAS(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_CTRL_WAS), uint32_t) & BM_CRC_CTRL_WAS)
bogdanm	82:6473597d706e	1167
bogdanm	82:6473597d706e	1168	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1169	//! @brief Set the WAS field to a new value.
bogdanm	82:6473597d706e	1170	#define BW_CRC_CTRL_WAS(v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR, BP_CRC_CTRL_WAS) = (v))
bogdanm	82:6473597d706e	1171	#endif
bogdanm	82:6473597d706e	1172	//@}
bogdanm	82:6473597d706e	1173
bogdanm	82:6473597d706e	1174	/*!
bogdanm	82:6473597d706e	1175	* @name Register CRC_CTRL, field FXOR[26] (RW)
bogdanm	82:6473597d706e	1176	*
bogdanm	82:6473597d706e	1177	* Some CRC protocols require the final checksum to be XORed with 0xFFFFFFFF or
bogdanm	82:6473597d706e	1178	* 0xFFFF. Asserting this bit enables on the fly complementing of read data.
bogdanm	82:6473597d706e	1179	*
bogdanm	82:6473597d706e	1180	* Values:
bogdanm	82:6473597d706e	1181	* - 0 - No XOR on reading.
bogdanm	82:6473597d706e	1182	* - 1 - Invert or complement the read value of the CRC Data register.
bogdanm	82:6473597d706e	1183	*/
bogdanm	82:6473597d706e	1184	//@{
bogdanm	82:6473597d706e	1185	#define BP_CRC_CTRL_FXOR (26U) //!< Bit position for CRC_CTRL_FXOR.
bogdanm	82:6473597d706e	1186	#define BM_CRC_CTRL_FXOR (0x04000000U) //!< Bit mask for CRC_CTRL_FXOR.
bogdanm	82:6473597d706e	1187	#define BS_CRC_CTRL_FXOR (1U) //!< Bit field size in bits for CRC_CTRL_FXOR.
bogdanm	82:6473597d706e	1188
bogdanm	82:6473597d706e	1189	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1190	//! @brief Read current value of the CRC_CTRL_FXOR field.
bogdanm	82:6473597d706e	1191	#define BR_CRC_CTRL_FXOR (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR, BP_CRC_CTRL_FXOR))
bogdanm	82:6473597d706e	1192	#endif
bogdanm	82:6473597d706e	1193
bogdanm	82:6473597d706e	1194	//! @brief Format value for bitfield CRC_CTRL_FXOR.
bogdanm	82:6473597d706e	1195	#define BF_CRC_CTRL_FXOR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_CTRL_FXOR), uint32_t) & BM_CRC_CTRL_FXOR)
bogdanm	82:6473597d706e	1196
bogdanm	82:6473597d706e	1197	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1198	//! @brief Set the FXOR field to a new value.
bogdanm	82:6473597d706e	1199	#define BW_CRC_CTRL_FXOR(v) (BITBAND_ACCESS32(HW_CRC_CTRL_ADDR, BP_CRC_CTRL_FXOR) = (v))
bogdanm	82:6473597d706e	1200	#endif
bogdanm	82:6473597d706e	1201	//@}
bogdanm	82:6473597d706e	1202
bogdanm	82:6473597d706e	1203	/*!
bogdanm	82:6473597d706e	1204	* @name Register CRC_CTRL, field TOTR[29:28] (RW)
bogdanm	82:6473597d706e	1205	*
bogdanm	82:6473597d706e	1206	* Identifies the transpose configuration of the value read from the CRC Data
bogdanm	82:6473597d706e	1207	* register. See the description of the transpose feature for the available
bogdanm	82:6473597d706e	1208	* transpose options.
bogdanm	82:6473597d706e	1209	*
bogdanm	82:6473597d706e	1210	* Values:
bogdanm	82:6473597d706e	1211	* - 00 - No transposition.
bogdanm	82:6473597d706e	1212	* - 01 - Bits in bytes are transposed; bytes are not transposed.
bogdanm	82:6473597d706e	1213	* - 10 - Both bits in bytes and bytes are transposed.
bogdanm	82:6473597d706e	1214	* - 11 - Only bytes are transposed; no bits in a byte are transposed.
bogdanm	82:6473597d706e	1215	*/
bogdanm	82:6473597d706e	1216	//@{
bogdanm	82:6473597d706e	1217	#define BP_CRC_CTRL_TOTR (28U) //!< Bit position for CRC_CTRL_TOTR.
bogdanm	82:6473597d706e	1218	#define BM_CRC_CTRL_TOTR (0x30000000U) //!< Bit mask for CRC_CTRL_TOTR.
bogdanm	82:6473597d706e	1219	#define BS_CRC_CTRL_TOTR (2U) //!< Bit field size in bits for CRC_CTRL_TOTR.
bogdanm	82:6473597d706e	1220
bogdanm	82:6473597d706e	1221	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1222	//! @brief Read current value of the CRC_CTRL_TOTR field.
bogdanm	82:6473597d706e	1223	#define BR_CRC_CTRL_TOTR (HW_CRC_CTRL.B.TOTR)
bogdanm	82:6473597d706e	1224	#endif
bogdanm	82:6473597d706e	1225
bogdanm	82:6473597d706e	1226	//! @brief Format value for bitfield CRC_CTRL_TOTR.
bogdanm	82:6473597d706e	1227	#define BF_CRC_CTRL_TOTR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_CTRL_TOTR), uint32_t) & BM_CRC_CTRL_TOTR)
bogdanm	82:6473597d706e	1228
bogdanm	82:6473597d706e	1229	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1230	//! @brief Set the TOTR field to a new value.
bogdanm	82:6473597d706e	1231	#define BW_CRC_CTRL_TOTR(v) (HW_CRC_CTRL_WR((HW_CRC_CTRL_RD() & ~BM_CRC_CTRL_TOTR) \| BF_CRC_CTRL_TOTR(v)))
bogdanm	82:6473597d706e	1232	#endif
bogdanm	82:6473597d706e	1233	//@}
bogdanm	82:6473597d706e	1234
bogdanm	82:6473597d706e	1235	/*!
bogdanm	82:6473597d706e	1236	* @name Register CRC_CTRL, field TOT[31:30] (RW)
bogdanm	82:6473597d706e	1237	*
bogdanm	82:6473597d706e	1238	* Defines the transpose configuration of the data written to the CRC data
bogdanm	82:6473597d706e	1239	* register. See the description of the transpose feature for the available transpose
bogdanm	82:6473597d706e	1240	* options.
bogdanm	82:6473597d706e	1241	*
bogdanm	82:6473597d706e	1242	* Values:
bogdanm	82:6473597d706e	1243	* - 00 - No transposition.
bogdanm	82:6473597d706e	1244	* - 01 - Bits in bytes are transposed; bytes are not transposed.
bogdanm	82:6473597d706e	1245	* - 10 - Both bits in bytes and bytes are transposed.
bogdanm	82:6473597d706e	1246	* - 11 - Only bytes are transposed; no bits in a byte are transposed.
bogdanm	82:6473597d706e	1247	*/
bogdanm	82:6473597d706e	1248	//@{
bogdanm	82:6473597d706e	1249	#define BP_CRC_CTRL_TOT (30U) //!< Bit position for CRC_CTRL_TOT.
bogdanm	82:6473597d706e	1250	#define BM_CRC_CTRL_TOT (0xC0000000U) //!< Bit mask for CRC_CTRL_TOT.
bogdanm	82:6473597d706e	1251	#define BS_CRC_CTRL_TOT (2U) //!< Bit field size in bits for CRC_CTRL_TOT.
bogdanm	82:6473597d706e	1252
bogdanm	82:6473597d706e	1253	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1254	//! @brief Read current value of the CRC_CTRL_TOT field.
bogdanm	82:6473597d706e	1255	#define BR_CRC_CTRL_TOT (HW_CRC_CTRL.B.TOT)
bogdanm	82:6473597d706e	1256	#endif
bogdanm	82:6473597d706e	1257
bogdanm	82:6473597d706e	1258	//! @brief Format value for bitfield CRC_CTRL_TOT.
bogdanm	82:6473597d706e	1259	#define BF_CRC_CTRL_TOT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint32_t) << BP_CRC_CTRL_TOT), uint32_t) & BM_CRC_CTRL_TOT)
bogdanm	82:6473597d706e	1260
bogdanm	82:6473597d706e	1261	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1262	//! @brief Set the TOT field to a new value.
bogdanm	82:6473597d706e	1263	#define BW_CRC_CTRL_TOT(v) (HW_CRC_CTRL_WR((HW_CRC_CTRL_RD() & ~BM_CRC_CTRL_TOT) \| BF_CRC_CTRL_TOT(v)))
bogdanm	82:6473597d706e	1264	#endif
bogdanm	82:6473597d706e	1265	//@}
bogdanm	82:6473597d706e	1266	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1267	// HW_CRC_CTRLHU - CRC_CTRLHU register.
bogdanm	82:6473597d706e	1268	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1269
bogdanm	82:6473597d706e	1270	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1271	/*!
bogdanm	82:6473597d706e	1272	* @brief HW_CRC_CTRLHU - CRC_CTRLHU register. (RW)
bogdanm	82:6473597d706e	1273	*
bogdanm	82:6473597d706e	1274	* Reset value: 0x00U
bogdanm	82:6473597d706e	1275	*/
bogdanm	82:6473597d706e	1276	typedef union _hw_crc_ctrlhu
bogdanm	82:6473597d706e	1277	{
bogdanm	82:6473597d706e	1278	uint8_t U;
bogdanm	82:6473597d706e	1279	struct _hw_crc_ctrlhu_bitfields
bogdanm	82:6473597d706e	1280	{
bogdanm	82:6473597d706e	1281	uint8_t TCRC : 1; //!< [0]
bogdanm	82:6473597d706e	1282	uint8_t WAS : 1; //!< [1]
bogdanm	82:6473597d706e	1283	uint8_t FXOR : 1; //!< [2]
bogdanm	82:6473597d706e	1284	uint8_t RESERVED0 : 1; //!< [3]
bogdanm	82:6473597d706e	1285	uint8_t TOTR : 2; //!< [5:4]
bogdanm	82:6473597d706e	1286	uint8_t TOT : 2; //!< [7:6]
bogdanm	82:6473597d706e	1287	} B;
bogdanm	82:6473597d706e	1288	} hw_crc_ctrlhu_t;
bogdanm	82:6473597d706e	1289	#endif
bogdanm	82:6473597d706e	1290
bogdanm	82:6473597d706e	1291	/*!
bogdanm	82:6473597d706e	1292	* @name Constants and macros for entire CRC_CTRLHU register
bogdanm	82:6473597d706e	1293	*/
bogdanm	82:6473597d706e	1294	//@{
bogdanm	82:6473597d706e	1295	#define HW_CRC_CTRLHU_ADDR (REGS_CRC_BASE + 0xBU)
bogdanm	82:6473597d706e	1296
bogdanm	82:6473597d706e	1297	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1298	#define HW_CRC_CTRLHU ((__IO hw_crc_ctrlhu_t ) HW_CRC_CTRLHU_ADDR)
bogdanm	82:6473597d706e	1299	#define HW_CRC_CTRLHU_RD() (HW_CRC_CTRLHU.U)
bogdanm	82:6473597d706e	1300	#define HW_CRC_CTRLHU_WR(v) (HW_CRC_CTRLHU.U = (v))
bogdanm	82:6473597d706e	1301	#define HW_CRC_CTRLHU_SET(v) (HW_CRC_CTRLHU_WR(HW_CRC_CTRLHU_RD() \| (v)))
bogdanm	82:6473597d706e	1302	#define HW_CRC_CTRLHU_CLR(v) (HW_CRC_CTRLHU_WR(HW_CRC_CTRLHU_RD() & ~(v)))
bogdanm	82:6473597d706e	1303	#define HW_CRC_CTRLHU_TOG(v) (HW_CRC_CTRLHU_WR(HW_CRC_CTRLHU_RD() ^ (v)))
bogdanm	82:6473597d706e	1304	#endif
bogdanm	82:6473597d706e	1305	//@}
bogdanm	82:6473597d706e	1306
bogdanm	82:6473597d706e	1307	/*
bogdanm	82:6473597d706e	1308	* Constants & macros for individual CRC_CTRLHU bitfields
bogdanm	82:6473597d706e	1309	*/
bogdanm	82:6473597d706e	1310
bogdanm	82:6473597d706e	1311	/*!
bogdanm	82:6473597d706e	1312	* @name Register CRC_CTRLHU, field TCRC[0] (RW)
bogdanm	82:6473597d706e	1313	*
bogdanm	82:6473597d706e	1314	* Values:
bogdanm	82:6473597d706e	1315	* - 0 - 16-bit CRC protocol.
bogdanm	82:6473597d706e	1316	* - 1 - 32-bit CRC protocol.
bogdanm	82:6473597d706e	1317	*/
bogdanm	82:6473597d706e	1318	//@{
bogdanm	82:6473597d706e	1319	#define BP_CRC_CTRLHU_TCRC (0U) //!< Bit position for CRC_CTRLHU_TCRC.
bogdanm	82:6473597d706e	1320	#define BM_CRC_CTRLHU_TCRC (0x01U) //!< Bit mask for CRC_CTRLHU_TCRC.
bogdanm	82:6473597d706e	1321	#define BS_CRC_CTRLHU_TCRC (1U) //!< Bit field size in bits for CRC_CTRLHU_TCRC.
bogdanm	82:6473597d706e	1322
bogdanm	82:6473597d706e	1323	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1324	//! @brief Read current value of the CRC_CTRLHU_TCRC field.
bogdanm	82:6473597d706e	1325	#define BR_CRC_CTRLHU_TCRC (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR, BP_CRC_CTRLHU_TCRC))
bogdanm	82:6473597d706e	1326	#endif
bogdanm	82:6473597d706e	1327
bogdanm	82:6473597d706e	1328	//! @brief Format value for bitfield CRC_CTRLHU_TCRC.
bogdanm	82:6473597d706e	1329	#define BF_CRC_CTRLHU_TCRC(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_CTRLHU_TCRC), uint8_t) & BM_CRC_CTRLHU_TCRC)
bogdanm	82:6473597d706e	1330
bogdanm	82:6473597d706e	1331	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1332	//! @brief Set the TCRC field to a new value.
bogdanm	82:6473597d706e	1333	#define BW_CRC_CTRLHU_TCRC(v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR, BP_CRC_CTRLHU_TCRC) = (v))
bogdanm	82:6473597d706e	1334	#endif
bogdanm	82:6473597d706e	1335	//@}
bogdanm	82:6473597d706e	1336
bogdanm	82:6473597d706e	1337	/*!
bogdanm	82:6473597d706e	1338	* @name Register CRC_CTRLHU, field WAS[1] (RW)
bogdanm	82:6473597d706e	1339	*
bogdanm	82:6473597d706e	1340	* Values:
bogdanm	82:6473597d706e	1341	* - 0 - Writes to CRC data register are data values.
bogdanm	82:6473597d706e	1342	* - 1 - Writes to CRC data reguster are seed values.
bogdanm	82:6473597d706e	1343	*/
bogdanm	82:6473597d706e	1344	//@{
bogdanm	82:6473597d706e	1345	#define BP_CRC_CTRLHU_WAS (1U) //!< Bit position for CRC_CTRLHU_WAS.
bogdanm	82:6473597d706e	1346	#define BM_CRC_CTRLHU_WAS (0x02U) //!< Bit mask for CRC_CTRLHU_WAS.
bogdanm	82:6473597d706e	1347	#define BS_CRC_CTRLHU_WAS (1U) //!< Bit field size in bits for CRC_CTRLHU_WAS.
bogdanm	82:6473597d706e	1348
bogdanm	82:6473597d706e	1349	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1350	//! @brief Read current value of the CRC_CTRLHU_WAS field.
bogdanm	82:6473597d706e	1351	#define BR_CRC_CTRLHU_WAS (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR, BP_CRC_CTRLHU_WAS))
bogdanm	82:6473597d706e	1352	#endif
bogdanm	82:6473597d706e	1353
bogdanm	82:6473597d706e	1354	//! @brief Format value for bitfield CRC_CTRLHU_WAS.
bogdanm	82:6473597d706e	1355	#define BF_CRC_CTRLHU_WAS(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_CTRLHU_WAS), uint8_t) & BM_CRC_CTRLHU_WAS)
bogdanm	82:6473597d706e	1356
bogdanm	82:6473597d706e	1357	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1358	//! @brief Set the WAS field to a new value.
bogdanm	82:6473597d706e	1359	#define BW_CRC_CTRLHU_WAS(v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR, BP_CRC_CTRLHU_WAS) = (v))
bogdanm	82:6473597d706e	1360	#endif
bogdanm	82:6473597d706e	1361	//@}
bogdanm	82:6473597d706e	1362
bogdanm	82:6473597d706e	1363	/*!
bogdanm	82:6473597d706e	1364	* @name Register CRC_CTRLHU, field FXOR[2] (RW)
bogdanm	82:6473597d706e	1365	*
bogdanm	82:6473597d706e	1366	* Values:
bogdanm	82:6473597d706e	1367	* - 0 - No XOR on reading.
bogdanm	82:6473597d706e	1368	* - 1 - Invert or complement the read value of CRC data register.
bogdanm	82:6473597d706e	1369	*/
bogdanm	82:6473597d706e	1370	//@{
bogdanm	82:6473597d706e	1371	#define BP_CRC_CTRLHU_FXOR (2U) //!< Bit position for CRC_CTRLHU_FXOR.
bogdanm	82:6473597d706e	1372	#define BM_CRC_CTRLHU_FXOR (0x04U) //!< Bit mask for CRC_CTRLHU_FXOR.
bogdanm	82:6473597d706e	1373	#define BS_CRC_CTRLHU_FXOR (1U) //!< Bit field size in bits for CRC_CTRLHU_FXOR.
bogdanm	82:6473597d706e	1374
bogdanm	82:6473597d706e	1375	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1376	//! @brief Read current value of the CRC_CTRLHU_FXOR field.
bogdanm	82:6473597d706e	1377	#define BR_CRC_CTRLHU_FXOR (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR, BP_CRC_CTRLHU_FXOR))
bogdanm	82:6473597d706e	1378	#endif
bogdanm	82:6473597d706e	1379
bogdanm	82:6473597d706e	1380	//! @brief Format value for bitfield CRC_CTRLHU_FXOR.
bogdanm	82:6473597d706e	1381	#define BF_CRC_CTRLHU_FXOR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_CTRLHU_FXOR), uint8_t) & BM_CRC_CTRLHU_FXOR)
bogdanm	82:6473597d706e	1382
bogdanm	82:6473597d706e	1383	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1384	//! @brief Set the FXOR field to a new value.
bogdanm	82:6473597d706e	1385	#define BW_CRC_CTRLHU_FXOR(v) (BITBAND_ACCESS8(HW_CRC_CTRLHU_ADDR, BP_CRC_CTRLHU_FXOR) = (v))
bogdanm	82:6473597d706e	1386	#endif
bogdanm	82:6473597d706e	1387	//@}
bogdanm	82:6473597d706e	1388
bogdanm	82:6473597d706e	1389	/*!
bogdanm	82:6473597d706e	1390	* @name Register CRC_CTRLHU, field TOTR[5:4] (RW)
bogdanm	82:6473597d706e	1391	*
bogdanm	82:6473597d706e	1392	* Values:
bogdanm	82:6473597d706e	1393	* - 00 - No Transposition.
bogdanm	82:6473597d706e	1394	* - 01 - Bits in bytes are transposed, bytes are not transposed.
bogdanm	82:6473597d706e	1395	* - 10 - Both bits in bytes and bytes are transposed.
bogdanm	82:6473597d706e	1396	* - 11 - Only bytes are transposed; no bits in a byte are transposed.
bogdanm	82:6473597d706e	1397	*/
bogdanm	82:6473597d706e	1398	//@{
bogdanm	82:6473597d706e	1399	#define BP_CRC_CTRLHU_TOTR (4U) //!< Bit position for CRC_CTRLHU_TOTR.
bogdanm	82:6473597d706e	1400	#define BM_CRC_CTRLHU_TOTR (0x30U) //!< Bit mask for CRC_CTRLHU_TOTR.
bogdanm	82:6473597d706e	1401	#define BS_CRC_CTRLHU_TOTR (2U) //!< Bit field size in bits for CRC_CTRLHU_TOTR.
bogdanm	82:6473597d706e	1402
bogdanm	82:6473597d706e	1403	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1404	//! @brief Read current value of the CRC_CTRLHU_TOTR field.
bogdanm	82:6473597d706e	1405	#define BR_CRC_CTRLHU_TOTR (HW_CRC_CTRLHU.B.TOTR)
bogdanm	82:6473597d706e	1406	#endif
bogdanm	82:6473597d706e	1407
bogdanm	82:6473597d706e	1408	//! @brief Format value for bitfield CRC_CTRLHU_TOTR.
bogdanm	82:6473597d706e	1409	#define BF_CRC_CTRLHU_TOTR(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_CTRLHU_TOTR), uint8_t) & BM_CRC_CTRLHU_TOTR)
bogdanm	82:6473597d706e	1410
bogdanm	82:6473597d706e	1411	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1412	//! @brief Set the TOTR field to a new value.
bogdanm	82:6473597d706e	1413	#define BW_CRC_CTRLHU_TOTR(v) (HW_CRC_CTRLHU_WR((HW_CRC_CTRLHU_RD() & ~BM_CRC_CTRLHU_TOTR) \| BF_CRC_CTRLHU_TOTR(v)))
bogdanm	82:6473597d706e	1414	#endif
bogdanm	82:6473597d706e	1415	//@}
bogdanm	82:6473597d706e	1416
bogdanm	82:6473597d706e	1417	/*!
bogdanm	82:6473597d706e	1418	* @name Register CRC_CTRLHU, field TOT[7:6] (RW)
bogdanm	82:6473597d706e	1419	*
bogdanm	82:6473597d706e	1420	* Values:
bogdanm	82:6473597d706e	1421	* - 00 - No Transposition.
bogdanm	82:6473597d706e	1422	* - 01 - Bits in bytes are transposed, bytes are not transposed.
bogdanm	82:6473597d706e	1423	* - 10 - Both bits in bytes and bytes are transposed.
bogdanm	82:6473597d706e	1424	* - 11 - Only bytes are transposed; no bits in a byte are transposed.
bogdanm	82:6473597d706e	1425	*/
bogdanm	82:6473597d706e	1426	//@{
bogdanm	82:6473597d706e	1427	#define BP_CRC_CTRLHU_TOT (6U) //!< Bit position for CRC_CTRLHU_TOT.
bogdanm	82:6473597d706e	1428	#define BM_CRC_CTRLHU_TOT (0xC0U) //!< Bit mask for CRC_CTRLHU_TOT.
bogdanm	82:6473597d706e	1429	#define BS_CRC_CTRLHU_TOT (2U) //!< Bit field size in bits for CRC_CTRLHU_TOT.
bogdanm	82:6473597d706e	1430
bogdanm	82:6473597d706e	1431	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1432	//! @brief Read current value of the CRC_CTRLHU_TOT field.
bogdanm	82:6473597d706e	1433	#define BR_CRC_CTRLHU_TOT (HW_CRC_CTRLHU.B.TOT)
bogdanm	82:6473597d706e	1434	#endif
bogdanm	82:6473597d706e	1435
bogdanm	82:6473597d706e	1436	//! @brief Format value for bitfield CRC_CTRLHU_TOT.
bogdanm	82:6473597d706e	1437	#define BF_CRC_CTRLHU_TOT(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_CRC_CTRLHU_TOT), uint8_t) & BM_CRC_CTRLHU_TOT)
bogdanm	82:6473597d706e	1438
bogdanm	82:6473597d706e	1439	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1440	//! @brief Set the TOT field to a new value.
bogdanm	82:6473597d706e	1441	#define BW_CRC_CTRLHU_TOT(v) (HW_CRC_CTRLHU_WR((HW_CRC_CTRLHU_RD() & ~BM_CRC_CTRLHU_TOT) \| BF_CRC_CTRLHU_TOT(v)))
bogdanm	82:6473597d706e	1442	#endif
bogdanm	82:6473597d706e	1443	//@}
bogdanm	82:6473597d706e	1444
bogdanm	82:6473597d706e	1445	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1446	// hw_crc_t - module struct
bogdanm	82:6473597d706e	1447	//-------------------------------------------------------------------------------------------
bogdanm	82:6473597d706e	1448	/*!
bogdanm	82:6473597d706e	1449	* @brief All CRC module registers.
bogdanm	82:6473597d706e	1450	*/
bogdanm	82:6473597d706e	1451	#ifndef __LANGUAGE_ASM__
bogdanm	82:6473597d706e	1452	#pragma pack(1)
bogdanm	82:6473597d706e	1453	typedef struct _hw_crc
bogdanm	82:6473597d706e	1454	{
bogdanm	82:6473597d706e	1455	union {
bogdanm	82:6473597d706e	1456	struct {
bogdanm	82:6473597d706e	1457	__IO hw_crc_datal_t DATAL; //!< [0x0] CRC_DATAL register.
bogdanm	82:6473597d706e	1458	__IO hw_crc_datah_t DATAH; //!< [0x2] CRC_DATAH register.
bogdanm	82:6473597d706e	1459	} ACCESS16BIT;
bogdanm	82:6473597d706e	1460	struct {
bogdanm	82:6473597d706e	1461	__IO hw_crc_datall_t DATALL; //!< [0x0] CRC_DATALL register.
bogdanm	82:6473597d706e	1462	__IO hw_crc_datalu_t DATALU; //!< [0x1] CRC_DATALU register.
bogdanm	82:6473597d706e	1463	__IO hw_crc_datahl_t DATAHL; //!< [0x2] CRC_DATAHL register.
bogdanm	82:6473597d706e	1464	__IO hw_crc_datahu_t DATAHU; //!< [0x3] CRC_DATAHU register.
bogdanm	82:6473597d706e	1465	} ACCESS8BIT;
bogdanm	82:6473597d706e	1466	__IO hw_crc_data_t DATA; //!< [0x0] CRC Data register
bogdanm	82:6473597d706e	1467	};
bogdanm	82:6473597d706e	1468	union {
bogdanm	82:6473597d706e	1469	__IO hw_crc_gpoly_t GPOLY; //!< [0x4] CRC Polynomial register
bogdanm	82:6473597d706e	1470	struct {
bogdanm	82:6473597d706e	1471	__IO hw_crc_gpolyl_t GPOLYL; //!< [0x4] CRC_GPOLYL register.
bogdanm	82:6473597d706e	1472	__IO hw_crc_gpolyh_t GPOLYH; //!< [0x6] CRC_GPOLYH register.
bogdanm	82:6473597d706e	1473	} GPOLY_ACCESS16BIT;
bogdanm	82:6473597d706e	1474	struct {
bogdanm	82:6473597d706e	1475	__IO hw_crc_gpolyll_t GPOLYLL; //!< [0x4] CRC_GPOLYLL register.
bogdanm	82:6473597d706e	1476	__IO hw_crc_gpolylu_t GPOLYLU; //!< [0x5] CRC_GPOLYLU register.
bogdanm	82:6473597d706e	1477	__IO hw_crc_gpolyhl_t GPOLYHL; //!< [0x6] CRC_GPOLYHL register.
bogdanm	82:6473597d706e	1478	__IO hw_crc_gpolyhu_t GPOLYHU; //!< [0x7] CRC_GPOLYHU register.
bogdanm	82:6473597d706e	1479	} GPOLY_ACCESS8BIT;
bogdanm	82:6473597d706e	1480	};
bogdanm	82:6473597d706e	1481	union {
bogdanm	82:6473597d706e	1482	__IO hw_crc_ctrl_t CTRL; //!< [0x8] CRC Control register
bogdanm	82:6473597d706e	1483	struct {
bogdanm	82:6473597d706e	1484	uint8_t _reserved0[3];
bogdanm	82:6473597d706e	1485	__IO hw_crc_ctrlhu_t CTRLHU; //!< [0xB] CRC_CTRLHU register.
bogdanm	82:6473597d706e	1486	} CTRL_ACCESS8BIT;
bogdanm	82:6473597d706e	1487	};
bogdanm	82:6473597d706e	1488	} hw_crc_t;
bogdanm	82:6473597d706e	1489	#pragma pack()
bogdanm	82:6473597d706e	1490
bogdanm	82:6473597d706e	1491	//! @brief Macro to access all CRC registers.
bogdanm	82:6473597d706e	1492	//! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
bogdanm	82:6473597d706e	1493	//! use the '&' operator, like <code>&HW_CRC</code>.
bogdanm	82:6473597d706e	1494	#define HW_CRC ((hw_crc_t ) REGS_CRC_BASE)
bogdanm	82:6473597d706e	1495	#endif
bogdanm	82:6473597d706e	1496
bogdanm	82:6473597d706e	1497	#endif // __HW_CRC_REGISTERS_H__
bogdanm	82:6473597d706e	1498	// v22/130726/0.9
bogdanm	82:6473597d706e	1499	// EOF

Repository toolbox

Export to desktop IDE

Repository details

Type:	Library
Created:	25 Jun 2015
Imports:	24
Forks:	0
Commits:	103
Dependents:	1
Dependencies:	0
Followers:	1

TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/device/MK64F12/MK64F12_crc.h@89:552587b429a1, 2014-09-12 (annotated)

Who changed what in which revision?

Repository toolbox

Repository details

Important Information for this Arm website

Access Warning