Julien Kern / mbed

mbed library

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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_MCU_K64F/TARGET_FRDM/PeripheralNames.h@89:552587b429a1, 2014-09-12 (annotated)

Committer:
bogdanm
Date:
Fri Sep 12 16:41:52 2014 +0100
Revision:
89:552587b429a1
Parent:
TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/TARGET_FRDM/PeripheralNames.h@87:6213f644d804 
Release 89 of the mbed library



Main changes:



- low power optimizations for Nordic targets

- code structure changes for Freescale K64F targets

- bug fixes in various backends

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /* mbed Microcontroller Library
bogdanm 82:6473597d706e 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 82:6473597d706e 3 *
bogdanm 82:6473597d706e 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 82:6473597d706e 5 * you may not use this file except in compliance with the License.
bogdanm 82:6473597d706e 6 * You may obtain a copy of the License at
bogdanm 82:6473597d706e 7 *
bogdanm 82:6473597d706e 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 82:6473597d706e 9 *
bogdanm 82:6473597d706e 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 82:6473597d706e 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 82:6473597d706e 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 82:6473597d706e 13 * See the License for the specific language governing permissions and
bogdanm 82:6473597d706e 14 * limitations under the License.
bogdanm 82:6473597d706e 15 */
bogdanm 82:6473597d706e 16 #ifndef MBED_PERIPHERALNAMES_H
bogdanm 82:6473597d706e 17 #define MBED_PERIPHERALNAMES_H
bogdanm 82:6473597d706e 18
bogdanm 82:6473597d706e 19 #include "cmsis.h"
bogdanm 82:6473597d706e 20
bogdanm 82:6473597d706e 21 #ifdef __cplusplus
bogdanm 82:6473597d706e 22 extern "C" {
bogdanm 82:6473597d706e 23 #endif
bogdanm 82:6473597d706e 24
bogdanm 82:6473597d706e 25 typedef enum {
bogdanm 82:6473597d706e 26 OSC32KCLK = 0,
bogdanm 82:6473597d706e 27 } RTCName;
bogdanm 82:6473597d706e 28
bogdanm 82:6473597d706e 29 typedef enum {
bogdanm 82:6473597d706e 30 UART_0 = 0,
bogdanm 82:6473597d706e 31 UART_1 = 1,
bogdanm 82:6473597d706e 32 UART_2 = 2,
bogdanm 82:6473597d706e 33 UART_3 = 3,
bogdanm 82:6473597d706e 34 UART_4 = 4,
bogdanm 82:6473597d706e 35 } UARTName;
bogdanm 82:6473597d706e 36
bogdanm 82:6473597d706e 37 #define STDIO_UART_TX USBTX
bogdanm 82:6473597d706e 38 #define STDIO_UART_RX USBRX
bogdanm 82:6473597d706e 39 #define STDIO_UART UART_0
bogdanm 82:6473597d706e 40
bogdanm 82:6473597d706e 41 typedef enum {
bogdanm 82:6473597d706e 42 I2C_0 = 0,
bogdanm 82:6473597d706e 43 I2C_1 = 1,
bogdanm 82:6473597d706e 44 I2C_2 = 2,
bogdanm 82:6473597d706e 45 } I2CName;
bogdanm 82:6473597d706e 46
bogdanm 82:6473597d706e 47 #define TPM_SHIFT 8
bogdanm 82:6473597d706e 48 typedef enum {
bogdanm 82:6473597d706e 49 PWM_1 = (0 << TPM_SHIFT) | (0), // FTM0 CH0
bogdanm 82:6473597d706e 50 PWM_2 = (0 << TPM_SHIFT) | (1), // FTM0 CH1
bogdanm 82:6473597d706e 51 PWM_3 = (0 << TPM_SHIFT) | (2), // FTM0 CH2
bogdanm 82:6473597d706e 52 PWM_4 = (0 << TPM_SHIFT) | (3), // FTM0 CH3
bogdanm 82:6473597d706e 53 PWM_5 = (0 << TPM_SHIFT) | (4), // FTM0 CH4
bogdanm 82:6473597d706e 54 PWM_6 = (0 << TPM_SHIFT) | (5), // FTM0 CH5
bogdanm 82:6473597d706e 55 PWM_7 = (0 << TPM_SHIFT) | (6), // FTM0 CH6
bogdanm 82:6473597d706e 56 PWM_8 = (0 << TPM_SHIFT) | (7), // FTM0 CH7
bogdanm 82:6473597d706e 57 PWM_9 = (1 << TPM_SHIFT) | (0), // FTM1 CH0
bogdanm 82:6473597d706e 58 PWM_10 = (1 << TPM_SHIFT) | (1), // FTM1 CH1
bogdanm 82:6473597d706e 59 PWM_11 = (1 << TPM_SHIFT) | (2), // FTM1 CH2
bogdanm 82:6473597d706e 60 PWM_12 = (1 << TPM_SHIFT) | (3), // FTM1 CH3
bogdanm 82:6473597d706e 61 PWM_13 = (1 << TPM_SHIFT) | (4), // FTM1 CH4
bogdanm 82:6473597d706e 62 PWM_14 = (1 << TPM_SHIFT) | (5), // FTM1 CH5
bogdanm 82:6473597d706e 63 PWM_15 = (1 << TPM_SHIFT) | (6), // FTM1 CH6
bogdanm 82:6473597d706e 64 PWM_16 = (1 << TPM_SHIFT) | (7), // FTM1 CH7
bogdanm 82:6473597d706e 65 PWM_17 = (2 << TPM_SHIFT) | (0), // FTM2 CH0
bogdanm 82:6473597d706e 66 PWM_18 = (2 << TPM_SHIFT) | (1), // FTM2 CH1
bogdanm 82:6473597d706e 67 PWM_19 = (2 << TPM_SHIFT) | (2), // FTM2 CH2
bogdanm 82:6473597d706e 68 PWM_20 = (2 << TPM_SHIFT) | (3), // FTM2 CH3
bogdanm 82:6473597d706e 69 PWM_21 = (2 << TPM_SHIFT) | (4), // FTM2 CH4
bogdanm 82:6473597d706e 70 PWM_22 = (2 << TPM_SHIFT) | (5), // FTM2 CH5
bogdanm 82:6473597d706e 71 PWM_23 = (2 << TPM_SHIFT) | (6), // FTM2 CH6
bogdanm 82:6473597d706e 72 PWM_24 = (2 << TPM_SHIFT) | (7), // FTM2 CH7
bogdanm 82:6473597d706e 73 // could be 4 or could be 3... not sure what register
bogdanm 82:6473597d706e 74 // this is for... too much abstraction
bogdanm 82:6473597d706e 75 PWM_25 = (3 << TPM_SHIFT) | (0), // FTM3 CH0
bogdanm 82:6473597d706e 76 PWM_26 = (3 << TPM_SHIFT) | (1), // FTM3 CH1
bogdanm 82:6473597d706e 77 PWM_27 = (3 << TPM_SHIFT) | (2), // FTM3 CH2
bogdanm 82:6473597d706e 78 PWM_28 = (3 << TPM_SHIFT) | (3), // FTM3 CH3
bogdanm 82:6473597d706e 79 PWM_29 = (3 << TPM_SHIFT) | (4), // FTM3 CH4
bogdanm 82:6473597d706e 80 PWM_30 = (3 << TPM_SHIFT) | (5), // FTM3 CH5
bogdanm 82:6473597d706e 81 PWM_31 = (3 << TPM_SHIFT) | (6), // FTM3 CH6
bogdanm 82:6473597d706e 82 PWM_32 = (3 << TPM_SHIFT) | (7), // FTM3 CH7
bogdanm 82:6473597d706e 83 } PWMName;
bogdanm 82:6473597d706e 84
bogdanm 82:6473597d706e 85 #define ADC_INSTANCE_SHIFT 8
bogdanm 82:6473597d706e 86 #define ADC_B_CHANNEL_SHIFT 5
bogdanm 82:6473597d706e 87 typedef enum {
bogdanm 82:6473597d706e 88 ADC0_SE4b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 4,
bogdanm 82:6473597d706e 89 ADC0_SE5b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 5,
bogdanm 82:6473597d706e 90 ADC0_SE6b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 6,
bogdanm 82:6473597d706e 91 ADC0_SE7b = (0 << ADC_INSTANCE_SHIFT) | (1 << ADC_B_CHANNEL_SHIFT) | 7,
bogdanm 82:6473597d706e 92 ADC0_SE8 = (0 << ADC_INSTANCE_SHIFT) | 8,
bogdanm 82:6473597d706e 93 ADC0_SE9 = (0 << ADC_INSTANCE_SHIFT) | 9,
bogdanm 82:6473597d706e 94 ADC0_SE12 = (0 << ADC_INSTANCE_SHIFT) | 12,
bogdanm 82:6473597d706e 95 ADC0_SE13 = (0 << ADC_INSTANCE_SHIFT) | 13,
bogdanm 82:6473597d706e 96 ADC0_SE14 = (0 << ADC_INSTANCE_SHIFT) | 14,
bogdanm 82:6473597d706e 97 ADC0_SE15 = (0 << ADC_INSTANCE_SHIFT) | 15,
bogdanm 82:6473597d706e 98 ADC0_SE16 = (0 << ADC_INSTANCE_SHIFT) | 16,
bogdanm 82:6473597d706e 99 ADC0_SE17 = (0 << ADC_INSTANCE_SHIFT) | 17,
bogdanm 82:6473597d706e 100 ADC0_SE18 = (0 << ADC_INSTANCE_SHIFT) | 18,
bogdanm 82:6473597d706e 101 ADC1_SE4b = (1 << ADC_INSTANCE_SHIFT) | 4,
bogdanm 82:6473597d706e 102 ADC1_SE5b = (1 << ADC_INSTANCE_SHIFT) | 5,
bogdanm 82:6473597d706e 103 ADC1_SE6b = (1 << ADC_INSTANCE_SHIFT) | 6,
bogdanm 82:6473597d706e 104 ADC1_SE7b = (1 << ADC_INSTANCE_SHIFT) | 7,
bogdanm 82:6473597d706e 105 ADC1_SE8 = (1 << ADC_INSTANCE_SHIFT) | 8,
bogdanm 82:6473597d706e 106 ADC1_SE9 = (1 << ADC_INSTANCE_SHIFT) | 9,
bogdanm 82:6473597d706e 107 ADC1_SE12 = (1 << ADC_INSTANCE_SHIFT) | 12,
bogdanm 82:6473597d706e 108 ADC1_SE13 = (1 << ADC_INSTANCE_SHIFT) | 13,
bogdanm 82:6473597d706e 109 ADC1_SE14 = (1 << ADC_INSTANCE_SHIFT) | 14,
bogdanm 82:6473597d706e 110 ADC1_SE15 = (1 << ADC_INSTANCE_SHIFT) | 15,
bogdanm 82:6473597d706e 111 ADC1_SE16 = (1 << ADC_INSTANCE_SHIFT) | 16,
bogdanm 82:6473597d706e 112 ADC1_SE17 = (1 << ADC_INSTANCE_SHIFT) | 17,
bogdanm 82:6473597d706e 113 ADC1_SE18 = (1 << ADC_INSTANCE_SHIFT) | 18,
bogdanm 82:6473597d706e 114 } ADCName;
bogdanm 82:6473597d706e 115
bogdanm 82:6473597d706e 116 typedef enum {
bogdanm 82:6473597d706e 117 DAC_0 = 0
bogdanm 82:6473597d706e 118 } DACName;
bogdanm 82:6473597d706e 119
bogdanm 82:6473597d706e 120
bogdanm 82:6473597d706e 121 typedef enum {
bogdanm 82:6473597d706e 122 SPI_0 = 0,
bogdanm 82:6473597d706e 123 SPI_1 = 1,
bogdanm 82:6473597d706e 124 SPI_2 = 2,
bogdanm 82:6473597d706e 125 } SPIName;
bogdanm 82:6473597d706e 126
bogdanm 82:6473597d706e 127 #ifdef __cplusplus
bogdanm 82:6473597d706e 128 }
bogdanm 82:6473597d706e 129 #endif
bogdanm 82:6473597d706e 130
bogdanm 82:6473597d706e 131 #endif