mbed library sources
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targets/hal/TARGET_RENESAS/TARGET_RZ_A1H/pwmout_api.c@390:35c2c1cf29cd, 2014-11-06 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Nov 06 11:00:10 2014 +0000
- Revision:
- 390:35c2c1cf29cd
Synchronized with git revision 8724eb616b6e07a3bd111d3022652eb5bbefe9b7
Full URL: https://github.com/mbedmicro/mbed/commit/8724eb616b6e07a3bd111d3022652eb5bbefe9b7/
[RZ/A1H] mbed-RZ first release
Who changed what in which revision?
User | Revision | Line number | New contents of line |
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mbed_official | 390:35c2c1cf29cd | 1 | /* mbed Microcontroller Library |
mbed_official | 390:35c2c1cf29cd | 2 | * Copyright (c) 2006-2013 ARM Limited |
mbed_official | 390:35c2c1cf29cd | 3 | * |
mbed_official | 390:35c2c1cf29cd | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
mbed_official | 390:35c2c1cf29cd | 5 | * you may not use this file except in compliance with the License. |
mbed_official | 390:35c2c1cf29cd | 6 | * You may obtain a copy of the License at |
mbed_official | 390:35c2c1cf29cd | 7 | * |
mbed_official | 390:35c2c1cf29cd | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
mbed_official | 390:35c2c1cf29cd | 9 | * |
mbed_official | 390:35c2c1cf29cd | 10 | * Unless required by applicable law or agreed to in writing, software |
mbed_official | 390:35c2c1cf29cd | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
mbed_official | 390:35c2c1cf29cd | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
mbed_official | 390:35c2c1cf29cd | 13 | * See the License for the specific language governing permissions and |
mbed_official | 390:35c2c1cf29cd | 14 | * limitations under the License. |
mbed_official | 390:35c2c1cf29cd | 15 | */ |
mbed_official | 390:35c2c1cf29cd | 16 | #include "mbed_assert.h" |
mbed_official | 390:35c2c1cf29cd | 17 | #include "pwmout_api.h" |
mbed_official | 390:35c2c1cf29cd | 18 | #include "cmsis.h" |
mbed_official | 390:35c2c1cf29cd | 19 | #include "pinmap.h" |
mbed_official | 390:35c2c1cf29cd | 20 | |
mbed_official | 390:35c2c1cf29cd | 21 | #include "cpg_iodefine.h" |
mbed_official | 390:35c2c1cf29cd | 22 | #include "pwm_iodefine.h" |
mbed_official | 390:35c2c1cf29cd | 23 | |
mbed_official | 390:35c2c1cf29cd | 24 | #define TCR_CNT_EN 0x00000001 |
mbed_official | 390:35c2c1cf29cd | 25 | #define TCR_RESET 0x00000002 |
mbed_official | 390:35c2c1cf29cd | 26 | |
mbed_official | 390:35c2c1cf29cd | 27 | // PORT ID, PWM ID, Pin function |
mbed_official | 390:35c2c1cf29cd | 28 | static const PinMap PinMap_PWM[] = { |
mbed_official | 390:35c2c1cf29cd | 29 | {LED_RED , 0, 4}, |
mbed_official | 390:35c2c1cf29cd | 30 | {LED_GREEN, 1, 4}, |
mbed_official | 390:35c2c1cf29cd | 31 | {LED_BLUE , 2, 4}, |
mbed_official | 390:35c2c1cf29cd | 32 | {P4_7 , 3, 4}, |
mbed_official | 390:35c2c1cf29cd | 33 | {P8_14 , 4, 6}, |
mbed_official | 390:35c2c1cf29cd | 34 | {P8_15 , 5, 6}, |
mbed_official | 390:35c2c1cf29cd | 35 | {P8_13 , 6, 6}, |
mbed_official | 390:35c2c1cf29cd | 36 | {P8_11 , 7, 6}, |
mbed_official | 390:35c2c1cf29cd | 37 | {NC, NC, 0} |
mbed_official | 390:35c2c1cf29cd | 38 | }; |
mbed_official | 390:35c2c1cf29cd | 39 | |
mbed_official | 390:35c2c1cf29cd | 40 | static __IO uint16_t PORT[] = { |
mbed_official | 390:35c2c1cf29cd | 41 | PWM2E, |
mbed_official | 390:35c2c1cf29cd | 42 | PWM2F, |
mbed_official | 390:35c2c1cf29cd | 43 | PWM2G, |
mbed_official | 390:35c2c1cf29cd | 44 | PWM2H, |
mbed_official | 390:35c2c1cf29cd | 45 | PWM1G, |
mbed_official | 390:35c2c1cf29cd | 46 | PWM1H, |
mbed_official | 390:35c2c1cf29cd | 47 | PWM1F, |
mbed_official | 390:35c2c1cf29cd | 48 | PWM1D, |
mbed_official | 390:35c2c1cf29cd | 49 | }; |
mbed_official | 390:35c2c1cf29cd | 50 | static __IO uint16_t *PWM_MATCH[] = { |
mbed_official | 390:35c2c1cf29cd | 51 | &PWMPWBFR_2E, |
mbed_official | 390:35c2c1cf29cd | 52 | &PWMPWBFR_2E, |
mbed_official | 390:35c2c1cf29cd | 53 | &PWMPWBFR_2G, |
mbed_official | 390:35c2c1cf29cd | 54 | &PWMPWBFR_2G, |
mbed_official | 390:35c2c1cf29cd | 55 | &PWMPWBFR_1G, |
mbed_official | 390:35c2c1cf29cd | 56 | &PWMPWBFR_1G, |
mbed_official | 390:35c2c1cf29cd | 57 | &PWMPWBFR_1E, |
mbed_official | 390:35c2c1cf29cd | 58 | &PWMPWBFR_1C, |
mbed_official | 390:35c2c1cf29cd | 59 | }; |
mbed_official | 390:35c2c1cf29cd | 60 | |
mbed_official | 390:35c2c1cf29cd | 61 | #define TCR_PWM_EN 0x00000008 |
mbed_official | 390:35c2c1cf29cd | 62 | |
mbed_official | 390:35c2c1cf29cd | 63 | static unsigned int pwm_clock_mhz; |
mbed_official | 390:35c2c1cf29cd | 64 | |
mbed_official | 390:35c2c1cf29cd | 65 | void pwmout_init(pwmout_t* obj, PinName pin) { |
mbed_official | 390:35c2c1cf29cd | 66 | // determine the channel |
mbed_official | 390:35c2c1cf29cd | 67 | PWMName pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM); |
mbed_official | 390:35c2c1cf29cd | 68 | MBED_ASSERT(pwm != (PWMName)NC); |
mbed_official | 390:35c2c1cf29cd | 69 | |
mbed_official | 390:35c2c1cf29cd | 70 | obj->pwm = pwm; |
mbed_official | 390:35c2c1cf29cd | 71 | obj->MR = PWM_MATCH[pwm]; |
mbed_official | 390:35c2c1cf29cd | 72 | obj->flag = (PORT[pwm]&1)<<12; |
mbed_official | 390:35c2c1cf29cd | 73 | |
mbed_official | 390:35c2c1cf29cd | 74 | // power on |
mbed_official | 390:35c2c1cf29cd | 75 | CPGSTBCR3 &= ~(1<<0); |
mbed_official | 390:35c2c1cf29cd | 76 | |
mbed_official | 390:35c2c1cf29cd | 77 | // clk mode settings PWM mode |
mbed_official | 390:35c2c1cf29cd | 78 | PWMPWCR_1_BYTE_L = 0xc4; |
mbed_official | 390:35c2c1cf29cd | 79 | PWMPWCR_2_BYTE_L = 0xc4; |
mbed_official | 390:35c2c1cf29cd | 80 | |
mbed_official | 390:35c2c1cf29cd | 81 | // output settings |
mbed_official | 390:35c2c1cf29cd | 82 | PWMPWPR_1_BYTE_L = 0x00; |
mbed_official | 390:35c2c1cf29cd | 83 | PWMPWPR_2_BYTE_L = 0x00; |
mbed_official | 390:35c2c1cf29cd | 84 | |
mbed_official | 390:35c2c1cf29cd | 85 | // cycle reg. |
mbed_official | 390:35c2c1cf29cd | 86 | PWMPWCYR_1 = 0x3ff; |
mbed_official | 390:35c2c1cf29cd | 87 | PWMPWCYR_2 = 0x3ff; |
mbed_official | 390:35c2c1cf29cd | 88 | |
mbed_official | 390:35c2c1cf29cd | 89 | //pwm_clock_mhz = SystemCoreClock / 4000000; |
mbed_official | 390:35c2c1cf29cd | 90 | |
mbed_official | 390:35c2c1cf29cd | 91 | PWMPWCR_1_BYTE_L = 0xcc; |
mbed_official | 390:35c2c1cf29cd | 92 | PWMPWCR_2_BYTE_L = 0xcc; |
mbed_official | 390:35c2c1cf29cd | 93 | // default to 20ms: standard for servos, and fine for e.g. brightness control |
mbed_official | 390:35c2c1cf29cd | 94 | //pwmout_period_ms(obj, 20); |
mbed_official | 390:35c2c1cf29cd | 95 | //pwmout_write (obj, 0); |
mbed_official | 390:35c2c1cf29cd | 96 | |
mbed_official | 390:35c2c1cf29cd | 97 | // Wire pinout |
mbed_official | 390:35c2c1cf29cd | 98 | pinmap_pinout(pin, PinMap_PWM); |
mbed_official | 390:35c2c1cf29cd | 99 | |
mbed_official | 390:35c2c1cf29cd | 100 | } |
mbed_official | 390:35c2c1cf29cd | 101 | |
mbed_official | 390:35c2c1cf29cd | 102 | void pwmout_free(pwmout_t* obj) { |
mbed_official | 390:35c2c1cf29cd | 103 | // [TODO] |
mbed_official | 390:35c2c1cf29cd | 104 | } |
mbed_official | 390:35c2c1cf29cd | 105 | |
mbed_official | 390:35c2c1cf29cd | 106 | void pwmout_write(pwmout_t* obj, float value) { |
mbed_official | 390:35c2c1cf29cd | 107 | if (value < 0.0f) { |
mbed_official | 390:35c2c1cf29cd | 108 | value = 0.0; |
mbed_official | 390:35c2c1cf29cd | 109 | } else if (value > 1.0f) { |
mbed_official | 390:35c2c1cf29cd | 110 | value = 1.0; |
mbed_official | 390:35c2c1cf29cd | 111 | } |
mbed_official | 390:35c2c1cf29cd | 112 | |
mbed_official | 390:35c2c1cf29cd | 113 | // set channel match to percentage |
mbed_official | 390:35c2c1cf29cd | 114 | uint16_t v = (uint32_t)((float)0x3ff* value); |
mbed_official | 390:35c2c1cf29cd | 115 | |
mbed_official | 390:35c2c1cf29cd | 116 | v |= (obj->flag); |
mbed_official | 390:35c2c1cf29cd | 117 | |
mbed_official | 390:35c2c1cf29cd | 118 | // workaround for PWM1[1] - Never make it equal MR0, else we get 1 cycle dropout |
mbed_official | 390:35c2c1cf29cd | 119 | *obj->MR = v; |
mbed_official | 390:35c2c1cf29cd | 120 | |
mbed_official | 390:35c2c1cf29cd | 121 | // accept on next period start |
mbed_official | 390:35c2c1cf29cd | 122 | //LPC_PWM1->LER |= 1 << obj->pwm; |
mbed_official | 390:35c2c1cf29cd | 123 | } |
mbed_official | 390:35c2c1cf29cd | 124 | |
mbed_official | 390:35c2c1cf29cd | 125 | float pwmout_read(pwmout_t* obj) { |
mbed_official | 390:35c2c1cf29cd | 126 | float v = (float)((*obj->MR&0x3ff)) / 0x3ff; |
mbed_official | 390:35c2c1cf29cd | 127 | return (v > 1.0f) ? (1.0f) : (v); |
mbed_official | 390:35c2c1cf29cd | 128 | } |
mbed_official | 390:35c2c1cf29cd | 129 | |
mbed_official | 390:35c2c1cf29cd | 130 | void pwmout_period(pwmout_t* obj, float seconds) { |
mbed_official | 390:35c2c1cf29cd | 131 | pwmout_period_us(obj, seconds * 1000000.0f); |
mbed_official | 390:35c2c1cf29cd | 132 | } |
mbed_official | 390:35c2c1cf29cd | 133 | |
mbed_official | 390:35c2c1cf29cd | 134 | void pwmout_period_ms(pwmout_t* obj, int ms) { |
mbed_official | 390:35c2c1cf29cd | 135 | pwmout_period_us(obj, ms * 1000); |
mbed_official | 390:35c2c1cf29cd | 136 | } |
mbed_official | 390:35c2c1cf29cd | 137 | |
mbed_official | 390:35c2c1cf29cd | 138 | // Set the PWM period, keeping the duty cycle the same. |
mbed_official | 390:35c2c1cf29cd | 139 | void pwmout_period_us(pwmout_t* obj, int us) { |
mbed_official | 390:35c2c1cf29cd | 140 | // calculate number of ticks |
mbed_official | 390:35c2c1cf29cd | 141 | uint16_t ticks = 0x3ff * us; |
mbed_official | 390:35c2c1cf29cd | 142 | |
mbed_official | 390:35c2c1cf29cd | 143 | // stop timer |
mbed_official | 390:35c2c1cf29cd | 144 | *obj->MR = ticks; |
mbed_official | 390:35c2c1cf29cd | 145 | |
mbed_official | 390:35c2c1cf29cd | 146 | // Scale the pulse width to preserve the duty ratio |
mbed_official | 390:35c2c1cf29cd | 147 | |
mbed_official | 390:35c2c1cf29cd | 148 | // set the channel latch to update value at next period start |
mbed_official | 390:35c2c1cf29cd | 149 | // LPC_PWM1->LER |= 1 << 0; |
mbed_official | 390:35c2c1cf29cd | 150 | |
mbed_official | 390:35c2c1cf29cd | 151 | // enable counter and pwm, clear reset |
mbed_official | 390:35c2c1cf29cd | 152 | // LPC_PWM1->TCR = TCR_CNT_EN | TCR_PWM_EN; |
mbed_official | 390:35c2c1cf29cd | 153 | } |
mbed_official | 390:35c2c1cf29cd | 154 | |
mbed_official | 390:35c2c1cf29cd | 155 | void pwmout_pulsewidth(pwmout_t* obj, float seconds) { |
mbed_official | 390:35c2c1cf29cd | 156 | pwmout_pulsewidth_us(obj, seconds * 1000000.0f); |
mbed_official | 390:35c2c1cf29cd | 157 | } |
mbed_official | 390:35c2c1cf29cd | 158 | |
mbed_official | 390:35c2c1cf29cd | 159 | void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) { |
mbed_official | 390:35c2c1cf29cd | 160 | pwmout_pulsewidth_us(obj, ms * 1000); |
mbed_official | 390:35c2c1cf29cd | 161 | } |
mbed_official | 390:35c2c1cf29cd | 162 | |
mbed_official | 390:35c2c1cf29cd | 163 | void pwmout_pulsewidth_us(pwmout_t* obj, int us) { |
mbed_official | 390:35c2c1cf29cd | 164 | // calculate number of ticks |
mbed_official | 390:35c2c1cf29cd | 165 | uint32_t v = pwm_clock_mhz * us; |
mbed_official | 390:35c2c1cf29cd | 166 | |
mbed_official | 390:35c2c1cf29cd | 167 | // workaround for PWM1[1] - Never make it equal MR0, else we get 1 cycle dropout |
mbed_official | 390:35c2c1cf29cd | 168 | |
mbed_official | 390:35c2c1cf29cd | 169 | // set the match register value |
mbed_official | 390:35c2c1cf29cd | 170 | *obj->MR = v; |
mbed_official | 390:35c2c1cf29cd | 171 | |
mbed_official | 390:35c2c1cf29cd | 172 | // set the channel latch to update value at next period start |
mbed_official | 390:35c2c1cf29cd | 173 | //LPC_PWM1->LER |= 1 << obj->pwm; |
mbed_official | 390:35c2c1cf29cd | 174 | } |