Andy K / Mbed 2 deprecated SOWB

Satellite Observers Workbench. NOT yet complete, just published for forum posters to \"cherry pick\" pieces of code as requiered as an example.

Dependencies:   mbed

usbeh/usbeh.h@0:0a841b89d614, 2010-10-11 (annotated)

Committer:
AjK
Date:
Mon Oct 11 10:34:55 2010 +0000
Revision:
0:0a841b89d614
Totally Alpha quality as this project isn\t completed. Just publishing it as it answers many questions asked in the forums

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AjK 0:0a841b89d614 1 /****************************************************************************
AjK 0:0a841b89d614 2 * Copyright 2010 Andy Kirkham, Stellar Technologies Ltd
AjK 0:0a841b89d614 3 *
AjK 0:0a841b89d614 4 * This file is part of the Satellite Observers Workbench (SOWB).
AjK 0:0a841b89d614 5 *
AjK 0:0a841b89d614 6 * SOWB is free software: you can redistribute it and/or modify
AjK 0:0a841b89d614 7 * it under the terms of the GNU General Public License as published by
AjK 0:0a841b89d614 8 * the Free Software Foundation, either version 3 of the License, or
AjK 0:0a841b89d614 9 * (at your option) any later version.
AjK 0:0a841b89d614 10 *
AjK 0:0a841b89d614 11 * SOWB is distributed in the hope that it will be useful,
AjK 0:0a841b89d614 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
AjK 0:0a841b89d614 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
AjK 0:0a841b89d614 14 * GNU General Public License for more details.
AjK 0:0a841b89d614 15 *
AjK 0:0a841b89d614 16 * You should have received a copy of the GNU General Public License
AjK 0:0a841b89d614 17 * along with SOWB. If not, see <http://www.gnu.org/licenses/>.
AjK 0:0a841b89d614 18 *
AjK 0:0a841b89d614 19 * $Id: main.cpp 5 2010-07-12 20:51:11Z ajk $
AjK 0:0a841b89d614 20 *
AjK 0:0a841b89d614 21 ***************************************************************************/
AjK 0:0a841b89d614 22
AjK 0:0a841b89d614 23 #ifndef USBEH_H
AjK 0:0a841b89d614 24 #define USBEH_H
AjK 0:0a841b89d614 25
AjK 0:0a841b89d614 26 #include "sowb.h"
AjK 0:0a841b89d614 27
AjK 0:0a841b89d614 28 /* Definitions */
AjK 0:0a841b89d614 29 #define USBEH_HcRevision LPC_USB->HcRevision
AjK 0:0a841b89d614 30 #define USBEH_HcControl LPC_USB->HcControl
AjK 0:0a841b89d614 31 #define USBEH_HcCommandStatus LPC_USB->HcCommandStatus
AjK 0:0a841b89d614 32 #define USBEH_HcInterruptStatus LPC_USB->HcInterruptStatus
AjK 0:0a841b89d614 33 #define USBEH_HcInterruptEnable LPC_USB->HcInterruptEnable
AjK 0:0a841b89d614 34 #define USBEH_HcInterruptDisable LPC_USB->HcInterruptDisable
AjK 0:0a841b89d614 35 #define USBEH_HcHCCA LPC_USB->HcHCCA
AjK 0:0a841b89d614 36 #define USBEH_entED LPC_USB->entED
AjK 0:0a841b89d614 37 #define USBEH_HcControlHeadED LPC_USB->HcControlHeadED
AjK 0:0a841b89d614 38 #define USBEH_HcControlCurrentED LPC_USB->HcControlCurrentED
AjK 0:0a841b89d614 39 #define USBEH_HcBulkHeadED LPC_USB->HcBulkHeadED
AjK 0:0a841b89d614 40 #define USBEH_HcBulkCurrentED LPC_USB->HcBulkCurrentED
AjK 0:0a841b89d614 41 #define USBEH_HcDoneHead LPC_USB->HcDoneHead
AjK 0:0a841b89d614 42 #define USBEH_HcFmInterval LPC_USB->HcFmInterval
AjK 0:0a841b89d614 43 #define USBEH_HcFmRemaining LPC_USB->HcFmRemaining
AjK 0:0a841b89d614 44 #define USBEH_HcFmNumber LPC_USB->HcFmNumber
AjK 0:0a841b89d614 45 #define USBEH_HcPeriodicStart LPC_USB->HcPeriodicStart
AjK 0:0a841b89d614 46 #define USBEH_HcLSTreshold LPC_USB->HcLSTreshold
AjK 0:0a841b89d614 47 #define USBEH_HcRhDescriptorA LPC_USB->HcRhDescriptorA
AjK 0:0a841b89d614 48 #define USBEH_HcRhDescriptorB LPC_USB->HcRhDescriptorB
AjK 0:0a841b89d614 49 #define USBEH_HcRhStatus LPC_USB->HcRhStatus
AjK 0:0a841b89d614 50 #define USBEH_HcRhPortStatus1 LPC_USB->HcRhPortStatus1
AjK 0:0a841b89d614 51 #define USBEH_HcRhPortStatus2 LPC_USB->HcRhPortStatus2
AjK 0:0a841b89d614 52 #define USBEH_Module_ID LPC_USB->Module_ID
AjK 0:0a841b89d614 53 #define USBEH_OTGIntSt LPC_USB->OTGIntSt
AjK 0:0a841b89d614 54 #define USBEH_OTGIntEn LPC_USB->OTGIntEn
AjK 0:0a841b89d614 55 #define USBEH_OTGIntSet LPC_USB->OTGIntSet
AjK 0:0a841b89d614 56 #define USBEH_OTGIntClr LPC_USB->OTGIntClr
AjK 0:0a841b89d614 57 #define USBEH_OTGStCtrl LPC_USB->OTGStCtrl
AjK 0:0a841b89d614 58 #define USBEH_OTGTmr LPC_USB->OTGTmr
AjK 0:0a841b89d614 59 #define USBEH_USBDevIntSt LPC_USB->USBDevIntSt
AjK 0:0a841b89d614 60 #define USBEH_USBDevIntEn LPC_USB->USBDevIntEn
AjK 0:0a841b89d614 61 #define USBEH_USBDevIntClr LPC_USB->USBDevIntClr
AjK 0:0a841b89d614 62 #define USBEH_USBDevIntSet LPC_USB->USBDevIntSet
AjK 0:0a841b89d614 63 #define USBEH_USBCmdCode LPC_USB->USBCmdCode
AjK 0:0a841b89d614 64 #define USBEH_USBCmdData LPC_USB->USBCmdData
AjK 0:0a841b89d614 65 #define USBEH_USBRxData LPC_USB->USBRxData
AjK 0:0a841b89d614 66 #define USBEH_USBTxData LPC_USB->USBTxData
AjK 0:0a841b89d614 67 #define USBEH_USBRxPLen LPC_USB->USBRxPLen
AjK 0:0a841b89d614 68 #define USBEH_USBTxPLen LPC_USB->USBTxPLen
AjK 0:0a841b89d614 69 #define USBEH_USBCtrl LPC_USB->USBCtrl
AjK 0:0a841b89d614 70 #define USBEH_USBDevIntPri LPC_USB->USBDevIntPri
AjK 0:0a841b89d614 71 #define USBEH_USBEpIntSt LPC_USB->USBEpIntSt
AjK 0:0a841b89d614 72 #define USBEH_USBEpIntEn LPC_USB->USBEpIntEn
AjK 0:0a841b89d614 73 #define USBEH_USBEpIntClr LPC_USB->USBEpIntClr
AjK 0:0a841b89d614 74 #define USBEH_USBEpIntSet LPC_USB->USBEpIntSet
AjK 0:0a841b89d614 75 #define USBEH_USBEpIntPri LPC_USB->USBEpIntPri
AjK 0:0a841b89d614 76 #define USBEH_USBReEp LPC_USB->USBReEp
AjK 0:0a841b89d614 77 #define USBEH_USBEpInd LPC_USB->USBEpInd
AjK 0:0a841b89d614 78 #define USBEH_USBMaxPSize LPC_USB->USBMaxPSize
AjK 0:0a841b89d614 79 #define USBEH_USBDMARSt LPC_USB->USBDMARSt
AjK 0:0a841b89d614 80 #define USBEH_USBDMARClr LPC_USB->USBDMARClr
AjK 0:0a841b89d614 81 #define USBEH_USBDMARSet LPC_USB->USBDMARSet
AjK 0:0a841b89d614 82 #define USBEH_USBUDCAH LPC_USB->USBUDCAH
AjK 0:0a841b89d614 83 #define USBEH_USBEpDMASt LPC_USB->USBEpDMASt
AjK 0:0a841b89d614 84 #define USBEH_USBEpDMAEn LPC_USB->USBEpDMAEn
AjK 0:0a841b89d614 85 #define USBEH_USBEpDMADis LPC_USB->USBEpDMADis
AjK 0:0a841b89d614 86 #define USBEH_USBDMAIntSt LPC_USB->USBDMAIntSt
AjK 0:0a841b89d614 87 #define USBEH_USBDMAIntEn LPC_USB->USBDMAIntEn
AjK 0:0a841b89d614 88 #define USBEH_USBEoTIntSt LPC_USB->USBEoTIntSt
AjK 0:0a841b89d614 89 #define USBEH_USBEoTIntClr LPC_USB->USBEoTIntClr
AjK 0:0a841b89d614 90 #define USBEH_USBEoTIntSet LPC_USB->USBEoTIntSet
AjK 0:0a841b89d614 91 #define USBEH_USBNDDRIntSt LPC_USB->USBNDDRIntSt
AjK 0:0a841b89d614 92 #define USBEH_USBNDDRIntClr LPC_USB->USBNDDRIntClr
AjK 0:0a841b89d614 93 #define USBEH_USBNDDRIntSet LPC_USB->USBNDDRIntSet
AjK 0:0a841b89d614 94 #define USBEH_USBSysErrIntSt LPC_USB->USBSysErrIntSt
AjK 0:0a841b89d614 95 #define USBEH_USBSysErrIntClr LPC_USB->USBSysErrIntClr
AjK 0:0a841b89d614 96 #define USBEH_USBSysErrIntSet LPC_USB->USBSysErrIntSet
AjK 0:0a841b89d614 97 #define USBEH_I2C_RX LPC_USB->I2C_RX
AjK 0:0a841b89d614 98 #define USBEH_I2C_WO LPC_USB->I2C_WO
AjK 0:0a841b89d614 99 #define USBEH_I2C_STS LPC_USB->I2C_STS
AjK 0:0a841b89d614 100 #define USBEH_I2C_CTL LPC_USB->I2C_CTL
AjK 0:0a841b89d614 101 #define USBEH_I2C_CLKHI LPC_USB->I2C_CLKHI
AjK 0:0a841b89d614 102 #define USBEH_I2C_CLKLO LPC_USB->I2C_CLKLO
AjK 0:0a841b89d614 103 #define USBEH_USBClkCtrl LPC_USB->USBClkCtrl
AjK 0:0a841b89d614 104 #define USBEH_OTGClkCtrl LPC_USB->OTGClkCtrl
AjK 0:0a841b89d614 105 #define USBEH_USBClkSt LPC_USB->USBClkSt
AjK 0:0a841b89d614 106 #define USBEH_OTGClkSt LPC_USB->OTGClkSt
AjK 0:0a841b89d614 107
AjK 0:0a841b89d614 108 void user_wait_ms(uint32_t ms);
AjK 0:0a841b89d614 109 //#define USBEH_OS_DELAY_MS(x) wait_ms(x);
AjK 0:0a841b89d614 110 #define USBEH_OS_DELAY_MS(x) user_wait_ms(x);
AjK 0:0a841b89d614 111
AjK 0:0a841b89d614 112 #define USBEH_U32 uint32_t
AjK 0:0a841b89d614 113 #define USBEH_U16 unsigned short int
AjK 0:0a841b89d614 114 #define USBEH_U08 unsigned char
AjK 0:0a841b89d614 115 #define USBEH_S32 int32_t
AjK 0:0a841b89d614 116 #define USBEH_S16 short int
AjK 0:0a841b89d614 117 #define USBEH_S08 char
AjK 0:0a841b89d614 118
AjK 0:0a841b89d614 119 #define USBEH_MAX_ENDPOINTS_TOTAL 16
AjK 0:0a841b89d614 120 #define USBEH_MAX_DEVICES 8
AjK 0:0a841b89d614 121 #define USBEH_MAX_ENDPOINTS_PER_DEVICE 8
AjK 0:0a841b89d614 122
AjK 0:0a841b89d614 123 #define USBEH_ENDPOINT_CONTROL 0
AjK 0:0a841b89d614 124 #define USBEH_ENDPOINT_ISOCRONOUS 1
AjK 0:0a841b89d614 125 #define USBEH_ENDPOINT_BULK 2
AjK 0:0a841b89d614 126 #define USBEH_ENDPOINT_INTERRUPT 3
AjK 0:0a841b89d614 127
AjK 0:0a841b89d614 128 #define USBEH_DESCRIPTOR_TYPE_DEVICE 1
AjK 0:0a841b89d614 129 #define USBEH_DESCRIPTOR_TYPE_CONFIGURATION 2
AjK 0:0a841b89d614 130 #define USBEH_DESCRIPTOR_TYPE_STRING 3
AjK 0:0a841b89d614 131 #define USBEH_DESCRIPTOR_TYPE_INTERFACE 4
AjK 0:0a841b89d614 132 #define USBEH_DESCRIPTOR_TYPE_ENDPOINT 5
AjK 0:0a841b89d614 133
AjK 0:0a841b89d614 134 #define USBEH_DESCRIPTOR_TYPE_HID 0x21
AjK 0:0a841b89d614 135 #define USBEH_DESCRIPTOR_TYPE_REPORT 0x22
AjK 0:0a841b89d614 136 #define USBEH_DESCRIPTOR_TYPE_PHYSICAL 0x23
AjK 0:0a841b89d614 137 #define USBEH_DESCRIPTOR_TYPE_HUB 0x29
AjK 0:0a841b89d614 138
AjK 0:0a841b89d614 139 #define USBEH_HOST_CLK_EN (1 << 0)
AjK 0:0a841b89d614 140 #define USBEH_PORTSEL_CLK_EN (1 << 3)
AjK 0:0a841b89d614 141 #define USBEH_AHB_CLK_EN (1 << 4)
AjK 0:0a841b89d614 142 #define USBEH_CLOCK_MASK (USBEH_HOST_CLK_EN | USBEH_PORTSEL_CLK_EN | USBEH_AHB_CLK_EN)
AjK 0:0a841b89d614 143 #define USBEH_FRAMEINTERVAL (12000-1) // 1ms
AjK 0:0a841b89d614 144 #define USBEH_DEFAULT_FMINTERVAL ((((6 * (USBEH_FRAMEINTERVAL - 210)) / 7) << 16) | USBEH_FRAMEINTERVAL)
AjK 0:0a841b89d614 145 #define USBEH_HOST_CONTROLLER_RESET 0x01
AjK 0:0a841b89d614 146 #define USBEH_HOST_CONTROLLER_FUNCTIONAL_STATE 0xC0
AjK 0:0a841b89d614 147 #define USBEH_OPERATIONAL_MASK 0x80
AjK 0:0a841b89d614 148 #define USBEH_SET_GLOBAL_POWER 0x00010000
AjK 0:0a841b89d614 149
AjK 0:0a841b89d614 150 #define USBEH_WRITEBACK_DONE_HEAD 0x00000002
AjK 0:0a841b89d614 151 #define USBEH_START_OF_FRAME 0x00000004
AjK 0:0a841b89d614 152 #define USBEH_RESUME_DETECTED 0x00000008
AjK 0:0a841b89d614 153 #define USBEH_UNRECOVERABLE_ERROR 0x00000010
AjK 0:0a841b89d614 154 #define USBEH_FRAME_NUMBER_OVERFLOW 0x00000020
AjK 0:0a841b89d614 155 #define USBEH_ROOT_HUB_STATUS_CHANGE 0x00000040
AjK 0:0a841b89d614 156 #define USBEH_OWNERSHIP_CHANGE 0x00000080
AjK 0:0a841b89d614 157 #define USBEH_MASTER_IRQ_ENABLE 0x80000000
AjK 0:0a841b89d614 158
AjK 0:0a841b89d614 159 enum USB_CLASS_CODE {
AjK 0:0a841b89d614 160 CLASS_DEVICE,
AjK 0:0a841b89d614 161 CLASS_AUDIO,
AjK 0:0a841b89d614 162 CLASS_COMM_AND_CDC_CONTROL,
AjK 0:0a841b89d614 163 CLASS_HID,
AjK 0:0a841b89d614 164 CLASS_PHYSICAL = 0x05,
AjK 0:0a841b89d614 165 CLASS_STILL_IMAGING,
AjK 0:0a841b89d614 166 CLASS_PRINTER,
AjK 0:0a841b89d614 167 CLASS_MASS_STORAGE,
AjK 0:0a841b89d614 168 CLASS_HUB,
AjK 0:0a841b89d614 169 CLASS_CDC_DATA,
AjK 0:0a841b89d614 170 CLASS_SMART_CARD,
AjK 0:0a841b89d614 171 CLASS_CONTENT_SECURITY = 0x0D,
AjK 0:0a841b89d614 172 CLASS_VIDEO = 0x0E,
AjK 0:0a841b89d614 173 CLASS_DIAGNOSTIC_DEVICE = 0xDC,
AjK 0:0a841b89d614 174 CLASS_WIRELESS_CONTROLLER = 0xE0,
AjK 0:0a841b89d614 175 CLASS_MISCELLANEOUS = 0xEF,
AjK 0:0a841b89d614 176 CLASS_APP_SPECIFIC = 0xFE,
AjK 0:0a841b89d614 177 CLASS_VENDOR_SPECIFIC = 0xFF
AjK 0:0a841b89d614 178 };
AjK 0:0a841b89d614 179
AjK 0:0a841b89d614 180 #define USBEH_DEVICE_TO_HOST 0x80
AjK 0:0a841b89d614 181 #define USBEH_HOST_TO_DEVICE 0x00
AjK 0:0a841b89d614 182 #define USBEH_REQUEST_TYPE_CLASS 0x20
AjK 0:0a841b89d614 183 #define USBEH_RECIPIENT_DEVICE 0x00
AjK 0:0a841b89d614 184 #define USBEH_RECIPIENT_INTERFACE 0x01
AjK 0:0a841b89d614 185 #define USBEH_RECIPIENT_ENDPOINT 0x02
AjK 0:0a841b89d614 186 #define USBEH_RECIPIENT_OTHER 0x03
AjK 0:0a841b89d614 187
AjK 0:0a841b89d614 188 #define USBEH_SETUP_TYPE_MASK_STANDARD 0x00
AjK 0:0a841b89d614 189 #define USBEH_SETUP_TYPE_MASK_CLASS 0x20
AjK 0:0a841b89d614 190 #define USBEH_SETUP_TYPE_MASK_VENDOR 0x40
AjK 0:0a841b89d614 191 #define USBEH_SETUP_TYPE_MASK_RESERVED 0x60
AjK 0:0a841b89d614 192
AjK 0:0a841b89d614 193 #define USBEH_GET_STATUS 0
AjK 0:0a841b89d614 194 #define USBEH_CLEAR_FEATURE 1
AjK 0:0a841b89d614 195 #define USBEH_SET_FEATURE 3
AjK 0:0a841b89d614 196 #define USBEH_SET_ADDRESS 5
AjK 0:0a841b89d614 197 #define USBEH_GET_DESCRIPTOR 6
AjK 0:0a841b89d614 198 #define USBEH_SET_DESCRIPTOR 7
AjK 0:0a841b89d614 199 #define USBEH_GET_CONFIGURATION 8
AjK 0:0a841b89d614 200 #define USBEH_SET_CONFIGURATION 9
AjK 0:0a841b89d614 201 #define USBEH_GET_INTERFACE 10
AjK 0:0a841b89d614 202 #define USBEH_SET_INTERFACE 11
AjK 0:0a841b89d614 203 #define USBEH_SYNCH_FRAME 11
AjK 0:0a841b89d614 204
AjK 0:0a841b89d614 205 // Status flags from hub
AjK 0:0a841b89d614 206 #define USBEH_PORT_CONNECTION 0
AjK 0:0a841b89d614 207 #define USBEH_PORT_ENABLE 1
AjK 0:0a841b89d614 208 #define USBEH_PORT_SUSPEND 2
AjK 0:0a841b89d614 209 #define USBEH_PORT_OVER_CURRENT 3
AjK 0:0a841b89d614 210 #define USBEH_PORT_RESET 4
AjK 0:0a841b89d614 211 #define USBEH_PORT_POWER 8
AjK 0:0a841b89d614 212 #define USBEH_PORT_LOW_SPEED 9
AjK 0:0a841b89d614 213
AjK 0:0a841b89d614 214 #define USBEH_C_PORT_CONNECTION 16
AjK 0:0a841b89d614 215 #define USBEH_C_PORT_ENABLE 17
AjK 0:0a841b89d614 216 #define USBEH_C_PORT_SUSPEND 18
AjK 0:0a841b89d614 217 #define USBEH_C_PORT_OVER_CURRENT 19
AjK 0:0a841b89d614 218 #define USBEH_C_PORT_RESET 20
AjK 0:0a841b89d614 219
AjK 0:0a841b89d614 220 #define USBEH_IO_PENDING -100
AjK 0:0a841b89d614 221 #define USBEH_ERR_ENDPOINT_NONE_LEFT -101
AjK 0:0a841b89d614 222 #define USBEH_ERR_ENDPOINT_NOT_FOUND -102
AjK 0:0a841b89d614 223 #define USBEH_ERR_DEVICE_NOT_FOUND -103
AjK 0:0a841b89d614 224 #define USBEH_ERR_DEVICE_NONE_LEFT -104
AjK 0:0a841b89d614 225 #define USBEH_ERR_HUB_INIT_FAILED -105
AjK 0:0a841b89d614 226 #define USBEH_ERR_INTERFACE_NOT_FOUND -106
AjK 0:0a841b89d614 227
AjK 0:0a841b89d614 228 #define USBEH_TOKEN_SETUP 0
AjK 0:0a841b89d614 229 #define USBEH_TOKEN_IN 1
AjK 0:0a841b89d614 230 #define USBEH_TOKEN_OUT 2
AjK 0:0a841b89d614 231
AjK 0:0a841b89d614 232 #define USBEH_TD_ROUNDING (USBEH_U32)0x00040000
AjK 0:0a841b89d614 233 #define USBEH_TD_SETUP (USBEH_U32)0x00000000
AjK 0:0a841b89d614 234 #define USBEH_TD_IN (USBEH_U32)0x00100000
AjK 0:0a841b89d614 235 #define USBEH_TD_OUT (USBEH_U32)0x00080000
AjK 0:0a841b89d614 236 #define USBEH_TD_DELAY_INT(x) (USBEH_U32)((x) << 21)
AjK 0:0a841b89d614 237 #define USBEH_TD_TOGGLE_0 (USBEH_U32)0x02000000
AjK 0:0a841b89d614 238 #define USBEH_TD_TOGGLE_1 (USBEH_U32)0x03000000
AjK 0:0a841b89d614 239 #define USBEH_TD_CC (USBEH_U32)0xF0000000
AjK 0:0a841b89d614 240
AjK 0:0a841b89d614 241 typedef struct {
AjK 0:0a841b89d614 242 USBEH_U08 bLength;
AjK 0:0a841b89d614 243 USBEH_U08 bDescriptorType;
AjK 0:0a841b89d614 244 USBEH_U16 bcdUSB;
AjK 0:0a841b89d614 245 USBEH_U08 bDeviceClass;
AjK 0:0a841b89d614 246 USBEH_U08 bDeviceSubClass;
AjK 0:0a841b89d614 247 USBEH_U08 bDeviceProtocol;
AjK 0:0a841b89d614 248 USBEH_U08 bMaxPacketSize;
AjK 0:0a841b89d614 249 USBEH_U16 idVendor;
AjK 0:0a841b89d614 250 USBEH_U16 idProduct;
AjK 0:0a841b89d614 251 USBEH_U16 bcdDevice;
AjK 0:0a841b89d614 252 USBEH_U08 iManufacturer;
AjK 0:0a841b89d614 253 USBEH_U08 iProduct;
AjK 0:0a841b89d614 254 USBEH_U08 iSerialNumber;
AjK 0:0a841b89d614 255 USBEH_U08 bNumConfigurations;
AjK 0:0a841b89d614 256 } USBEH_deviceDescriptor;
AjK 0:0a841b89d614 257
AjK 0:0a841b89d614 258 typedef struct {
AjK 0:0a841b89d614 259 USBEH_U08 bLength;
AjK 0:0a841b89d614 260 USBEH_U08 bDescriptorType;
AjK 0:0a841b89d614 261 USBEH_U16 wTotalLength;
AjK 0:0a841b89d614 262 USBEH_U08 bNumInterfaces;
AjK 0:0a841b89d614 263 USBEH_U08 bConfigurationValue;
AjK 0:0a841b89d614 264 USBEH_U08 iConfiguration;
AjK 0:0a841b89d614 265 USBEH_U08 bmAttributes;
AjK 0:0a841b89d614 266 USBEH_U08 bMaxPower;
AjK 0:0a841b89d614 267 } USBEH_configurationDescriptor;
AjK 0:0a841b89d614 268
AjK 0:0a841b89d614 269 typedef struct {
AjK 0:0a841b89d614 270 USBEH_U08 bLength;
AjK 0:0a841b89d614 271 USBEH_U08 bDescriptorType;
AjK 0:0a841b89d614 272 USBEH_U08 bInterfaceNumber;
AjK 0:0a841b89d614 273 USBEH_U08 bAlternateSetting;
AjK 0:0a841b89d614 274 USBEH_U08 bNumEndpoints;
AjK 0:0a841b89d614 275 USBEH_U08 bInterfaceClass;
AjK 0:0a841b89d614 276 USBEH_U08 bInterfaceSubClass;
AjK 0:0a841b89d614 277 USBEH_U08 bInterfaceProtocol;
AjK 0:0a841b89d614 278 USBEH_U08 iInterface;
AjK 0:0a841b89d614 279 } USBEH_interfaceDescriptor;
AjK 0:0a841b89d614 280
AjK 0:0a841b89d614 281 typedef struct {
AjK 0:0a841b89d614 282 USBEH_U08 bLength;
AjK 0:0a841b89d614 283 USBEH_U08 bDescriptorType;
AjK 0:0a841b89d614 284 USBEH_U08 bEndpointAddress;
AjK 0:0a841b89d614 285 USBEH_U08 bmAttributes;
AjK 0:0a841b89d614 286 USBEH_U16 wMaxPacketSize;
AjK 0:0a841b89d614 287 USBEH_U08 bInterval;
AjK 0:0a841b89d614 288 } USBEH_endpointDescriptor;
AjK 0:0a841b89d614 289
AjK 0:0a841b89d614 290 typedef struct {
AjK 0:0a841b89d614 291 USBEH_U08 bLength;
AjK 0:0a841b89d614 292 USBEH_U08 bDescriptorType;
AjK 0:0a841b89d614 293 USBEH_U16 bcdHID;
AjK 0:0a841b89d614 294 USBEH_U08 bCountryCode;
AjK 0:0a841b89d614 295 USBEH_U08 bNumDescriptors;
AjK 0:0a841b89d614 296 USBEH_U08 bDescriptorType2;
AjK 0:0a841b89d614 297 USBEH_U16 wDescriptorLength;
AjK 0:0a841b89d614 298 } USBEH_HIDDescriptor;
AjK 0:0a841b89d614 299
AjK 0:0a841b89d614 300 typedef struct {
AjK 0:0a841b89d614 301 volatile USBEH_U32 control;
AjK 0:0a841b89d614 302 volatile USBEH_U32 tailTd;
AjK 0:0a841b89d614 303 volatile USBEH_U32 headTd;
AjK 0:0a841b89d614 304 volatile USBEH_U32 next;
AjK 0:0a841b89d614 305 } USBEH_HCED;
AjK 0:0a841b89d614 306
AjK 0:0a841b89d614 307 typedef struct {
AjK 0:0a841b89d614 308 volatile USBEH_U32 control;
AjK 0:0a841b89d614 309 volatile USBEH_U32 currentBufferPointer;
AjK 0:0a841b89d614 310 volatile USBEH_U32 next;
AjK 0:0a841b89d614 311 volatile USBEH_U32 bufferEnd;
AjK 0:0a841b89d614 312 } USBEH_HCTD;
AjK 0:0a841b89d614 313
AjK 0:0a841b89d614 314 typedef struct {
AjK 0:0a841b89d614 315 volatile USBEH_U32 interruptTable[32];
AjK 0:0a841b89d614 316 volatile USBEH_U16 frameNumber;
AjK 0:0a841b89d614 317 volatile USBEH_U16 frameNumberPad;
AjK 0:0a841b89d614 318 volatile USBEH_U32 doneHead;
AjK 0:0a841b89d614 319 volatile USBEH_U08 Reserved[120];
AjK 0:0a841b89d614 320 } USBEH_HCCA;
AjK 0:0a841b89d614 321
AjK 0:0a841b89d614 322 typedef struct {
AjK 0:0a841b89d614 323 USBEH_U08 bm_request_type;
AjK 0:0a841b89d614 324 USBEH_U08 b_request;
AjK 0:0a841b89d614 325 USBEH_U16 w_value;
AjK 0:0a841b89d614 326 USBEH_U16 w_index;
AjK 0:0a841b89d614 327 USBEH_U16 w_length;
AjK 0:0a841b89d614 328 } USBEH_Setup;
AjK 0:0a841b89d614 329
AjK 0:0a841b89d614 330 typedef void (*USBEH_callback)(int device, int endpoint, int status, USBEH_U08* data, int len, void* userData);
AjK 0:0a841b89d614 331
AjK 0:0a841b89d614 332 #define USBEH_SOF_COUNTER_INC 1
AjK 0:0a841b89d614 333 #define USBEH_SOF_COUNTER_DEC 2
AjK 0:0a841b89d614 334 #define USBEH_SOF_COUNTER_DEC_HALT_AT_ZERO 4
AjK 0:0a841b89d614 335 #define USBEH_SOF_COUNTER_RELOAD 8
AjK 0:0a841b89d614 336
AjK 0:0a841b89d614 337 typedef struct _sof_counter {
AjK 0:0a841b89d614 338 USBEH_U08 mode;
AjK 0:0a841b89d614 339 USBEH_U08 flag;
AjK 0:0a841b89d614 340 USBEH_U32 counter;
AjK 0:0a841b89d614 341 USBEH_U32 reload;
AjK 0:0a841b89d614 342 USBEH_U32 userData;
AjK 0:0a841b89d614 343 void (*callback)(struct _sof_counter *);
AjK 0:0a841b89d614 344 _sof_counter *next;
AjK 0:0a841b89d614 345 } USBEH_SOF_COUNTER;
AjK 0:0a841b89d614 346
AjK 0:0a841b89d614 347 //typedef void (*USBCallback)(int device, int endpoint, int status, USBEH_U08* data, int len, void* userData);
AjK 0:0a841b89d614 348
AjK 0:0a841b89d614 349
AjK 0:0a841b89d614 350 // Macros.
AjK 0:0a841b89d614 351
AjK 0:0a841b89d614 352 #define USBEH_CURRENT_CONNECT_STATUS 0x01
AjK 0:0a841b89d614 353 #define USBEH_CONNECT_STATUS_CHANGE (USBEH_CURRENT_CONNECT_STATUS << 16)
AjK 0:0a841b89d614 354 #define USBEH_PORT_RESET_STATUS 0x10
AjK 0:0a841b89d614 355 #define USBEH_PORT_RESET_STATUS_CAHNGE (USBEH_PORT_RESET_STATUS << 16)
AjK 0:0a841b89d614 356 #define USBEH_CONTROL_LIST_ENABLE 0x10
AjK 0:0a841b89d614 357 #define USBEH_CONTROL_LIST_FILLED 0x02;
AjK 0:0a841b89d614 358 #define USBEH_BULK_LIST_ENABLE 0x20
AjK 0:0a841b89d614 359 #define USBEH_BULK_LIST_FILLED 0x04
AjK 0:0a841b89d614 360 #define USBEH_PERIODIC_LIST_ENABLE 0x04
AjK 0:0a841b89d614 361 #define USBEH_PORT_RESET_STATUS 0x10
AjK 0:0a841b89d614 362 #define USBEH_PORT_RESET_STATUS_CHANGE (USBEH_PORT_RESET_STATUS << 16)
AjK 0:0a841b89d614 363 #define USBEH_LOW_SPEED_DEVICE 0x200
AjK 0:0a841b89d614 364 #define USBEH_HIGH_SPEED_DEVICE 0x400
AjK 0:0a841b89d614 365
AjK 0:0a841b89d614 366 #endif