mbed library sources

Dependents:   SPI_slave_frdm

Fork of mbed-src by mbed official

Committer:
mbed_official
Date:
Sat Mar 28 08:15:07 2015 +0000
Revision:
499:d0e9408fd176
Parent:
227:7bd0639b8911
Synchronized with git revision 95bb89d4a89b0584563bfd552f148d262310ded9

Full URL: https://github.com/mbedmicro/mbed/commit/95bb89d4a89b0584563bfd552f148d262310ded9/

Hal - K20XX/K?DR Fixed deepsleep power consumption when AnalogIn is used

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 82:0b31dbcd4769 1 /* mbed Microcontroller Library
mbed_official 82:0b31dbcd4769 2 * Copyright (c) 2006-2013 ARM Limited
mbed_official 82:0b31dbcd4769 3 *
mbed_official 82:0b31dbcd4769 4 * Licensed under the Apache License, Version 2.0 (the "License");
mbed_official 82:0b31dbcd4769 5 * you may not use this file except in compliance with the License.
mbed_official 82:0b31dbcd4769 6 * You may obtain a copy of the License at
mbed_official 82:0b31dbcd4769 7 *
mbed_official 82:0b31dbcd4769 8 * http://www.apache.org/licenses/LICENSE-2.0
mbed_official 82:0b31dbcd4769 9 *
mbed_official 82:0b31dbcd4769 10 * Unless required by applicable law or agreed to in writing, software
mbed_official 82:0b31dbcd4769 11 * distributed under the License is distributed on an "AS IS" BASIS,
mbed_official 82:0b31dbcd4769 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
mbed_official 82:0b31dbcd4769 13 * See the License for the specific language governing permissions and
mbed_official 82:0b31dbcd4769 14 * limitations under the License.
mbed_official 82:0b31dbcd4769 15 */
mbed_official 227:7bd0639b8911 16 #include "mbed_assert.h"
mbed_official 82:0b31dbcd4769 17 #include "analogin_api.h"
mbed_official 82:0b31dbcd4769 18
mbed_official 82:0b31dbcd4769 19 #include "cmsis.h"
mbed_official 82:0b31dbcd4769 20 #include "pinmap.h"
mbed_official 82:0b31dbcd4769 21 #include "clk_freqs.h"
mbed_official 82:0b31dbcd4769 22 #include "PeripheralPins.h"
mbed_official 82:0b31dbcd4769 23
mbed_official 82:0b31dbcd4769 24 #define MAX_FADC 6000000
mbed_official 82:0b31dbcd4769 25 #define CHANNELS_A_SHIFT 5
mbed_official 82:0b31dbcd4769 26
mbed_official 82:0b31dbcd4769 27
mbed_official 82:0b31dbcd4769 28 void analogin_init(analogin_t *obj, PinName pin) {
mbed_official 82:0b31dbcd4769 29 obj->adc = (ADCName)pinmap_peripheral(pin, PinMap_ADC);
mbed_official 227:7bd0639b8911 30 MBED_ASSERT(obj->adc != (ADCName)NC);
mbed_official 82:0b31dbcd4769 31
mbed_official 82:0b31dbcd4769 32 SIM->SCGC6 |= SIM_SCGC6_ADC0_MASK;
mbed_official 82:0b31dbcd4769 33
mbed_official 82:0b31dbcd4769 34 uint32_t port = (uint32_t)pin >> PORT_SHIFT;
mbed_official 82:0b31dbcd4769 35 SIM->SCGC5 |= 1 << (SIM_SCGC5_PORTA_SHIFT + port);
mbed_official 82:0b31dbcd4769 36
mbed_official 82:0b31dbcd4769 37 uint32_t cfg2_muxsel = ADC_CFG2_MUXSEL_MASK;
mbed_official 82:0b31dbcd4769 38 if (obj->adc & (1 << CHANNELS_A_SHIFT)) {
mbed_official 82:0b31dbcd4769 39 cfg2_muxsel = 0;
mbed_official 82:0b31dbcd4769 40 }
mbed_official 82:0b31dbcd4769 41
mbed_official 82:0b31dbcd4769 42 // bus clk
mbed_official 82:0b31dbcd4769 43 uint32_t PCLK = bus_frequency();
mbed_official 82:0b31dbcd4769 44 uint32_t clkdiv;
mbed_official 82:0b31dbcd4769 45 for (clkdiv = 0; clkdiv < 4; clkdiv++) {
mbed_official 82:0b31dbcd4769 46 if ((PCLK >> clkdiv) <= MAX_FADC)
mbed_official 82:0b31dbcd4769 47 break;
mbed_official 82:0b31dbcd4769 48 }
mbed_official 82:0b31dbcd4769 49 if (clkdiv == 4) //Set max div
mbed_official 82:0b31dbcd4769 50 clkdiv = 0x7;
mbed_official 82:0b31dbcd4769 51
mbed_official 82:0b31dbcd4769 52 ADC0->SC1[1] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
mbed_official 82:0b31dbcd4769 53
mbed_official 82:0b31dbcd4769 54 ADC0->CFG1 = ADC_CFG1_ADLPC_MASK // Low-Power Configuration
mbed_official 82:0b31dbcd4769 55 | ADC_CFG1_ADIV(clkdiv & 0x3) // Clock Divide Select: (Input Clock)/8
mbed_official 82:0b31dbcd4769 56 | ADC_CFG1_ADLSMP_MASK // Long Sample Time
mbed_official 82:0b31dbcd4769 57 | ADC_CFG1_MODE(3) // (16)bits Resolution
mbed_official 82:0b31dbcd4769 58 | ADC_CFG1_ADICLK(clkdiv >> 2); // Input Clock: (Bus Clock)/2
mbed_official 82:0b31dbcd4769 59
mbed_official 82:0b31dbcd4769 60 ADC0->CFG2 = cfg2_muxsel // ADxxb or ADxxa channels
mbed_official 82:0b31dbcd4769 61 | ADC_CFG2_ADHSC_MASK // High-Speed Configuration
mbed_official 82:0b31dbcd4769 62 | ADC_CFG2_ADLSTS(0); // Long Sample Time Select
mbed_official 82:0b31dbcd4769 63
mbed_official 82:0b31dbcd4769 64 ADC0->SC2 = ADC_SC2_REFSEL(0); // Default Voltage Reference
mbed_official 82:0b31dbcd4769 65
mbed_official 82:0b31dbcd4769 66 ADC0->SC3 = ADC_SC3_AVGE_MASK // Hardware Average Enable
mbed_official 82:0b31dbcd4769 67 | ADC_SC3_AVGS(0); // 4 Samples Averaged
mbed_official 82:0b31dbcd4769 68
mbed_official 82:0b31dbcd4769 69 pinmap_pinout(pin, PinMap_ADC);
mbed_official 82:0b31dbcd4769 70 }
mbed_official 82:0b31dbcd4769 71
mbed_official 82:0b31dbcd4769 72 uint16_t analogin_read_u16(analogin_t *obj) {
mbed_official 82:0b31dbcd4769 73 // start conversion
mbed_official 82:0b31dbcd4769 74 ADC0->SC1[0] = ADC_SC1_ADCH(obj->adc & ~(1 << CHANNELS_A_SHIFT));
mbed_official 82:0b31dbcd4769 75
mbed_official 82:0b31dbcd4769 76 // Wait Conversion Complete
mbed_official 82:0b31dbcd4769 77 while ((ADC0->SC1[0] & ADC_SC1_COCO_MASK) != ADC_SC1_COCO_MASK);
mbed_official 82:0b31dbcd4769 78
mbed_official 82:0b31dbcd4769 79 // Return value
mbed_official 82:0b31dbcd4769 80 return (uint16_t)ADC0->R[0];
mbed_official 82:0b31dbcd4769 81 }
mbed_official 82:0b31dbcd4769 82
mbed_official 82:0b31dbcd4769 83 float analogin_read(analogin_t *obj) {
mbed_official 82:0b31dbcd4769 84 uint16_t value = analogin_read_u16(obj);
mbed_official 82:0b31dbcd4769 85 return (float)value * (1.0f / (float)0xFFFF);
mbed_official 82:0b31dbcd4769 86 }
mbed_official 82:0b31dbcd4769 87