Multiple SPI buses with interrupts

23 Mar 2012

I have an application in which I would like to operate two SPI buses concurrently. One will be used to communicate with the uSD card on the Cool Components mbed LPC1768 Workshop Development Board. The other will communicate with an ADIS16355 IMU using interrupts to signal when a data transfer is complete. The LPC1768 block diagram shows two available SPI buses. However, the NXP LPC176x User Manual pg. 401 states

"SSP0 is intended to be used as an alternative for the SPI interface, which is included as a legacy peripheral. Only one of these peripherals can be used at the any one time."

Furthermore, there is only a SPI0 device indicated on the block diagram on pg. 8. There is no "SPI1". So from all of this, I infer that the mbed SPI driver is using the lpc17xx SSP interfaces SSP0 and SSP1 configured for the SPI mode of operation. Am I correct?

The reason this matters is that if I'm going to hack the interrupt registers, I need to know which device I should be working with. Since there is no SPI1 hardware on the lpc17xx the SPI driver must be using the SSP1 hardware for the spi(p11,p12,p13) interface. However, the driver could be using either the SPI0 or SSP0 hardware for the spi(p5,p6,p7) interface, though this matters little to me since I don't plan to hack the interrupts on that interface.

TIA - Hugh

23 Mar 2012

SPI or SSP0 is on DIP11 to 14

SSP1 is at DIP5 to 8

look at my other post to use low level register editing to enable interrupts etc

also, be familiar with the LPC17XX.h and the LPC176X reference manual.