Víctor Najarro / MMA8451Q-Vinajarr

MMA8451Q library for control this accelerometer with interrupt implemet

Fork of MMA8451Q by Emilio Monti

MMA8451Q.cpp@5:aefb5974f42a, 2018-01-18 (annotated)

Committer:
vinajarr
Date:
Thu Jan 18 07:52:57 2018 +0000
Revision:
5:aefb5974f42a
Parent:
3:db7126dbd63f 
implement interrupt

Who changed what in which revision?

UserRevisionLine numberNew contents of line
samux 1:d2630136d51e 1 /* Copyright (c) 2010-2011 mbed.org, MIT License
samux 1:d2630136d51e 2 *
samux 1:d2630136d51e 3 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software
samux 1:d2630136d51e 4 * and associated documentation files (the "Software"), to deal in the Software without
samux 1:d2630136d51e 5 * restriction, including without limitation the rights to use, copy, modify, merge, publish,
samux 1:d2630136d51e 6 * distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the
samux 1:d2630136d51e 7 * Software is furnished to do so, subject to the following conditions:
samux 1:d2630136d51e 8 *
samux 1:d2630136d51e 9 * The above copyright notice and this permission notice shall be included in all copies or
samux 1:d2630136d51e 10 * substantial portions of the Software.
samux 1:d2630136d51e 11 *
samux 1:d2630136d51e 12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
samux 1:d2630136d51e 13 * BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
samux 1:d2630136d51e 14 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
samux 1:d2630136d51e 15 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
samux 1:d2630136d51e 16 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
samux 1:d2630136d51e 17 */
samux 1:d2630136d51e 18
emilmont 0:6149091f755d 19 #include "MMA8451Q.h"
emilmont 0:6149091f755d 20
samux 1:d2630136d51e 21 #define REG_WHO_AM_I 0x0D
samux 1:d2630136d51e 22 #define REG_CTRL_REG_1 0x2A
emilmont 0:6149091f755d 23 #define REG_OUT_X_MSB 0x01
emilmont 0:6149091f755d 24 #define REG_OUT_Y_MSB 0x03
emilmont 0:6149091f755d 25 #define REG_OUT_Z_MSB 0x05
emilmont 0:6149091f755d 26
samux 1:d2630136d51e 27 #define UINT14_MAX 16383
emilmont 0:6149091f755d 28
vinajarr 5:aefb5974f42a 29
vinajarr 5:aefb5974f42a 30
vinajarr 5:aefb5974f42a 31 MMA8451Q::MMA8451Q(I2C * puntero , int addr) : m_i2c(puntero), m_addr(addr) {
emilmont 0:6149091f755d 32 // activate the peripheral
vinajarr 5:aefb5974f42a 33 uint8_t data[2] = {REG_CTRL_REG_1, 0x00}; //Permitir escribir en los registros de control
samux 1:d2630136d51e 34 writeRegs(data, 2);
vinajarr 5:aefb5974f42a 35 data[0]=REG_CTRL_REG_1;
vinajarr 5:aefb5974f42a 36 data[1]=0x0C;
vinajarr 5:aefb5974f42a 37 writeRegs(data, 2);// definir velocidad de 400Hz Low Noise
vinajarr 5:aefb5974f42a 38 data[0]=0x2b;
vinajarr 5:aefb5974f42a 39 data[1]=0x09;
vinajarr 5:aefb5974f42a 40 writeRegs(data, 2);//Moodo de alta resolucion
vinajarr 5:aefb5974f42a 41 data[0]=0x2D;
vinajarr 5:aefb5974f42a 42 data[1]=0x01;
vinajarr 5:aefb5974f42a 43 writeRegs(data, 2);//Activar interrupcion por data-ready
vinajarr 5:aefb5974f42a 44 data[0]=0x2E;
vinajarr 5:aefb5974f42a 45 data[1]=0x01;
vinajarr 5:aefb5974f42a 46 writeRegs(data, 2);//Rutear interrupcion al pin INT1
vinajarr 5:aefb5974f42a 47 data[0]=REG_CTRL_REG_1;
vinajarr 5:aefb5974f42a 48 data[1]=0x0D;
vinajarr 5:aefb5974f42a 49 writeRegs(data, 2);//Activar el modulo
emilmont 0:6149091f755d 50 }
emilmont 0:6149091f755d 51
emilmont 0:6149091f755d 52 MMA8451Q::~MMA8451Q() { }
emilmont 0:6149091f755d 53
emilmont 0:6149091f755d 54 uint8_t MMA8451Q::getWhoAmI() {
emilmont 0:6149091f755d 55 uint8_t who_am_i = 0;
samux 1:d2630136d51e 56 readRegs(REG_WHO_AM_I, &who_am_i, 1);
vinajarr 5:aefb5974f42a 57
emilmont 0:6149091f755d 58 return who_am_i;
emilmont 0:6149091f755d 59 }
emilmont 0:6149091f755d 60
chris 3:db7126dbd63f 61 float MMA8451Q::getAccX() {
vinajarr 5:aefb5974f42a 62
chris 3:db7126dbd63f 63 return (float(getAccAxis(REG_OUT_X_MSB))/4096.0);
emilmont 0:6149091f755d 64 }
emilmont 0:6149091f755d 65
chris 3:db7126dbd63f 66 float MMA8451Q::getAccY() {
chris 3:db7126dbd63f 67 return (float(getAccAxis(REG_OUT_Y_MSB))/4096.0);
emilmont 0:6149091f755d 68 }
emilmont 0:6149091f755d 69
chris 3:db7126dbd63f 70 float MMA8451Q::getAccZ() {
chris 3:db7126dbd63f 71 return (float(getAccAxis(REG_OUT_Z_MSB))/4096.0);
emilmont 0:6149091f755d 72 }
emilmont 0:6149091f755d 73
chris 3:db7126dbd63f 74 void MMA8451Q::getAccAllAxis(float * res) {
emilmont 0:6149091f755d 75 res[0] = getAccX();
emilmont 0:6149091f755d 76 res[1] = getAccY();
emilmont 0:6149091f755d 77 res[2] = getAccZ();
emilmont 0:6149091f755d 78 }
emilmont 0:6149091f755d 79
emilmont 0:6149091f755d 80 int16_t MMA8451Q::getAccAxis(uint8_t addr) {
emilmont 0:6149091f755d 81 int16_t acc;
emilmont 0:6149091f755d 82 uint8_t res[2];
samux 1:d2630136d51e 83 readRegs(addr, res, 2);
emilmont 0:6149091f755d 84
emilmont 0:6149091f755d 85 acc = (res[0] << 6) | (res[1] >> 2);
emilmont 0:6149091f755d 86 if (acc > UINT14_MAX/2)
emilmont 0:6149091f755d 87 acc -= UINT14_MAX;
emilmont 0:6149091f755d 88
emilmont 0:6149091f755d 89 return acc;
emilmont 0:6149091f755d 90 }
emilmont 0:6149091f755d 91
samux 1:d2630136d51e 92 void MMA8451Q::readRegs(int addr, uint8_t * data, int len) {
emilmont 0:6149091f755d 93 char t[1] = {addr};
vinajarr 5:aefb5974f42a 94 m_i2c->write(m_addr, t, 1, true);
vinajarr 5:aefb5974f42a 95 m_i2c->read(m_addr, (char *)data, len);
emilmont 0:6149091f755d 96 }
emilmont 0:6149091f755d 97
samux 1:d2630136d51e 98 void MMA8451Q::writeRegs(uint8_t * data, int len) {
vinajarr 5:aefb5974f42a 99 m_i2c->write(m_addr, (char *)data, len);
emilmont 0:6149091f755d 100 }