Sumio Morioka / Mbed 2 deprecated if201411_section3

Sample code of section 3 in Nov 2014 issue of the Interface Magazine, published by CQ publishing in Japan. CQ出版社インターフェース誌 2014年11月号3章に掲載のサンプルコードです． FRDM-K64FにOV7670カメラを接続して映像を取得するとともに，簡単なフィルタ処理も施すサンプルです．このコードのうちカメラ制御部には，Sadaei Osakabe氏のコードを流用させていただいています．

Dependencies:   SDFileSystem TextLCD mbed

このコードでは，Arduino用のLCDシールド（http://www.switch-science.com/catalog/724/）を接続することを想定しています．ただしLCDは必須ではないので，LCDを使わない場合は表示用のコードはコメントアウトしてください．

ov7670.h@0:f31ceb6058cb, 2014-09-24 (annotated)

Committer:
smorioka
Date:
Wed Sep 24 20:44:56 2014 +0000
Revision:
0:f31ceb6058cb
First release

Who changed what in which revision?

UserRevisionLine numberNew contents of line
smorioka 0:f31ceb6058cb 1 // This code was written by Mr.Sadaei Osakabe.
smorioka 0:f31ceb6058cb 2 // Original code is located at
smorioka 0:f31ceb6058cb 3 // https://mbed.org/users/diasea/code/OV7670_with_AL422B_Color_Size_test/
smorioka 0:f31ceb6058cb 4
smorioka 0:f31ceb6058cb 5 #include "mbed.h"
smorioka 0:f31ceb6058cb 6 #include "ov7670reg.h"
smorioka 0:f31ceb6058cb 7
smorioka 0:f31ceb6058cb 8 #define OV7670_WRITE (0x42)
smorioka 0:f31ceb6058cb 9 #define OV7670_READ (0x43)
smorioka 0:f31ceb6058cb 10 #define OV7670_WRITEWAIT (20)
smorioka 0:f31ceb6058cb 11 #define OV7670_NOACK (0)
smorioka 0:f31ceb6058cb 12 #define OV7670_REGMAX (201)
smorioka 0:f31ceb6058cb 13 #define OV7670_I2CFREQ (100000)
smorioka 0:f31ceb6058cb 14
smorioka 0:f31ceb6058cb 15 //
smorioka 0:f31ceb6058cb 16 // OV7670 + FIFO AL422B camera board test
smorioka 0:f31ceb6058cb 17 //
smorioka 0:f31ceb6058cb 18 class OV7670
smorioka 0:f31ceb6058cb 19 {
smorioka 0:f31ceb6058cb 20 public:
smorioka 0:f31ceb6058cb 21 I2C camera;
smorioka 0:f31ceb6058cb 22 InterruptIn vsync,href;
smorioka 0:f31ceb6058cb 23 DigitalOut wen;
smorioka 0:f31ceb6058cb 24 BusIn data;
smorioka 0:f31ceb6058cb 25 DigitalOut rrst,oe,rclk;
smorioka 0:f31ceb6058cb 26 volatile int LineCounter;
smorioka 0:f31ceb6058cb 27 volatile int LastLines;
smorioka 0:f31ceb6058cb 28 volatile bool CaptureReq;
smorioka 0:f31ceb6058cb 29 volatile bool Busy;
smorioka 0:f31ceb6058cb 30 volatile bool Done;
smorioka 0:f31ceb6058cb 31
smorioka 0:f31ceb6058cb 32 OV7670(
smorioka 0:f31ceb6058cb 33 PinName sda,// Camera I2C port
smorioka 0:f31ceb6058cb 34 PinName scl,// Camera I2C port
smorioka 0:f31ceb6058cb 35 PinName vs, // VSYNC
smorioka 0:f31ceb6058cb 36 PinName hr, // HREF
smorioka 0:f31ceb6058cb 37 PinName we, // WEN
smorioka 0:f31ceb6058cb 38 PinName d7, // D7
smorioka 0:f31ceb6058cb 39 PinName d6, // D6
smorioka 0:f31ceb6058cb 40 PinName d5, // D5
smorioka 0:f31ceb6058cb 41 PinName d4, // D4
smorioka 0:f31ceb6058cb 42 PinName d3, // D3
smorioka 0:f31ceb6058cb 43 PinName d2, // D2
smorioka 0:f31ceb6058cb 44 PinName d1, // D1
smorioka 0:f31ceb6058cb 45 PinName d0, // D0
smorioka 0:f31ceb6058cb 46 PinName rt, // /RRST
smorioka 0:f31ceb6058cb 47 PinName o, // /OE
smorioka 0:f31ceb6058cb 48 PinName rc // RCLK
smorioka 0:f31ceb6058cb 49 ) : camera(sda,scl),vsync(vs),href(hr),wen(we),data(d0,d1,d2,d3,d4,d5,d6,d7),rrst(rt),oe(o),rclk(rc)
smorioka 0:f31ceb6058cb 50 {
smorioka 0:f31ceb6058cb 51 //lcd.locate(0, 0);
smorioka 0:f31ceb6058cb 52 //lcd.printf("1");
smorioka 0:f31ceb6058cb 53
smorioka 0:f31ceb6058cb 54 // -->> removed 2014.07.28
smorioka 0:f31ceb6058cb 55 // camera.stop();
smorioka 0:f31ceb6058cb 56 // <<-- removed
smorioka 0:f31ceb6058cb 57
smorioka 0:f31ceb6058cb 58 //lcd.printf("2");
smorioka 0:f31ceb6058cb 59
smorioka 0:f31ceb6058cb 60 camera.frequency(OV7670_I2CFREQ);
smorioka 0:f31ceb6058cb 61
smorioka 0:f31ceb6058cb 62 //lcd.printf("3");
smorioka 0:f31ceb6058cb 63
smorioka 0:f31ceb6058cb 64 vsync.fall(this,&OV7670::VsyncHandler);
smorioka 0:f31ceb6058cb 65
smorioka 0:f31ceb6058cb 66 //lcd.printf("4");
smorioka 0:f31ceb6058cb 67
smorioka 0:f31ceb6058cb 68 href.rise(this,&OV7670::HrefHandler);
smorioka 0:f31ceb6058cb 69
smorioka 0:f31ceb6058cb 70 //lcd.printf("5");
smorioka 0:f31ceb6058cb 71
smorioka 0:f31ceb6058cb 72 CaptureReq = false;
smorioka 0:f31ceb6058cb 73 Busy = false;
smorioka 0:f31ceb6058cb 74 Done = false;
smorioka 0:f31ceb6058cb 75 LineCounter = 0;
smorioka 0:f31ceb6058cb 76 rrst = 1;
smorioka 0:f31ceb6058cb 77 oe = 1;
smorioka 0:f31ceb6058cb 78 rclk = 1;
smorioka 0:f31ceb6058cb 79 wen = 0;
smorioka 0:f31ceb6058cb 80
smorioka 0:f31ceb6058cb 81 //lcd.printf("6");
smorioka 0:f31ceb6058cb 82 }
smorioka 0:f31ceb6058cb 83
smorioka 0:f31ceb6058cb 84 // capture request
smorioka 0:f31ceb6058cb 85 void CaptureNext(void)
smorioka 0:f31ceb6058cb 86 {
smorioka 0:f31ceb6058cb 87 CaptureReq = true;
smorioka 0:f31ceb6058cb 88 Busy = true;
smorioka 0:f31ceb6058cb 89 }
smorioka 0:f31ceb6058cb 90
smorioka 0:f31ceb6058cb 91 // capture done? (with clear)
smorioka 0:f31ceb6058cb 92 bool CaptureDone(void)
smorioka 0:f31ceb6058cb 93 {
smorioka 0:f31ceb6058cb 94 bool result;
smorioka 0:f31ceb6058cb 95 if (Busy) {
smorioka 0:f31ceb6058cb 96 result = false;
smorioka 0:f31ceb6058cb 97 } else {
smorioka 0:f31ceb6058cb 98 result = Done;
smorioka 0:f31ceb6058cb 99 Done = false;
smorioka 0:f31ceb6058cb 100 }
smorioka 0:f31ceb6058cb 101 return result;
smorioka 0:f31ceb6058cb 102 }
smorioka 0:f31ceb6058cb 103
smorioka 0:f31ceb6058cb 104 // write to camera
smorioka 0:f31ceb6058cb 105 void WriteReg(int addr,int data)
smorioka 0:f31ceb6058cb 106 {
smorioka 0:f31ceb6058cb 107 // WRITE 0x42,ADDR,DATA
smorioka 0:f31ceb6058cb 108 camera.start();
smorioka 0:f31ceb6058cb 109 camera.write(OV7670_WRITE);
smorioka 0:f31ceb6058cb 110 wait_us(OV7670_WRITEWAIT);
smorioka 0:f31ceb6058cb 111 camera.write(addr);
smorioka 0:f31ceb6058cb 112 wait_us(OV7670_WRITEWAIT);
smorioka 0:f31ceb6058cb 113 camera.write(data);
smorioka 0:f31ceb6058cb 114 camera.stop();
smorioka 0:f31ceb6058cb 115 }
smorioka 0:f31ceb6058cb 116
smorioka 0:f31ceb6058cb 117 // read from camera
smorioka 0:f31ceb6058cb 118 int ReadReg(int addr)
smorioka 0:f31ceb6058cb 119 {
smorioka 0:f31ceb6058cb 120 int data;
smorioka 0:f31ceb6058cb 121
smorioka 0:f31ceb6058cb 122 // WRITE 0x42,ADDR
smorioka 0:f31ceb6058cb 123 camera.start();
smorioka 0:f31ceb6058cb 124 camera.write(OV7670_WRITE);
smorioka 0:f31ceb6058cb 125 wait_us(OV7670_WRITEWAIT);
smorioka 0:f31ceb6058cb 126 camera.write(addr);
smorioka 0:f31ceb6058cb 127 camera.stop();
smorioka 0:f31ceb6058cb 128 wait_us(OV7670_WRITEWAIT);
smorioka 0:f31ceb6058cb 129
smorioka 0:f31ceb6058cb 130 // WRITE 0x43,READ
smorioka 0:f31ceb6058cb 131 camera.start();
smorioka 0:f31ceb6058cb 132 camera.write(OV7670_READ);
smorioka 0:f31ceb6058cb 133 wait_us(OV7670_WRITEWAIT);
smorioka 0:f31ceb6058cb 134 data = camera.read(OV7670_NOACK);
smorioka 0:f31ceb6058cb 135 camera.stop();
smorioka 0:f31ceb6058cb 136
smorioka 0:f31ceb6058cb 137 return data;
smorioka 0:f31ceb6058cb 138 }
smorioka 0:f31ceb6058cb 139
smorioka 0:f31ceb6058cb 140 // print register
smorioka 0:f31ceb6058cb 141 void PrintRegister(void) {
smorioka 0:f31ceb6058cb 142 printf("AD : +0 +1 +2 +3 +4 +5 +6 +7 +8 +9 +A +B +C +D +E +F");
smorioka 0:f31ceb6058cb 143 for (int i=0;i<OV7670_REGMAX;i++) {
smorioka 0:f31ceb6058cb 144 int data;
smorioka 0:f31ceb6058cb 145 data = ReadReg(i); // READ REG
smorioka 0:f31ceb6058cb 146 if ((i & 0x0F) == 0) {
smorioka 0:f31ceb6058cb 147 printf("\r\n%02X : ",i);
smorioka 0:f31ceb6058cb 148 }
smorioka 0:f31ceb6058cb 149 printf("%02X ",data);
smorioka 0:f31ceb6058cb 150 }
smorioka 0:f31ceb6058cb 151 printf("\r\n");
smorioka 0:f31ceb6058cb 152 }
smorioka 0:f31ceb6058cb 153
smorioka 0:f31ceb6058cb 154 void Reset(void) {
smorioka 0:f31ceb6058cb 155 WriteReg(REG_COM7,COM7_RESET); // RESET CAMERA
smorioka 0:f31ceb6058cb 156 wait_ms(200);
smorioka 0:f31ceb6058cb 157 }
smorioka 0:f31ceb6058cb 158
smorioka 0:f31ceb6058cb 159 void InitForFIFOWriteReset(void) {
smorioka 0:f31ceb6058cb 160 WriteReg(REG_COM10, COM10_VS_NEG);
smorioka 0:f31ceb6058cb 161 }
smorioka 0:f31ceb6058cb 162
smorioka 0:f31ceb6058cb 163 void InitSetColorbar(void) {
smorioka 0:f31ceb6058cb 164 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 165 // color bar
smorioka 0:f31ceb6058cb 166 WriteReg(REG_COM17, reg_com7|COM17_CBAR);
smorioka 0:f31ceb6058cb 167 }
smorioka 0:f31ceb6058cb 168
smorioka 0:f31ceb6058cb 169 void InitDefaultReg(void) {
smorioka 0:f31ceb6058cb 170 // Gamma curve values
smorioka 0:f31ceb6058cb 171 WriteReg(0x7a, 0x20);
smorioka 0:f31ceb6058cb 172 WriteReg(0x7b, 0x10);
smorioka 0:f31ceb6058cb 173 WriteReg(0x7c, 0x1e);
smorioka 0:f31ceb6058cb 174 WriteReg(0x7d, 0x35);
smorioka 0:f31ceb6058cb 175 WriteReg(0x7e, 0x5a);
smorioka 0:f31ceb6058cb 176 WriteReg(0x7f, 0x69);
smorioka 0:f31ceb6058cb 177 WriteReg(0x80, 0x76);
smorioka 0:f31ceb6058cb 178 WriteReg(0x81, 0x80);
smorioka 0:f31ceb6058cb 179 WriteReg(0x82, 0x88);
smorioka 0:f31ceb6058cb 180 WriteReg(0x83, 0x8f);
smorioka 0:f31ceb6058cb 181 WriteReg(0x84, 0x96);
smorioka 0:f31ceb6058cb 182 WriteReg(0x85, 0xa3);
smorioka 0:f31ceb6058cb 183 WriteReg(0x86, 0xaf);
smorioka 0:f31ceb6058cb 184 WriteReg(0x87, 0xc4);
smorioka 0:f31ceb6058cb 185 WriteReg(0x88, 0xd7);
smorioka 0:f31ceb6058cb 186 WriteReg(0x89, 0xe8);
smorioka 0:f31ceb6058cb 187
smorioka 0:f31ceb6058cb 188 // AGC and AEC parameters. Note we start by disabling those features,
smorioka 0:f31ceb6058cb 189 //then turn them only after tweaking the values.
smorioka 0:f31ceb6058cb 190 WriteReg(REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT);
smorioka 0:f31ceb6058cb 191 WriteReg(REG_GAIN, 0);
smorioka 0:f31ceb6058cb 192 WriteReg(REG_AECH, 0);
smorioka 0:f31ceb6058cb 193 WriteReg(REG_COM4, 0x40);
smorioka 0:f31ceb6058cb 194 // magic reserved bit
smorioka 0:f31ceb6058cb 195 WriteReg(REG_COM9, 0x18);
smorioka 0:f31ceb6058cb 196 // 4x gain + magic rsvd bit
smorioka 0:f31ceb6058cb 197 WriteReg(REG_BD50MAX, 0x05);
smorioka 0:f31ceb6058cb 198 WriteReg(REG_BD60MAX, 0x07);
smorioka 0:f31ceb6058cb 199 WriteReg(REG_AEW, 0x95);
smorioka 0:f31ceb6058cb 200 WriteReg(REG_AEB, 0x33);
smorioka 0:f31ceb6058cb 201 WriteReg(REG_VPT, 0xe3);
smorioka 0:f31ceb6058cb 202 WriteReg(REG_HAECC1, 0x78);
smorioka 0:f31ceb6058cb 203 WriteReg(REG_HAECC2, 0x68);
smorioka 0:f31ceb6058cb 204 WriteReg(0xa1, 0x03);
smorioka 0:f31ceb6058cb 205 // magic
smorioka 0:f31ceb6058cb 206 WriteReg(REG_HAECC3, 0xd8);
smorioka 0:f31ceb6058cb 207 WriteReg(REG_HAECC4, 0xd8);
smorioka 0:f31ceb6058cb 208 WriteReg(REG_HAECC5, 0xf0);
smorioka 0:f31ceb6058cb 209 WriteReg(REG_HAECC6, 0x90);
smorioka 0:f31ceb6058cb 210 WriteReg(REG_HAECC7, 0x94);
smorioka 0:f31ceb6058cb 211 WriteReg(REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC);
smorioka 0:f31ceb6058cb 212
smorioka 0:f31ceb6058cb 213 // Almost all of these are magic "reserved" values.
smorioka 0:f31ceb6058cb 214 WriteReg(REG_COM5, 0x61);
smorioka 0:f31ceb6058cb 215 WriteReg(REG_COM6, 0x4b);
smorioka 0:f31ceb6058cb 216 WriteReg(0x16, 0x02);
smorioka 0:f31ceb6058cb 217 WriteReg(REG_MVFP, 0x07);
smorioka 0:f31ceb6058cb 218 WriteReg(0x21, 0x02);
smorioka 0:f31ceb6058cb 219 WriteReg(0x22, 0x91);
smorioka 0:f31ceb6058cb 220 WriteReg(0x29, 0x07);
smorioka 0:f31ceb6058cb 221 WriteReg(0x33, 0x0b);
smorioka 0:f31ceb6058cb 222 WriteReg(0x35, 0x0b);
smorioka 0:f31ceb6058cb 223 WriteReg(0x37, 0x1d);
smorioka 0:f31ceb6058cb 224 WriteReg(0x38, 0x71);
smorioka 0:f31ceb6058cb 225 WriteReg(0x39, 0x2a);
smorioka 0:f31ceb6058cb 226 WriteReg(REG_COM12, 0x78);
smorioka 0:f31ceb6058cb 227 WriteReg(0x4d, 0x40);
smorioka 0:f31ceb6058cb 228 WriteReg(0x4e, 0x20);
smorioka 0:f31ceb6058cb 229 WriteReg(REG_GFIX, 0);
smorioka 0:f31ceb6058cb 230 WriteReg(0x6b, 0x0a);
smorioka 0:f31ceb6058cb 231 WriteReg(0x74, 0x10);
smorioka 0:f31ceb6058cb 232 WriteReg(0x8d, 0x4f);
smorioka 0:f31ceb6058cb 233 WriteReg(0x8e, 0);
smorioka 0:f31ceb6058cb 234 WriteReg(0x8f, 0);
smorioka 0:f31ceb6058cb 235 WriteReg(0x90, 0);
smorioka 0:f31ceb6058cb 236 WriteReg(0x91, 0);
smorioka 0:f31ceb6058cb 237 WriteReg(0x96, 0);
smorioka 0:f31ceb6058cb 238 WriteReg(0x9a, 0);
smorioka 0:f31ceb6058cb 239 WriteReg(0xb0, 0x84);
smorioka 0:f31ceb6058cb 240 WriteReg(0xb1, 0x0c);
smorioka 0:f31ceb6058cb 241 WriteReg(0xb2, 0x0e);
smorioka 0:f31ceb6058cb 242 WriteReg(0xb3, 0x82);
smorioka 0:f31ceb6058cb 243 WriteReg(0xb8, 0x0a);
smorioka 0:f31ceb6058cb 244
smorioka 0:f31ceb6058cb 245 // More reserved magic, some of which tweaks white balance
smorioka 0:f31ceb6058cb 246 WriteReg(0x43, 0x0a);
smorioka 0:f31ceb6058cb 247 WriteReg(0x44, 0xf0);
smorioka 0:f31ceb6058cb 248 WriteReg(0x45, 0x34);
smorioka 0:f31ceb6058cb 249 WriteReg(0x46, 0x58);
smorioka 0:f31ceb6058cb 250 WriteReg(0x47, 0x28);
smorioka 0:f31ceb6058cb 251 WriteReg(0x48, 0x3a);
smorioka 0:f31ceb6058cb 252 WriteReg(0x59, 0x88);
smorioka 0:f31ceb6058cb 253 WriteReg(0x5a, 0x88);
smorioka 0:f31ceb6058cb 254 WriteReg(0x5b, 0x44);
smorioka 0:f31ceb6058cb 255 WriteReg(0x5c, 0x67);
smorioka 0:f31ceb6058cb 256 WriteReg(0x5d, 0x49);
smorioka 0:f31ceb6058cb 257 WriteReg(0x5e, 0x0e);
smorioka 0:f31ceb6058cb 258 WriteReg(0x6c, 0x0a);
smorioka 0:f31ceb6058cb 259 WriteReg(0x6d, 0x55);
smorioka 0:f31ceb6058cb 260 WriteReg(0x6e, 0x11);
smorioka 0:f31ceb6058cb 261 WriteReg(0x6f, 0x9f);
smorioka 0:f31ceb6058cb 262 // "9e for advance AWB"
smorioka 0:f31ceb6058cb 263 WriteReg(0x6a, 0x40);
smorioka 0:f31ceb6058cb 264 WriteReg(REG_BLUE, 0x40);
smorioka 0:f31ceb6058cb 265 WriteReg(REG_RED, 0x60);
smorioka 0:f31ceb6058cb 266 WriteReg(REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB);
smorioka 0:f31ceb6058cb 267
smorioka 0:f31ceb6058cb 268 // Matrix coefficients
smorioka 0:f31ceb6058cb 269 WriteReg(0x4f, 0x80);
smorioka 0:f31ceb6058cb 270 WriteReg(0x50, 0x80);
smorioka 0:f31ceb6058cb 271 WriteReg(0x51, 0);
smorioka 0:f31ceb6058cb 272 WriteReg(0x52, 0x22);
smorioka 0:f31ceb6058cb 273 WriteReg(0x53, 0x5e);
smorioka 0:f31ceb6058cb 274 WriteReg(0x54, 0x80);
smorioka 0:f31ceb6058cb 275 WriteReg(0x58, 0x9e);
smorioka 0:f31ceb6058cb 276
smorioka 0:f31ceb6058cb 277 WriteReg(REG_COM16, COM16_AWBGAIN);
smorioka 0:f31ceb6058cb 278 WriteReg(REG_EDGE, 0);
smorioka 0:f31ceb6058cb 279 WriteReg(0x75, 0x05);
smorioka 0:f31ceb6058cb 280 WriteReg(0x76, 0xe1);
smorioka 0:f31ceb6058cb 281 WriteReg(0x4c, 0);
smorioka 0:f31ceb6058cb 282 WriteReg(0x77, 0x01);
smorioka 0:f31ceb6058cb 283 WriteReg(0x4b, 0x09);
smorioka 0:f31ceb6058cb 284 WriteReg(0xc9, 0x60);
smorioka 0:f31ceb6058cb 285 WriteReg(REG_COM16, 0x38);
smorioka 0:f31ceb6058cb 286 WriteReg(0x56, 0x40);
smorioka 0:f31ceb6058cb 287
smorioka 0:f31ceb6058cb 288 WriteReg(0x34, 0x11);
smorioka 0:f31ceb6058cb 289 WriteReg(REG_COM11, COM11_EXP|COM11_HZAUTO_ON);
smorioka 0:f31ceb6058cb 290 WriteReg(0xa4, 0x88);
smorioka 0:f31ceb6058cb 291 WriteReg(0x96, 0);
smorioka 0:f31ceb6058cb 292 WriteReg(0x97, 0x30);
smorioka 0:f31ceb6058cb 293 WriteReg(0x98, 0x20);
smorioka 0:f31ceb6058cb 294 WriteReg(0x99, 0x30);
smorioka 0:f31ceb6058cb 295 WriteReg(0x9a, 0x84);
smorioka 0:f31ceb6058cb 296 WriteReg(0x9b, 0x29);
smorioka 0:f31ceb6058cb 297 WriteReg(0x9c, 0x03);
smorioka 0:f31ceb6058cb 298 WriteReg(0x9d, 0x4c);
smorioka 0:f31ceb6058cb 299 WriteReg(0x9e, 0x3f);
smorioka 0:f31ceb6058cb 300 WriteReg(0x78, 0x04);
smorioka 0:f31ceb6058cb 301
smorioka 0:f31ceb6058cb 302 // Extra-weird stuff. Some sort of multiplexor register
smorioka 0:f31ceb6058cb 303 WriteReg(0x79, 0x01);
smorioka 0:f31ceb6058cb 304 WriteReg(0xc8, 0xf0);
smorioka 0:f31ceb6058cb 305 WriteReg(0x79, 0x0f);
smorioka 0:f31ceb6058cb 306 WriteReg(0xc8, 0x00);
smorioka 0:f31ceb6058cb 307 WriteReg(0x79, 0x10);
smorioka 0:f31ceb6058cb 308 WriteReg(0xc8, 0x7e);
smorioka 0:f31ceb6058cb 309 WriteReg(0x79, 0x0a);
smorioka 0:f31ceb6058cb 310 WriteReg(0xc8, 0x80);
smorioka 0:f31ceb6058cb 311 WriteReg(0x79, 0x0b);
smorioka 0:f31ceb6058cb 312 WriteReg(0xc8, 0x01);
smorioka 0:f31ceb6058cb 313 WriteReg(0x79, 0x0c);
smorioka 0:f31ceb6058cb 314 WriteReg(0xc8, 0x0f);
smorioka 0:f31ceb6058cb 315 WriteReg(0x79, 0x0d);
smorioka 0:f31ceb6058cb 316 WriteReg(0xc8, 0x20);
smorioka 0:f31ceb6058cb 317 WriteReg(0x79, 0x09);
smorioka 0:f31ceb6058cb 318 WriteReg(0xc8, 0x80);
smorioka 0:f31ceb6058cb 319 WriteReg(0x79, 0x02);
smorioka 0:f31ceb6058cb 320 WriteReg(0xc8, 0xc0);
smorioka 0:f31ceb6058cb 321 WriteReg(0x79, 0x03);
smorioka 0:f31ceb6058cb 322 WriteReg(0xc8, 0x40);
smorioka 0:f31ceb6058cb 323 WriteReg(0x79, 0x05);
smorioka 0:f31ceb6058cb 324 WriteReg(0xc8, 0x30);
smorioka 0:f31ceb6058cb 325 WriteReg(0x79, 0x26);
smorioka 0:f31ceb6058cb 326 }
smorioka 0:f31ceb6058cb 327
smorioka 0:f31ceb6058cb 328 void InitRGB444(void){
smorioka 0:f31ceb6058cb 329 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 330
smorioka 0:f31ceb6058cb 331 WriteReg(REG_COM7, reg_com7|COM7_RGB);
smorioka 0:f31ceb6058cb 332 WriteReg(REG_RGB444, RGB444_ENABLE|RGB444_XBGR);
smorioka 0:f31ceb6058cb 333 WriteReg(REG_COM15, COM15_R01FE|COM15_RGB444);
smorioka 0:f31ceb6058cb 334
smorioka 0:f31ceb6058cb 335 WriteReg(REG_COM1, 0x40); // Magic reserved bit
smorioka 0:f31ceb6058cb 336 WriteReg(REG_COM9, 0x38); // 16x gain ceiling; 0x8 is reserved bit
smorioka 0:f31ceb6058cb 337 WriteReg(0x4f, 0xb3); // "matrix coefficient 1"
smorioka 0:f31ceb6058cb 338 WriteReg(0x50, 0xb3); // "matrix coefficient 2"
smorioka 0:f31ceb6058cb 339 WriteReg(0x51, 0x00); // vb
smorioka 0:f31ceb6058cb 340 WriteReg(0x52, 0x3d); // "matrix coefficient 4"
smorioka 0:f31ceb6058cb 341 WriteReg(0x53, 0xa7); // "matrix coefficient 5"
smorioka 0:f31ceb6058cb 342 WriteReg(0x54, 0xe4); // "matrix coefficient 6"
smorioka 0:f31ceb6058cb 343 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2); // Magic rsvd bit
smorioka 0:f31ceb6058cb 344
smorioka 0:f31ceb6058cb 345 WriteReg(REG_TSLB, 0x04);
smorioka 0:f31ceb6058cb 346 }
smorioka 0:f31ceb6058cb 347
smorioka 0:f31ceb6058cb 348 void InitRGB555(void){
smorioka 0:f31ceb6058cb 349 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 350
smorioka 0:f31ceb6058cb 351 WriteReg(REG_COM7, reg_com7|COM7_RGB);
smorioka 0:f31ceb6058cb 352 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:f31ceb6058cb 353 WriteReg(REG_COM15, COM15_RGB555|COM15_R00FF);
smorioka 0:f31ceb6058cb 354
smorioka 0:f31ceb6058cb 355 WriteReg(REG_TSLB, 0x04);
smorioka 0:f31ceb6058cb 356
smorioka 0:f31ceb6058cb 357 WriteReg(REG_COM1, 0x00);
smorioka 0:f31ceb6058cb 358 WriteReg(REG_COM9, 0x38); // 16x gain ceiling; 0x8 is reserved bit
smorioka 0:f31ceb6058cb 359 WriteReg(0x4f, 0xb3); // "matrix coefficient 1"
smorioka 0:f31ceb6058cb 360 WriteReg(0x50, 0xb3); // "matrix coefficient 2"
smorioka 0:f31ceb6058cb 361 WriteReg(0x51, 0x00); // vb
smorioka 0:f31ceb6058cb 362 WriteReg(0x52, 0x3d); // "matrix coefficient 4"
smorioka 0:f31ceb6058cb 363 WriteReg(0x53, 0xa7); // "matrix coefficient 5"
smorioka 0:f31ceb6058cb 364 WriteReg(0x54, 0xe4); // "matrix coefficient 6"
smorioka 0:f31ceb6058cb 365 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT);
smorioka 0:f31ceb6058cb 366 }
smorioka 0:f31ceb6058cb 367
smorioka 0:f31ceb6058cb 368 void InitRGB565(void){
smorioka 0:f31ceb6058cb 369 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 370
smorioka 0:f31ceb6058cb 371 WriteReg(REG_COM7, reg_com7|COM7_RGB);
smorioka 0:f31ceb6058cb 372 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:f31ceb6058cb 373 WriteReg(REG_COM15, COM15_R00FF|COM15_RGB565);
smorioka 0:f31ceb6058cb 374
smorioka 0:f31ceb6058cb 375 WriteReg(REG_TSLB, 0x04);
smorioka 0:f31ceb6058cb 376
smorioka 0:f31ceb6058cb 377 WriteReg(REG_COM1, 0x00);
smorioka 0:f31ceb6058cb 378 WriteReg(REG_COM9, 0x38); // 16x gain ceiling; 0x8 is reserved bit
smorioka 0:f31ceb6058cb 379 WriteReg(0x4f, 0xb3); // "matrix coefficient 1"
smorioka 0:f31ceb6058cb 380 WriteReg(0x50, 0xb3); // "matrix coefficient 2"
smorioka 0:f31ceb6058cb 381 WriteReg(0x51, 0x00); // vb
smorioka 0:f31ceb6058cb 382 WriteReg(0x52, 0x3d); // "matrix coefficient 4"
smorioka 0:f31ceb6058cb 383 WriteReg(0x53, 0xa7); // "matrix coefficient 5"
smorioka 0:f31ceb6058cb 384 WriteReg(0x54, 0xe4); // "matrix coefficient 6"
smorioka 0:f31ceb6058cb 385 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT);
smorioka 0:f31ceb6058cb 386 }
smorioka 0:f31ceb6058cb 387
smorioka 0:f31ceb6058cb 388 void InitYUV(void){
smorioka 0:f31ceb6058cb 389 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 390
smorioka 0:f31ceb6058cb 391 WriteReg(REG_COM7, reg_com7|COM7_YUV);
smorioka 0:f31ceb6058cb 392 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:f31ceb6058cb 393 WriteReg(REG_COM15, COM15_R00FF);
smorioka 0:f31ceb6058cb 394
smorioka 0:f31ceb6058cb 395 WriteReg(REG_TSLB, 0x04);
smorioka 0:f31ceb6058cb 396 // WriteReg(REG_TSLB, 0x14);
smorioka 0:f31ceb6058cb 397 // WriteReg(REG_MANU, 0x00);
smorioka 0:f31ceb6058cb 398 // WriteReg(REG_MANV, 0x00);
smorioka 0:f31ceb6058cb 399
smorioka 0:f31ceb6058cb 400 WriteReg(REG_COM1, 0x00);
smorioka 0:f31ceb6058cb 401 WriteReg(REG_COM9, 0x18); // 4x gain ceiling; 0x8 is reserved bit
smorioka 0:f31ceb6058cb 402 WriteReg(0x4f, 0x80); // "matrix coefficient 1"
smorioka 0:f31ceb6058cb 403 WriteReg(0x50, 0x80); // "matrix coefficient 2"
smorioka 0:f31ceb6058cb 404 WriteReg(0x51, 0x00); // vb
smorioka 0:f31ceb6058cb 405 WriteReg(0x52, 0x22); // "matrix coefficient 4"
smorioka 0:f31ceb6058cb 406 WriteReg(0x53, 0x5e); // "matrix coefficient 5"
smorioka 0:f31ceb6058cb 407 WriteReg(0x54, 0x80); // "matrix coefficient 6"
smorioka 0:f31ceb6058cb 408 WriteReg(REG_COM13, COM13_GAMMA|COM13_UVSAT|COM13_UVSWAP);
smorioka 0:f31ceb6058cb 409 }
smorioka 0:f31ceb6058cb 410
smorioka 0:f31ceb6058cb 411 void InitBayerRGB(void){
smorioka 0:f31ceb6058cb 412 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 413
smorioka 0:f31ceb6058cb 414 // odd line BGBG... even line GRGR...
smorioka 0:f31ceb6058cb 415 WriteReg(REG_COM7, reg_com7|COM7_BAYER);
smorioka 0:f31ceb6058cb 416 // odd line GBGB... even line RGRG...
smorioka 0:f31ceb6058cb 417 //WriteReg(REG_COM7, reg_com7|COM7_PBAYER);
smorioka 0:f31ceb6058cb 418
smorioka 0:f31ceb6058cb 419 WriteReg(REG_RGB444, RGB444_DISABLE);
smorioka 0:f31ceb6058cb 420 WriteReg(REG_COM15, COM15_R00FF);
smorioka 0:f31ceb6058cb 421
smorioka 0:f31ceb6058cb 422 WriteReg(REG_COM13, 0x08); /* No gamma, magic rsvd bit */
smorioka 0:f31ceb6058cb 423 WriteReg(REG_COM16, 0x3d); /* Edge enhancement, denoise */
smorioka 0:f31ceb6058cb 424 WriteReg(REG_REG76, 0xe1); /* Pix correction, magic rsvd */
smorioka 0:f31ceb6058cb 425
smorioka 0:f31ceb6058cb 426 WriteReg(REG_TSLB, 0x04);
smorioka 0:f31ceb6058cb 427 }
smorioka 0:f31ceb6058cb 428
smorioka 0:f31ceb6058cb 429 void InitVGA(void) {
smorioka 0:f31ceb6058cb 430 // VGA
smorioka 0:f31ceb6058cb 431 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 432
smorioka 0:f31ceb6058cb 433 WriteReg(REG_COM7,reg_com7|COM7_VGA);
smorioka 0:f31ceb6058cb 434
smorioka 0:f31ceb6058cb 435 WriteReg(REG_HSTART,HSTART_VGA);
smorioka 0:f31ceb6058cb 436 WriteReg(REG_HSTOP,HSTOP_VGA);
smorioka 0:f31ceb6058cb 437 WriteReg(REG_HREF,HREF_VGA);
smorioka 0:f31ceb6058cb 438 WriteReg(REG_VSTART,VSTART_VGA);
smorioka 0:f31ceb6058cb 439 WriteReg(REG_VSTOP,VSTOP_VGA);
smorioka 0:f31ceb6058cb 440 WriteReg(REG_VREF,VREF_VGA);
smorioka 0:f31ceb6058cb 441 WriteReg(REG_COM3, COM3_VGA);
smorioka 0:f31ceb6058cb 442 WriteReg(REG_COM14, COM14_VGA);
smorioka 0:f31ceb6058cb 443 WriteReg(REG_SCALING_XSC, SCALING_XSC_VGA);
smorioka 0:f31ceb6058cb 444 WriteReg(REG_SCALING_YSC, SCALING_YSC_VGA);
smorioka 0:f31ceb6058cb 445 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_VGA);
smorioka 0:f31ceb6058cb 446 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_VGA);
smorioka 0:f31ceb6058cb 447 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_VGA);
smorioka 0:f31ceb6058cb 448 }
smorioka 0:f31ceb6058cb 449
smorioka 0:f31ceb6058cb 450 void InitFIFO_2bytes_color_nealy_limit_size(void) {
smorioka 0:f31ceb6058cb 451 // nealy FIFO limit 544x360
smorioka 0:f31ceb6058cb 452 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 453
smorioka 0:f31ceb6058cb 454 WriteReg(REG_COM7,reg_com7|COM7_VGA);
smorioka 0:f31ceb6058cb 455
smorioka 0:f31ceb6058cb 456 WriteReg(REG_HSTART,HSTART_VGA);
smorioka 0:f31ceb6058cb 457 WriteReg(REG_HSTOP,HSTOP_VGA);
smorioka 0:f31ceb6058cb 458 WriteReg(REG_HREF,HREF_VGA);
smorioka 0:f31ceb6058cb 459 WriteReg(REG_VSTART,VSTART_VGA);
smorioka 0:f31ceb6058cb 460 WriteReg(REG_VSTOP,VSTOP_VGA);
smorioka 0:f31ceb6058cb 461 WriteReg(REG_VREF,VREF_VGA);
smorioka 0:f31ceb6058cb 462 WriteReg(REG_COM3, COM3_VGA);
smorioka 0:f31ceb6058cb 463 WriteReg(REG_COM14, COM14_VGA);
smorioka 0:f31ceb6058cb 464 WriteReg(REG_SCALING_XSC, SCALING_XSC_VGA);
smorioka 0:f31ceb6058cb 465 WriteReg(REG_SCALING_YSC, SCALING_YSC_VGA);
smorioka 0:f31ceb6058cb 466 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_VGA);
smorioka 0:f31ceb6058cb 467 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_VGA);
smorioka 0:f31ceb6058cb 468 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_VGA);
smorioka 0:f31ceb6058cb 469
smorioka 0:f31ceb6058cb 470 WriteReg(REG_HSTART, 0x17);
smorioka 0:f31ceb6058cb 471 WriteReg(REG_HSTOP, 0x5b);
smorioka 0:f31ceb6058cb 472 WriteReg(REG_VSTART, 0x12);
smorioka 0:f31ceb6058cb 473 WriteReg(REG_VSTOP, 0x6c);
smorioka 0:f31ceb6058cb 474 }
smorioka 0:f31ceb6058cb 475
smorioka 0:f31ceb6058cb 476 void InitVGA_3_4(void) {
smorioka 0:f31ceb6058cb 477 // VGA 3/4 -> 480x360
smorioka 0:f31ceb6058cb 478 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 479
smorioka 0:f31ceb6058cb 480 WriteReg(REG_COM7,reg_com7|COM7_VGA);
smorioka 0:f31ceb6058cb 481
smorioka 0:f31ceb6058cb 482 WriteReg(REG_HSTART,HSTART_VGA);
smorioka 0:f31ceb6058cb 483 WriteReg(REG_HSTOP,HSTOP_VGA);
smorioka 0:f31ceb6058cb 484 WriteReg(REG_HREF,HREF_VGA);
smorioka 0:f31ceb6058cb 485 WriteReg(REG_VSTART,VSTART_VGA);
smorioka 0:f31ceb6058cb 486 WriteReg(REG_VSTOP,VSTOP_VGA);
smorioka 0:f31ceb6058cb 487 WriteReg(REG_VREF,VREF_VGA);
smorioka 0:f31ceb6058cb 488 WriteReg(REG_COM3, COM3_VGA);
smorioka 0:f31ceb6058cb 489 WriteReg(REG_COM14, COM14_VGA);
smorioka 0:f31ceb6058cb 490 WriteReg(REG_SCALING_XSC, SCALING_XSC_VGA);
smorioka 0:f31ceb6058cb 491 WriteReg(REG_SCALING_YSC, SCALING_YSC_VGA);
smorioka 0:f31ceb6058cb 492 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_VGA);
smorioka 0:f31ceb6058cb 493 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_VGA);
smorioka 0:f31ceb6058cb 494 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_VGA);
smorioka 0:f31ceb6058cb 495
smorioka 0:f31ceb6058cb 496 WriteReg(REG_HSTART, 0x1b);
smorioka 0:f31ceb6058cb 497 WriteReg(REG_HSTOP, 0x57);
smorioka 0:f31ceb6058cb 498 WriteReg(REG_VSTART, 0x12);
smorioka 0:f31ceb6058cb 499 WriteReg(REG_VSTOP, 0x6c);
smorioka 0:f31ceb6058cb 500 }
smorioka 0:f31ceb6058cb 501
smorioka 0:f31ceb6058cb 502 void InitQVGA(void) {
smorioka 0:f31ceb6058cb 503 // QQVGA
smorioka 0:f31ceb6058cb 504 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 505
smorioka 0:f31ceb6058cb 506 WriteReg(REG_COM7,reg_com7|COM7_QVGA);
smorioka 0:f31ceb6058cb 507
smorioka 0:f31ceb6058cb 508 WriteReg(REG_HSTART,HSTART_QVGA);
smorioka 0:f31ceb6058cb 509 WriteReg(REG_HSTOP,HSTOP_QVGA);
smorioka 0:f31ceb6058cb 510 WriteReg(REG_HREF,HREF_QVGA);
smorioka 0:f31ceb6058cb 511 WriteReg(REG_VSTART,VSTART_QVGA);
smorioka 0:f31ceb6058cb 512 WriteReg(REG_VSTOP,VSTOP_QVGA);
smorioka 0:f31ceb6058cb 513 WriteReg(REG_VREF,VREF_QVGA);
smorioka 0:f31ceb6058cb 514 WriteReg(REG_COM3, COM3_QVGA);
smorioka 0:f31ceb6058cb 515 WriteReg(REG_COM14, COM14_QVGA);
smorioka 0:f31ceb6058cb 516 WriteReg(REG_SCALING_XSC, SCALING_XSC_QVGA);
smorioka 0:f31ceb6058cb 517 WriteReg(REG_SCALING_YSC, SCALING_YSC_QVGA);
smorioka 0:f31ceb6058cb 518 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_QVGA);
smorioka 0:f31ceb6058cb 519 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_QVGA);
smorioka 0:f31ceb6058cb 520 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_QVGA);
smorioka 0:f31ceb6058cb 521 }
smorioka 0:f31ceb6058cb 522
smorioka 0:f31ceb6058cb 523 void InitQQVGA(void) {
smorioka 0:f31ceb6058cb 524 // QQVGA
smorioka 0:f31ceb6058cb 525 int reg_com7 = ReadReg(REG_COM7);
smorioka 0:f31ceb6058cb 526
smorioka 0:f31ceb6058cb 527 WriteReg(REG_COM7,reg_com7|COM7_QQVGA);
smorioka 0:f31ceb6058cb 528
smorioka 0:f31ceb6058cb 529 WriteReg(REG_HSTART,HSTART_QQVGA);
smorioka 0:f31ceb6058cb 530 WriteReg(REG_HSTOP,HSTOP_QQVGA);
smorioka 0:f31ceb6058cb 531 WriteReg(REG_HREF,HREF_QQVGA);
smorioka 0:f31ceb6058cb 532 WriteReg(REG_VSTART,VSTART_QQVGA);
smorioka 0:f31ceb6058cb 533 WriteReg(REG_VSTOP,VSTOP_QQVGA);
smorioka 0:f31ceb6058cb 534 WriteReg(REG_VREF,VREF_QQVGA);
smorioka 0:f31ceb6058cb 535 WriteReg(REG_COM3, COM3_QQVGA);
smorioka 0:f31ceb6058cb 536 WriteReg(REG_COM14, COM14_QQVGA);
smorioka 0:f31ceb6058cb 537 WriteReg(REG_SCALING_XSC, SCALING_XSC_QQVGA);
smorioka 0:f31ceb6058cb 538 WriteReg(REG_SCALING_YSC, SCALING_YSC_QQVGA);
smorioka 0:f31ceb6058cb 539 WriteReg(REG_SCALING_DCWCTR, SCALING_DCWCTR_QQVGA);
smorioka 0:f31ceb6058cb 540 WriteReg(REG_SCALING_PCLK_DIV, SCALING_PCLK_DIV_QQVGA);
smorioka 0:f31ceb6058cb 541 WriteReg(REG_SCALING_PCLK_DELAY, SCALING_PCLK_DELAY_QQVGA);
smorioka 0:f31ceb6058cb 542 }
smorioka 0:f31ceb6058cb 543
smorioka 0:f31ceb6058cb 544 // vsync handler
smorioka 0:f31ceb6058cb 545 void VsyncHandler(void)
smorioka 0:f31ceb6058cb 546 {
smorioka 0:f31ceb6058cb 547 // Capture Enable
smorioka 0:f31ceb6058cb 548 if (CaptureReq) {
smorioka 0:f31ceb6058cb 549 wen = 1;
smorioka 0:f31ceb6058cb 550 Done = false;
smorioka 0:f31ceb6058cb 551 CaptureReq = false;
smorioka 0:f31ceb6058cb 552 } else {
smorioka 0:f31ceb6058cb 553 wen = 0;
smorioka 0:f31ceb6058cb 554 if (Busy) {
smorioka 0:f31ceb6058cb 555 Busy = false;
smorioka 0:f31ceb6058cb 556 Done = true;
smorioka 0:f31ceb6058cb 557 }
smorioka 0:f31ceb6058cb 558 }
smorioka 0:f31ceb6058cb 559
smorioka 0:f31ceb6058cb 560 // Hline Counter
smorioka 0:f31ceb6058cb 561 LastLines = LineCounter;
smorioka 0:f31ceb6058cb 562 LineCounter = 0;
smorioka 0:f31ceb6058cb 563 }
smorioka 0:f31ceb6058cb 564
smorioka 0:f31ceb6058cb 565 // href handler
smorioka 0:f31ceb6058cb 566 void HrefHandler(void)
smorioka 0:f31ceb6058cb 567 {
smorioka 0:f31ceb6058cb 568 LineCounter++;
smorioka 0:f31ceb6058cb 569 }
smorioka 0:f31ceb6058cb 570
smorioka 0:f31ceb6058cb 571 // Data Read
smorioka 0:f31ceb6058cb 572 int ReadOneByte(void)
smorioka 0:f31ceb6058cb 573 {
smorioka 0:f31ceb6058cb 574 int result;
smorioka 0:f31ceb6058cb 575 rclk = 1;
smorioka 0:f31ceb6058cb 576 // wait_us(1);
smorioka 0:f31ceb6058cb 577 result = data;
smorioka 0:f31ceb6058cb 578 rclk = 0;
smorioka 0:f31ceb6058cb 579 return result;
smorioka 0:f31ceb6058cb 580 }
smorioka 0:f31ceb6058cb 581
smorioka 0:f31ceb6058cb 582 // Data Start
smorioka 0:f31ceb6058cb 583 void ReadStart(void)
smorioka 0:f31ceb6058cb 584 {
smorioka 0:f31ceb6058cb 585 rrst = 0;
smorioka 0:f31ceb6058cb 586 oe = 0;
smorioka 0:f31ceb6058cb 587 wait_us(1);
smorioka 0:f31ceb6058cb 588 rclk = 0;
smorioka 0:f31ceb6058cb 589 wait_us(1);
smorioka 0:f31ceb6058cb 590 rclk = 1;
smorioka 0:f31ceb6058cb 591 wait_us(1);
smorioka 0:f31ceb6058cb 592 rrst = 1;
smorioka 0:f31ceb6058cb 593 }
smorioka 0:f31ceb6058cb 594
smorioka 0:f31ceb6058cb 595 // Data Stop
smorioka 0:f31ceb6058cb 596 void ReadStop(void)
smorioka 0:f31ceb6058cb 597 {
smorioka 0:f31ceb6058cb 598 oe = 1;
smorioka 0:f31ceb6058cb 599 ReadOneByte();
smorioka 0:f31ceb6058cb 600 rclk = 1;
smorioka 0:f31ceb6058cb 601 }
smorioka 0:f31ceb6058cb 602 };