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TARGET_K64F/TARGET_Freescale/TARGET_KPSDK_MCUS/TARGET_K64F/device/MK64F12/MK64F12_ewm.h@82:6473597d706e, 2014-04-07 (annotated)

Committer:
bogdanm
Date:
Mon Apr 07 18:28:36 2014 +0100
Revision:
82:6473597d706e
Release 82 of the mbed library



Main changes:



- support for K64F

- Revisited Nordic code structure

- Test infrastructure improvements

- various bug fixes

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 82:6473597d706e 1 /*
bogdanm 82:6473597d706e 2 * Copyright (c) 2014, Freescale Semiconductor, Inc.
bogdanm 82:6473597d706e 3 * All rights reserved.
bogdanm 82:6473597d706e 4 *
bogdanm 82:6473597d706e 5 * THIS SOFTWARE IS PROVIDED BY FREESCALE "AS IS" AND ANY EXPRESS OR IMPLIED
bogdanm 82:6473597d706e 6 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
bogdanm 82:6473597d706e 7 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
bogdanm 82:6473597d706e 8 * SHALL FREESCALE BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
bogdanm 82:6473597d706e 9 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
bogdanm 82:6473597d706e 10 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
bogdanm 82:6473597d706e 11 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
bogdanm 82:6473597d706e 12 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
bogdanm 82:6473597d706e 13 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
bogdanm 82:6473597d706e 14 * OF SUCH DAMAGE.
bogdanm 82:6473597d706e 15 */
bogdanm 82:6473597d706e 16 /*
bogdanm 82:6473597d706e 17 * WARNING! DO NOT EDIT THIS FILE DIRECTLY!
bogdanm 82:6473597d706e 18 *
bogdanm 82:6473597d706e 19 * This file was generated automatically and any changes may be lost.
bogdanm 82:6473597d706e 20 */
bogdanm 82:6473597d706e 21 #ifndef __HW_EWM_REGISTERS_H__
bogdanm 82:6473597d706e 22 #define __HW_EWM_REGISTERS_H__
bogdanm 82:6473597d706e 23
bogdanm 82:6473597d706e 24 #include "regs.h"
bogdanm 82:6473597d706e 25
bogdanm 82:6473597d706e 26 /*
bogdanm 82:6473597d706e 27 * MK64F12 EWM
bogdanm 82:6473597d706e 28 *
bogdanm 82:6473597d706e 29 * External Watchdog Monitor
bogdanm 82:6473597d706e 30 *
bogdanm 82:6473597d706e 31 * Registers defined in this header file:
bogdanm 82:6473597d706e 32 * - HW_EWM_CTRL - Control Register
bogdanm 82:6473597d706e 33 * - HW_EWM_SERV - Service Register
bogdanm 82:6473597d706e 34 * - HW_EWM_CMPL - Compare Low Register
bogdanm 82:6473597d706e 35 * - HW_EWM_CMPH - Compare High Register
bogdanm 82:6473597d706e 36 *
bogdanm 82:6473597d706e 37 * - hw_ewm_t - Struct containing all module registers.
bogdanm 82:6473597d706e 38 */
bogdanm 82:6473597d706e 39
bogdanm 82:6473597d706e 40 //! @name Module base addresses
bogdanm 82:6473597d706e 41 //@{
bogdanm 82:6473597d706e 42 #ifndef REGS_EWM_BASE
bogdanm 82:6473597d706e 43 #define HW_EWM_INSTANCE_COUNT (1U) //!< Number of instances of the EWM module.
bogdanm 82:6473597d706e 44 #define REGS_EWM_BASE (0x40061000U) //!< Base address for EWM.
bogdanm 82:6473597d706e 45 #endif
bogdanm 82:6473597d706e 46 //@}
bogdanm 82:6473597d706e 47
bogdanm 82:6473597d706e 48 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 49 // HW_EWM_CTRL - Control Register
bogdanm 82:6473597d706e 50 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 51
bogdanm 82:6473597d706e 52 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 53 /*!
bogdanm 82:6473597d706e 54 * @brief HW_EWM_CTRL - Control Register (RW)
bogdanm 82:6473597d706e 55 *
bogdanm 82:6473597d706e 56 * Reset value: 0x00U
bogdanm 82:6473597d706e 57 *
bogdanm 82:6473597d706e 58 * The CTRL register is cleared by any reset. INEN, ASSIN and EWMEN bits can be
bogdanm 82:6473597d706e 59 * written once after a CPU reset. Modifying these bits more than once, generates
bogdanm 82:6473597d706e 60 * a bus transfer error.
bogdanm 82:6473597d706e 61 */
bogdanm 82:6473597d706e 62 typedef union _hw_ewm_ctrl
bogdanm 82:6473597d706e 63 {
bogdanm 82:6473597d706e 64 uint8_t U;
bogdanm 82:6473597d706e 65 struct _hw_ewm_ctrl_bitfields
bogdanm 82:6473597d706e 66 {
bogdanm 82:6473597d706e 67 uint8_t EWMEN : 1; //!< [0] EWM enable.
bogdanm 82:6473597d706e 68 uint8_t ASSIN : 1; //!< [1] EWM_in's Assertion State Select.
bogdanm 82:6473597d706e 69 uint8_t INEN : 1; //!< [2] Input Enable.
bogdanm 82:6473597d706e 70 uint8_t INTEN : 1; //!< [3] Interrupt Enable.
bogdanm 82:6473597d706e 71 uint8_t RESERVED0 : 4; //!< [7:4]
bogdanm 82:6473597d706e 72 } B;
bogdanm 82:6473597d706e 73 } hw_ewm_ctrl_t;
bogdanm 82:6473597d706e 74 #endif
bogdanm 82:6473597d706e 75
bogdanm 82:6473597d706e 76 /*!
bogdanm 82:6473597d706e 77 * @name Constants and macros for entire EWM_CTRL register
bogdanm 82:6473597d706e 78 */
bogdanm 82:6473597d706e 79 //@{
bogdanm 82:6473597d706e 80 #define HW_EWM_CTRL_ADDR (REGS_EWM_BASE + 0x0U)
bogdanm 82:6473597d706e 81
bogdanm 82:6473597d706e 82 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 83 #define HW_EWM_CTRL (*(__IO hw_ewm_ctrl_t *) HW_EWM_CTRL_ADDR)
bogdanm 82:6473597d706e 84 #define HW_EWM_CTRL_RD() (HW_EWM_CTRL.U)
bogdanm 82:6473597d706e 85 #define HW_EWM_CTRL_WR(v) (HW_EWM_CTRL.U = (v))
bogdanm 82:6473597d706e 86 #define HW_EWM_CTRL_SET(v) (HW_EWM_CTRL_WR(HW_EWM_CTRL_RD() | (v)))
bogdanm 82:6473597d706e 87 #define HW_EWM_CTRL_CLR(v) (HW_EWM_CTRL_WR(HW_EWM_CTRL_RD() & ~(v)))
bogdanm 82:6473597d706e 88 #define HW_EWM_CTRL_TOG(v) (HW_EWM_CTRL_WR(HW_EWM_CTRL_RD() ^ (v)))
bogdanm 82:6473597d706e 89 #endif
bogdanm 82:6473597d706e 90 //@}
bogdanm 82:6473597d706e 91
bogdanm 82:6473597d706e 92 /*
bogdanm 82:6473597d706e 93 * Constants & macros for individual EWM_CTRL bitfields
bogdanm 82:6473597d706e 94 */
bogdanm 82:6473597d706e 95
bogdanm 82:6473597d706e 96 /*!
bogdanm 82:6473597d706e 97 * @name Register EWM_CTRL, field EWMEN[0] (RW)
bogdanm 82:6473597d706e 98 *
bogdanm 82:6473597d706e 99 * This bit when set, enables the EWM module. This resets the EWM counter to
bogdanm 82:6473597d706e 100 * zero and deasserts the EWM_out signal. Clearing EWMEN bit disables the EWM, and
bogdanm 82:6473597d706e 101 * therefore it cannot be enabled until a reset occurs, due to the write-once
bogdanm 82:6473597d706e 102 * nature of this bit.
bogdanm 82:6473597d706e 103 */
bogdanm 82:6473597d706e 104 //@{
bogdanm 82:6473597d706e 105 #define BP_EWM_CTRL_EWMEN (0U) //!< Bit position for EWM_CTRL_EWMEN.
bogdanm 82:6473597d706e 106 #define BM_EWM_CTRL_EWMEN (0x01U) //!< Bit mask for EWM_CTRL_EWMEN.
bogdanm 82:6473597d706e 107 #define BS_EWM_CTRL_EWMEN (1U) //!< Bit field size in bits for EWM_CTRL_EWMEN.
bogdanm 82:6473597d706e 108
bogdanm 82:6473597d706e 109 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 110 //! @brief Read current value of the EWM_CTRL_EWMEN field.
bogdanm 82:6473597d706e 111 #define BR_EWM_CTRL_EWMEN (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_EWMEN))
bogdanm 82:6473597d706e 112 #endif
bogdanm 82:6473597d706e 113
bogdanm 82:6473597d706e 114 //! @brief Format value for bitfield EWM_CTRL_EWMEN.
bogdanm 82:6473597d706e 115 #define BF_EWM_CTRL_EWMEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_EWM_CTRL_EWMEN), uint8_t) & BM_EWM_CTRL_EWMEN)
bogdanm 82:6473597d706e 116
bogdanm 82:6473597d706e 117 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 118 //! @brief Set the EWMEN field to a new value.
bogdanm 82:6473597d706e 119 #define BW_EWM_CTRL_EWMEN(v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_EWMEN) = (v))
bogdanm 82:6473597d706e 120 #endif
bogdanm 82:6473597d706e 121 //@}
bogdanm 82:6473597d706e 122
bogdanm 82:6473597d706e 123 /*!
bogdanm 82:6473597d706e 124 * @name Register EWM_CTRL, field ASSIN[1] (RW)
bogdanm 82:6473597d706e 125 *
bogdanm 82:6473597d706e 126 * Default assert state of the EWM_in signal is logic zero. Setting ASSIN bit
bogdanm 82:6473597d706e 127 * inverts the assert state to a logic one.
bogdanm 82:6473597d706e 128 */
bogdanm 82:6473597d706e 129 //@{
bogdanm 82:6473597d706e 130 #define BP_EWM_CTRL_ASSIN (1U) //!< Bit position for EWM_CTRL_ASSIN.
bogdanm 82:6473597d706e 131 #define BM_EWM_CTRL_ASSIN (0x02U) //!< Bit mask for EWM_CTRL_ASSIN.
bogdanm 82:6473597d706e 132 #define BS_EWM_CTRL_ASSIN (1U) //!< Bit field size in bits for EWM_CTRL_ASSIN.
bogdanm 82:6473597d706e 133
bogdanm 82:6473597d706e 134 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 135 //! @brief Read current value of the EWM_CTRL_ASSIN field.
bogdanm 82:6473597d706e 136 #define BR_EWM_CTRL_ASSIN (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_ASSIN))
bogdanm 82:6473597d706e 137 #endif
bogdanm 82:6473597d706e 138
bogdanm 82:6473597d706e 139 //! @brief Format value for bitfield EWM_CTRL_ASSIN.
bogdanm 82:6473597d706e 140 #define BF_EWM_CTRL_ASSIN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_EWM_CTRL_ASSIN), uint8_t) & BM_EWM_CTRL_ASSIN)
bogdanm 82:6473597d706e 141
bogdanm 82:6473597d706e 142 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 143 //! @brief Set the ASSIN field to a new value.
bogdanm 82:6473597d706e 144 #define BW_EWM_CTRL_ASSIN(v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_ASSIN) = (v))
bogdanm 82:6473597d706e 145 #endif
bogdanm 82:6473597d706e 146 //@}
bogdanm 82:6473597d706e 147
bogdanm 82:6473597d706e 148 /*!
bogdanm 82:6473597d706e 149 * @name Register EWM_CTRL, field INEN[2] (RW)
bogdanm 82:6473597d706e 150 *
bogdanm 82:6473597d706e 151 * This bit when set, enables the EWM_in port.
bogdanm 82:6473597d706e 152 */
bogdanm 82:6473597d706e 153 //@{
bogdanm 82:6473597d706e 154 #define BP_EWM_CTRL_INEN (2U) //!< Bit position for EWM_CTRL_INEN.
bogdanm 82:6473597d706e 155 #define BM_EWM_CTRL_INEN (0x04U) //!< Bit mask for EWM_CTRL_INEN.
bogdanm 82:6473597d706e 156 #define BS_EWM_CTRL_INEN (1U) //!< Bit field size in bits for EWM_CTRL_INEN.
bogdanm 82:6473597d706e 157
bogdanm 82:6473597d706e 158 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 159 //! @brief Read current value of the EWM_CTRL_INEN field.
bogdanm 82:6473597d706e 160 #define BR_EWM_CTRL_INEN (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_INEN))
bogdanm 82:6473597d706e 161 #endif
bogdanm 82:6473597d706e 162
bogdanm 82:6473597d706e 163 //! @brief Format value for bitfield EWM_CTRL_INEN.
bogdanm 82:6473597d706e 164 #define BF_EWM_CTRL_INEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_EWM_CTRL_INEN), uint8_t) & BM_EWM_CTRL_INEN)
bogdanm 82:6473597d706e 165
bogdanm 82:6473597d706e 166 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 167 //! @brief Set the INEN field to a new value.
bogdanm 82:6473597d706e 168 #define BW_EWM_CTRL_INEN(v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_INEN) = (v))
bogdanm 82:6473597d706e 169 #endif
bogdanm 82:6473597d706e 170 //@}
bogdanm 82:6473597d706e 171
bogdanm 82:6473597d706e 172 /*!
bogdanm 82:6473597d706e 173 * @name Register EWM_CTRL, field INTEN[3] (RW)
bogdanm 82:6473597d706e 174 *
bogdanm 82:6473597d706e 175 * This bit when set and EWM_out is asserted, an interrupt request is generated.
bogdanm 82:6473597d706e 176 * To de-assert interrupt request, user should clear this bit by writing 0.
bogdanm 82:6473597d706e 177 */
bogdanm 82:6473597d706e 178 //@{
bogdanm 82:6473597d706e 179 #define BP_EWM_CTRL_INTEN (3U) //!< Bit position for EWM_CTRL_INTEN.
bogdanm 82:6473597d706e 180 #define BM_EWM_CTRL_INTEN (0x08U) //!< Bit mask for EWM_CTRL_INTEN.
bogdanm 82:6473597d706e 181 #define BS_EWM_CTRL_INTEN (1U) //!< Bit field size in bits for EWM_CTRL_INTEN.
bogdanm 82:6473597d706e 182
bogdanm 82:6473597d706e 183 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 184 //! @brief Read current value of the EWM_CTRL_INTEN field.
bogdanm 82:6473597d706e 185 #define BR_EWM_CTRL_INTEN (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_INTEN))
bogdanm 82:6473597d706e 186 #endif
bogdanm 82:6473597d706e 187
bogdanm 82:6473597d706e 188 //! @brief Format value for bitfield EWM_CTRL_INTEN.
bogdanm 82:6473597d706e 189 #define BF_EWM_CTRL_INTEN(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_EWM_CTRL_INTEN), uint8_t) & BM_EWM_CTRL_INTEN)
bogdanm 82:6473597d706e 190
bogdanm 82:6473597d706e 191 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 192 //! @brief Set the INTEN field to a new value.
bogdanm 82:6473597d706e 193 #define BW_EWM_CTRL_INTEN(v) (BITBAND_ACCESS8(HW_EWM_CTRL_ADDR, BP_EWM_CTRL_INTEN) = (v))
bogdanm 82:6473597d706e 194 #endif
bogdanm 82:6473597d706e 195 //@}
bogdanm 82:6473597d706e 196
bogdanm 82:6473597d706e 197 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 198 // HW_EWM_SERV - Service Register
bogdanm 82:6473597d706e 199 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 200
bogdanm 82:6473597d706e 201 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 202 /*!
bogdanm 82:6473597d706e 203 * @brief HW_EWM_SERV - Service Register (WORZ)
bogdanm 82:6473597d706e 204 *
bogdanm 82:6473597d706e 205 * Reset value: 0x00U
bogdanm 82:6473597d706e 206 *
bogdanm 82:6473597d706e 207 * The SERV register provides the interface from the CPU to the EWM module. It
bogdanm 82:6473597d706e 208 * is write-only and reads of this register return zero.
bogdanm 82:6473597d706e 209 */
bogdanm 82:6473597d706e 210 typedef union _hw_ewm_serv
bogdanm 82:6473597d706e 211 {
bogdanm 82:6473597d706e 212 uint8_t U;
bogdanm 82:6473597d706e 213 struct _hw_ewm_serv_bitfields
bogdanm 82:6473597d706e 214 {
bogdanm 82:6473597d706e 215 uint8_t SERVICE : 8; //!< [7:0]
bogdanm 82:6473597d706e 216 } B;
bogdanm 82:6473597d706e 217 } hw_ewm_serv_t;
bogdanm 82:6473597d706e 218 #endif
bogdanm 82:6473597d706e 219
bogdanm 82:6473597d706e 220 /*!
bogdanm 82:6473597d706e 221 * @name Constants and macros for entire EWM_SERV register
bogdanm 82:6473597d706e 222 */
bogdanm 82:6473597d706e 223 //@{
bogdanm 82:6473597d706e 224 #define HW_EWM_SERV_ADDR (REGS_EWM_BASE + 0x1U)
bogdanm 82:6473597d706e 225
bogdanm 82:6473597d706e 226 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 227 #define HW_EWM_SERV (*(__O hw_ewm_serv_t *) HW_EWM_SERV_ADDR)
bogdanm 82:6473597d706e 228 #define HW_EWM_SERV_RD() (HW_EWM_SERV.U)
bogdanm 82:6473597d706e 229 #define HW_EWM_SERV_WR(v) (HW_EWM_SERV.U = (v))
bogdanm 82:6473597d706e 230 #endif
bogdanm 82:6473597d706e 231 //@}
bogdanm 82:6473597d706e 232
bogdanm 82:6473597d706e 233 /*
bogdanm 82:6473597d706e 234 * Constants & macros for individual EWM_SERV bitfields
bogdanm 82:6473597d706e 235 */
bogdanm 82:6473597d706e 236
bogdanm 82:6473597d706e 237 /*!
bogdanm 82:6473597d706e 238 * @name Register EWM_SERV, field SERVICE[7:0] (WORZ)
bogdanm 82:6473597d706e 239 *
bogdanm 82:6473597d706e 240 * The EWM service mechanism requires the CPU to write two values to the SERV
bogdanm 82:6473597d706e 241 * register: a first data byte of 0xB4, followed by a second data byte of 0x2C. The
bogdanm 82:6473597d706e 242 * EWM service is illegal if either of the following conditions is true. The
bogdanm 82:6473597d706e 243 * first or second data byte is not written correctly. The second data byte is not
bogdanm 82:6473597d706e 244 * written within a fixed number of peripheral bus cycles of the first data byte.
bogdanm 82:6473597d706e 245 * This fixed number of cycles is called EWM_service_time.
bogdanm 82:6473597d706e 246 */
bogdanm 82:6473597d706e 247 //@{
bogdanm 82:6473597d706e 248 #define BP_EWM_SERV_SERVICE (0U) //!< Bit position for EWM_SERV_SERVICE.
bogdanm 82:6473597d706e 249 #define BM_EWM_SERV_SERVICE (0xFFU) //!< Bit mask for EWM_SERV_SERVICE.
bogdanm 82:6473597d706e 250 #define BS_EWM_SERV_SERVICE (8U) //!< Bit field size in bits for EWM_SERV_SERVICE.
bogdanm 82:6473597d706e 251
bogdanm 82:6473597d706e 252 //! @brief Format value for bitfield EWM_SERV_SERVICE.
bogdanm 82:6473597d706e 253 #define BF_EWM_SERV_SERVICE(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_EWM_SERV_SERVICE), uint8_t) & BM_EWM_SERV_SERVICE)
bogdanm 82:6473597d706e 254
bogdanm 82:6473597d706e 255 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 256 //! @brief Set the SERVICE field to a new value.
bogdanm 82:6473597d706e 257 #define BW_EWM_SERV_SERVICE(v) (HW_EWM_SERV_WR(v))
bogdanm 82:6473597d706e 258 #endif
bogdanm 82:6473597d706e 259 //@}
bogdanm 82:6473597d706e 260
bogdanm 82:6473597d706e 261 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 262 // HW_EWM_CMPL - Compare Low Register
bogdanm 82:6473597d706e 263 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 264
bogdanm 82:6473597d706e 265 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 266 /*!
bogdanm 82:6473597d706e 267 * @brief HW_EWM_CMPL - Compare Low Register (RW)
bogdanm 82:6473597d706e 268 *
bogdanm 82:6473597d706e 269 * Reset value: 0x00U
bogdanm 82:6473597d706e 270 *
bogdanm 82:6473597d706e 271 * The CMPL register is reset to zero after a CPU reset. This provides no
bogdanm 82:6473597d706e 272 * minimum time for the CPU to service the EWM counter. This register can be written
bogdanm 82:6473597d706e 273 * only once after a CPU reset. Writing this register more than once generates a
bogdanm 82:6473597d706e 274 * bus transfer error.
bogdanm 82:6473597d706e 275 */
bogdanm 82:6473597d706e 276 typedef union _hw_ewm_cmpl
bogdanm 82:6473597d706e 277 {
bogdanm 82:6473597d706e 278 uint8_t U;
bogdanm 82:6473597d706e 279 struct _hw_ewm_cmpl_bitfields
bogdanm 82:6473597d706e 280 {
bogdanm 82:6473597d706e 281 uint8_t COMPAREL : 8; //!< [7:0]
bogdanm 82:6473597d706e 282 } B;
bogdanm 82:6473597d706e 283 } hw_ewm_cmpl_t;
bogdanm 82:6473597d706e 284 #endif
bogdanm 82:6473597d706e 285
bogdanm 82:6473597d706e 286 /*!
bogdanm 82:6473597d706e 287 * @name Constants and macros for entire EWM_CMPL register
bogdanm 82:6473597d706e 288 */
bogdanm 82:6473597d706e 289 //@{
bogdanm 82:6473597d706e 290 #define HW_EWM_CMPL_ADDR (REGS_EWM_BASE + 0x2U)
bogdanm 82:6473597d706e 291
bogdanm 82:6473597d706e 292 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 293 #define HW_EWM_CMPL (*(__IO hw_ewm_cmpl_t *) HW_EWM_CMPL_ADDR)
bogdanm 82:6473597d706e 294 #define HW_EWM_CMPL_RD() (HW_EWM_CMPL.U)
bogdanm 82:6473597d706e 295 #define HW_EWM_CMPL_WR(v) (HW_EWM_CMPL.U = (v))
bogdanm 82:6473597d706e 296 #define HW_EWM_CMPL_SET(v) (HW_EWM_CMPL_WR(HW_EWM_CMPL_RD() | (v)))
bogdanm 82:6473597d706e 297 #define HW_EWM_CMPL_CLR(v) (HW_EWM_CMPL_WR(HW_EWM_CMPL_RD() & ~(v)))
bogdanm 82:6473597d706e 298 #define HW_EWM_CMPL_TOG(v) (HW_EWM_CMPL_WR(HW_EWM_CMPL_RD() ^ (v)))
bogdanm 82:6473597d706e 299 #endif
bogdanm 82:6473597d706e 300 //@}
bogdanm 82:6473597d706e 301
bogdanm 82:6473597d706e 302 /*
bogdanm 82:6473597d706e 303 * Constants & macros for individual EWM_CMPL bitfields
bogdanm 82:6473597d706e 304 */
bogdanm 82:6473597d706e 305
bogdanm 82:6473597d706e 306 /*!
bogdanm 82:6473597d706e 307 * @name Register EWM_CMPL, field COMPAREL[7:0] (RW)
bogdanm 82:6473597d706e 308 *
bogdanm 82:6473597d706e 309 * To prevent runaway code from changing this field, software should write to
bogdanm 82:6473597d706e 310 * this field after a CPU reset even if the (default) minimum service time is
bogdanm 82:6473597d706e 311 * required.
bogdanm 82:6473597d706e 312 */
bogdanm 82:6473597d706e 313 //@{
bogdanm 82:6473597d706e 314 #define BP_EWM_CMPL_COMPAREL (0U) //!< Bit position for EWM_CMPL_COMPAREL.
bogdanm 82:6473597d706e 315 #define BM_EWM_CMPL_COMPAREL (0xFFU) //!< Bit mask for EWM_CMPL_COMPAREL.
bogdanm 82:6473597d706e 316 #define BS_EWM_CMPL_COMPAREL (8U) //!< Bit field size in bits for EWM_CMPL_COMPAREL.
bogdanm 82:6473597d706e 317
bogdanm 82:6473597d706e 318 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 319 //! @brief Read current value of the EWM_CMPL_COMPAREL field.
bogdanm 82:6473597d706e 320 #define BR_EWM_CMPL_COMPAREL (HW_EWM_CMPL.U)
bogdanm 82:6473597d706e 321 #endif
bogdanm 82:6473597d706e 322
bogdanm 82:6473597d706e 323 //! @brief Format value for bitfield EWM_CMPL_COMPAREL.
bogdanm 82:6473597d706e 324 #define BF_EWM_CMPL_COMPAREL(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_EWM_CMPL_COMPAREL), uint8_t) & BM_EWM_CMPL_COMPAREL)
bogdanm 82:6473597d706e 325
bogdanm 82:6473597d706e 326 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 327 //! @brief Set the COMPAREL field to a new value.
bogdanm 82:6473597d706e 328 #define BW_EWM_CMPL_COMPAREL(v) (HW_EWM_CMPL_WR(v))
bogdanm 82:6473597d706e 329 #endif
bogdanm 82:6473597d706e 330 //@}
bogdanm 82:6473597d706e 331
bogdanm 82:6473597d706e 332 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 333 // HW_EWM_CMPH - Compare High Register
bogdanm 82:6473597d706e 334 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 335
bogdanm 82:6473597d706e 336 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 337 /*!
bogdanm 82:6473597d706e 338 * @brief HW_EWM_CMPH - Compare High Register (RW)
bogdanm 82:6473597d706e 339 *
bogdanm 82:6473597d706e 340 * Reset value: 0xFFU
bogdanm 82:6473597d706e 341 *
bogdanm 82:6473597d706e 342 * The CMPH register is reset to 0xFF after a CPU reset. This provides a maximum
bogdanm 82:6473597d706e 343 * of 256 clocks time, for the CPU to service the EWM counter. This register can
bogdanm 82:6473597d706e 344 * be written only once after a CPU reset. Writing this register more than once
bogdanm 82:6473597d706e 345 * generates a bus transfer error. The valid values for CMPH are up to 0xFE
bogdanm 82:6473597d706e 346 * because the EWM counter never expires when CMPH = 0xFF. The expiration happens only
bogdanm 82:6473597d706e 347 * if EWM counter is greater than CMPH.
bogdanm 82:6473597d706e 348 */
bogdanm 82:6473597d706e 349 typedef union _hw_ewm_cmph
bogdanm 82:6473597d706e 350 {
bogdanm 82:6473597d706e 351 uint8_t U;
bogdanm 82:6473597d706e 352 struct _hw_ewm_cmph_bitfields
bogdanm 82:6473597d706e 353 {
bogdanm 82:6473597d706e 354 uint8_t COMPAREH : 8; //!< [7:0]
bogdanm 82:6473597d706e 355 } B;
bogdanm 82:6473597d706e 356 } hw_ewm_cmph_t;
bogdanm 82:6473597d706e 357 #endif
bogdanm 82:6473597d706e 358
bogdanm 82:6473597d706e 359 /*!
bogdanm 82:6473597d706e 360 * @name Constants and macros for entire EWM_CMPH register
bogdanm 82:6473597d706e 361 */
bogdanm 82:6473597d706e 362 //@{
bogdanm 82:6473597d706e 363 #define HW_EWM_CMPH_ADDR (REGS_EWM_BASE + 0x3U)
bogdanm 82:6473597d706e 364
bogdanm 82:6473597d706e 365 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 366 #define HW_EWM_CMPH (*(__IO hw_ewm_cmph_t *) HW_EWM_CMPH_ADDR)
bogdanm 82:6473597d706e 367 #define HW_EWM_CMPH_RD() (HW_EWM_CMPH.U)
bogdanm 82:6473597d706e 368 #define HW_EWM_CMPH_WR(v) (HW_EWM_CMPH.U = (v))
bogdanm 82:6473597d706e 369 #define HW_EWM_CMPH_SET(v) (HW_EWM_CMPH_WR(HW_EWM_CMPH_RD() | (v)))
bogdanm 82:6473597d706e 370 #define HW_EWM_CMPH_CLR(v) (HW_EWM_CMPH_WR(HW_EWM_CMPH_RD() & ~(v)))
bogdanm 82:6473597d706e 371 #define HW_EWM_CMPH_TOG(v) (HW_EWM_CMPH_WR(HW_EWM_CMPH_RD() ^ (v)))
bogdanm 82:6473597d706e 372 #endif
bogdanm 82:6473597d706e 373 //@}
bogdanm 82:6473597d706e 374
bogdanm 82:6473597d706e 375 /*
bogdanm 82:6473597d706e 376 * Constants & macros for individual EWM_CMPH bitfields
bogdanm 82:6473597d706e 377 */
bogdanm 82:6473597d706e 378
bogdanm 82:6473597d706e 379 /*!
bogdanm 82:6473597d706e 380 * @name Register EWM_CMPH, field COMPAREH[7:0] (RW)
bogdanm 82:6473597d706e 381 *
bogdanm 82:6473597d706e 382 * To prevent runaway code from changing this field, software should write to
bogdanm 82:6473597d706e 383 * this field after a CPU reset even if the (default) maximum service time is
bogdanm 82:6473597d706e 384 * required.
bogdanm 82:6473597d706e 385 */
bogdanm 82:6473597d706e 386 //@{
bogdanm 82:6473597d706e 387 #define BP_EWM_CMPH_COMPAREH (0U) //!< Bit position for EWM_CMPH_COMPAREH.
bogdanm 82:6473597d706e 388 #define BM_EWM_CMPH_COMPAREH (0xFFU) //!< Bit mask for EWM_CMPH_COMPAREH.
bogdanm 82:6473597d706e 389 #define BS_EWM_CMPH_COMPAREH (8U) //!< Bit field size in bits for EWM_CMPH_COMPAREH.
bogdanm 82:6473597d706e 390
bogdanm 82:6473597d706e 391 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 392 //! @brief Read current value of the EWM_CMPH_COMPAREH field.
bogdanm 82:6473597d706e 393 #define BR_EWM_CMPH_COMPAREH (HW_EWM_CMPH.U)
bogdanm 82:6473597d706e 394 #endif
bogdanm 82:6473597d706e 395
bogdanm 82:6473597d706e 396 //! @brief Format value for bitfield EWM_CMPH_COMPAREH.
bogdanm 82:6473597d706e 397 #define BF_EWM_CMPH_COMPAREH(v) (__REG_VALUE_TYPE((__REG_VALUE_TYPE((v), uint8_t) << BP_EWM_CMPH_COMPAREH), uint8_t) & BM_EWM_CMPH_COMPAREH)
bogdanm 82:6473597d706e 398
bogdanm 82:6473597d706e 399 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 400 //! @brief Set the COMPAREH field to a new value.
bogdanm 82:6473597d706e 401 #define BW_EWM_CMPH_COMPAREH(v) (HW_EWM_CMPH_WR(v))
bogdanm 82:6473597d706e 402 #endif
bogdanm 82:6473597d706e 403 //@}
bogdanm 82:6473597d706e 404
bogdanm 82:6473597d706e 405 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 406 // hw_ewm_t - module struct
bogdanm 82:6473597d706e 407 //-------------------------------------------------------------------------------------------
bogdanm 82:6473597d706e 408 /*!
bogdanm 82:6473597d706e 409 * @brief All EWM module registers.
bogdanm 82:6473597d706e 410 */
bogdanm 82:6473597d706e 411 #ifndef __LANGUAGE_ASM__
bogdanm 82:6473597d706e 412 #pragma pack(1)
bogdanm 82:6473597d706e 413 typedef struct _hw_ewm
bogdanm 82:6473597d706e 414 {
bogdanm 82:6473597d706e 415 __IO hw_ewm_ctrl_t CTRL; //!< [0x0] Control Register
bogdanm 82:6473597d706e 416 __O hw_ewm_serv_t SERV; //!< [0x1] Service Register
bogdanm 82:6473597d706e 417 __IO hw_ewm_cmpl_t CMPL; //!< [0x2] Compare Low Register
bogdanm 82:6473597d706e 418 __IO hw_ewm_cmph_t CMPH; //!< [0x3] Compare High Register
bogdanm 82:6473597d706e 419 } hw_ewm_t;
bogdanm 82:6473597d706e 420 #pragma pack()
bogdanm 82:6473597d706e 421
bogdanm 82:6473597d706e 422 //! @brief Macro to access all EWM registers.
bogdanm 82:6473597d706e 423 //! @return Reference (not a pointer) to the registers struct. To get a pointer to the struct,
bogdanm 82:6473597d706e 424 //! use the '&' operator, like <code>&HW_EWM</code>.
bogdanm 82:6473597d706e 425 #define HW_EWM (*(hw_ewm_t *) REGS_EWM_BASE)
bogdanm 82:6473597d706e 426 #endif
bogdanm 82:6473597d706e 427
bogdanm 82:6473597d706e 428 #endif // __HW_EWM_REGISTERS_H__
bogdanm 82:6473597d706e 429 // v22/130726/0.9
bogdanm 82:6473597d706e 430 // EOF